Lerking/OSACA
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Merge branch 'master' into pr-armcc

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This commit is contained in:
JanLJL
2023-03-14 17:50:48 +01:00
parent eab6907c82 7e6eb7ce58
commit 0b93766bdd
8 changed files with 228 additions and 48 deletions
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1
tests/test_files/kernel_aarch64.s
View File

@@ -23,3 +23,4 @@
// OSACA-END
fmov s1, #2.0e+2f
prfm pldl1keep, [x26, #2112]
add x11, x11, x11

16
tests/test_parser_AArch64.py
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@@ -89,7 +89,8 @@ class TestParserAArch64(unittest.TestCase):
instr5 = "ldr x0, [x0, #:got_lo12:q2c]"
instr6 = "adrp x0, :got:visited"
instr7 = "fadd v17.2d, v16.2d, v1.2d"
instr8 = "ccmp x0, x1, #4, cc"
instr8 = "mov.d x0, v16.d[1]"
instr9 = "ccmp x0, x1, #4, cc"
parsed_1 = self.parser.parse_instruction(instr1)
parsed_2 = self.parser.parse_instruction(instr2)
@@ -99,6 +100,7 @@ class TestParserAArch64(unittest.TestCase):
parsed_6 = self.parser.parse_instruction(instr6)
parsed_7 = self.parser.parse_instruction(instr7)
parsed_8 = self.parser.parse_instruction(instr8)
parsed_9 = self.parser.parse_instruction(instr9)
self.assertEqual(parsed_1.instruction, "vcvt.F32.S32")
self.assertEqual(parsed_1.operands[0].register.name, "1")
@@ -152,10 +154,18 @@ class TestParserAArch64(unittest.TestCase):
self.assertEqual(parsed_7.operands[0].register.shape, "d")
self.assertEqual(self.parser.get_full_reg_name(parsed_7.operands[2].register), "v1.2d")
self.assertEqual(parsed_8.instruction, "ccmp")
self.assertEqual(parsed_8.instruction, "mov.d")
self.assertEqual(parsed_8.operands[0].register.name, "0")
self.assertEqual(parsed_8.operands[0].register.prefix, "x")
self.assertEqual(parsed_8.operands[3].condition, "CC")
self.assertEqual(parsed_8.operands[1].register.name, "16")
self.assertEqual(parsed_8.operands[1].register.prefix, "v")
self.assertEqual(parsed_8.operands[1].register.index, "1")
self.assertEqual(self.parser.get_full_reg_name(parsed_8.operands[1].register), "v16.d[1]")
self.assertEqual(parsed_9.instruction, "ccmp")
self.assertEqual(parsed_9.operands[0].register.name, "0")
self.assertEqual(parsed_9.operands[0].register.prefix, "x")
self.assertEqual(parsed_9.operands[3].condition, "CC")
def test_parse_line(self):
line_comment = "// -- Begin main"

4
tests/test_semantics.py
View File

@@ -167,6 +167,10 @@ class TestSemanticTools(unittest.TestCase):
test_mm_arm.get_instruction("b.ne", [{"class": "identifier"}]),
test_mm_arm.get_instruction("b.ne", [{"class": "identifier"}]),
)
self.assertEqual(
test_mm_arm.get_instruction("b.someNameThatDoesNotExist", [{"class": "identifier"}]),
test_mm_arm.get_instruction("b.someOtherName", [{"class": "identifier"}]),
)
# test full instruction name
self.assertEqual(