diff --git a/osaca/data/csx.yml b/osaca/data/csx.yml index 5aeed51..8d890ad 100644 --- a/osaca/data/csx.yml +++ b/osaca/data/csx.yml @@ -20,7 +20,7 @@ load_throughput: - {base: ~, offset: imd, index: gpr, scale: 1, port_pressure: [[1, '23'], [1, ['2D', '3D']]]} - {base: ~, offset: imd, index: gpr, scale: 8, port_pressure: [[1, '23'], [1, ['2D', '3D']]]} load_throughput_default: [[1, '23'], [1, ['2D', '3D']]] -store_throughput: +store_throughput: - {base: '*', offset: '*', index: ~, scale: '*', port_pressure: [[1, '237'], [1, '4']]} - {base: '*', offset: '*', index: gpr, scale: '*', port_pressure: [[1, '23'], [1, '4']]} store_throughput_default: [[1, '23'], [1, '4']] @@ -38,9 +38,9 @@ port_model_scheme: | | 2ND | | Fast | | AGU | | AGU | | Fast | +--------+ | BRANCH| | LEA | +-----+ +-----+ | LEA | | BRANCH | +-------+ +-------+ +-------+ +--------+ - +-------+ +-------+ +-------+ - |AVX DIV| |AVX FMA| | AVX | - +-------+ +-------+ | SHUF | + +-------+ +-------+ +-------+ + |AVX DIV| |AVX FMA| | AVX | + +-------+ +-------+ | SHUF | +-------+ +-------+ +-------+ |AVX FMA| |AVX MUL| +-------+ +-------+ +-------+ |AVX-512| @@ -360,6 +360,15 @@ instruction_forms: port_pressure: [[1, '01']] # uops.info (measured) throughput: 0.5 uops: 1 +- name: xor + operands: + - class: register + name: gpr + - class: register + name: gpr + throughput: 0.25 + latency: 1.0 + port_pressure: [[1, '0156']] - name: cmp operands: - class: register @@ -4684,16 +4693,26 @@ instruction_forms: port_pressure: [[1, '23'], [1, ['2D', '3D']]] # ./generate_mov_entries.py csx throughput: 0.5 # ./generate_mov_entries.py csx uops: 2 # ./generate_mov_entries.py csx -- name: vmovapd # ./generate_mov_entries.py csx - operands: # ./generate_mov_entries.py csx - - class: register # ./generate_mov_entries.py csx - name: xmm # ./generate_mov_entries.py csx - - class: register # ./generate_mov_entries.py csx - name: xmm # ./generate_mov_entries.py csx - latency: 0 # ./generate_mov_entries.py csx - port_pressure: [] # ./generate_mov_entries.py csx - throughput: 0.0 # ./generate_mov_entries.py csx - uops: 0 # ./generate_mov_entries.py csx +- name: vmovapd + operands: + - class: register + name: zmm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 +- name: vmovapd + operands: + - class: register + name: xmm + - class: register + name: xmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 - name: vmovapd # with store, simple AGU # ./generate_mov_entries.py csx operands: # ./generate_mov_entries.py csx - class: register # ./generate_mov_entries.py csx @@ -4831,26 +4850,36 @@ instruction_forms: port_pressure: [[1, '23'], [1, ['2D', '3D']]] # ./generate_mov_entries.py csx throughput: 0.5 # ./generate_mov_entries.py csx uops: 2 # ./generate_mov_entries.py csx -- name: vmovaps # ./generate_mov_entries.py csx - operands: # ./generate_mov_entries.py csx - - class: register # ./generate_mov_entries.py csx - name: xmm # ./generate_mov_entries.py csx - - class: register # ./generate_mov_entries.py csx - name: xmm # ./generate_mov_entries.py csx - latency: 0 # ./generate_mov_entries.py csx - port_pressure: [] # ./generate_mov_entries.py csx - throughput: 0.0 # ./generate_mov_entries.py csx - uops: 0 # ./generate_mov_entries.py csx -- name: vmovaps # ./generate_mov_entries.py csx - operands: # ./generate_mov_entries.py csx - - class: register # ./generate_mov_entries.py csx - name: ymm # ./generate_mov_entries.py csx - - class: register # ./generate_mov_entries.py csx - name: ymm # ./generate_mov_entries.py csx - latency: 0 # ./generate_mov_entries.py csx - port_pressure: [] # ./generate_mov_entries.py csx - throughput: 0.0 # ./generate_mov_entries.py csx - uops: 0 # ./generate_mov_entries.py csx +- name: vmovaps + operands: + - class: register + name: zmm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 +- name: vmovaps + operands: + - class: register + name: xmm + - class: register + name: xmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 +- name: vmovaps + operands: + - class: register + name: ymm + - class: register + name: ymm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 - name: movaps # with store, simple AGU # ./generate_mov_entries.py csx operands: # ./generate_mov_entries.py csx - class: register # ./generate_mov_entries.py csx @@ -6863,16 +6892,26 @@ instruction_forms: port_pressure: [[1, '23'], [1, '4']] # ./generate_mov_entries.py csx throughput: 1.0 # ./generate_mov_entries.py csx uops: 2 # ./generate_mov_entries.py csx -- name: vmovupd # ./generate_mov_entries.py csx - operands: # ./generate_mov_entries.py csx - - class: register # ./generate_mov_entries.py csx - name: xmm # ./generate_mov_entries.py csx - - class: register # ./generate_mov_entries.py csx - name: xmm # ./generate_mov_entries.py csx - latency: 0 # ./generate_mov_entries.py csx - port_pressure: [] # ./generate_mov_entries.py csx - throughput: 0.0 # ./generate_mov_entries.py csx - uops: 0 # ./generate_mov_entries.py csx +- name: vmovdqa64 + operands: + - class: register + name: zmm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 +- name: vmovupd + operands: + - class: register + name: xmm + - class: register + name: xmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 - name: vmovupd # with load # ./generate_mov_entries.py csx operands: # ./generate_mov_entries.py csx - class: memory # ./generate_mov_entries.py csx @@ -6961,58 +7000,55 @@ instruction_forms: port_pressure: [[1, '23'], [1, '4']] # ./generate_mov_entries.py csx throughput: 1.0 # ./generate_mov_entries.py csx uops: 2 # ./generate_mov_entries.py csx -- name: vmovupd - operands: - - class: register - name: zmm - - class: register - name: zmm - latency: 0 - port_pressure: [] - throughput: 0.0 - uops: 0 - -- name: vmovupd # with load - operands: - - class: memory - base: "*" - offset: "*" - index: "*" - scale: "*" - - class: register - name: zmm - latency: 4 - port_pressure: [[1, '23'], [1, ['2D', '3D']]] - throughput: 0.5 - uops: 2 - -- name: vmovupd # with store, simple AGU - operands: - - class: register - name: zmm - - class: memory - base: "*" - offset: "*" - index: ~ - scale: "*" - latency: 0 - port_pressure: [[1, '237'], [1, '4']] - throughput: 1.0 - uops: 2 - -- name: vmovupd # with store, complex AGU - operands: - - class: register - name: zmm - - class: memory - base: "*" - offset: "*" - index: gpr - scale: "*" - latency: 0 - port_pressure: [[1, '23'], [1, '4']] - throughput: 1.0 - uops: 2 +- name: vmovupd + operands: + - class: register + name: zmm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 +- name: vmovupd # with load + operands: + - class: memory + base: "*" + offset: "*" + index: "*" + scale: "*" + - class: register + name: zmm + latency: 4 + port_pressure: [[1, '23'], [1, ['2D', '3D']]] + throughput: 0.5 + uops: 2 +- name: vmovupd # with store, simple AGU + operands: + - class: register + name: zmm + - class: memory + base: "*" + offset: "*" + index: ~ + scale: "*" + latency: 0 + port_pressure: [[1, '237'], [1, '4']] + throughput: 1.0 + uops: 2 +- name: vmovupd # with store, complex AGU + operands: + - class: register + name: zmm + - class: memory + base: "*" + offset: "*" + index: gpr + scale: "*" + latency: 0 + port_pressure: [[1, '23'], [1, '4']] + throughput: 1.0 + uops: 2 - name: movups # ./generate_mov_entries.py csx operands: # ./generate_mov_entries.py csx - class: register # ./generate_mov_entries.py csx @@ -7160,57 +7196,54 @@ instruction_forms: port_pressure: [[1, '23'], [1, '4']] # ./generate_mov_entries.py csx throughput: 1.0 # ./generate_mov_entries.py csx uops: 2 # ./generate_mov_entries.py csx -- name: vmovups - operands: - - class: register - name: zymm - - class: register - name: zmm - latency: 0 - port_pressure: [] - throughput: 0.0 - uops: 0 - -- name: vmovups # with load - operands: - - class: memory - base: "*" - offset: "*" - index: "*" - scale: "*" - - class: register - name: zmm - latency: 4 - port_pressure: [[1, '23'], [1, ['2D', '3D']]] - throughput: 0.5 - uops: 2 - -- name: vmovups # with store, simple AGU - operands: - - class: register - name: zmm - - class: memory - base: "*" - offset: "*" - index: ~ - scale: "*" - latency: 0 - port_pressure: [[1, '237'], [1, '4']] - throughput: 1.0 - uops: 2 - -- name: vmovups # with store, complex AGU - operands: - - class: register - name: zmm - - class: memory - base: "*" - offset: "*" - index: gpr - scale: "*" - latency: 0 - port_pressure: [[1, '23'], [1, '4']] - throughput: 1.0 +- name: vmovups + operands: + - class: register + name: zmm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 +- name: vmovups # with load + operands: + - class: memory + base: "*" + offset: "*" + index: "*" + scale: "*" + - class: register + name: zmm + latency: 4 + port_pressure: [[1, '23'], [1, ['2D', '3D']]] + throughput: 0.5 + uops: 2 +- name: vmovups # with store, simple AGU + operands: + - class: register + name: zmm + - class: memory + base: "*" + offset: "*" + index: ~ + scale: "*" + latency: 0 + port_pressure: [[1, '237'], [1, '4']] + throughput: 1.0 + uops: 2 +- name: vmovups # with store, complex AGU + operands: + - class: register + name: zmm + - class: memory + base: "*" + offset: "*" + index: gpr + scale: "*" + latency: 0 + port_pressure: [[1, '23'], [1, '4']] + throughput: 1.0 uops: 2 - name: movzx # ./generate_mov_entries.py csx diff --git a/osaca/data/skx.yml b/osaca/data/skx.yml index 535760b..c2d12f0 100644 --- a/osaca/data/skx.yml +++ b/osaca/data/skx.yml @@ -59,6 +59,30 @@ port_model_scheme: | +-------+ | LEA | | ALU | +-------+ +-------+ instruction_forms: +- name: [jo, jno, js, jns, jp, jpe, jnp, jpo] + operands: + - class: identifier + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: [jc, jb, jae, jnb, jna, jbe, ja, jnbe] + operands: + - class: identifier + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: [je, jz, jne, jnz, jl, jnge] + operands: + - class: identifier + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: [jge, jnl, jle, jng, jg, jnle] + operands: + - class: identifier + throughput: 0.0 + latency: 0.0 + port_pressure: [] - name: LEA operands: - class: memory