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Refactor: RISC-V parser, code formatting, and flake8 compliance

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- Enhanced RISC-V parser to support reloc_type and symbol in ImmediateOperand.
- Added missing attributes (reloc_type, symbol) to ImmediateOperand and updated __eq__ for backward compatibility.
- Fixed all flake8 (E501, E265, F401, F841) and Black formatting issues across the codebase.
- Improved docstrings and split long lines for better readability.
- Fixed test failures related to ImmediateOperand instantiation and attribute errors.
- Ensured all tests pass, including edge cases for RISC-V, x86, and AArch64.
- Updated .gitignore and documentation as needed.
- Renamed example files for consistency (rv6 -> rv64).
This commit is contained in:
Metehan Dundar
2025-07-04 23:21:06 +02:00
parent 61b52dbf28
commit 1ceac6e9f3
47 changed files with 2368 additions and 787 deletions
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60
tests/test_marker_utils.py
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@@ -22,7 +22,7 @@ class TestMarkerUtils(unittest.TestCase):
self.parser_x86_att = ParserX86ATT()
self.parser_x86_intel = ParserX86Intel()
self.parser_RISCV = ParserRISCV()
with open(self._find_file("triad_arm_iaca.s")) as f:
triad_code_arm = f.read()
with open(self._find_file("triad_x86_iaca.s")) as f:
@@ -31,7 +31,7 @@ class TestMarkerUtils(unittest.TestCase):
triad_code_x86_intel = f.read()
with open(self._find_file("kernel_riscv.s")) as f:
kernel_code_riscv = f.read()
self.parsed_AArch = self.parser_AArch.parse_file(triad_code_arm)
self.parsed_x86_att = self.parser_x86_att.parse_file(triad_code_x86_att)
self.parsed_x86_intel = self.parser_x86_intel.parse_file(triad_code_x86_intel)
@@ -74,7 +74,9 @@ class TestMarkerUtils(unittest.TestCase):
bytes_3_lines_1 = ".byte 213,3\n" + ".byte 32\n" + ".byte 31\n"
bytes_3_lines_2 = ".byte 213\n" + ".byte 3,32\n" + ".byte 31\n"
bytes_3_lines_3 = ".byte 213\n" + ".byte 3\n" + ".byte 32,31\n"
bytes_4_lines = ".byte 213\n" + ".byte 3\n" + ".byte 32\n" + ".byte 31\n"
bytes_4_lines = (
".byte 213\n" + ".byte 3\n" + ".byte 32\n" + ".byte 31\n"
)
bytes_hex = ".byte 0xd5, 0x3, 0x20, 0x1f\n"
bytes_mixed = ".byte 0xd5\n.byte 3,0x20\n.byte 31\n"
mov_start_1 = "mov x1, #111\n"
@@ -130,13 +132,17 @@ class TestMarkerUtils(unittest.TestCase):
bytes_end=bytes_var_2,
):
sample_parsed = self.parser_AArch.parse_file(sample_code)
sample_kernel = reduce_to_section(sample_parsed, ParserAArch64())
sample_kernel = reduce_to_section(
sample_parsed, ParserAArch64()
)
self.assertEqual(len(sample_kernel), kernel_length)
kernel_start = len(
list(
filter(
None,
(prologue + mov_start_var + bytes_var_1).split("\n"),
(prologue + mov_start_var + bytes_var_1).split(
"\n"
),
)
)
)
@@ -202,13 +208,17 @@ class TestMarkerUtils(unittest.TestCase):
bytes_end=bytes_var_2,
):
sample_parsed = self.parser_x86_att.parse_file(sample_code)
sample_kernel = reduce_to_section(sample_parsed, ParserX86ATT())
sample_kernel = reduce_to_section(
sample_parsed, ParserX86ATT()
)
self.assertEqual(len(sample_kernel), kernel_length)
kernel_start = len(
list(
filter(
None,
(prologue + mov_start_var + bytes_var_1).split("\n"),
(prologue + mov_start_var + bytes_var_1).split(
"\n"
),
)
)
)
@@ -245,7 +255,7 @@ class TestMarkerUtils(unittest.TestCase):
]
li_start_variations = [li_start_1, li_start_2]
li_end_variations = [li_end_1, li_end_2]
# actual tests for RISC-V
for li_start_var in li_start_variations:
for bytes_var_1 in bytes_variations:
@@ -267,13 +277,17 @@ class TestMarkerUtils(unittest.TestCase):
bytes_end=bytes_var_2,
):
sample_parsed = self.parser_RISCV.parse_file(sample_code)
sample_kernel = reduce_to_section(sample_parsed, ParserRISCV())
sample_kernel = reduce_to_section(
sample_parsed, ParserRISCV()
)
self.assertEqual(len(sample_kernel), kernel_length)
kernel_start = len(
list(
filter(
None,
(prologue + li_start_var + bytes_var_1).split("\n"),
(prologue + li_start_var + bytes_var_1).split(
"\n"
),
)
)
)
@@ -323,7 +337,9 @@ class TestMarkerUtils(unittest.TestCase):
kernel_start = len((pro).strip().split("\n"))
else:
kernel_start = 0
parsed_kernel = self.parser_AArch.parse_file(kernel, start_line=kernel_start)
parsed_kernel = self.parser_AArch.parse_file(
kernel, start_line=kernel_start
)
self.assertEqual(
test_kernel,
parsed_kernel,
@@ -334,7 +350,9 @@ class TestMarkerUtils(unittest.TestCase):
bytes_line = ".byte 100\n" ".byte 103\n" ".byte 144\n"
start_marker = "movl $111, %ebx\n" + bytes_line
end_marker = "movl $222, %ebx\n" + bytes_line
prologue = "movl -88(%rbp), %r10d\n" "xorl %r11d, %r11d\n" ".p2align 4,,10\n"
prologue = (
"movl -88(%rbp), %r10d\n" "xorl %r11d, %r11d\n" ".p2align 4,,10\n"
)
kernel = (
".L3: #L3\n"
"vmovsd .LC1(%rip), %xmm0\n"
@@ -342,7 +360,9 @@ class TestMarkerUtils(unittest.TestCase):
"cmpl %ecx, %ebx\n"
"jle .L3\n"
)
epilogue = "leaq -56(%rbp), %rsi\n" "movl %r10d, -88(%rbp)\n" "call timing\n"
epilogue = (
"leaq -56(%rbp), %rsi\n" "movl %r10d, -88(%rbp)\n" "call timing\n"
)
samples = [
# (test name,
# ignored prologue, section to be extraced, ignored epilogue)
@@ -371,7 +391,9 @@ class TestMarkerUtils(unittest.TestCase):
kernel_start = len((pro).strip().split("\n"))
else:
kernel_start = 0
parsed_kernel = self.parser_x86_att.parse_file(kernel, start_line=kernel_start)
parsed_kernel = self.parser_x86_att.parse_file(
kernel, start_line=kernel_start
)
self.assertEqual(
test_kernel,
@@ -422,7 +444,9 @@ class TestMarkerUtils(unittest.TestCase):
kernel_start = len((pro).strip().split("\n"))
else:
kernel_start = 0
parsed_kernel = self.parser_RISCV.parse_file(kernel, start_line=kernel_start)
parsed_kernel = self.parser_RISCV.parse_file(
kernel, start_line=kernel_start
)
self.assertEqual(
test_kernel,
parsed_kernel,
@@ -490,7 +514,7 @@ class TestMarkerUtils(unittest.TestCase):
]
),
)
# Check that find_jump_labels works for RISC-V
riscv_labels = find_jump_labels(self.parsed_RISCV)
self.assertIsInstance(riscv_labels, OrderedDict)
@@ -559,7 +583,7 @@ class TestMarkerUtils(unittest.TestCase):
("main", 575, 590),
],
)
# Check that find_basic_blocks works for RISC-V
riscv_blocks = find_basic_blocks(self.parsed_RISCV)
self.assertGreater(len(riscv_blocks), 0)
@@ -587,7 +611,7 @@ class TestMarkerUtils(unittest.TestCase):
(".LBB0_35", 494, 504),
],
)
# Check that find_basic_loop_bodies works for RISC-V
riscv_loop_bodies = find_basic_loop_bodies(self.parsed_RISCV)
self.assertGreater(len(riscv_loop_bodies), 0)