Added shift and shift_op to Register Operand

This commit is contained in:
stefandesouza
2024-01-04 14:34:36 +01:00
parent 0b3508abf8
commit 226bc8eee0
4 changed files with 35 additions and 26 deletions

View File

@@ -390,12 +390,10 @@ class ParserAArch64(BaseParser):
def process_directive_operand(self, operand):
return DirectiveOperand(
name=operand["name"],
parameter_id=operand["parameters"],
comment_id=operand["comment"]
if "comment" in operand
else None,
)
name=operand["name"],
parameter_id=operand["parameters"],
comment_id=operand["comment"] if "comment" in operand else None,
)
def process_register_operand(self, operand):
return RegisterOperand(
@@ -435,7 +433,9 @@ class ParserAArch64(BaseParser):
scale = 2 ** int(memory_address["index"]["shift"][0]["value"])
if index is not None:
index = RegisterOperand(
name=index["name"], prefix_id=index["prefix"] if "prefix" in index else None
name=index["name"], prefix_id=index["prefix"] if "prefix" in index else None,
shift=index["shift"] if "shift" in index else None,
shift_op=index["shift_op"] if "shift_op" in index else None
)
new_dict = MemoryOperand(
offset_ID=offset,

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@@ -305,17 +305,13 @@ class ParserX86ATT(BaseParser):
def process_register(self, operand):
return RegisterOperand(
prefix_id=operand["prefix"]
if "prefix" in operand
else None,
name=operand["name"],
shape=operand["shape"] if "shape" in operand else None,
lanes=operand["lanes"] if "lanes" in operand else None,
index=operand["index"] if "index" in operand else None,
predication=operand["predication"]
if "predication" in operand
else None,
)
prefix_id=operand["prefix"] if "prefix" in operand else None,
name=operand["name"],
shape=operand["shape"] if "shape" in operand else None,
lanes=operand["lanes"] if "lanes" in operand else None,
index=operand["index"] if "index" in operand else None,
predication=operand["predication"] if "predication" in operand else None,
)
def process_directive(self, directive):
directive_new = DirectiveOperand(name=directive["name"], parameter_id=[])
@@ -367,7 +363,6 @@ class ParserX86ATT(BaseParser):
name=label["name"], comment_id=label["comment"] if "comment" in label else None
)
def process_immediate(self, immediate):
"""Post-process immediate operand"""
if "identifier" in immediate:

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@@ -21,6 +21,8 @@ class RegisterOperand(Operand):
destination=False,
pre_indexed=False,
post_indexed=False,
shift=False,
shift_op=False
):
super().__init__(name, source, destination)
self._width_id = width_id
@@ -35,6 +37,8 @@ class RegisterOperand(Operand):
self._predication = predication
self._pre_indexed = pre_indexed
self._post_indexed = post_indexed
self._shift = shift
self._shift_op = shift_op
@property
def width(self):
@@ -44,6 +48,22 @@ class RegisterOperand(Operand):
def width(self, width):
self._width_id = width
@property
def shift(self):
return self._shift
@shift.setter
def shift(self, shift):
self._shift = shift
@property
def shift_op(self):
return self._shift_op
@shift_op.setter
def shift_op(self, shift_op):
self._shift_op = shift_op
@property
def predication(self):
return self._predication

View File

@@ -216,13 +216,7 @@ class TestParserAArch64(unittest.TestCase):
MemoryOperand(
offset_ID=None,
base_id=RegisterOperand(prefix_id="x", name="11"),
index_id={
"prefix": "w",
"name": "10",
"shift_op": "sxtw",
"immediate": {"value": "2"},
"shift": [{"value": "2"}],
},
index_id=RegisterOperand(prefix_id="w", name="10", shift_op="sxtw", shift=[{"value": "2"}]),
scale_id=4,
),
],