diff --git a/osaca/parser/memory.py b/osaca/parser/memory.py
index 25d07a6..9e79c3c 100644
--- a/osaca/parser/memory.py
+++ b/osaca/parser/memory.py
@@ -15,6 +15,7 @@ class MemoryOperand(Operand):
         pre_indexed=False,
         post_indexed=False,
         indexed_val=None,
+        src=None,
         dst=None,
         source=False,
         destination=False,
@@ -29,6 +30,8 @@ class MemoryOperand(Operand):
         self._pre_indexed = pre_indexed
         self._post_indexed = post_indexed
         self._indexed_val = indexed_val
+        # type of register we store from (`src`) or load to (`dst`)
+        self._src = src
         self._dst = dst
 
     @property
@@ -71,6 +74,14 @@ class MemoryOperand(Operand):
     def indexed_val(self):
         return self._indexed_val
 
+    @property
+    def src(self):
+        return self._src
+
+    @src.setter
+    def src(self, src):
+        self._src = src
+
     @property
     def dst(self):
         return self._dst
diff --git a/osaca/semantics/hw_model.py b/osaca/semantics/hw_model.py
index 76be6c9..a3d9d06 100644
--- a/osaca/semantics/hw_model.py
+++ b/osaca/semantics/hw_model.py
@@ -179,6 +179,7 @@ class MachineModel(object):
                                     offset=m["offset"],
                                     scale=m["scale"],
                                     index=m["index"],
+                                    src=m["src"] if "src" in m else None,
                                 ),
                                 m["port_pressure"],
                             )
@@ -408,8 +409,8 @@ class MachineModel(object):
             st_tp = [
                 tp
                 for tp in st_tp
-                if "src" in tp[0]
-                and self._check_operands(src_reg, RegisterOperand(name=tp[0]["src"]))
+                if tp[0].src is not None
+                and self._check_operands(src_reg, RegisterOperand(name=tp[0].src))
             ]
         if len(st_tp) > 0:
             return st_tp.copy()