diff --git a/osaca/frontend.py b/osaca/frontend.py index 41e9311..e0f517f 100755 --- a/osaca/frontend.py +++ b/osaca/frontend.py @@ -76,7 +76,7 @@ class Frontend(object): self._get_flag_symbols(instruction_form['flags']) if instruction_form['instruction'] is not None else ' ', - instruction_form['line'].strip(), + instruction_form['line'].strip().replace('\t', ' '), ) line = line if show_lineno else col_sep + col_sep.join(line.split(col_sep)[1:]) if show_cmnts is False and self._is_comment(instruction_form): @@ -138,7 +138,7 @@ class Frontend(object): separator, sum([instr_form['latency_lcd'] for instr_form in dep_dict[dep]['dependencies']]), separator, - dep_dict[dep]['root']['line'], + dep_dict[dep]['root']['line'].strip(), separator, [node['line_number'] for node in dep_dict[dep]['dependencies']], ) @@ -246,7 +246,7 @@ class Frontend(object): self._get_flag_symbols(instruction_form['flags']) if instruction_form['instruction'] is not None else ' ', - instruction_form['line'].strip(), + instruction_form['line'].strip().replace('\t', ' '), ) s += '\n' # check for unknown instructions and throw warning if called without --ignore-unknown diff --git a/osaca/parser/parser_AArch64.py b/osaca/parser/parser_AArch64.py index 5456997..73c4c9e 100755 --- a/osaca/parser/parser_AArch64.py +++ b/osaca/parser/parser_AArch64.py @@ -218,7 +218,7 @@ class ParserAArch64(BaseParser): self.DIRECTIVE_ID: None, self.COMMENT_ID: None, self.LABEL_ID: None, - 'line': line.strip().replace('\t',' '), + 'line': line, 'line_number': line_number, } ) diff --git a/osaca/parser/parser_x86att.py b/osaca/parser/parser_x86att.py index ecdee66..e80f278 100755 --- a/osaca/parser/parser_x86att.py +++ b/osaca/parser/parser_x86att.py @@ -184,7 +184,7 @@ class ParserX86ATT(BaseParser): self.DIRECTIVE_ID: None, self.COMMENT_ID: None, self.LABEL_ID: None, - 'line': line.strip(), + 'line': line, 'line_number': line_number, } ) diff --git a/tests/test_parser_AArch64.py b/tests/test_parser_AArch64.py index ee1fbff..0c7d713 100755 --- a/tests/test_parser_AArch64.py +++ b/tests/test_parser_AArch64.py @@ -146,8 +146,8 @@ class TestParserAArch64(unittest.TestCase): def test_parse_line(self): line_comment = '// -- Begin main' line_label = '.LBB0_1: // =>This Inner Loop Header: Depth=1' - line_directive = '\t.cfi_def_cfa w29, -16' - line_instruction = '\tldr s0, [x11, w10, sxtw #2] // = <<2' + line_directive = '.cfi_def_cfa w29, -16' + line_instruction = 'ldr s0, [x11, w10, sxtw #2] // = <<2' line_prefetch = 'prfm pldl1keep, [x26, #2048] //HPL' line_preindexed = 'stp x29, x30, [sp, #-16]!' line_postindexed = 'ldp q2, q3, [x11], #64' diff --git a/tests/test_parser_x86att.py b/tests/test_parser_x86att.py index 47fb334..253518c 100755 --- a/tests/test_parser_x86att.py +++ b/tests/test_parser_x86att.py @@ -156,8 +156,8 @@ class TestParserX86ATT(unittest.TestCase): def test_parse_line(self): line_comment = '# -- Begin main' line_label = '..B1.7: # Preds ..B1.6' - line_directive = '\t\t.quad .2.3_2__kmpc_loc_pack.2 #qed' - line_instruction = '\t\tlea 2(%rax,%rax), %ecx #12.9' + line_directive = '.quad .2.3_2__kmpc_loc_pack.2 #qed' + line_instruction = 'lea 2(%rax,%rax), %ecx #12.9' instruction_form_1 = { 'instruction': None,