From 3243455ec55be0b2529bb2fc27f89bf1d1084eb3 Mon Sep 17 00:00:00 2001 From: JanLJL Date: Wed, 29 Jan 2020 13:04:03 +0100 Subject: [PATCH] bugfixes and new instructions --- osaca/data/csx.yml | 162 ++++++++++++++++++++++++++++++++++++++++- osaca/data/isa/x86.yml | 14 +++- osaca/data/tx2.yml | 10 +++ osaca/data/zen1.yml | 45 +++++++++++- 4 files changed, 225 insertions(+), 6 deletions(-) diff --git a/osaca/data/csx.yml b/osaca/data/csx.yml index e5613ab..325d50a 100644 --- a/osaca/data/csx.yml +++ b/osaca/data/csx.yml @@ -968,6 +968,17 @@ instruction_forms: port_pressure: [[1, '05']] throughput: 0.5 uops: 1 +- name: vaddpd + operands: + - class: register + name: zmm + - class: register + name: zmm + - class: register + name: zmm + throughput: 0.5 + latency: 4.0 # 1"*"p01 + port_pressure: [[1, '05']] - name: vaddpd operands: - class: register @@ -2534,6 +2545,18 @@ instruction_forms: port_pressure: [[1, '01']] throughput: 0.5 uops: 1 +- name: VFMADD213PD # JH: assumed from SKX + operands: + - class: register + name: zmm + - class: register + name: zmm + - class: register + name: zmm + latency: 4 + port_pressure: [[1, '05']] + throughput: 0.5 + uops: 1 - name: VFMADD213PS # JH: assumed from SKX operands: - class: register @@ -2908,6 +2931,15 @@ instruction_forms: throughput: 0.5 latency: 4.0 # 1"*"p01 port_pressure: [[1, '01']] +- name: mulpd + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1"*"p01 + port_pressure: [[1, '01']] - name: vmulpd operands: - class: register @@ -4426,6 +4458,30 @@ instruction_forms: port_pressure: [[1, '0']] throughput: 1.0 uops: 1 +- name: VUNPCKHPD # JL: assumed from SKX + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + latency: 1 + port_pressure: [[1, '5']] + throughput: 1.0 + uops: 1 +- name: VEXTRACTF64X2 # JL: assumed from SKX + operands: + - class: immediate + imd: int + - class: register + name: ymm + - class: register + name: xmm + latency: 3 + port_pressure: [[1, '5']] + throughput: 1.0 + uops: 1 - name: VUNPCKLPS # JH: assumed from SKX operands: - class: register @@ -7171,7 +7227,58 @@ instruction_forms: port_pressure: [[1, '23'], [1, '4']] # ./generate_mov_entries.py csx throughput: 1.0 # ./generate_mov_entries.py csx uops: 2 # ./generate_mov_entries.py csx - # ./generate_mov_entries.py csx +- name: vmovupd + operands: + - class: register + name: zmm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 + +- name: vmovupd # with load + operands: + - class: memory + base: "*" + offset: "*" + index: "*" + scale: "*" + - class: register + name: zmm + latency: 4 + port_pressure: [[1, '23'], [1, ['2D', '3D']]] + throughput: 0.5 + uops: 2 + +- name: vmovupd # with store, simple AGU + operands: + - class: register + name: zmm + - class: memory + base: "*" + offset: "*" + index: ~ + scale: "*" + latency: 0 + port_pressure: [[1, '237'], [1, '4']] + throughput: 1.0 + uops: 2 + +- name: vmovupd # with store, complex AGU + operands: + - class: register + name: zmm + - class: memory + base: "*" + offset: "*" + index: gpr + scale: "*" + latency: 0 + port_pressure: [[1, '23'], [1, '4']] + throughput: 1.0 + uops: 2 - name: movups # ./generate_mov_entries.py csx operands: # ./generate_mov_entries.py csx - class: register # ./generate_mov_entries.py csx @@ -7330,6 +7437,59 @@ instruction_forms: port_pressure: [[1, '23'], [1, '4']] # ./generate_mov_entries.py csx throughput: 1.0 # ./generate_mov_entries.py csx uops: 2 # ./generate_mov_entries.py csx +- name: vmovups + operands: + - class: register + name: zymm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 + +- name: vmovups # with load + operands: + - class: memory + base: "*" + offset: "*" + index: "*" + scale: "*" + - class: register + name: zmm + latency: 4 + port_pressure: [[1, '23'], [1, ['2D', '3D']]] + throughput: 0.5 + uops: 2 + +- name: vmovups # with store, simple AGU + operands: + - class: register + name: zmm + - class: memory + base: "*" + offset: "*" + index: ~ + scale: "*" + latency: 0 + port_pressure: [[1, '237'], [1, '4']] + throughput: 1.0 + uops: 2 + +- name: vmovups # with store, complex AGU + operands: + - class: register + name: zmm + - class: memory + base: "*" + offset: "*" + index: gpr + scale: "*" + latency: 0 + port_pressure: [[1, '23'], [1, '4']] + throughput: 1.0 + uops: 2 + # ./generate_mov_entries.py csx - name: movzx # ./generate_mov_entries.py csx operands: # ./generate_mov_entries.py csx diff --git a/osaca/data/isa/x86.yml b/osaca/data/isa/x86.yml index 423f275..c504286 100644 --- a/osaca/data/isa/x86.yml +++ b/osaca/data/isa/x86.yml @@ -2515,21 +2515,31 @@ instruction_forms: - class: "register" name: "xmm" source: true - destination: true + destination: false - class: "register" name: "xmm" source: true - destination: false + destination: true - name: mulss operands: + - class: "register" + name: "xmm" + source: true + destination: false - class: "register" name: "xmm" source: true destination: true + - name: mulpd + operands: - class: "register" name: "xmm" source: true destination: false + - class: "register" + name: "xmm" + source: true + destination: true - name: push operands: - class: "register" diff --git a/osaca/data/tx2.yml b/osaca/data/tx2.yml index 579617c..f46b7ae 100644 --- a/osaca/data/tx2.yml +++ b/osaca/data/tx2.yml @@ -135,6 +135,16 @@ instruction_forms: throughput: 0.33333333 latency: 1.0 # 1*p012 port_pressure: [[1, '012']] +- name: dup + operands: + - class: register + prefix: d + - class: register + prefix: v + shape: d + throughput: 0.5 + latency: 5.0 # 1*p01 + port_pressure: [[1, '01']] - name: fadd operands: - class: register diff --git a/osaca/data/zen1.yml b/osaca/data/zen1.yml index 45b5e64..04cc887 100644 --- a/osaca/data/zen1.yml +++ b/osaca/data/zen1.yml @@ -106,6 +106,12 @@ instruction_forms: throughput: 0.0 latency: 0 port_pressure: [] +- name: jge + operands: + - class: identifier + throughput: 0.0 + latency: 0 + port_pressure: [] - name: jb operands: - class: identifier @@ -277,7 +283,29 @@ instruction_forms: - class: register name: ymm throughput: 1.0 - latency: 4.0 # 2*p01 + latency: 5.0 # 2*p01 + port_pressure: [[2, '01']] +- name: vfmadd213pd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 5.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vfmadd213pd + operands: + - class: register + name: ymm + - class: register + name: ymm + - class: register + name: ymm + throughput: 1.0 + latency: 5.0 # 2*p01 port_pressure: [[2, '01']] - name: vfmadd231pd operands: @@ -288,8 +316,19 @@ instruction_forms: - class: register name: ymm throughput: 1.0 - latency: 4.0 # 2*p01 + latency: 5.0 # 2*p01 port_pressure: [[2, '01']] +- name: vfmadd132pd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 5.0 # 2*p01 + port_pressure: [[1, '01']] - name: vfmadd132pd operands: - class: register @@ -299,7 +338,7 @@ instruction_forms: - class: register name: ymm throughput: 1.0 - latency: 4.0 # 2*p01 + latency: 5.0 # 2*p01 port_pressure: [[2, '01']] - name: vmulsd operands: