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https://github.com/RRZE-HPC/OSACA.git
synced 2025-12-16 09:00:05 +01:00
Updated tests to use the now class style iforms in isa_data
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@@ -257,7 +257,7 @@ class ArchSemantics(ISASemantics):
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if instruction_data_reg:
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assign_unknown = False
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reg_type = self._parser.get_reg_type(
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instruction_data_reg["operands"][
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instruction_data_reg.operands[
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operands.index(self._create_reg_wildcard())
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]
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)
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@@ -318,10 +318,9 @@ class ArchSemantics(ISASemantics):
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not in instruction_form.semantic_operands["destination"]
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and all(
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[
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"post_indexed" in op["memory"]
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or "pre_indexed" in op["memory"]
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op.post_indexed or op.pre_indexed
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for op in instruction_form.semantic_operands["src_dst"]
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if "memory" in op
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if isinstance(op, MemoryOperand)
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]
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)
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):
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@@ -343,10 +342,8 @@ class ArchSemantics(ISASemantics):
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sum(x) for x in zip(data_port_pressure, st_data_port_pressure)
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]
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data_port_uops += st_data_port_uops
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throughput = max(
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max(data_port_pressure), instruction_data_reg["throughput"]
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)
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latency = instruction_data_reg["latency"]
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throughput = max(max(data_port_pressure), instruction_data_reg.throughput)
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latency = instruction_data_reg.latency
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# Add LD and ST latency
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latency += (
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self._machine_model.get_load_latency(reg_type)
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@@ -358,7 +355,7 @@ class ArchSemantics(ISASemantics):
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if INSTR_FLAGS.HAS_ST in instruction_form.flags
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else 0
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)
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latency_wo_load = instruction_data_reg["latency"]
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latency_wo_load = instruction_data_reg.latency
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# add latency of ADD if post- or pre-indexed load
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# TODO more investigation: check dot-graph, wrong latency distribution!
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# if (
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@@ -379,12 +376,12 @@ class ArchSemantics(ISASemantics):
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for x in zip(
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data_port_pressure,
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self._machine_model.average_port_pressure(
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instruction_data_reg["port_pressure"]
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instruction_data_reg.port_pressure
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),
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)
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]
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instruction_form.port_uops = list(
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chain(instruction_data_reg["port_pressure"], data_port_uops)
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chain(instruction_data_reg.port_pressure, data_port_uops)
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)
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if assign_unknown:
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@@ -410,11 +407,9 @@ class ArchSemantics(ISASemantics):
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def _handle_instruction_found(self, instruction_data, port_number, instruction_form, flags):
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"""Apply performance data to instruction if it was found in the archDB"""
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throughput = instruction_data["throughput"]
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port_pressure = self._machine_model.average_port_pressure(
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instruction_data["port_pressure"]
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)
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instruction_form.port_uops = instruction_data["port_pressure"]
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throughput = instruction_data.throughput
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port_pressure = self._machine_model.average_port_pressure(instruction_data.port_pressure)
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instruction_form.port_uops = instruction_data.port_pressure
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try:
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assert isinstance(port_pressure, list)
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assert len(port_pressure) == port_number
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@@ -434,7 +429,7 @@ class ArchSemantics(ISASemantics):
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# assume 0 cy and mark as unknown
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throughput = 0.0
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flags.append(INSTR_FLAGS.TP_UNKWN)
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latency = instruction_data["latency"]
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latency = instruction_data.latency
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latency_wo_load = latency
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if latency is None:
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# assume 0 cy and mark as unknown
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