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Port pressure returned in tuple with Memory Operand

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This commit is contained in:
stefandesouza
2024-03-04 20:00:43 +01:00
parent 46004add41
commit 38781ecc94
9 changed files with 46 additions and 46 deletions
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2
osaca/parser/base_parser.py
View File

@@ -10,7 +10,7 @@ class BaseParser(object):
directive_id = "directive"
immediate_id = "immediate"
label_id = "label"
identifier_id = "identifier"
identifier = "identifier"
memory_id = "memory"
register_id = "register"
condition_id = "condition"

18
osaca/parser/parser_AArch64.py
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@@ -52,7 +52,7 @@ class ParserAArch64(BaseParser):
pp.Suppress(pp.Literal("+"))
+ (hex_number | decimal_number).setResultsName("offset")
)
).setResultsName(self.identifier_id)
).setResultsName(self.identifier)
# Label
self.label = pp.Group(
identifier.setResultsName("name") + pp.Literal(":") + pp.Optional(self.comment)
@@ -381,8 +381,8 @@ class ParserAArch64(BaseParser):
return self.process_immediate(operand[self.immediate_id])
if self.label_id in operand:
return self.process_label(operand[self.label_id])
if self.identifier_id in operand:
return self.process_identifier(operand[self.identifier_id])
if self.identifier in operand:
return self.process_identifier(operand[self.identifier])
if self.register_id in operand:
return self.process_register_operand(operand[self.register_id])
if self.directive_id in operand:
@@ -414,7 +414,7 @@ class ParserAArch64(BaseParser):
if isinstance(offset, list) and len(offset) == 1:
offset = offset[0]
if offset is not None and "value" in offset:
offset = ImmediateOperand(value_id=int(offset["value"], 0))
offset = ImmediateOperand(value=int(offset["value"], 0))
if isinstance(offset, dict) and "identifier" in offset:
offset = self.process_identifier(offset["identifier"])
base = memory_address.get("base", None)
@@ -525,17 +525,17 @@ class ParserAArch64(BaseParser):
immediate["type"] = "int"
# convert hex/bin immediates to dec
new_immediate = ImmediateOperand(
type_id=immediate["type"], value_id=immediate["value"]
imd_type=immediate["type"], value=immediate["value"]
)
new_immediate.value = self.normalize_imd(new_immediate)
return new_immediate
if "base_immediate" in immediate:
# arithmetic immediate, add calculated value as value
immediate["shift"] = immediate["shift"][0]
temp_immediate = ImmediateOperand(value_id=immediate["base_immediate"]["value"])
temp_immediate = ImmediateOperand(value=immediate["base_immediate"]["value"])
immediate["type"] = "int"
new_immediate = ImmediateOperand(
type_id=immediate["type"], value_id=None, shift_id=immediate["shift"]
imd_type=immediate["type"], value=None, shift=immediate["shift"]
)
new_immediate.value = self.normalize_imd(temp_immediate) << int(
immediate["shift"]["value"]
@@ -548,11 +548,11 @@ class ParserAArch64(BaseParser):
if "exponent" in immediate[dict_name]:
immediate["type"] = dict_name
return ImmediateOperand(
type_id=immediate["type"], value_id=immediate[immediate["type"]]
imd_type=immediate["type"], value=immediate[immediate["type"]]
)
else:
# change 'mantissa' key to 'value'
return ImmediateOperand(value_id=immediate[dict_name]["mantissa"], type_id=dict_name)
return ImmediateOperand(value=immediate[dict_name]["mantissa"], imd_type=dict_name)
def process_label(self, label):
"""Post-process label asm line"""

12
osaca/parser/parser_x86att.py
View File

@@ -302,8 +302,8 @@ class ParserX86ATT(BaseParser):
return self.process_directive(operand[self.directive_id])
if self.register_id in operand:
return self.process_register(operand[self.register_id])
if self.identifier_id in operand:
return self.process_identifier(operand[self.identifier_id])
if self.identifier in operand:
return self.process_identifier(operand[self.identifier])
return operand
def process_register(self, operand):
@@ -331,11 +331,11 @@ class ParserX86ATT(BaseParser):
scale = 1 if "scale" not in memory_address else int(memory_address["scale"], 0)
if isinstance(offset, str) and base is None and index is None:
try:
offset = ImmediateOperand(value_id=int(offset, 0))
offset = ImmediateOperand(value=int(offset, 0))
except ValueError:
offset = ImmediateOperand(value_id=offset)
offset = ImmediateOperand(value=offset)
elif offset is not None and "value" in offset:
offset = ImmediateOperand(value_id=int(offset["value"], 0))
offset = ImmediateOperand(value=int(offset["value"], 0))
if base is not None:
baseOp = RegisterOperand(
name=base["name"], prefix=base["prefix"] if "prefix" in base else None
@@ -366,7 +366,7 @@ class ParserX86ATT(BaseParser):
# actually an identifier, change declaration
return self.process_identifier(immediate["identifier"])
# otherwise just make sure the immediate is a decimal
new_immediate = ImmediateOperand(value_id=int(immediate["value"], 0))
new_immediate = ImmediateOperand(value=int(immediate["value"], 0))
return new_immediate
def process_identifier(self, identifier):

2
osaca/semantics/arch_semantics.py
View File

@@ -270,7 +270,7 @@ class ArchSemantics(ISASemantics):
for x in instruction_form.semantic_operands["source"]
+ instruction_form.semantic_operands["src_dst"]
if isinstance(x, MemoryOperand)
]
][0]
)
# if multiple options, choose based on reg type
data_port_uops = [

8
osaca/semantics/hw_model.py
View File

@@ -223,7 +223,7 @@ class MachineModel(object):
elif o["class"] == "immediate":
new_operands.append(
ImmediateOperand(
type_id=o["imd"],
imd_type=o["imd"],
source=o["source"] if "source" in o else False,
destination=o["destination"] if "destination" in o else False,
)
@@ -377,7 +377,7 @@ class MachineModel(object):
ld_tp = [m for m in self._data["load_throughput"] if self._match_mem_entries(memory, m[0])]
if len(ld_tp) > 0:
return ld_tp.copy()
return [memory, self._data["load_throughput_default"].copy()]
return [(memory, self._data["load_throughput_default"].copy())]
def get_store_latency(self, reg_type):
"""Return store latency for given register type."""
@@ -615,7 +615,7 @@ class MachineModel(object):
def _create_db_operand_aarch64(self, operand):
"""Create instruction form operand for DB out of operand string."""
if operand == "i":
return ImmediateOperand(type_id="int")
return ImmediateOperand(imd_type="int")
elif operand in "wxbhsdq":
return RegisterOperand(prefix=operand)
elif operand.startswith("v"):
@@ -639,7 +639,7 @@ class MachineModel(object):
elif operand in "xyz":
return RegisterOperand(name=operand + "mm")
elif operand == "i":
return ImmediateOperand(type_id="int")
return ImmediateOperand(imd_type="int")
elif operand.startswith("m"):
return MemoryOperand(
base="gpr" if "b" in operand else None,

2
tests/test_base_parser.py
View File

@@ -63,7 +63,7 @@ class TestBaseParser(unittest.TestCase):
self.parser.get_full_reg_name(reg_a1)
def test_normalize_imd(self):
imd_hex_1 = ImmediateOperand(value_id="0x4f")
imd_hex_1 = ImmediateOperand(value="0x4f")
with self.assertRaises(NotImplementedError):
self.parser.normalize_imd(imd_hex_1)

14
tests/test_db_interface.py
View File

@@ -7,9 +7,9 @@ import unittest
from io import StringIO
import osaca.db_interface as dbi
from osaca.db_interface import sanity_check
from osaca.db_interface import sanity_check, _get_full_instruction_name
from osaca.semantics import MachineModel
from osaca.parser import instructionForm
from osaca.parser import InstructionForm
from osaca.parser.memory import MemoryOperand
from osaca.parser.register import RegisterOperand
import copy
@@ -18,10 +18,10 @@ import copy
class TestDBInterface(unittest.TestCase):
@classmethod
def setUpClass(self):
sample_entry = instructionForm(
instruction_id="DoItRightAndDoItFast",
sample_entry = InstructionForm(
mnemonic="DoItRightAndDoItFast",
operands_id=[
MemoryOperand(offset_ID="imd", base_id="gpr", index_id="gpr", scale_id=8),
MemoryOperand(offset="imd", base="gpr", index="gpr", scale=8),
RegisterOperand(name="xmm"),
],
throughput=1.25,
@@ -61,7 +61,7 @@ class TestDBInterface(unittest.TestCase):
mm_csx.set_instruction_entry(self.entry_csx)
mm_tx2.set_instruction_entry(self.entry_tx2)
mm_zen1.set_instruction_entry(instructionForm(instruction_id="empty_operation"))
mm_zen1.set_instruction_entry(InstructionForm(mnemonic="empty_operation"))
num_entries_csx = len(mm_csx["instruction_forms"]) - num_entries_csx
num_entries_tx2 = len(mm_tx2["instruction_forms"]) - num_entries_tx2
@@ -72,7 +72,7 @@ class TestDBInterface(unittest.TestCase):
self.assertEqual(num_entries_zen1, 1)
def test_invalid_add(self):
entry = instructionForm()
entry = InstructionForm()
with self.assertRaises(KeyError):
MachineModel("csx").set_instruction_entry(entry)
with self.assertRaises(TypeError):

26
tests/test_parser_AArch64.py
View File

@@ -233,7 +233,7 @@ class TestParserAArch64(unittest.TestCase):
operands_id=[
{"prfop": {"type": ["PLD"], "target": ["L1"], "policy": ["KEEP"]}},
MemoryOperand(
offset=ImmediateOperand(value_id=2048),
offset=ImmediateOperand(value=2048),
base=RegisterOperand(prefix="x", name="26"),
index=None,
scale=1,
@@ -251,7 +251,7 @@ class TestParserAArch64(unittest.TestCase):
RegisterOperand(prefix="x", name="29"),
RegisterOperand(prefix="x", name="30"),
MemoryOperand(
offset=ImmediateOperand(value_id=-16),
offset=ImmediateOperand(value=-16),
base=RegisterOperand(name="sp", prefix="x"),
index=None,
scale=1,
@@ -290,7 +290,7 @@ class TestParserAArch64(unittest.TestCase):
RegisterOperand(prefix="p", name="0", predication="m"),
RegisterOperand(prefix="z", name="29", shape="d"),
RegisterOperand(prefix="z", name="21", shape="d"),
ImmediateOperand(value_id=90, type_id="int"),
ImmediateOperand(value=90, imd_type="int"),
],
directive_id=None,
comment_id=None,
@@ -302,8 +302,8 @@ class TestParserAArch64(unittest.TestCase):
mnemonic="ccmn",
operands_id=[
RegisterOperand(prefix="x", name="11"),
ImmediateOperand(value_id=1, type_id="int"),
ImmediateOperand(value_id=3, type_id="int"),
ImmediateOperand(value=1, imd_type="int"),
ImmediateOperand(value=3, imd_type="int"),
{"condition": "EQ"},
],
directive_id=None,
@@ -339,21 +339,21 @@ class TestParserAArch64(unittest.TestCase):
self.assertEqual(len(parsed), 645)
def test_normalize_imd(self):
imd_decimal_1 = ImmediateOperand(value_id="79")
imd_hex_1 = ImmediateOperand(value_id="0x4f")
imd_decimal_2 = ImmediateOperand(value_id="8")
imd_hex_2 = ImmediateOperand(value_id="0x8")
imd_decimal_1 = ImmediateOperand(value="79")
imd_hex_1 = ImmediateOperand(value="0x4f")
imd_decimal_2 = ImmediateOperand(value="8")
imd_hex_2 = ImmediateOperand(value="0x8")
imd_float_11 = ImmediateOperand(
type_id="float", value_id={"mantissa": "0.79", "e_sign": "+", "exponent": "2"}
imd_type="float", value={"mantissa": "0.79", "e_sign": "+", "exponent": "2"}
)
imd_float_12 = ImmediateOperand(
type_id="float", value_id={"mantissa": "790.0", "e_sign": "-", "exponent": "1"}
imd_type="float", value={"mantissa": "790.0", "e_sign": "-", "exponent": "1"}
)
imd_double_11 = ImmediateOperand(
type_id="double", value_id={"mantissa": "0.79", "e_sign": "+", "exponent": "2"}
imd_type="double", value={"mantissa": "0.79", "e_sign": "+", "exponent": "2"}
)
imd_double_12 = ImmediateOperand(
type_id="double", value_id={"mantissa": "790.0", "e_sign": "-", "exponent": "1"}
imd_type="double", value={"mantissa": "790.0", "e_sign": "-", "exponent": "1"}
)
identifier = IdentifierOperand(name="..B1.4")

8
tests/test_parser_x86att.py
View File

@@ -246,10 +246,10 @@ class TestParserX86ATT(unittest.TestCase):
self.assertIsNone(self.parser.parse_register("rax"))
def test_normalize_imd(self):
imd_decimal_1 = ImmediateOperand(value_id="79")
imd_hex_1 = ImmediateOperand(value_id="0x4f")
imd_decimal_2 = ImmediateOperand(value_id="8")
imd_hex_2 = ImmediateOperand(value_id="8")
imd_decimal_1 = ImmediateOperand(value="79")
imd_hex_1 = ImmediateOperand(value="0x4f")
imd_decimal_2 = ImmediateOperand(value="8")
imd_hex_2 = ImmediateOperand(value="8")
self.assertEqual(
self.parser.normalize_imd(imd_decimal_1),
self.parser.normalize_imd(imd_hex_1),