diff --git a/osaca/data/skx.yml b/osaca/data/skx.yml index 4f7b485..298f9cd 100644 --- a/osaca/data/skx.yml +++ b/osaca/data/skx.yml @@ -37191,7 +37191,26 @@ instruction_forms: port_pressure: [[1, '23'], [1, '4']] # ./generate_mov_entries.py skx throughput: 1.0 # ./generate_mov_entries.py skx uops: 2 # ./generate_mov_entries.py skx - # ./generate_mov_entries.py skx +- name: vmovupd + operands: + - class: register + name: zmm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 +- name: vmovups + operands: + - class: register + name: zmm + - class: register + name: zmm + latency: 0 + port_pressure: [] + throughput: 0.0 + uops: 0 - name: vmovups # ./generate_mov_entries.py skx operands: # ./generate_mov_entries.py skx - class: register # ./generate_mov_entries.py skx diff --git a/osaca/data/tx2.yml b/osaca/data/tx2.yml index 6aadc14..579617c 100644 --- a/osaca/data/tx2.yml +++ b/osaca/data/tx2.yml @@ -8,38 +8,38 @@ scheduler_size: 60 hidden_loads: false load_latency: {w: 4.0, x: 4.0, b: 4.0, h: 4.0, s: 4.0, d: 4.0, q: 4.0, v: 4.0} load_throughput: -- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34']]} +- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} - {base: x, index: ~, offset: ~, scale: 1, pre-indexed: false, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34']]} +- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} - {base: x, index: ~, offset: ~, scale: 8, pre-indexed: false, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34']]} +- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} - {base: x, index: ~, offset: imd, scale: 1, pre-indexed: false, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34']]} +- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} - {base: x, index: ~, offset: imd, scale: 8, pre-indexed: false, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34']]} -- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: ~, scale: 1, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34']]} +- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: x, offset: ~, scale: 1, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} - {base: x, index: x, offset: ~, scale: 1, pre-indexed: false, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: ~, scale: 1, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: ~, scale: 1, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: ~, scale: 8, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34']]} +- {base: x, index: x, offset: ~, scale: 1, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: x, offset: ~, scale: 1, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: x, offset: ~, scale: 8, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} - {base: x, index: x, offset: ~, scale: 8, pre-indexed: false, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: ~, scale: 8, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: ~, scale: 8, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: imd, scale: 1, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34']]} +- {base: x, index: x, offset: ~, scale: 8, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: x, offset: ~, scale: 8, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: x, offset: imd, scale: 1, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} - {base: x, index: x, offset: imd, scale: 1, pre-indexed: false, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: imd, scale: 1, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: imd, scale: 1, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: imd, scale: 8, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34']]} +- {base: x, index: x, offset: imd, scale: 1, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: x, offset: imd, scale: 1, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: x, offset: imd, scale: 8, pre-indexed: false, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} - {base: x, index: x, offset: imd, scale: 8, pre-indexed: false, post-indexed: false, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: imd, scale: 8, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34']]} -- {base: x, index: x, offset: imd, scale: 8, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34']]} +- {base: x, index: x, offset: imd, scale: 8, pre-indexed: true, post-indexed: true, port_pressure: [[1, '34'], [1, '012']]} +- {base: x, index: x, offset: imd, scale: 8, pre-indexed: true, post-indexed: false, port_pressure: [[1, '34'], [1, '012']]} load_throughput_default: [[1, '34']] store_throughput: [] store_throughput_default: [[1, '34'], [1, '5']] @@ -335,7 +335,7 @@ instruction_forms: post-indexed: true throughput: 1.0 latency: 4.0 # 2*p34 - port_pressure: [[2.0, '34']] + port_pressure: [[2.0, '34'], [1, '012']] - name: ldp operands: - class: register @@ -367,7 +367,7 @@ instruction_forms: post-indexed: true throughput: 1.0 latency: 4.0 # 2*p34 - port_pressure: [[2.0, '34']] + port_pressure: [[2.0, '34'], [1, '012']] - name: ldp operands: - class: register @@ -399,7 +399,7 @@ instruction_forms: post-indexed: false throughput: 1.0 latency: 4.0 # 2*p34 - port_pressure: [[2.0, '34']] + port_pressure: [[2.0, '34'], [1, '012']] - name: ldp operands: - class: register @@ -415,7 +415,7 @@ instruction_forms: post-indexed: true throughput: 1.0 latency: 4.0 # 2*p34 - port_pressure: [[2.0, '34']] + port_pressure: [[2.0, '34'], [1, '012']] - name: ldur # JL: assumed from ldr operands: - class: register @@ -580,7 +580,7 @@ instruction_forms: post-indexed: true throughput: 2.0 latency: 0 # 2*p34+2*p5 - port_pressure: [[2.0, '34'], [2.0, '5']] + port_pressure: [[2.0, '34'], [2.0, '5'], [1, '012']] - name: stp operands: - class: register @@ -666,7 +666,7 @@ instruction_forms: post-indexed: true throughput: 1.0 latency: 0 # 1*p34+1*p5 - port_pressure: [[1.0, '34'], [1.0, '5']] + port_pressure: [[1.0, '34'], [1.0, '5'], [1, '012']] - name: str operands: - class: register @@ -694,7 +694,7 @@ instruction_forms: post-indexed: true throughput: 1.0 latency: 0 # 1*p34+1*p5 - port_pressure: [[1.0, '34'], [1.0, '5']] + port_pressure: [[1.0, '34'], [1.0, '5'], [1, '012']] - name: str operands: - class: register @@ -708,7 +708,7 @@ instruction_forms: post-indexed: true throughput: 1.0 latency: 0 # 1*p34+1*p5 - port_pressure: [[1.0, '34'], [1.0, '5']] + port_pressure: [[1.0, '34'], [1.0, '5'], [1, '012']] - name: sub operands: - class: register diff --git a/osaca/data/zen1.yml b/osaca/data/zen1.yml index 29de7a0..45b5e64 100644 --- a/osaca/data/zen1.yml +++ b/osaca/data/zen1.yml @@ -202,6 +202,17 @@ instruction_forms: throughput: 0.25 latency: 1.0 # 1*p4567 port_pressure: [[1, '4567']] +- name: vaddpd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 2*p23 + port_pressure: [[1, '23']] - name: vaddpd operands: - class: register diff --git a/osaca/parser/parser_AArch64v81.py b/osaca/parser/parser_AArch64v81.py index 64a5720..83db74c 100755 --- a/osaca/parser/parser_AArch64v81.py +++ b/osaca/parser/parser_AArch64v81.py @@ -48,6 +48,15 @@ class ParserAArch64v81(BaseParser): + commaSeparatedList.setResultsName('parameters') + pp.Optional(self.comment) ).setResultsName(self.DIRECTIVE_ID) + # LLVM-MCA markers + self.llvm_markers = pp.Group( + pp.Literal('#') + + pp.Combine( + pp.CaselessLiteral('LLVM-MCA-') + + (pp.CaselessLiteral('BEGIN') | pp.CaselessLiteral('END')) + ) + + pp.Optional(self.comment) + ).setResultsName(self.COMMENT_ID) ############################## # Instructions @@ -195,7 +204,15 @@ class ParserAArch64v81(BaseParser): instruction_form[self.COMMENT_ID] = ' '.join(result[self.COMMENT_ID]) except pp.ParseException: pass - + # 1.2 check for llvm-mca marker + try: + result = self.process_operand( + self.llvm_markers.parseString(line, parseAll=True).asDict() + ) + result = AttrDict.convert_dict(result) + instruction_form[self.COMMENT_ID] = ' '.join(result[self.COMMENT_ID]) + except pp.ParseException: + pass # 2. Parse label if result is None: try: diff --git a/osaca/semantics/hw_model.py b/osaca/semantics/hw_model.py index ed652dc..8b096e4 100755 --- a/osaca/semantics/hw_model.py +++ b/osaca/semantics/hw_model.py @@ -4,6 +4,7 @@ import base64 import pickle import re import os +import string from copy import deepcopy from itertools import product @@ -513,7 +514,7 @@ class MachineModel(object): # differentiate between vector registers (mm, xmm, ymm, zmm) and others (gpr) parser_x86 = ParserX86ATT() if parser_x86.is_vector_register(reg): - if ''.join([l for l in reg['name'] if not l.isdigit()])[-2:] == i_reg_name[-2:]: + if reg['name'].rstrip(string.digits).lower() == i_reg_name: return True else: if i_reg_name == 'gpr':