From 5a0365ab3561b8a33455eafff9445d8b394b9583 Mon Sep 17 00:00:00 2001 From: JanLJL Date: Thu, 20 Feb 2020 09:04:39 +0100 Subject: [PATCH] more tests --- codecov.yml | 4 +-- osaca/db_interface.py | 10 +++++-- setup.cfg | 1 + tests/test_db_interface.py | 35 +++++++++++++++++++--- tests/test_files/ibench_import_aarch64.dat | 9 ++++++ tests/test_files/ibench_import_x86.dat | 7 +++++ 6 files changed, 58 insertions(+), 8 deletions(-) create mode 100644 tests/test_files/ibench_import_aarch64.dat create mode 100644 tests/test_files/ibench_import_x86.dat diff --git a/codecov.yml b/codecov.yml index 374fae5..a2ab8b5 100644 --- a/codecov.yml +++ b/codecov.yml @@ -1,3 +1,3 @@ ignore: - - "tests/*" # ignore test folder and all its contents - - "__init__.py" # ignore init files + - "tests/**/*" # ignore test folder and all its contents + - "**/__init__.py" # ignore init files diff --git a/osaca/db_interface.py b/osaca/db_interface.py index 5031d79..87e6459 100755 --- a/osaca/db_interface.py +++ b/osaca/db_interface.py @@ -52,7 +52,7 @@ def sanity_check(arch: str, verbose=False): ) -def import_benchmark_output(arch, bench_type, filepath): +def import_benchmark_output(arch, bench_type, filepath, output=None): """ Import benchmark results from micro-benchmarks. @@ -62,6 +62,8 @@ def import_benchmark_output(arch, bench_type, filepath): :type bench_type: str :param filepath: filepath to the output file :type filepath: str + :param output: output filepath to dump, defaults to None + :type output: str """ supported_bench_outputs = ['ibench', 'asmbench'] assert os.path.exists(filepath) @@ -78,7 +80,11 @@ def import_benchmark_output(arch, bench_type, filepath): # write entries to DB for entry in db_entries: mm.set_instruction_entry(db_entries[entry]) - sys.stdout.write(mm.dump()) + if output is None: + print(mm.dump()) + else: + with open(output, 'w') as f: + mm.dump(stream=f) ################## diff --git a/setup.cfg b/setup.cfg index 94bff39..f83048d 100644 --- a/setup.cfg +++ b/setup.cfg @@ -1,4 +1,5 @@ [pep8] +[pycodestyle] max-line-length=99 [metadata] diff --git a/tests/test_db_interface.py b/tests/test_db_interface.py index f6d0808..e3c4461 100755 --- a/tests/test_db_interface.py +++ b/tests/test_db_interface.py @@ -2,9 +2,11 @@ """ Unit tests for DB interface """ - +import os +import sys import unittest +import osaca.db_interface as dbi from osaca.db_interface import sanity_check from osaca.semantics import MachineModel @@ -71,14 +73,39 @@ class TestDBInterface(unittest.TestCase): sanity_check('csx', verbose=False) sanity_check('tx2', verbose=False) sanity_check('zen1', verbose=False) + # verbose - sanity_check('csx', verbose=True) - sanity_check('tx2', verbose=True) - sanity_check('zen1', verbose=True) + stdout = sys.stdout + with open('/dev/null', 'w') as sys.stdout: + sanity_check('csx', verbose=True) + sanity_check('tx2', verbose=True) + sanity_check('zen1', verbose=True) + sys.stdout = stdout + + def test_ibench_import(self): + # only check import without dumping the DB file (takes too much time) + with open(self._find_file('ibench_import_x86.dat')) as input_file: + entries = dbi._get_ibench_output(input_file, 'x86') + self.assertEqual(len(entries), 3) + for _, e in entries.items(): + self.assertIsNotNone(e['throughput']) + self.assertIsNotNone(e['latency']) + with open(self._find_file('ibench_import_aarch64.dat')) as input_file: + entries = dbi._get_ibench_output(input_file, 'aarch64') + self.assertEqual(len(entries), 4) + for _, e in entries.items(): + self.assertIsNotNone(e['throughput']) + self.assertIsNotNone(e['latency']) ################## # Helper functions ################## + @staticmethod + def _find_file(name): + testdir = os.path.dirname(__file__) + name = os.path.join(testdir, 'test_files', name) + assert os.path.exists(name) + return name if __name__ == '__main__': diff --git a/tests/test_files/ibench_import_aarch64.dat b/tests/test_files/ibench_import_aarch64.dat new file mode 100644 index 0000000..22c57f4 --- /dev/null +++ b/tests/test_files/ibench_import_aarch64.dat @@ -0,0 +1,9 @@ +Using frequency 2.20GHz. +testinstr-i_d_v-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813] +testinstr-i_d_v-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000] +testinstr2-mboi_v-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813] +testinstr2-mboi_v-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000] +testinstr3-mbisr_v-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813] +testinstr3-mbisr_v-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000] +testinstr4-mboisp_v-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813] +testinstr4-mboisp_v-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000] diff --git a/tests/test_files/ibench_import_x86.dat b/tests/test_files/ibench_import_x86.dat new file mode 100644 index 0000000..82e6266 --- /dev/null +++ b/tests/test_files/ibench_import_x86.dat @@ -0,0 +1,7 @@ +Using frequency 2.50GHz. +testinstr-i_r_x-TP: 0.251 (clock cycles) [DEBUG - result: 0.007813] +testinstr-i_r_x-LT: 4.013 (clock cycles) [DEBUG - result: 1.000000] +testinstr2-mboi_x-TP: 0.501 (clock cycles) [DEBUG - result: 0.007813] +testinstr2-mboi_x-LT: 8.010 (clock cycles) [DEBUG - result: 1.000000] +testinstr3-mbis_y-TP: 0.334 (clock cycles) [DEBUG - result: 0.007813] +testinstr3-mbis_y-LT: 8.010 (clock cycles) [DEBUG - result: 1.000000]