From 5a276861b357774976ec2df0ebb239ffe69e2f9f Mon Sep 17 00:00:00 2001
From: JanLJL <jan.laukemann@fau.de>
Date: Fri, 17 Jan 2020 15:16:00 +0100
Subject: [PATCH] added ldur and stur

---
 osaca/data/isa/aarch64.yml | 15 +++++++++++
 osaca/data/tx2.yml         | 52 ++++++++++++++++++++++++++++++++++----
 2 files changed, 62 insertions(+), 5 deletions(-)

diff --git a/osaca/data/isa/aarch64.yml b/osaca/data/isa/aarch64.yml
index f941d31..7db1b39 100644
--- a/osaca/data/isa/aarch64.yml
+++ b/osaca/data/isa/aarch64.yml
@@ -160,3 +160,18 @@ instruction_forms:
           post-indexed: "*"
           source: false
           destination: true
+    - name: "stur"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "*"
+          offset: "*"
+          index: "*"
+          scale: "*"
+          pre-indexed: "*"
+          post-indexed: "*"
+          source: false
+          destination: true
diff --git a/osaca/data/tx2.yml b/osaca/data/tx2.yml
index 81cbeb9..e8c431d 100644
--- a/osaca/data/tx2.yml
+++ b/osaca/data/tx2.yml
@@ -416,6 +416,34 @@ instruction_forms:
   throughput: 1.0
   latency: ~  # 	2*p34
   port_pressure: [[2.0, '34']]
+- name: ldur    # JL: assumed from ldr
+  operands:
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: '*'
+    index: '*'
+    scale: '*'
+    post-indexed: false
+    pre-indexed: false
+  throughput: 0.5
+  latency: 4.0  # 	1*p34
+  port_pressure: [[1.0, '34']]
+- name: ldr
+  operands:
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: '*'
+    index: '*'
+    scale: '*'
+    post-indexed: false
+    pre-indexed: false
+  throughput: 0.5
+  latency: 4.0  # 	1*p34
+  port_pressure: [[1.0, '34']]
 - name: ldr
   operands:
   - class: register
@@ -601,6 +629,20 @@ instruction_forms:
   throughput: 2.0
   latency: ~  # 	2*p34+2*p5
   port_pressure: [[2.0, '34'], [2.0, '5']]
+- name: stur # JL: assumed from str
+  operands:
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: '*'
+    index: '*'
+    scale: '*'
+    pre-indexed: false
+    post-indexed: false
+  throughput: 1.0
+  latency: 4.0  # 	1*p34+1*p5
+  port_pressure: [[1.0, '34'], [1.0, '5']]
 - name: str
   operands:
   - class: register
@@ -621,9 +663,9 @@ instruction_forms:
     prefix: d
   - class: memory
     base: x
-    offset: imd
-    index: ~
-    scale: 1
+    offset: '*'
+    index: '*'
+    scale: '*'
     pre-indexed: false
     post-indexed: false
   throughput: 1.0
@@ -649,8 +691,8 @@ instruction_forms:
     prefix: q
   - class: memory
     base: x
-    offset: ~
-    index: x
+    offset: '*'
+    index: '*'
     scale: 1
     pre-indexed: false
     post-indexed: false