mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2026-01-05 18:50:08 +01:00
Changes to accomodate the new OO style
This commit is contained in:
@@ -4,18 +4,6 @@ from osaca.parser.directive import DirectiveOperand
|
||||
|
||||
|
||||
class InstructionForm:
|
||||
# Identifiers for operand types
|
||||
COMMENT_ID = "comment"
|
||||
DIRECTIVE_ID = "directive"
|
||||
IMMEDIATE_ID = "immediate"
|
||||
LABEL_ID = "label"
|
||||
IDENTIFIER_ID = "identifier"
|
||||
MEMORY_ID = "memory"
|
||||
REGISTER_ID = "register"
|
||||
SEGMENT_EXT_ID = "segment_extension"
|
||||
INSTRUCTION_ID = "instruction"
|
||||
OPERANDS_ID = "operands"
|
||||
|
||||
def __init__(
|
||||
self,
|
||||
INSTRUCTION_ID=None,
|
||||
@@ -91,6 +79,18 @@ class InstructionForm:
|
||||
def flags(self):
|
||||
return self._FLAGS
|
||||
|
||||
@property
|
||||
def throughput(self):
|
||||
return self._THROUGHPUT
|
||||
|
||||
@property
|
||||
def latency(self):
|
||||
return self._LATENCY
|
||||
|
||||
@property
|
||||
def latency_wo_load(self):
|
||||
return self._LATENCY_WO_LOAD
|
||||
|
||||
@semantic_operands.setter
|
||||
def semantic_operands(self, semantic_operands):
|
||||
self._SEMANTIC_OPERANDS = semantic_operands
|
||||
@@ -135,6 +135,18 @@ class InstructionForm:
|
||||
def flags(self, flags):
|
||||
self._FLAGS = flags
|
||||
|
||||
@throughput.setter
|
||||
def throughput(self, throughput):
|
||||
self._THROUGHPUT = throughput
|
||||
|
||||
@latency.setter
|
||||
def latency(self, latency):
|
||||
self._LATENCY = latency
|
||||
|
||||
@latency_wo_load.setter
|
||||
def latency_wo_load(self, latency_wo_load):
|
||||
self._LATENCY_WO_LOAD = latency_wo_load
|
||||
|
||||
def __repr__(self):
|
||||
return f"InstructionForm(INSTRUCTION_ID={self._INSTRUCTION_ID}, OPERANDS_ID={self._OPERANDS_ID}, DIRECTIVE_ID={self._DIRECTIVE_ID}, COMMENT_ID={self._COMMENT_ID}, LABEL_ID={self._LABEL_ID}, LINE={self._LINE}, LINE_NUMBER={self._LINE_NUMBER}, SEMANTIC_OPERANDS={self._SEMANTIC_OPERANDS})"
|
||||
|
||||
|
||||
@@ -386,8 +386,8 @@ class ParserX86ATT(BaseParser):
|
||||
def is_reg_dependend_of(self, reg_a, reg_b):
|
||||
"""Check if ``reg_a`` is dependent on ``reg_b``"""
|
||||
# Normalize name
|
||||
reg_a_name = reg_a["name"].upper()
|
||||
reg_b_name = reg_b["name"].upper()
|
||||
reg_a_name = reg_a.name.upper()
|
||||
reg_b_name = reg_b.name.upper()
|
||||
|
||||
# Check if they are the same registers
|
||||
if reg_a_name == reg_b_name:
|
||||
@@ -428,8 +428,8 @@ class ParserX86ATT(BaseParser):
|
||||
|
||||
def is_basic_gpr(self, register):
|
||||
"""Check if register is a basic general purpose register (ebi, rax, ...)"""
|
||||
if any(char.isdigit() for char in register["name"]) or any(
|
||||
register["name"].lower().startswith(x) for x in ["mm", "xmm", "ymm", "zmm"]
|
||||
if any(char.isdigit() for char in register.name) or any(
|
||||
register.name.lower().startswith(x) for x in ["mm", "xmm", "ymm", "zmm"]
|
||||
):
|
||||
return False
|
||||
return True
|
||||
@@ -446,7 +446,7 @@ class ParserX86ATT(BaseParser):
|
||||
"""Check if register is a vector register"""
|
||||
if register is None:
|
||||
return False
|
||||
if register["name"].rstrip(string.digits).lower() in [
|
||||
if register.name.rstrip(string.digits).lower() in [
|
||||
"mm",
|
||||
"xmm",
|
||||
"ymm",
|
||||
|
||||
Reference in New Issue
Block a user