mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2026-01-06 11:10:06 +01:00
RISC-V: Update parser to use x-register names, add vector and FP instructions, fix tests
- Modified RISC-V parser to use x-register names instead of ABI names - Added new vector instructions (vsetvli, vle8.v, vse8.v, vfmacc.vv, vfmul.vf) - Added floating point instructions (fmul.d) - Added unconditional jump instruction (j) - Updated tests to match new register naming convention - Added new RISC-V example files - Updated .gitignore to exclude test environment and old examples
This commit is contained in:
Metehan Dundar
@@ -12,7 +12,7 @@ from osaca.semantics import (
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find_jump_labels,
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find_basic_loop_bodies,
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)
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from osaca.parser import ParserAArch64, ParserX86ATT, ParserX86Intel
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from osaca.parser import ParserAArch64, ParserX86ATT, ParserX86Intel, ParserRISCV
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class TestMarkerUtils(unittest.TestCase):
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@@ -21,15 +21,21 @@ class TestMarkerUtils(unittest.TestCase):
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self.parser_AArch = ParserAArch64()
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self.parser_x86_att = ParserX86ATT()
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self.parser_x86_intel = ParserX86Intel()
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self.parser_RISCV = ParserRISCV()
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with open(self._find_file("triad_arm_iaca.s")) as f:
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triad_code_arm = f.read()
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with open(self._find_file("triad_x86_iaca.s")) as f:
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triad_code_x86_att = f.read()
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with open(self._find_file("triad_x86_intel_iaca.s")) as f:
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triad_code_x86_intel = f.read()
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with open(self._find_file("kernel_riscv.s")) as f:
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kernel_code_riscv = f.read()
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self.parsed_AArch = self.parser_AArch.parse_file(triad_code_arm)
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self.parsed_x86_att = self.parser_x86_att.parse_file(triad_code_x86_att)
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self.parsed_x86_intel = self.parser_x86_intel.parse_file(triad_code_x86_intel)
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self.parsed_RISCV = self.parser_RISCV.parse_file(kernel_code_riscv)
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#################
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# Test
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@@ -53,6 +59,12 @@ class TestMarkerUtils(unittest.TestCase):
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self.assertEqual(kernel[0].line_number, 111)
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self.assertEqual(kernel[-1].line_number, 117)
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def test_marker_detection_RISCV(self):
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kernel = reduce_to_section(self.parsed_RISCV, ParserRISCV())
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# The exact number of instructions and line numbers will depend on the RISC-V test file
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# but we can at least test that reduce_to_section works for RISC-V
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self.assertGreater(len(kernel), 0)
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def test_marker_matching_AArch64(self):
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# preparation
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bytes_1_line = ".byte 213,3,32,31\n"
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@@ -205,6 +217,71 @@ class TestMarkerUtils(unittest.TestCase):
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)
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self.assertEqual(sample_kernel, parsed_kernel)
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def test_marker_matching_RISCV(self):
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# preparation for RISC-V specific markers
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bytes_1_line = ".byte 19,0,0,0\n"
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bytes_2_lines = ".byte 19,0\n" + ".byte 0,0\n"
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bytes_hex_line = ".byte 0x13,0x0,0x0,0x0\n"
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li_start_1 = "li a1, 111 # OSACA START MARKER\n"
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li_start_2 = "li a1, 111\n"
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li_end_1 = "li a1, 222 # OSACA END MARKER\n"
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li_end_2 = "li a1, 222\n"
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prologue = "addi sp, sp, -16\n" + "sd ra, 8(sp)\n" + ".p2align 2\n"
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kernel = (
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".L4:\n"
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+ "lw a5, 0(a0)\n"
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+ "addi a0, a0, 4\n"
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+ "addi a2, a2, -1\n"
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+ "add a3, a3, a5\n"
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+ "bnez a2, .L4\n"
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)
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epilogue = ".L5:\n" + "mv a0, a3\n" + "ret\n"
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kernel_length = len(list(filter(None, kernel.split("\n"))))
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bytes_variations = [
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bytes_1_line,
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bytes_2_lines,
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bytes_hex_line,
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]
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li_start_variations = [li_start_1, li_start_2]
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li_end_variations = [li_end_1, li_end_2]
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# actual tests for RISC-V
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for li_start_var in li_start_variations:
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for bytes_var_1 in bytes_variations:
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for li_end_var in li_end_variations:
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for bytes_var_2 in bytes_variations:
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sample_code = (
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prologue
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+ li_start_var
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+ bytes_var_1
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+ kernel
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+ li_end_var
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+ bytes_var_2
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+ epilogue
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)
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with self.subTest(
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li_start=li_start_var,
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bytes_start=bytes_var_1,
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li_end=li_end_var,
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bytes_end=bytes_var_2,
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):
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sample_parsed = self.parser_RISCV.parse_file(sample_code)
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sample_kernel = reduce_to_section(sample_parsed, ParserRISCV())
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self.assertEqual(len(sample_kernel), kernel_length)
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kernel_start = len(
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list(
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filter(
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None,
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(prologue + li_start_var + bytes_var_1).split("\n"),
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)
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)
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)
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parsed_kernel = self.parser_RISCV.parse_file(
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kernel, start_line=kernel_start
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)
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self.assertEqual(sample_kernel, parsed_kernel)
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def test_marker_special_cases_AArch(self):
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bytes_line = ".byte 213,3,32,31\n"
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start_marker = "mov x1, #111\n" + bytes_line
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@@ -302,6 +379,56 @@ class TestMarkerUtils(unittest.TestCase):
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msg="Invalid extracted kernel on {!r}".format(test_name),
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)
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def test_marker_special_cases_RISCV(self):
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bytes_line = ".byte 19,0,0,0\n"
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start_marker = "li a1, 111\n" + bytes_line
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end_marker = "li a1, 222\n" + bytes_line
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prologue = "addi sp, sp, -16\n" + "sd ra, 8(sp)\n" + ".p2align 2\n"
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kernel = (
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".L4:\n"
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+ "lw a5, 0(a0)\n"
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+ "addi a0, a0, 4\n"
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+ "addi a2, a2, -1\n"
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+ "add a3, a3, a5\n"
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+ "bnez a2, .L4\n"
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)
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epilogue = ".L5:\n" + "mv a0, a3\n" + "ret\n"
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samples = [
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# (test name,
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# ignored prologue, section to be extraced, ignored epilogue)
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("markers", prologue + start_marker, kernel, end_marker + epilogue),
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("marker at file start", start_marker, kernel, end_marker + epilogue),
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("no start marker", "", prologue + kernel, end_marker + epilogue),
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("marker at file end", prologue + start_marker, kernel, end_marker),
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("no end marker", prologue + start_marker, kernel + epilogue, ""),
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("empty kernel", prologue + start_marker, "", end_marker + epilogue),
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]
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for test_name, pro, kernel, epi in samples:
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code = pro + kernel + epi
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parsed = self.parser_RISCV.parse_file(code)
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test_kernel = reduce_to_section(parsed, ParserRISCV())
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if kernel:
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kernel_length = len(kernel.strip().split("\n"))
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else:
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kernel_length = 0
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self.assertEqual(
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len(test_kernel),
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kernel_length,
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msg="Invalid extracted kernel length on {!r} sample".format(test_name),
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)
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if pro:
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kernel_start = len((pro).strip().split("\n"))
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else:
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kernel_start = 0
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parsed_kernel = self.parser_RISCV.parse_file(kernel, start_line=kernel_start)
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self.assertEqual(
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test_kernel,
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parsed_kernel,
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msg="Invalid extracted kernel on {!r}".format(test_name),
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)
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def test_find_jump_labels(self):
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self.assertEqual(
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find_jump_labels(self.parsed_x86_att),
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@@ -363,6 +490,11 @@ class TestMarkerUtils(unittest.TestCase):
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]
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),
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)
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# Check that find_jump_labels works for RISC-V
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riscv_labels = find_jump_labels(self.parsed_RISCV)
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self.assertIsInstance(riscv_labels, OrderedDict)
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self.assertGreater(len(riscv_labels), 0)
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def test_find_basic_blocks(self):
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self.assertEqual(
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@@ -427,6 +559,10 @@ class TestMarkerUtils(unittest.TestCase):
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("main", 575, 590),
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],
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)
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# Check that find_basic_blocks works for RISC-V
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riscv_blocks = find_basic_blocks(self.parsed_RISCV)
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self.assertGreater(len(riscv_blocks), 0)
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def test_find_basic_loop_body(self):
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self.assertEqual(
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@@ -451,6 +587,10 @@ class TestMarkerUtils(unittest.TestCase):
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(".LBB0_35", 494, 504),
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],
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)
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# Check that find_basic_loop_bodies works for RISC-V
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riscv_loop_bodies = find_basic_loop_bodies(self.parsed_RISCV)
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self.assertGreater(len(riscv_loop_bodies), 0)
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##################
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# Helper functions
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