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Inlined conversion of LD/ST memory operands

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stefandesouza
2024-02-24 12:45:59 +01:00
parent fa95293cb0
commit 61dacff53e
1 changed files with 32 additions and 31 deletions
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17
osaca/semantics/hw_model.py
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@@ -145,15 +145,8 @@ class MachineModel(object):
# List containing classes with same name/instruction
self._data["instruction_forms_dict"][iform["name"]].append(new_iform)
self._data["internal_version"] = self.INTERNAL_VERSION
self.load_store_tp()
if not lazy:
# cache internal representation for future use
self._write_in_cache(self._path)
# Store in runtime cache
if not lazy:
MachineModel._runtime_cache[self._path] = self._data
def load_store_tp(self):
# Convert load and store throughput memory operands to classes
new_throughputs = []
if "load_throughput" in self._data:
for m in self._data["load_throughput"]:
@@ -183,6 +176,14 @@ class MachineModel(object):
)
self._data["store_throughput"] = new_throughputs
if not lazy:
# cache internal representation for future use
self._write_in_cache(self._path)
# Store in runtime cache
if not lazy:
MachineModel._runtime_cache[self._path] = self._data
def operand_to_class(self, o, new_operands):
"""Convert an operand from dict type to class"""
if o["class"] == "register":