diff --git a/README.rst b/README.rst
index 06408b6..bb67b57 100644
--- a/README.rst
+++ b/README.rst
@@ -100,7 +100,7 @@ The usage of OSACA can be listed as:
   shows the program’s version number.
 --arch ARCH
   needs to be replaced with the target architecture abbreviation.
-  Possible options are ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKX``, ``CSX``, ``ICL`` (Client), ``ICX`` (Server) for the latest Intel micro architectures starting from Intel Sandy Bridge and ``ZEN1``, ``ZEN2``, and ``ZEN3`` for AMD Zen architectures.
+  Possible options are ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKX``, ``CSX``, ``ICL`` (Client), ``ICX`` (Server), ``SPR`` for the latest Intel micro architectures starting from Intel Sandy Bridge and ``ZEN1``, ``ZEN2``, and ``ZEN3`` for AMD Zen architectures.
   Furthermore, ``TX2`` for Marvell`s ARM-based ThunderX2 , ``N1`` for ARM's Neoverse, ``A72`` for ARM Cortex-A72, ``TSV110`` for the HiSilicon TaiShan v110, ``A64FX`` for Fujitsu's HPC ARM architecture, ``M1`` for the Apple M1-Firestorm performance core, and ``V2`` for the Neoverse V2 (used in NVIDIA's Grace CPU) are available.
   If no micro-architecture is given, OSACA assumes a default architecture for x86/AArch64.
 --fixed
@@ -150,21 +150,23 @@ Supported microarchitectures
 | |        | Ivy Bridge     |  ``IVB``   |
 | |        +----------------+------------+
 | |        | Haswell        |  ``HSW``   |
-| | Intel  +----------------+------------+
+| |        +----------------+------------+
 | |        | Broadwell      |  ``BDW``   |
-|          +----------------+------------+
-|          | Skylake-X      |  ``SKX``   |
-|          +----------------+------------+
-|          | Cascadelake-X  |  ``CSX``   |
-|          +----------------+------------+
-|          | Icelake client |  ``ICL``   |
-|          +----------------+------------+
-|          | Icelake server |  ``ICX``   |
+| |        +----------------+------------+
+| |        | Skylake-X      |  ``SKX``   |
+| | Intel  +----------------+------------+
+| |        | Cascadelake-X  |  ``CSX``   |
+| |        +----------------+------------+
+| |        | Icelake client |  ``ICL``   |
+| |        +----------------+------------+
+| |        | Icelake server |  ``ICX``   |
+| |        +----------------+------------+
+| |        | Sapphire Rapids|  ``SPR``   |
 +----------+----------------+------------+
 | |        | Naples / Zen 1 |  ``ZEN1``  |
-|          +----------------+------------+
+| |        +----------------+------------+
 | | AMD    | Rome / Zen 2   |  ``ZEN2``  |
-|          +----------------+------------+
+| |        +----------------+------------+
 | |        | Milan / Zen 3  |  ``ZEN3``  |
 +----------+----------------+------------+
 
@@ -174,9 +176,9 @@ Supported microarchitectures
 | Designer  | Model/microarch   | OSACA flag  |
 +===========+===================+=============+
 | |         | Cortex-A72        |  ``A72``    |
-|           +-------------------+-------------+
+| |         +-------------------+-------------+
 | | ARM     | Neoverse N1       |  ``N1``     |
-|           +-------------------+-------------+
+| |         +-------------------+-------------+
 | |         | Neoverse V2       |  ``V2``     |
 +-----------+-------------------+-------------+
 | Marvell   | ThunderX2         |  ``TX2``    |
diff --git a/osaca/data/generate_mov_entries.py b/osaca/data/generate_mov_entries.py
index cdaaf9d..7ffb9cf 100755
--- a/osaca/data/generate_mov_entries.py
+++ b/osaca/data/generate_mov_entries.py
@@ -9,7 +9,7 @@ class MOVEntryBuilder:
         port_occupancy = defaultdict(Fraction)
         for uops, ports in port_pressure:
             for p in ports:
-                port_occupancy[p] += Fraction(uops, len(ports))
+                port_occupancy[p] += Fraction(int(uops*100), len(ports)*100)
         return float(max(list(port_occupancy.values()) + [0]))
 
     @staticmethod
@@ -71,7 +71,7 @@ class MOVEntryBuilder:
                 ports = ports.split(",")
                 if len(ports) == 1:
                     ports = ports[0]
-                port_pressure.append([int(cycles), ports])
+                port_pressure.append([float(cycles), ports])
         return port_pressure
 
     def process_item(self, instruction_form, resources):
@@ -115,6 +115,43 @@ class MOVEntryBuilderIntelNoPort7AGU(MOVEntryBuilder):
         )
 
 
+class MOVEntryBuilderIntelPort11(MOVEntryBuilder):
+    # for SPR
+    def build_description(self, instruction_name, operand_types, port_pressure=[], latency=0):
+        load, store, vec = self.classify(operand_types)
+
+        if load:
+            if 'zmm' in operand_types:
+                port_pressure += [[1.5, ["2","3", "10"]]]
+            else:
+                port_pressure += [[1, ["2","3","10"]]]
+            latency += 5
+            comment = "with load"
+            return MOVEntryBuilder.build_description(
+                self, instruction_name, operand_types, port_pressure, latency, comment
+            )
+        if store:
+            if 'zmm' in operand_types:
+                port_pressure += [[2, "78"], [2, "49"]]
+            else:
+                port_pressure += [[1, "78"], [1, "49"]]
+            operands = ["mem" if o == "mem" else o for o in operand_types]
+            latency += 0
+            return MOVEntryBuilder.build_description(
+                self,
+                instruction_name,
+                operands,
+                port_pressure,
+                latency,
+                "with store",
+            )
+
+        # Register only:
+        return MOVEntryBuilder.build_description(
+            self, instruction_name, operand_types, port_pressure, latency
+        )
+
+
 class MOVEntryBuilderIntelPort9(MOVEntryBuilder):
     # for ICX
     def build_description(self, instruction_name, operand_types, port_pressure=[], latency=0):
@@ -946,6 +983,433 @@ icx_mov_instructions = [
     # TODO with masking!
 ]
 
+p11 = MOVEntryBuilderIntelPort11()
+
+spr_mov_instructions = [
+    # https://www.felixcloutier.com/x86/mov
+    ("mov gpr gpr", ("1*p0,1,5,6,10", 1)),
+    ("mov gpr mem", ("", 0)),
+    ("mov mem gpr", ("", 0)),
+    ("mov imd gpr", ("1*p0,1,5,6,10", 1)),
+    ("mov imd mem", ("", 0)),
+    ("movabs imd gpr", ("1*p0,1,5,6,10", 1)),  # AT&T version
+    # https://www.felixcloutier.com/x86/movapd
+    ("movapd xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movapd xmm mem", ("", 0)),
+    ("movapd mem xmm", ("", 0)),
+    ("vmovapd xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovapd xmm mem", ("", 0)),
+    ("vmovapd mem xmm", ("", 0)),
+    ("vmovapd ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovapd ymm mem", ("", 0)),
+    ("vmovapd mem ymm", ("", 0)),
+    ("vmovapd zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovapd zmm mem", ("", 0)),
+    ("vmovapd mem zmm", ("", 0)),
+    # https://www.felixcloutier.com/x86/movaps
+    ("movaps xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movaps xmm mem", ("", 0)),
+    ("movaps mem xmm", ("", 0)),
+    ("vmovaps xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovaps xmm mem", ("", 0)),
+    ("vmovaps mem xmm", ("", 0)),
+    ("vmovaps ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovaps ymm mem", ("", 0)),
+    ("vmovaps mem ymm", ("", 0)),
+    ("vmovaps zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovaps zmm mem", ("", 0)),
+    ("vmovaps mem zmm", ("", 0)),
+    ## https://www.felixcloutier.com/x86/movd:movq
+    #("movd gpr mm", ("1*p5", 1)),
+    #("movd mem mm", ("", 0)),
+    #("movq gpr mm", ("1*p5", 1)),
+    #("movq mem mm", ("", 0)),
+    #("movd mm gpr", ("1*p0", 1)),
+    #("movd mm mem", ("", 0)),
+    #("movq mm gpr", ("1*p0", 1)),
+    #("movq mm mem", ("", 0)),
+    #("movd gpr xmm", ("1*p5", 1)),
+    #("movd mem xmm", ("", 0)),
+    #("movq gpr xmm", ("1*p5", 1)),
+    #("movq mem xmm", ("", 0)),
+    #("movd xmm gpr", ("1*p0", 1)),
+    #("movd xmm mem", ("", 0)),
+    #("movq xmm gpr", ("1*p0", 1)),
+    #("movq xmm mem", ("", 0)),
+    #("vmovd gpr xmm", ("1*p5", 1)),
+    #("vmovd mem xmm", ("", 0)),
+    #("vmovq gpr xmm", ("1*p5", 1)),
+    #("vmovq mem xmm", ("", 0)),
+    #("vmovd xmm gpr", ("1*p0", 1)),
+    #("vmovd xmm mem", ("", 0)),
+    #("vmovq xmm gpr", ("1*p0", 1)),
+    #("vmovq xmm mem", ("", 0)),
+    ## https://www.felixcloutier.com/x86/movddup
+    #("movddup xmm xmm", ("1*p5", 1)),
+    #("movddup mem xmm", ("", 0)),
+    #("vmovddup xmm xmm", ("1*p5", 1)),
+    #("vmovddup mem xmm", ("", 0)),
+    #("vmovddup ymm ymm", ("1*p5", 1)),
+    #("vmovddup mem ymm", ("", 0)),
+    #("vmovddup zmm zmm", ("1*p5", 1)),
+    #("vmovddup mem zmm", ("", 0)),
+    # https://www.felixcloutier.com/x86/movdq2q
+    #("movdq2q xmm mm", ("1*p015+1*p5", 1)),
+    # https://www.felixcloutier.com/x86/movdqa:vmovdqa32:vmovdqa64
+    ("movdqa xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movdqa mem xmm", ("", 0)),
+    ("movdqa xmm mem", ("", 0)),
+    ("vmovdqa xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqa mem xmm", ("", 0)),
+    ("vmovdqa xmm mem", ("", 0)),
+    ("vmovdqa ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqa mem ymm", ("", 0)),
+    ("vmovdqa ymm mem", ("", 0)),
+    ("vmovdqa32 xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqa32 mem xmm", ("", 0)),
+    ("vmovdqa32 xmm mem", ("", 0)),
+    ("vmovdqa32 ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqa32 mem ymm", ("", 0)),
+    ("vmovdqa32 ymm mem", ("", 0)),
+    ("vmovdqa32 zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqa32 mem zmm", ("", 0)),
+    ("vmovdqa32 zmm mem", ("", 0)),
+    ("vmovdqa64 xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqa64 mem xmm", ("", 0)),
+    ("vmovdqa64 xmm mem", ("", 0)),
+    ("vmovdqa64 ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqa64 mem ymm", ("", 0)),
+    ("vmovdqa64 ymm mem", ("", 0)),
+    ("vmovdqa64 zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqa64 mem zmm", ("", 0)),
+    ("vmovdqa64 zmm mem", ("", 0)),
+    # https://www.felixcloutier.com/x86/movdqu:vmovdqu8:vmovdqu16:vmovdqu32:vmovdqu64
+    ("movdqu xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movdqu mem xmm", ("", 0)),
+    ("movdqu xmm mem", ("", 0)),
+    ("vmovdqu xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu mem xmm", ("", 0)),
+    ("vmovdqu xmm mem", ("", 0)),
+    ("vmovdqu ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu mem ymm", ("", 0)),
+    ("vmovdqu ymm mem", ("", 0)),
+    ("vmovdqu8 xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu8 mem xmm", ("", 0)),
+    ("vmovdqu8 xmm mem", ("", 0)),
+    ("vmovdqu8 ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu8 mem ymm", ("", 0)),
+    ("vmovdqu8 ymm mem", ("", 0)),
+    ("vmovdqu8 zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu8 mem zmm", ("", 0)),
+    ("vmovdqu8 zmm mem", ("", 0)),
+    ("vmovdqu16 xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu16 mem xmm", ("", 0)),
+    ("vmovdqu16 xmm mem", ("", 0)),
+    ("vmovdqu16 ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu16 mem ymm", ("", 0)),
+    ("vmovdqu16 ymm mem", ("", 0)),
+    ("vmovdqu16 zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu16 mem zmm", ("", 0)),
+    ("vmovdqu16 zmm mem", ("", 0)),
+    ("vmovdqu32 xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu32 mem xmm", ("", 0)),
+    ("vmovdqu32 xmm mem", ("", 0)),
+    ("vmovdqu32 ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu32 mem ymm", ("", 0)),
+    ("vmovdqu32 ymm mem", ("", 0)),
+    ("vmovdqu32 zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu32 mem zmm", ("", 0)),
+    ("vmovdqu32 zmm mem", ("", 0)),
+    ("vmovdqu64 xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu64 mem xmm", ("", 0)),
+    ("vmovdqu64 xmm mem", ("", 0)),
+    ("vmovdqu64 ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu64 mem ymm", ("", 0)),
+    ("vmovdqu64 ymm mem", ("", 0)),
+    ("vmovdqu64 zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovdqu64 mem zmm", ("", 0)),
+    ("vmovdqu64 zmm mem", ("", 0)),
+    ## https://www.felixcloutier.com/x86/movhlps
+    #("movhlps xmm xmm", ("1*p5", 1)),
+    #("vmovhlps xmm xmm xmm", ("1*p5", 1)),
+    ## https://www.felixcloutier.com/x86/movhpd
+    #("movhpd mem xmm", ("1*p5", 1)),
+    #("vmovhpd mem xmm xmm", ("1*p5", 1)),
+    #("movhpd xmm mem", ("", 0)),
+    #("vmovhpd mem xmm", ("", 0)),
+    ## https://www.felixcloutier.com/x86/movhps
+    #("movhps mem xmm", ("1*p5", 1)),
+    #("vmovhps mem xmm xmm", ("1*p5", 1)),
+    #("movhps xmm mem", ("", 0)),
+    #("vmovhps mem xmm", ("", 0)),
+    ## https://www.felixcloutier.com/x86/movlhps
+    #("movlhps xmm xmm", ("1*p5", 1)),
+    #("vmovlhps xmm xmm xmm", ("1*p5", 1)),
+    ## https://www.felixcloutier.com/x86/movlpd
+    #("movlpd mem xmm", ("1*p5", 1)),
+    #("vmovlpd mem xmm xmm", ("1*p5", 1)),
+    #("movlpd xmm mem", ("", 0)),
+    #("vmovlpd mem xmm", ("1*p5", 1)),
+    ## https://www.felixcloutier.com/x86/movlps
+    #("movlps mem xmm", ("1*p5", 1)),
+    #("vmovlps mem xmm xmm", ("1*p5", 1)),
+    #("movlps xmm mem", ("", 0)),
+    #("vmovlps mem xmm", ("1*p5", 1)),
+    ## https://www.felixcloutier.com/x86/movmskpd
+    #("movmskpd xmm gpr", ("1*p0", 1)),
+    #("vmovmskpd xmm gpr", ("1*p0", 1)),
+    #("vmovmskpd ymm gpr", ("1*p0", 1)),
+    ## https://www.felixcloutier.com/x86/movmskps
+    #("movmskps xmm gpr", ("1*p0", 1)),
+    #("vmovmskps xmm gpr", ("1*p0", 1)),
+    #("vmovmskps ymm gpr", ("1*p0", 1)),
+    # https://www.felixcloutier.com/x86/movntdq
+    ("movntdq xmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntdq xmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntdq ymm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntdq zmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    # https://www.felixcloutier.com/x86/movntdqa
+    ("movntdqa mem xmm", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntdqa mem xmm", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntdqa mem ymm", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntdqa mem zmm", ("", 0)),  # TODO NT-store: what latency to use?
+    # https://www.felixcloutier.com/x86/movnti
+    ("movnti gpr mem", ("", 0)),  # TODO NT-store: what latency to use?
+    # https://www.felixcloutier.com/x86/movntpd
+    ("movntpd xmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntpd xmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntpd ymm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntpd zmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    # https://www.felixcloutier.com/x86/movntps
+    ("movntps xmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntps xmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntps ymm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    ("vmovntps zmm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    # https://www.felixcloutier.com/x86/movntq
+    ("movntq mm mem", ("", 0)),  # TODO NT-store: what latency to use?
+    # https://www.felixcloutier.com/x86/movq
+    ("movq mm mm", ("", 0)),
+    ("movq mem mm", ("", 0)),
+    ("movq mm mem", ("", 0)),
+    ("movq xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movq mem xmm", ("", 0)),
+    ("movq xmm mem", ("", 0)),
+    ("vmovq xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovq mem xmm", ("", 0)),
+    ("vmovq xmm mem", ("", 0)),
+    # https://www.felixcloutier.com/x86/movs:movsb:movsw:movsd:movsq
+    # TODO combined load-store is currently not supported
+    # ('movs mem mem', ()),
+    # https://www.felixcloutier.com/x86/movsd
+    ("movsd xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movsd mem xmm", ("", 0)),
+    ("movsd xmm mem", ("", 0)),
+    ("vmovsd xmm xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovsd mem xmm", ("", 0)),
+    ("vmovsd xmm mem", ("", 0)),
+    ## https://www.felixcloutier.com/x86/movshdup
+    #("movshdup xmm xmm", ("1*p15", 1)),
+    #("movshdup mem xmm", ("", 0)),
+    #("vmovshdup xmm xmm", ("1*p15", 1)),
+    #("vmovshdup mem xmm", ("", 0)),
+    #("vmovshdup ymm ymm", ("1*p15", 1)),
+    #("vmovshdup mem ymm", ("", 0)),
+    #("vmovshdup zmm zmm", ("1*p5", 1)),
+    #("vmovshdup mem zmm", ("", 0)),
+    ## https://www.felixcloutier.com/x86/movsldup
+    #("movsldup xmm xmm", ("1*p15", 1)),
+    #("movsldup mem xmm", ("", 0)),
+    #("vmovsldup xmm xmm", ("1*p15", 1)),
+    #("vmovsldup mem xmm", ("", 0)),
+    #("vmovsldup ymm ymm", ("1*p15", 1)),
+    #("vmovsldup mem ymm", ("", 0)),
+    #("vmovsldup zmm zmm", ("1*p5", 1)),
+    #("vmovsldup mem zmm", ("", 0)),
+    # https://www.felixcloutier.com/x86/movss
+    ("movss xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movss mem xmm", ("", 0)),
+    ("vmovss xmm xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovss mem xmm", ("", 0)),
+    ("vmovss xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovss xmm mem", ("", 0)),
+    ("movss mem xmm", ("", 0)),
+    # https://www.felixcloutier.com/x86/movsx:movsxd
+    ("movsx gpr gpr", ("1*p0,1,5,6,10", 1)),
+    ("movsx mem gpr", ("", 0)),
+    ("movsxd gpr gpr", ("", 0)),
+    ("movsxd mem gpr", ("", 0)),
+    ("movsb gpr gpr", ("1*p0,1,5,6,10", 1)),  # AT&T version
+    ("movsb mem gpr", ("", 0)),  # AT&T version
+    ("movsw gpr gpr", ("1*p0,1,5,6,10", 1)),  # AT&T version
+    ("movsw mem gpr", ("", 0)),  # AT&T version
+    ("movsl gpr gpr", ("1*p0,1,5,6,10", 1)),  # AT&T version
+    ("movsl mem gpr", ("", 0)),  # AT&T version
+    ("movsq gpr gpr", ("1*p0,1,5,6,10", 1)),  # AT&T version
+    ("movsq mem gpr", ("", 0)),  # AT&T version
+    # https://www.felixcloutier.com/x86/movupd
+    ("movupd xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movupd mem xmm", ("", 0)),
+    ("movupd xmm mem", ("", 0)),
+    ("vmovupd xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovupd mem xmm", ("", 0)),
+    ("vmovupd xmm mem", ("", 0)),
+    ("vmovupd ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovupd mem ymm", ("", 0)),
+    ("vmovupd ymm mem", ("", 0)),
+    ("vmovupd zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovupd mem zmm", ("", 0)),
+    ("vmovupd zmm mem", ("", 0)),
+    # https://www.felixcloutier.com/x86/movups
+    ("movups xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("movups mem xmm", ("", 0)),
+    ("movups xmm mem", ("", 0)),
+    ("vmovups xmm xmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovups mem xmm", ("", 0)),
+    ("vmovups xmm mem", ("", 0)),
+    ("vmovups ymm ymm", ("1*p0,1,5,6,10", 1)),
+    ("vmovups mem ymm", ("", 0)),
+    ("vmovups ymm mem", ("", 0)),
+    ("vmovups zmm zmm", ("1*p0,1,5,6,10", 1)),
+    ("vmovups mem zmm", ("", 0)),
+    ("vmovups zmm mem", ("", 0)),
+    ## https://www.felixcloutier.com/x86/movzx
+    #("movzx gpr gpr", ("1*p0,1,5,6,10", 1)),
+    #("movzx mem gpr", ("", 0)),
+    #("movzb gpr gpr", ("1*p0,1,5,6,10", 1)),  # AT&T version
+    #("movzb mem gpr", ("", 0)),  # AT&T version
+    #("movzw gpr gpr", ("1*p0,1,5,6,106", 1)),  # AT&T version
+    #("movzw mem gpr", ("", 0)),  # AT&T version
+    #("movzl gpr gpr", ("1*p0156", 1)),  # AT&T version
+    #("movzl mem gpr", ("", 0)),  # AT&T version
+    #("movzq gpr gpr", ("1*p0156", 1)),  # AT&T version
+    #("movzq mem gpr", ("", 0)),  # AT&T version
+    ## https://www.felixcloutier.com/x86/cmovcc
+    #("cmova gpr gpr", ("2*p06", 1)),
+    #("cmova mem gpr", ("", 0)),
+    #("cmovae gpr gpr", ("1*p06", 1)),
+    #("cmovae mem gpr", ("", 0)),
+    #("cmovb gpr gpr", ("2*p06", 1)),
+    #("cmovb mem gpr", ("", 0)),
+    #("cmovbe gpr gpr", ("2*p06", 1)),
+    #("cmovbe mem gpr", ("", 0)),
+    #("cmovc gpr gpr", ("1*p06", 1)),
+    #("cmovc mem gpr", ("", 0)),
+    #("cmove gpr gpr", ("1*p06", 1)),
+    #("cmove mem gpr", ("", 0)),
+    #("cmovg gpr gpr", ("1*p06", 1)),
+    #("cmovg mem gpr", ("", 0)),
+    #("cmovge gpr gpr", ("1*p06", 1)),
+    #("cmovge mem gpr", ("", 0)),
+    #("cmovl gpr gpr", ("1*p06", 1)),
+    #("cmovl mem gpr", ("", 0)),
+    #("cmovle gpr gpr", ("1*p06", 1)),
+    #("cmovle mem gpr", ("", 0)),
+    #("cmovna gpr gpr", ("2*p06", 1)),
+    #("cmovna mem gpr", ("", 0)),
+    #("cmovnae gpr gpr", ("1*p06", 1)),
+    #("cmovnae mem gpr", ("", 0)),
+    #("cmovnb gpr gpr", ("1*p06", 1)),
+    #("cmovnb mem gpr", ("", 0)),
+    #("cmovnbe gpr gpr", ("2*p06", 1)),
+    #("cmovnbe mem gpr", ("", 0)),
+    #("cmovnc gpr gpr", ("1*p06", 1)),
+    #("cmovnc mem gpr", ("", 0)),
+    #("cmovne gpr gpr", ("1*p06", 1)),
+    #("cmovne mem gpr", ("", 0)),
+    #("cmovng gpr gpr", ("1*p06", 1)),
+    #("cmovng mem gpr", ("", 0)),
+    #("cmovnge gpr gpr", ("1*p06", 1)),
+    #("cmovnge mem gpr", ("", 0)),
+    #("cmovnl gpr gpr", ("1*p06", 1)),
+    #("cmovnl mem gpr", ("", 0)),
+    #("cmovno gpr gpr", ("1*p06", 1)),
+    #("cmovno mem gpr", ("", 0)),
+    #("cmovnp gpr gpr", ("1*p06", 1)),
+    #("cmovnp mem gpr", ("", 0)),
+    #("cmovns gpr gpr", ("1*p06", 1)),
+    #("cmovns mem gpr", ("", 0)),
+    #("cmovnz gpr gpr", ("1*p06", 1)),
+    #("cmovnz mem gpr", ("", 0)),
+    #("cmovo gpr gpr", ("1*p06", 1)),
+    #("cmovo mem gpr", ("", 0)),
+    #("cmovp gpr gpr", ("1*p06", 1)),
+    #("cmovp mem gpr", ("", 0)),
+    #("cmovpe gpr gpr", ("1*p06", 1)),
+    #("cmovpe mem gpr", ("", 0)),
+    #("cmovpo gpr gpr", ("1*p06", 1)),
+    #("cmovpo mem gpr", ("", 0)),
+    #("cmovs gpr gpr", ("1*p06", 1)),
+    #("cmovs mem gpr", ("", 0)),
+    #("cmovz gpr gpr", ("1*p06", 1)),
+    #("cmovz mem gpr", ("", 0)),
+    ## https://www.felixcloutier.com/x86/pmovmskb
+    #("pmovmskb mm gpr", ("1*p0", 1)),
+    #("pmovmskb xmm gpr", ("1*p0", 1)),
+    #("vpmovmskb xmm gpr", ("1*p0", 1)),
+    ## https://www.felixcloutier.com/x86/pmovsx
+    #("pmovsxbw xmm xmm", ("1*p15", 1)),
+    #("pmovsxbw mem xmm", ("1*p15", 1)),
+    #("pmovsxbd xmm xmm", ("1*p15", 1)),
+    #("pmovsxbd mem xmm", ("1*p15", 1)),
+    #("pmovsxbq xmm xmm", ("1*p15", 1)),
+    #("pmovsxbq mem xmm", ("1*p15", 1)),
+    #("vpmovsxbw xmm xmm", ("1*p15", 1)),
+    #("vpmovsxbw mem xmm", ("1*p15", 1)),
+    #("vpmovsxbd xmm xmm", ("1*p15", 1)),
+    #("vpmovsxbd mem xmm", ("1*p15", 1)),
+    #("vpmovsxbq xmm xmm", ("1*p15", 1)),
+    #("vpmovsxbq mem xmm", ("1*p15", 1)),
+    #("vpmovsxbw xmm ymm", ("1*p5", 1)),
+    #("vpmovsxbw mem ymm", ("1*p5", 1)),
+    #("vpmovsxbd xmm ymm", ("1*p5", 1)),
+    #("vpmovsxbd mem ymm", ("1*p5", 1)),
+    #("vpmovsxbq xmm ymm", ("1*p5", 1)),
+    #("vpmovsxbq mem ymm", ("1*p5", 1)),
+    #("vpmovsxbw ymm zmm", ("1*p5", 3)),
+    #("vpmovsxbw mem zmm", ("1*p5", 1)),
+    ## https://www.felixcloutier.com/x86/pmovzx
+    #("pmovzxbw xmm xmm", ("1*p15", 1)),
+    #("pmovzxbw mem xmm", ("1*p15", 1)),
+    #("vpmovzxbw xmm xmm", ("1*p15", 1)),
+    #("vpmovzxbw mem xmm", ("1*p15", 1)),
+    #("vpmovzxbw xmm ymm", ("1*p5", 1)),
+    #("vpmovzxbw mem ymm", ("1*p5", 1)),
+    #("vpmovzxbw ymm zmm", ("1*p5", 1)),
+    #("vpmovzxbw mem zmm", ("1*p5", 1)),
+    ##################################################################
+    ## https://www.felixcloutier.com/x86/movbe
+    #("movbe gpr mem", ("1*p15", 6)),
+    #("movbe mem gpr", ("1*p15", 6)),
+    ################################################
+    # https://www.felixcloutier.com/x86/movapd
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movaps
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movddup
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movdqa:vmovdqa32:vmovdqa64
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movdqu:vmovdqu8:vmovdqu16:vmovdqu32:vmovdqu64
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movq2dq
+    #("movq2dq mm xmm", ("1*p0+1*p015", 1)),
+    # https://www.felixcloutier.com/x86/movsd
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movshdup
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movsldup
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movss
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movupd
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/movups
+    # TODO with masking!
+    # https://www.felixcloutier.com/x86/pmovsx
+    # TODO with masking!
+]
+
+
 
 class MOVEntryBuilderIntelWithPort7AGU(MOVEntryBuilder):
     # for HSW, BDW, SKX and CSX
@@ -1612,6 +2076,7 @@ def get_description(arch, rhs_comment=None):
         "skx": "\n".join([p7.process_item(*item) for item in skx_mov_instructions]),
         "csx": "\n".join([p7.process_item(*item) for item in csx_mov_instructions]),
         "icx": "\n".join([p9.process_item(*item) for item in icx_mov_instructions]),
+        "spr": "\n".join([p11.process_item(*item) for item in spr_mov_instructions]),
         "zen3": "\n".join([z3.process_item(*item) for item in zen3_mov_instructions]),
     }
 
@@ -1634,7 +2099,7 @@ if __name__ == "__main__":
     import sys
 
     if len(sys.argv) != 2:
-        print("Usage: {} (snb|ivb|hsw|bdw|skx|csx|icx|zen3)".format(sys.argv[0]))
+        print("Usage: {} (snb|ivb|hsw|bdw|skx|csx|icx|spr|zen3)".format(sys.argv[0]))
         sys.exit(0)
 
     try:
diff --git a/osaca/data/spr.yml b/osaca/data/spr.yml
new file mode 100644
index 0000000..9b8ff68
--- /dev/null
+++ b/osaca/data/spr.yml
@@ -0,0 +1,5464 @@
+osaca_version: 0.5.3
+micro_architecture: Sapphire Rapids
+arch_code: SPR
+isa: x86
+ROB_size: ~ 
+retired_uOps_per_cycle: ~
+scheduler_size: ~ 
+hidden_loads: false
+load_latency: {gpr: 5.0, mm: 5.0, xmm: 5.0, ymm: 5.0, zmm: 5.0}
+load_throughput:
+- {dst: zmm, base: "*", index: "*", offset: "*", scale: "*", port_pressure: [[1, '23']]}
+- {dst: ymm, base: "*", index: "*", offset: "*", scale: "*", port_pressure: [[1, ['2', '3', '11']]]}
+- {dst: xmm, base: "*", index: "*", offset: "*", scale: "*", port_pressure: [[1, ['2', '3', '11']]]}
+- {dst: gpr, base: "*", index: "*", offset: "*", scale: "*", port_pressure: [[1, ['2', '3', '11']]]}
+load_throughput_default: [[1, ['2', '3', '11']]]
+store_throughput: 
+- {src: zmm, base: "*", index: "*", offset: "*", scale: "*", port_pressure:  [[1, '78'], [1, '4'], [1, '9']]}
+- {src: ymm, base: "*", index: "*", offset: "*", scale: "*", port_pressure:  [[1, '78'], [1, '49']]}
+- {src: xmm, base: "*", index: "*", offset: "*", scale: "*", port_pressure:  [[1, '78'], [1, '49']]}
+- {src: gpr, base: "*", index: "*", offset: "*", scale: "*", port_pressure:  [[1, '78'], [1, '49']]}
+store_throughput_default: [[1, '78'], [1, '49']]
+ports: ['0', 0DV, '1', 1DV, '2', '3', '4', '5', '6', '7', '8', '9', '10', '11']
+port_model_scheme: |
+  +--------------------------------------------------------------------------------------------------------+
+  |                                        scheduler                                                       |
+  +--------------------------------------------------------------------------------------------------------+
+     0 |       1 |      2 |     3 |     4 |      5 |        6 |     7 |      8 |      9 |    10 |    11 |
+       \/        \/       \/      \/      \/       \/         \/      \/       \/       \/      \/      \/
+   +-------+ +-------+ +-----+ +-----+ +-----+ +-------+ +-------+ +------+ +------+ +-----+ +-----+ +-----+
+   |  ALU  | |  ALU  | |  LD | |  LD | |  ST | |  ALU  | |  ALU  | |ST AGU| |ST AGU| |  ST | | ALU | |  LD |
+   +-------+ +-------+ +-----+ +-----+ +-----+ +-------+ +-------+ +------+ +------+ +-----+ +-----+ +-----+
+   +-------+ +-------+ +-----+ +-----+         +-------+ +-------+                           +-----+ +-----+
+   | BRANCH| |  LEA  | | AGU | | AGU |         |  LEA  | | SHIFT |                           | LEA | | AGU |
+   +-------+ +-------+ +-----+ +-----+         +-------+ +-------+                           +-----+ +-----+
+   +-------+ +-------+                         +-------+ +-------+
+   |  LEA  | |INT MUL|                         | MUL Hi| | BRANCH|
+   +-------+ +-------+                         +-------+ +-------+
+   +-------+ +-------+                         +-------+ +-------+
+   | SHIFT | |INT DIV|                         |AVX ALU| |  LEA  |
+   +-------+ +-------+                         +-------+ +-------+
+   +-------+ +-------+                         +-------+
+   |AVX ALU| |AVX*ALU|                         |  AVX  |
+   +-------+ +-------+                         |  SHUF |
+   +-------+ +-------+                         +-------+
+   |AVX DIV| |AVX*FMA|                         +-------+
+   +-------+ +-------+                         |AVX FMA|
+   +-------+ +-------+                         +-------+
+   |AVX FMA| |  AVX* |
+   +-------+ |  SHUF |
+  +--------+ +-------+
+  |AVX SHFT| +-------+
+  +--------+ |  AVX* |
+             | SHFT  |
+             +-------+    * = no AVX-512
+instruction_forms:
+##########################################
+# assume all jmp instruction 0
+- name: [jo, jno, js, jns, jp, jpe, jnp, jpo]
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: [jc, jb, jae, jnb, jna, jbe, ja, jnbe]
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: [je, jz, jne, jnz, jl, jnge]
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: [jge, jnl, jle, jng, jg, jnle]
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: jmp
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+##########################################
+# assume all cmp's equal for now
+# TODO add cmp instructions
+- name: [cmp, cmpeqpd, cmpltpd, cmplepd, cmpunordpd, cmpneqpd, cmpnltpd, cmpnlepd, cmpordpd, cmpltps, cmpleps, cmpunordps, cmpneqps, cmpnltps, cmpnleps, cmpordps]
+  operands:
+  - class: register
+    name: '*'
+  - class: register
+    name: '*'
+  latency: 1.0
+  port_pressure: [[1, ['0','1','5','6','10']]]
+  throughput: 0.20
+  uops: 1
+- name: [cmp, cmpeqpd, cmpltpd, cmplepd, cmpunordpd, cmpneqpd, cmpnltpd, cmpnlepd, cmpordpd, cmpltps, cmpleps, cmpunordps, cmpneqps, cmpnltps, cmpnleps, cmpordps]
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: '*'
+  latency: 1.0
+  port_pressure: [[1, ['0','1','5','6','10']]]
+  throughput: 0.20
+  uops: 1
+##########################################
+- name: push
+  operands:
+  - class: immediate
+    imd: int
+  latency: 0
+  port_pressure: [[1, '78'], [1, '49']]
+  throughput: 0.5
+  uops: 2
+- name: push
+  operands:
+  - class: register
+    name: gpr
+  latency: 12
+  port_pressure: [[1, '78'], [1, '49']]
+  throughput: 0.5
+  uops: 2
+- name: push
+  operands:
+  - class: memory
+    base: "*"
+    offset: "*"
+    index: "*"
+    scale: "*"
+  latency: 0
+  port_pressure: [[1, '78'], [1, '49']]
+  throughput: 0.5
+  uops: 2
+- name: pop
+  operands:
+  - class: immediate
+    imd: int
+  latency: 5
+  port_pressure: [[1, ['2', '3', '10']]]
+  throughput: 0.3333333333333333
+  uops: 2
+- name: pop
+  operands:
+  - class: register
+    name: gpr
+  latency: 5
+  port_pressure: [[1, ['2', '3', '10']]]
+  throughput: 0.3333333333333333
+  uops: 2
+- name: pop
+  operands:
+  - class: memory
+    base: "*"
+    offset: "*"
+    index: "*"
+    scale: "*"
+  latency: 5
+  port_pressure: [[1, ['2', '3', '10']]]
+  throughput: 0.3333333333333333
+  uops: 2
+##########################################
+- name: mov                                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: mov  # with store                             # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: mov  # with load                              # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: mov                                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: immediate                                  # ./generate_mov_entries.py spr
+    imd: int                                          # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: mov  # with store                             # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: immediate                                  # ./generate_mov_entries.py spr
+    imd: int                                          # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movabs                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: immediate                                  # ./generate_mov_entries.py spr
+    imd: int                                          # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movapd                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movapd  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movapd  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovapd                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovapd  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovapd  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovapd                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovapd  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovapd  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovapd                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovapd  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: vmovapd  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: movaps                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movaps  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movaps  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovaps                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovaps  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovaps  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovaps                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovaps  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovaps  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovaps                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovaps  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: vmovaps  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: movdqa                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movdqa  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movdqa  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqa                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqa  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqa  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqa                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqa  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqa  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqa32                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqa32  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqa32  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqa32                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqa32  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqa32  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqa32                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqa32  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: vmovdqa32  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: vmovdqa64                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqa64  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqa64  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqa64                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqa64  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqa64  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqa64                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqa64  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: vmovdqa64  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: movdqu                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movdqu  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movdqu  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu8                                      # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu8  # with load                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu8  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu8                                      # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu8  # with load                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu8  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu8                                      # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu8  # with load                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: vmovdqu8  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: vmovdqu16                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu16  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu16  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu16                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu16  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu16  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu16                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu16  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: vmovdqu16  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: vmovdqu32                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu32  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu32  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu32                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu32  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu32  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu32                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu32  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: vmovdqu32  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: vmovdqu64                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu64  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu64  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu64                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu64  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovdqu64  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovdqu64                                     # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovdqu64  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: vmovdqu64  # with store                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: movntdq  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntdq  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntdq  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntdq  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: movntdqa  # with load                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovntdqa  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovntdqa  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovntdqa  # with load                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: movnti  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movntpd  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntpd  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntpd  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntpd  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: movntps  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntps  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntps  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovntps  # with store                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: movntq  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: mm                                          # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movq                                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: mm                                          # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: mm                                          # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: []                                   # ./generate_mov_entries.py spr
+  throughput: 0.0                                     # ./generate_mov_entries.py spr
+  uops: 0                                             # ./generate_mov_entries.py spr
+- name: movq  # with load                             # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: mm                                          # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movq  # with store                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: mm                                          # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movq                                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movq  # with load                             # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movq  # with store                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovq                                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovq  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovq  # with store                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movsd                                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movsd  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movsd  # with store                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovsd                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovsd  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovsd  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movss                                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movss  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovss                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovss  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovss                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovss  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: movss  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movsx                                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movsx  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movsxd                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: []                                   # ./generate_mov_entries.py spr
+  throughput: 0.0                                     # ./generate_mov_entries.py spr
+  uops: 0                                             # ./generate_mov_entries.py spr
+- name: movsxd  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movsb                                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movsb  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movsw                                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movsw  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movsl                                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movsl  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movsq                                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movsq  # with load                            # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: gpr                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movupd                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movupd  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movupd  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovupd                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovupd  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovupd  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovupd                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovupd  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovupd  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovupd                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovupd  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: vmovupd  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+- name: movups                                        # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: movups  # with load                           # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: movups  # with store                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovups                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovups  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovups  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: xmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovups                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovups  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, ['2', '3', '10']]]              # ./generate_mov_entries.py spr
+  throughput: 0.3333333333333333                      # ./generate_mov_entries.py spr
+  uops: 1                                             # ./generate_mov_entries.py spr
+- name: vmovups  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: ymm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1, '78'], [1, '49']]               # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 2                                             # ./generate_mov_entries.py spr
+- name: vmovups                                       # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 1                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.0, ['0', '1', '5', '6', '10']]]  # ./generate_mov_entries.py spr
+  throughput: 0.2                                     # ./generate_mov_entries.py spr
+  uops: 1.0                                           # ./generate_mov_entries.py spr
+- name: vmovups  # with load                          # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  latency: 5                                          # ./generate_mov_entries.py spr
+  port_pressure: [[1.5, ['2', '3', '10']]]            # ./generate_mov_entries.py spr
+  throughput: 0.5                                     # ./generate_mov_entries.py spr
+  uops: 1.5                                           # ./generate_mov_entries.py spr
+- name: vmovups  # with store                         # ./generate_mov_entries.py spr
+  operands:                                           # ./generate_mov_entries.py spr
+  - class: register                                   # ./generate_mov_entries.py spr
+    name: zmm                                         # ./generate_mov_entries.py spr
+  - class: memory                                     # ./generate_mov_entries.py spr
+    base: "*"                                         # ./generate_mov_entries.py spr
+    offset: "*"                                       # ./generate_mov_entries.py spr
+    index: "*"                                        # ./generate_mov_entries.py spr
+    scale: "*"                                        # ./generate_mov_entries.py spr
+  latency: 0                                          # ./generate_mov_entries.py spr
+  port_pressure: [[2, '78'], [2, '49']]               # ./generate_mov_entries.py spr
+  throughput: 1.0                                     # ./generate_mov_entries.py spr
+  uops: 4                                             # ./generate_mov_entries.py spr
+##########################################
+- name: adc                   # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: gpr                 # ibench
+  - class: register           # ibench
+    name: gpr                 # ibench
+  latency: 1                  # ibench
+  port_pressure: [[1, '06']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: add                     # ibench
+  operands:                     # ibench
+  - class: register             # ibench
+    name: gpr                   # ibench
+  - class: register             # ibench
+    name: gpr                   # ibench
+  latency: 1                    # ibench
+  port_pressure: [[1, ['0','1','5','6','10']]]  # ibench
+  throughput: 0.20              # ibench
+  uops: 1                       # ibench
+- name: add                     # ibench
+  operands:                     # ibench
+  - class: immediate            # ibench
+    imd: int                    # ibench
+  - class: register             # ibench
+    name: gpr                   # ibench
+  latency: 1                    # ibench
+  port_pressure: [[1, ['0','1','5','6','10']]]  # ibench
+  throughput: 0.20              # ibench
+  uops: 1                       # ibench
+- name: addpd                 # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: addsd                 # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: mulsd                 # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: mulpd                 # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: mulss                 # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: mulps                 # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: addps                 # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: addss                 # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: rcpss                # ibench
+  operands:                  # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  latency: 4                 # ibench
+  port_pressure: [[1, '0']]  # ibench
+  throughput: 1.0            # ibench
+  uops: 1                    # ibench
+- name: rcpps                # ibench
+  operands:                  # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  latency: 4                 # ibench
+  port_pressure: [[1, '0']]  # ibench
+  throughput: 1.0            # ibench
+  uops: 1                    # ibench
+- name: vrcpps               # ibench
+  operands:                  # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  latency: 4                 # ibench
+  port_pressure: [[1, '0']]  # ibench
+  throughput: 1.0            # ibench
+  uops: 1                    # ibench
+- name: vrcpps               # ibench
+  operands:                  # ibench
+  - class: register          # ibench
+    name: ymm                # ibench
+  - class: register          # ibench
+    name: ymm                # ibench
+  latency: 4                 # ibench
+  port_pressure: [[1, '0']]  # ibench
+  throughput: 1.0            # ibench
+  uops: 1                    # ibench
+- name: vrcpss               # ibench
+  operands:                  # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  - class: register          # ibench
+    name: xmm                # ibench
+  latency: 4                 # ibench
+  port_pressure: [[1, '0']]  # ibench
+  throughput: 1.0            # ibench
+  uops: 1                    # ibench
+- name: sqrtsd                           # ibench
+  operands:                              # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  latency: 13                            # ibench
+  port_pressure: [[6, ['0DV']], [1, '0']]  # ibench
+  throughput: 6.0                        # ibench
+  uops: 7                                # ibench
+- name: sqrtss                           # ibench
+  operands:                              # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  latency: 12                            # ibench
+  port_pressure: [[3, ['0DV']], [1, '0']]  # ibench
+  throughput: 3.0                        # ibench
+  uops: 4                                # ibench
+- name: vsqrtsd                          # ibench
+  operands:                              # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  latency: 13                            # ibench
+  port_pressure: [[6, ['0DV']], [1, '0']]  # ibench
+  throughput: 6.0                        # ibench
+  uops: 7                                # ibench
+- name: vsqrtss                          # ibench
+  operands:                              # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  latency: 12                            # ibench
+  port_pressure: [[3, ['0DV']], [1, '0']]  # ibench
+  throughput: 3.0                        # ibench
+  uops: 4                                # ibench
+- name: sub                     # ibench
+  operands:                     # ibench
+  - class: immediate            # ibench
+    imd: int                    # ibench
+  - class: register             # ibench
+    name: gpr                   # ibench
+  latency: 1                    # ibench
+  port_pressure: [[1, ['0','1','5','6','10']]]  # ibench
+  throughput: 0.20              # ibench
+  uops: 1                       # ibench
+- name: sub                     # ibench
+  operands:                     # ibench
+  - class: register             # ibench
+    name: gpr                   # ibench
+  - class: register             # ibench
+    name: gpr                   # ibench
+  latency: 1                    # ibench
+  port_pressure: [[1, ['0','1','5','6','10']]]  # ibench
+  throughput: 0.20              # ibench
+  uops: 1                       # ibench
+- name: vaddpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddsd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddsd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddss                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vaddss                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vdivpd                           # ibench
+  operands:                              # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  - class: register                      # ibench
+    name: xmm                            # ibench
+  latency: 14                            # ibench
+  port_pressure: [[1, '0'], [4, ['0DV']]]  # ibench
+  throughput: 4.0                        # ibench
+  uops: 4                                # ibench
+- name: vdivpd                           # asmbench
+  operands:                              # asmbench
+  - class: register                      # asmbench
+    name: ymm                            # asmbench
+  - class: register                      # asmbench
+    name: ymm                            # asmbench
+  - class: register                      # asmbench
+    name: ymm                            # asmbench
+  latency: 14                            # asmbench
+  port_pressure: [[1, '0'], [8, ['0DV']]]  # asmbench
+  throughput: 8.0                        # asmbench
+  uops: 8                                # asmbench
+- name: vdivpd                              # ibench
+  operands:                                 # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  latency: 23                               # ibench
+  port_pressure: [[1, '0'], [16, ['0DV']]]  # ibench
+  throughput: 16.0                          # ibench
+  uops: 16                                  # ibench
+- name: vdivpd                              # ibench
+  operands:                                 # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+    mask: True                              # ibench
+  latency: 23                               # ibench
+  port_pressure: [[1, '0'], [16, ['0DV']]]  # ibench
+  throughput: 16.0                          # ibench
+  uops: 16                                  # ibench
+- name: vdivpd                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+    mask: True                             # ibench
+  latency: 14                              # ibench
+  port_pressure: [[1, '0'], [8, ['0DV']]]  # ibench
+  throughput: 8.0                          # ibench
+  uops: 8                                  # ibench
+- name: vdivpd                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+    mask: True                             # ibench
+  latency: 13                              # ibench
+  port_pressure: [[1, '0'], [4, ['0DV']]]  # ibench
+  throughput: 4.0                          # ibench
+  uops: 4                                  # ibench
+- name: vdivps                              # ibench
+  operands:                                 # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  latency: 18                               # ibench
+  port_pressure: [[1, '0'], [10, ['0DV']]]  # ibench
+  throughput: 10.0                          # ibench
+  uops: 10                                  # ibench
+- name: vdivps                              # ibench
+  operands:                                 # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+  - class: register                         # ibench
+    name: zmm                               # ibench
+    mask: True                              # ibench
+  latency: 18                               # ibench
+  port_pressure: [[1, '0'], [10, ['0DV']]]  # ibench
+  throughput: 10.0                          # ibench
+  uops: 10                                  # ibench
+- name: vdivps                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+    mask: True                             # ibench
+  latency: 11                              # ibench
+  port_pressure: [[1, '0'], [5, ['0DV']]]  # ibench
+  throughput: 5.0                          # ibench
+  uops: 5                                  # ibench
+- name: vdivps                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+  - class: register                        # ibench
+    name: ymm                              # ibench
+  latency: 11                              # ibench
+  port_pressure: [[1, '0'], [5, ['0DV']]]  # ibench
+  throughput: 5.0                          # ibench
+  uops: 5                                  # ibench
+- name: vdivps                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  latency: 11                              # ibench
+  port_pressure: [[1, '0'], [3, ['0DV']]]  # ibench
+  throughput: 3.0                          # ibench
+  uops: 3                                  # ibench
+- name: vdivps                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+    mask: True                             # ibench
+  latency: 11                              # ibench
+  port_pressure: [[1, '0'], [3, ['0DV']]]  # ibench
+  throughput: 3.0                          # ibench
+  uops: 3                                  # ibench
+- name: vdivss                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+    mask: True                             # ibench
+  latency: 11                              # ibench
+  port_pressure: [[1, '0'], [3, ['0DV']]]  # ibench
+  throughput: 3.0                          # ibench
+  uops: 4                                  # ibench
+- name: vdivss                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  latency: 11                              # ibench
+  port_pressure: [[1, '0'], [3, ['0DV']]]  # ibench
+  throughput: 3.0                          # ibench
+  uops: 3                                  # ibench
+- name: vdivsd                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  latency: 14                              # ibench
+  port_pressure: [[1, '0'], [4, ['0DV']]]  # ibench
+  throughput: 4.0                          # ibench
+  uops: 4                                  # ibench
+- name: vdivsd                             # ibench
+  operands:                                # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+  - class: register                        # ibench
+    name: xmm                              # ibench
+    mask: True                             # ibench
+  latency: 14                              # ibench
+  port_pressure: [[1, '0'], [4, ['0DV']]]  # ibench
+  throughput: 4.0                          # ibench
+  uops: 4                                  # ibench
+- name: [vfmadd213pd, vfmadd132pd, vfmadd231pd, vfnmadd213pd, vfnmadd132pd, vfnmadd231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213pd, vfmadd132pd, vfmadd231pd, vfnmadd213pd, vfnmadd132pd, vfnmadd231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213pd, vfmadd132pd, vfmadd231pd, vfnmadd213pd, vfnmadd132pd, vfnmadd231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+    mask: True                                   # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213pd, vfmadd132pd, vfmadd231pd, vfnmadd213pd, vfnmadd132pd, vfnmadd231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213pd, vfmadd132pd, vfmadd231pd, vfnmadd213pd, vfnmadd132pd, vfnmadd231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '05']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213pd, vfmadd132pd, vfmadd231pd, vfnmadd213pd, vfnmadd132pd, vfnmadd231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '05']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213ps, vfmadd132ps, vfmadd231ps, vfnmadd213ps, vfnmadd132ps, vfnmadd231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213ps, vfmadd132ps, vfmadd231ps, vfnmadd213ps, vfnmadd132ps, vfnmadd231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213ps, vfmadd132ps, vfmadd231ps, vfnmadd213ps, vfnmadd132ps, vfnmadd231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213ps, vfmadd132ps, vfmadd231ps, vfnmadd213ps, vfnmadd132ps, vfnmadd231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213ps, vfmadd132ps, vfmadd231ps, vfnmadd213ps, vfnmadd132ps, vfnmadd231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '05']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213ps, vfmadd132ps, vfmadd231ps, vfnmadd213ps, vfnmadd132ps, vfnmadd231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '05']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213sd, vfmadd132sd, vfmadd231sd, vfnmadd213sd, vfnmadd132sd, vfnmadd231sd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213sd, vfmadd132sd, vfmadd231sd, vfnmadd213sd, vfnmadd132sd, vfnmadd231sd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213ss, vfmadd132ss, vfmadd231ss, vfnmadd213ss, vfnmadd132ss, vfnmadd231ss]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmadd213ss, vfmadd132ss, vfmadd231ss, vfnmadd213ss, vfnmadd132ss, vfnmadd231ss]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213pd, vfmsub132pd, vfmsub231pd, vfnmsub213pd, vfnmsub132pd, vfnmsub231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213pd, vfmsub132pd, vfmsub231pd, vfnmsub213pd, vfnmsub132pd, vfnmsub231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213pd, vfmsub132pd, vfmsub231pd, vfnmsub213pd, vfnmsub132pd, vfnmsub231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213pd, vfmsub132pd, vfmsub231pd, vfnmsub213pd, vfnmsub132pd, vfnmsub231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213pd, vfmsub132pd, vfmsub231pd, vfnmsub213pd, vfnmsub132pd, vfnmsub231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '05']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213pd, vfmsub132pd, vfmsub231pd, vfnmsub213pd, vfnmsub132pd, vfnmsub231pd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '05']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213ps, vfmsub132ps, vfmsub231ps, vfnmsub213ps, vfnmsub132ps, vfnmsub231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213ps, vfmsub132ps, vfmsub231ps, vfnmsub213ps, vfnmsub132ps, vfnmsub231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213ps, vfmsub132ps, vfmsub231ps, vfnmsub213ps, vfnmsub132ps, vfnmsub231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213ps, vfmsub132ps, vfmsub231ps, vfnmsub213ps, vfnmsub132ps, vfnmsub231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+  - class: register                              # ibench
+    name: ymm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213ps, vfmsub132ps, vfmsub231ps, vfnmsub213ps, vfnmsub132ps, vfnmsub231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '05']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213ps, vfmsub132ps, vfmsub231ps, vfnmsub213ps, vfnmsub132ps, vfnmsub231ps]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+  - class: register                              # ibench
+    name: zmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 4                                     # ibench
+  port_pressure: [[1, '05']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213sd, vfmsub132sd, vfmsub231sd, vfnmsub213sd, vfnmsub132sd, vfnmsub231sd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213sd, vfmsub132sd, vfmsub231sd, vfnmsub213sd, vfnmsub132sd, vfnmsub231sd]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213ss, vfmsub132ss, vfmsub231ss, vfnmsub213ss, vfnmsub132ss, vfnmsub231ss]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+    mask: True                                   # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: [vfmsub213ss, vfmsub132ss, vfmsub231ss, vfnmsub213ss, vfnmsub132ss, vfnmsub231ss]  # ibench
+  operands:                                      # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  - class: register                              # ibench
+    name: xmm                                    # ibench
+  latency: 5                                     # ibench
+  port_pressure: [[1, '01']]                     # ibench
+  throughput: 0.5                                # ibench
+  uops: 1                                        # ibench
+- name: vgatherdpd  # with load                                                   # ibench
+  operands:                                                                       # ibench
+  - class: register                                                               # ibench
+    name: xmm                                                                     # ibench
+  - class: memory                                                                 # ibench
+    base: "*"                                                                     # ibench
+    offset: "*"                                                                   # ibench
+    index: "*"                                                                    # ibench
+    scale: "*"                                                                    # ibench
+  - class: register                                                               # ibench
+    name: xmm                                                                     # ibench
+  latency: 20                                                                     # ibench
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [3, ['2','3','11']]]  # ibench
+  throughput: 1.0                                                                 # ibench
+  uops: 9                                                                         # ibench
+- name: vgatherdpd  # with load                                                   # ibench
+  operands:                                                                       # ibench
+  - class: register                                                               # ibench
+    name: ymm                                                                     # ibench
+  - class: memory                                                                 # ibench
+    base: "*"                                                                     # ibench
+    offset: "*"                                                                   # ibench
+    index: "*"                                                                    # ibench
+    scale: "*"                                                                    # ibench
+  - class: register                                                               # ibench
+    name: ymm                                                                     # ibench
+  latency: 22                                                                     # ibench
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [6, ['2','3','11']]]  # ibench
+  throughput: 2.0                                                                 # ibench
+  uops: 16                                                                        # ibench
+- name: vgatherdpd  # with load                                                   # ibench
+  operands:                                                                       # ibench
+  - class: register                                                               # ibench
+    name: zmm                                                                     # ibench
+  - class: memory                                                                 # ibench
+    base: "*"                                                                     # ibench
+    offset: "*"                                                                   # ibench
+    index: "*"                                                                    # ibench
+    scale: "*"                                                                    # ibench
+  - class: register                                                               # ibench
+    name: zmm                                                                     # ibench
+  latency: 26                                                                     # ibench
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [9, ['2','3','11']]]  # ibench
+  throughput: 3.0                                                                 # ibench
+  uops: 31                                                                       # ibench
+- name: vgatherdpd  # with load                                                   # ibench
+  operands:                                                                       # ibench
+  - class: memory                                                                 # ibench
+    base: "*"                                                                     # ibench
+    offset: "*"                                                                   # ibench
+    index: "*"                                                                    # ibench
+    scale: "*"                                                                    # ibench
+  - class: register                                                               # ibench
+    name: xmm                                                                     # ibench
+    mask: True                # ibench
+  latency: 20                                                                     # ibench
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [3, ['2','3','11']]]  # ibench
+  throughput: 1.0                                                                 # ibench
+  uops: 9                                                                         # ibench
+- name: vgatherdpd  # with load                                                   # ibench
+  operands:                                                                       # ibench
+  - class: memory                                                                 # ibench
+    base: "*"                                                                     # ibench
+    offset: "*"                                                                   # ibench
+    index: "*"                                                                    # ibench
+    scale: "*"                                                                    # ibench
+  - class: register                                                               # ibench
+    name: ymm                                                                     # ibench
+    mask: True                # ibench
+  latency: 22                                                                     # ibench
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [6, ['2','3','11']]]  # ibench
+  throughput: 2.0                                                                 # ibench
+  uops: 16                                                                        # ibench
+- name: vgatherdpd  # with load                                                   # ibench
+  operands:                                                                       # ibench
+  - class: memory                                                                 # ibench
+    base: "*"                                                                     # ibench
+    offset: "*"                                                                   # ibench
+    index: "*"                                                                    # ibench
+    scale: "*"                                                                    # ibench
+  - class: register                                                               # ibench
+    name: zmm                                                                     # ibench
+    mask: True                # ibench
+  latency: 26                                                                     # ibench
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [9, ['2','3','11']]]  # ibench
+  throughput: 3.0                                                                 # ibench
+  uops: 31                                                                       # ibench
+- name: vgatherdps  # with load                                                   # ibench
+  operands:                                                                       # ibench
+  - class: register                                                               # ibench
+    name: xmm                                                                     # ibench
+  - class: memory                                                                 # ibench
+    base: "*"                                                                     # ibench
+    offset: "*"                                                                   # ibench
+    index: "*"                                                                    # ibench
+    scale: "*"                                                                    # ibench
+  - class: register                                                               # ibench
+    name: xmm                                                                     # ibench
+  latency: 21                                                                     # ibench
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [6, ['2','3','11']]]  # ibench
+  throughput: 2.0                                                                 # ibench
+  uops: 15                                                                         # ibench
+- name: vgatherdps  # with load                                                   # ibench
+  operands:                                                                       # ibench
+  - class: memory                                                                 # ibench
+    base: "*"                                                                     # ibench
+    offset: "*"                                                                   # ibench
+    index: "*"                                                                    # ibench
+    scale: "*"                                                                    # ibench
+  - class: register                                                               # ibench
+    name: xmm                                                                     # ibench
+    mask: True                # ibench
+  latency: 21                                                                     # ibench
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [6, ['2','3','11']]]  # ibench
+  throughput: 2.0                                                                 # ibench
+  uops: 15                                                                         # ibench
+- name: vgatherdps  # with load                                                   # uops.info
+  operands:                                                                       # uops.info
+  - class: register                                                               # uops.info
+    name: ymm                                                                     # uops.info
+  - class: memory                                                                 # uops.info
+    base: "*"                                                                     # uops.info
+    offset: "*"                                                                   # uops.info
+    index: "*"                                                                    # uops.info
+    scale: "*"                                                                    # uops.info
+  - class: register                                                               # uops.info
+    name: ymm                                                                     # uops.info
+  latency: 23                                                                     # uops.info
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [9, ['2','3','11']]]  # ibench
+  throughput: 3.0                                                                 # uops.info
+  uops: 23                                                                        # uops.info
+- name: vgatherdps  # with load                                                   # uops.info
+  operands:                                                                       # uops.info
+  - class: memory                                                                 # uops.info
+    base: "*"                                                                     # uops.info
+    offset: "*"                                                                   # uops.info
+    index: "*"                                                                    # uops.info
+    scale: "*"                                                                    # uops.info
+  - class: register                                                               # uops.info
+    name: ymm                                                                     # uops.info
+    mask: True                # ibench
+  latency: 23                                                                     # uops.info
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [9, ['2','3','11']]]  # ibench
+  throughput: 3.0                                                                 # uops.info
+  uops: 23                                                                         #uops.info
+- name: vgatherdps  # with load                                                   # uops.info
+  operands:                                                                       # uops.info
+  - class: register                                                               # uops.info
+    name: zmm                                                                     # uops.info
+  - class: memory                                                                 # uops.info
+    base: "*"                                                                     # uops.info
+    offset: "*"                                                                   # uops.info
+    index: "*"                                                                    # uops.info
+    scale: "*"                                                                    # uops.info
+  - class: register                                                               # uops.info
+    name: zmm                                                                     # uops.info
+  latency: 26                                                                     # uops.info
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [15, ['2','3','11']]]  # ibench
+  throughput: 5.0                                                                 # uops.info
+  uops: 39                                                                         #uops.info
+- name: vgatherdps  # with load                                                   # uops.info
+  operands:                                                                       # uops.info
+  - class: memory                                                                 # uops.info
+    base: "*"                                                                     # uops.info
+    offset: "*"                                                                   # uops.info
+    index: "*"                                                                    # uops.info
+    scale: "*"                                                                    # uops.info
+  - class: register                                                               # uops.info
+    name: zmm                                                                     # uops.info
+    mask: True                # ibench
+  latency: 26                                                                     # uops.info
+  port_pressure: [[1, '015'], [1, '15'], [1, '0'], [15, ['2','3','11']]]  # ibench
+  throughput: 5.0                                                                 # uops.info
+  uops: 39                                                                         #uops.info
+- name: vmulpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 5                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+    mask: True                # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulpd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+    mask: True                # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+    mask: True                # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulps                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+    mask: True                # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulsd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulsd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulss                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vmulss                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 4                  # ibench
+  port_pressure: [[1, '01']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vpaddd                    # ibench
+  operands:                       # ibench
+  - class: register               # ibench
+    name: xmm                     # ibench
+  - class: register               # ibench
+    name: xmm                     # ibench
+  - class: register               # ibench
+    name: xmm                     # ibench
+  latency: 1                      # ibench
+  port_pressure: [[1, '015']]     # ibench
+  throughput: 0.3333333333333333  # ibench
+  uops: 1                         # ibench
+- name: vpaddd                    # ibench
+  operands:                       # ibench
+  - class: register               # ibench
+    name: ymm                     # ibench
+  - class: register               # ibench
+    name: ymm                     # ibench
+  - class: register               # ibench
+    name: ymm                     # ibench
+  latency: 1                      # ibench
+  port_pressure: [[1, '015']]     # ibench
+  throughput: 0.3333333333333333  # ibench
+  uops: 1                         # ibench
+- name: vpaddd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  latency: 1                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vpaddd                    # ibench
+  operands:                       # ibench
+  - class: register               # ibench
+    name: xmm                     # ibench
+  - class: register               # ibench
+    name: xmm                     # ibench
+  - class: register               # ibench
+    name: xmm                     # ibench
+    mask: True                    # ibench
+  latency: 1                      # ibench
+  port_pressure: [[1, '015']]     # ibench
+  throughput: 0.3333333333333333  # ibench
+  uops: 1                         # ibench
+- name: vpaddd                    # ibench
+  operands:                       # ibench
+  - class: register               # ibench
+    name: ymm                     # ibench
+  - class: register               # ibench
+    name: ymm                     # ibench
+  - class: register               # ibench
+    name: ymm                     # ibench
+    mask: True                    # ibench
+  latency: 1                      # ibench
+  port_pressure: [[1, '015']]     # ibench
+  throughput: 0.3333333333333333  # ibench
+  uops: 1                         # ibench
+- name: vpaddd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+    mask: True                # ibench
+  latency: 1                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: [vrcp14pd, vrcp14ps]             # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  latency: 4                 # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vrcp14pd, vrcp14ps]             # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  latency: 4                 # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vrcp14pd, vrcp14ps]                        # asmbench
+  operands:                             # asmbench
+  - class: register                     # asmbench
+    name: zmm                           # asmbench
+  - class: register                     # asmbench
+    name: zmm                           # asmbench
+  latency: 6                            # asmbench
+  port_pressure: [[4, '05']]  # asmbench
+  throughput: 2.0                       # asmbench
+  uops: 3                               # asmbench
+- name: [vrcp14pd, vrcp14ps]             # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+    mask: True               # asmbench
+  latency: 4                 # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vrcp14pd, vrcp14ps]             # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+    mask: True               # asmbench
+  latency: 4                 # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vrcp14pd, vrcp14ps]                        # asmbench
+  operands:                             # asmbench
+  - class: register                     # asmbench
+    name: zmm                           # asmbench
+  - class: register                     # asmbench
+    name: zmm                           # asmbench
+    mask: True                          # asmbench
+  latency: 6                            # asmbench
+  port_pressure: [[4, '05']]  # asmbench
+  throughput: 2.0                       # asmbench
+  uops: 3                               # asmbench
+- name: vrcpss               # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  latency: 4                 # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vrcpps               # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  latency: 4                 # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vrcpps               # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  latency: 4                 # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vrsqrt14pd, vrsqrt14ps]  # asmbench
+  operands:                       # asmbench
+  - class: register               # asmbench
+    name: xmm                     # asmbench
+  - class: register               # asmbench
+    name: xmm                     # asmbench
+  latency: 4                      # asmbench
+  port_pressure: [[1, '0']]       # asmbench
+  throughput: 1.0                 # asmbench
+  uops: 1                         # asmbench
+- name: [vrsqrt14pd, vrsqrt14ps]  # asmbench
+  operands:                       # asmbench
+  - class: register               # asmbench
+    name: ymm                     # asmbench
+  - class: register               # asmbench
+    name: ymm                     # asmbench
+  latency: 4                      # asmbench
+  port_pressure: [[1, '0']]       # asmbench
+  throughput: 1.0                 # asmbench
+  uops: 1                         # asmbench
+- name: [vrsqrt14pd, vrsqrt14ps]        # asmbench
+  operands:                             # asmbench
+  - class: register                     # asmbench
+    name: zmm                           # asmbench
+  - class: register                     # asmbench
+    name: zmm                           # asmbench
+  latency: 6                            # asmbench
+  port_pressure: [[4, '05']]  # asmbench
+  throughput: 2.0                       # asmbench
+  uops: 3                               # asmbench
+- name: [vrsqrt14pd, vrsqrt14ps]  # asmbench
+  operands:                       # asmbench
+  - class: register               # asmbench
+    name: xmm                     # asmbench
+  - class: register               # asmbench
+    name: xmm                     # asmbench
+    mask: True                    # asmbench
+  latency: 4                      # asmbench
+  port_pressure: [[1, '0']]       # asmbench
+  throughput: 1.0                 # asmbench
+  uops: 1                         # asmbench
+- name: [vrsqrt14pd, vrsqrt14ps]  # asmbench
+  operands:                       # asmbench
+  - class: register               # asmbench
+    name: ymm                     # asmbench
+  - class: register               # asmbench
+    name: ymm                     # asmbench
+    mask: True                    # asmbench
+  latency: 4                      # asmbench
+  port_pressure: [[1, '0']]       # asmbench
+  throughput: 1.0                 # asmbench
+  uops: 1                         # asmbench
+- name: [vrsqrt14pd, vrsqrt14ps]        # asmbench
+  operands:                             # asmbench
+  - class: register                     # asmbench
+    name: zmm                           # asmbench
+  - class: register                     # asmbench
+    name: zmm                           # asmbench
+    mask: True                          # asmbench
+  latency: 6                            # asmbench
+  port_pressure: [[4, '05']]  # asmbench
+  throughput: 2.0                       # asmbench
+  uops: 3                               # asmbench
+- name: vrsqrtpd                           # asmbench
+  operands:                                # asmbench
+  - class: register                        # asmbench
+    name: ymm                              # asmbench
+  - class: register                        # asmbench
+    name: ymm                              # asmbench
+  latency: 4                              # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0                          # asmbench
+  uops: 1                                 # asmbench
+- name: vrsqrtpd                           # asmbench
+  operands:                                # asmbench
+  - class: register                        # asmbench
+    name: xmm                              # asmbench
+  - class: register                        # asmbench
+    name: xmm                              # asmbench
+  latency: 4                              # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0                          # asmbench
+  uops: 1                                  # asmbench
+- name: vrsqrtps                           # asmbench
+  operands:                                # asmbench
+  - class: register                        # asmbench
+    name: xmm                              # asmbench
+  - class: register                        # asmbench
+    name: xmm                              # asmbench
+  latency: 4                              # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0                          # asmbench
+  uops: 1                                  # asmbench
+- name: vrsqrtps                           # asmbench
+  operands:                                # asmbench
+  - class: register                        # asmbench
+    name: ymm                              # asmbench
+  - class: register                        # asmbench
+    name: ymm                              # asmbench
+  latency: 4                              # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0                          # asmbench
+  uops: 1                                  # asmbench
+- name: vrsqrtpd                           # asmbench
+  operands:                                # asmbench
+  - class: register                        # asmbench
+    name: xmm                              # asmbench
+  - class: register                        # asmbench
+    name: xmm                              # asmbench
+    mask: True                             # asmbench
+  latency: 4                              # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0                          # asmbench
+  uops: 1                                  # asmbench
+- name: vrsqrtpd                           # asmbench
+  operands:                                # asmbench
+  - class: register                        # asmbench
+    name: ymm                              # asmbench
+  - class: register                        # asmbench
+    name: ymm                              # asmbench
+    mask: True                             # asmbench
+  latency: 4                              # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0                          # asmbench
+  uops: 1                                 # asmbench
+- name: vrsqrtps                           # asmbench
+  operands:                                # asmbench
+  - class: register                        # asmbench
+    name: xmm                              # asmbench
+  - class: register                        # asmbench
+    name: xmm                              # asmbench
+    mask: True                             # asmbench
+  latency: 4                              # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0                          # asmbench
+  uops: 1                                  # asmbench
+- name: vrsqrtps                           # asmbench
+  operands:                                # asmbench
+  - class: register                        # asmbench
+    name: ymm                              # asmbench
+  - class: register                        # asmbench
+    name: ymm                              # asmbench
+    mask: True                             # asmbench
+  latency: 4                              # asmbench
+  port_pressure: [[1, '0']]  # asmbench
+  throughput: 1.0                          # asmbench
+  uops: 7                                  # asmbench
+- name: vrsqrtpd                            # asmbench
+  operands:                                 # asmbench
+  - class: register                         # asmbench
+    name: zmm                               # asmbench
+  - class: register                         # asmbench
+    name: zmm                               # asmbench
+  latency: 10                               # asmbench
+  port_pressure: [[2, '0']]  # asmbench
+  throughput: 2.0                          # asmbench
+  uops: 19                                  # asmbench
+- name: vrsqrtpd                            # asmbench
+  operands:                                 # asmbench
+  - class: register                         # asmbench
+    name: zmm                               # asmbench
+  - class: register                         # asmbench
+    name: zmm                               # asmbench
+    mask: True                              # asmbench
+  latency: 10                               # asmbench
+  port_pressure: [[2, '0']]  # asmbench
+  throughput: 2.0                          # asmbench
+  uops: 2                                  # asmbench
+- name: vrsqrtps                            # asmbench
+  operands:                                 # asmbench
+  - class: register                         # asmbench
+    name: zmm                               # asmbench
+  - class: register                         # asmbench
+    name: zmm                               # asmbench
+  latency: 10                               # asmbench
+  port_pressure: [[2, '0']]  # asmbench
+  throughput: 2.0                          # asmbench
+  uops: 2                                  # asmbench
+- name: vrsqrtps                            # asmbench
+  operands:                                 # asmbench
+  - class: register                         # asmbench
+    name: zmm                               # asmbench
+  - class: register                         # asmbench
+    name: zmm                               # asmbench
+    mask: True                              # asmbench
+  latency: 10                               # asmbench
+  port_pressure: [[2, '0']]  # asmbench
+  throughput: 2.0                          # asmbench
+  uops: 2                                  # asmbench
+- name: [inc, dec]
+  operands:
+  - class: register
+    name: gpr
+  latency: 1
+  port_pressure: [[1, ['0','1','5','6','11']]]
+  throughput: 0.20
+  uops: 1
+- name: vcvtss2si                                 # uops.info
+  operands:                                       # uops.info
+  - class: register                               # uops.info
+    name: xmm                                     # uops.info
+  - class: register                               # uops.info
+    name: gpr                                     # uops.info
+  latency: 8                                      # uops.info
+  port_pressure: [[1, '01'], [1, '5']]           # uops.info
+  throughput: 1                                   # uops.info
+  uops: 3                                         # uops.info
+- name: vcvtss2sd                       # asmbench
+  operands:                             # asmbench
+  - class: register                     # asmbench
+    name: xmm                           # asmbench
+  - class: register                     # asmbench
+    name: xmm                           # asmbench
+  - class: register                     # asmbench
+    name: xmm                           # asmbench
+  latency: 5                            # asmbench
+  port_pressure: [[1, '01'], [1, '5']]  # asmbench
+  throughput: 1.0                       # asmbench
+  uops: 2                               # asmbench
+- name: [vsubpd, vsubps]                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: [vsubpd, vsubps]                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: [vsubpd, vsubps]                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: [vsubpd, vsubps]                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+  - class: register           # ibench
+    name: ymm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: [vsubpd, vsubps]                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: [vsubpd, vsubps]                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+  - class: register           # ibench
+    name: zmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '05']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vsubsd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vsubsd                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vsubss                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+    mask: True                # ibench
+  latency: 3                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: vsubss                # ibench
+  operands:                   # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  - class: register           # ibench
+    name: xmm                 # ibench
+  latency: 2                  # ibench
+  port_pressure: [[1, '15']]  # ibench
+  throughput: 0.5             # ibench
+  uops: 1                     # ibench
+- name: lea                                      # uops.info
+  operands:                                                   # uops.info
+  - class: memory                                             # uops.info
+    base: "*"                                                 # uops.info
+    offset: "*"                                               # uops.info
+    index: "*"                                                # uops.info
+    scale: "*"                                                # uops.info
+  - class: register                                           # uops.info
+    name: gpr                                                 # uops.info
+  latency: 1                                                  # uops.info
+  port_pressure: [[1, ['0','1','5','6','11']]]                                # uops.info
+  throughput: 0.2                                             # uops.info
+  uops: 1                                                     # uops.info
+- name: [shl, shr, sal, sar]  # uops.info
+  operands:                   # uops.info
+  - class: immediate          # uops.info
+    imd: int                  # uops.info
+  - class: register           # uops.info
+    name: gpr                 # uops.info
+  latency: 1                  # uops.info
+  port_pressure: [[1, '06']]  # uops.info
+  throughput: 0.5             # uops.info
+  uops: 1                     # uops.info
+- name: [shl, shr, sal, sar]
+  operands:
+  - class: register
+    name: gpr
+  latency: 1                  # uops.info
+  port_pressure: [[1, '06']]  # uops.info
+  throughput: 0.5             # uops.info
+  uops: 1                     # uops.info
+############## ||                  #################
+############## \/ assumed from ICX ################# 
+- name: vinsertf128
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinserti128
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinsertf32x4
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinsertf32x8
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: ymm
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinsertf64x2
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinsertf64x4
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: ymm
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinsertps
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  latency: 1
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinserti64x4
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: ymm
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinserti64x2
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinserti32x8
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: ymm
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vinsertf32x4
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vcvtsi2ss
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  latency: 2
+  port_pressure: [[1, '01'], [2, '5']]
+  throughput: 2.0
+  uops: 3
+- name: [vextractf128, vextracti128]
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: ymm
+  - class: register
+    name: xmm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vextractps
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: gpr
+  latency: 4
+  port_pressure: [[1, '0'], [1, '5']]
+  throughput: 1.0
+  uops: 2
+- name: [vextractf32x4, vextracti32x4]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: ymm                # uops.info
+  - class: register          # uops.info
+    name: xmm                # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf32x4, vextracti32x4]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: zmm                # uops.info
+  - class: register          # uops.info
+    name: xmm                # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf32x4, vextracti32x4]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: zmm                # uops.info
+  - class: register          # uops.info
+    name: xmm                # uops.info
+    mask: True               # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf32x4, vextracti32x4]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: ymm                # uops.info
+  - class: register          # uops.info
+    name: xmm                # uops.info
+    mask: True               # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf32x8, vextracti32x8]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: zmm                # uops.info
+  - class: register          # uops.info
+    name: ymm                # uops.info
+    mask: True               # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf32x8, vextracti32x8]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: zmm                # uops.info
+  - class: register          # uops.info
+    name: ymm                # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf64x2, vextracti64x2]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: ymm                # uops.info
+  - class: register          # uops.info
+    name: xmm                # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf64x2, vextracti64x2]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: ymm                # uops.info
+  - class: register          # uops.info
+    name: xmm                # uops.info
+    mask: True               # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf64x2, vextracti64x2]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: zmm                # uops.info
+  - class: register          # uops.info
+    name: xmm                # uops.info
+    mask: True               # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf64x2, vextracti64x2]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: zmm                # uops.info
+  - class: register          # uops.info
+    name: xmm                # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf64x4, vextracti64x4]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: zmm                # uops.info
+  - class: register          # uops.info
+    name: ymm                # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: [vextractf64x4, vextracti64x4]        # uops.info
+  operands:                  # uops.info
+  - class: immediate         # uops.info
+    imd: int                 # uops.info
+  - class: register          # uops.info
+    name: zmm                # uops.info
+  - class: register          # uops.info
+    name: ymm                # uops.info
+    mask: True               # uops.info
+  latency: 3                 # uops.info
+  port_pressure: [[1, '5']]  # uops.info
+  throughput: 1.0            # uops.info
+  uops: 1                    # uops.info
+- name: vpalignr             # asmbench
+  operands:                  # asmbench
+  - class: immediate         # asmbench
+    imd: int                 # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  latency: 1                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vpalignr             # asmbench
+  operands:                  # asmbench
+  - class: immediate         # asmbench
+    imd: int                 # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+  - class: register          # asmbench
+    name: xmm                # asmbench
+    mask: True               # asmbench
+  latency: 1                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vpalignr             # asmbench
+  operands:                  # asmbench
+  - class: immediate         # asmbench
+    imd: int                 # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  latency: 1                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vpalignr             # asmbench
+  operands:                  # asmbench
+  - class: immediate         # asmbench
+    imd: int                 # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+    mask: True               # asmbench
+  latency: 1                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vpalignr             # asmbench
+  operands:                  # asmbench
+  - class: immediate         # asmbench
+    imd: int                 # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  latency: 1                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vpalignr             # asmbench
+  operands:                  # asmbench
+  - class: immediate         # asmbench
+    imd: int                 # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+    mask: True               # asmbench
+  latency: 1                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vperm2f128, vperm2i128]  # asmbench
+  operands:                       # asmbench
+  - class: immediate              # asmbench
+    imd: int                      # asmbench
+  - class: register               # asmbench
+    name: ymm                     # asmbench
+  - class: register               # asmbench
+    name: ymm                     # asmbench
+  - class: register               # asmbench
+    name: ymm                     # asmbench
+  latency: 3                      # asmbench
+  port_pressure: [[1, '5']]       # asmbench
+  throughput: 1.0                 # asmbench
+  uops: 1                         # asmbench
+- name: vpermd               # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  latency: 3                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vpermd               # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+    mask: True               # asmbench
+  latency: 3                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vpermd               # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  latency: 3                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: vpermd               # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+    mask: True               # asmbench
+  latency: 3                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vpermpd, vpermps]   # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  latency: 3                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vpermpd, vpermps]   # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+  - class: register          # asmbench
+    name: ymm                # asmbench
+    mask: True               # asmbench
+  latency: 3                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vpermpd, vpermps]   # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  latency: 3                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vpermpd, vpermps]   # asmbench
+  operands:                  # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+  - class: register          # asmbench
+    name: zmm                # asmbench
+    mask: True               # asmbench
+  latency: 3                 # asmbench
+  port_pressure: [[1, '5']]  # asmbench
+  throughput: 1.0            # asmbench
+  uops: 1                    # asmbench
+- name: [vunpckhpd, vunpckhps, vunpcklpd, vunpcklps]  # asmbench
+  operands:                                           # asmbench
+  - class: register                                   # asmbench
+    name: xmm                                         # asmbench
+  - class: register                                   # asmbench
+    name: xmm                                         # asmbench
+  - class: register                                   # asmbench
+    name: xmm                                         # asmbench
+  latency: 1                                          # asmbench
+  port_pressure: [[1, '5']]                           # asmbench
+  throughput: 1.0                                     # asmbench
+  uops: 1                                             # asmbench
+- name: [vunpckhpd, vunpckhps, vunpcklpd, vunpcklps]  # asmbench
+  operands:                                           # asmbench
+  - class: register                                   # asmbench
+    name: ymm                                         # asmbench
+  - class: register                                   # asmbench
+    name: ymm                                         # asmbench
+  - class: register                                   # asmbench
+    name: ymm                                         # asmbench
+  latency: 1                                          # asmbench
+  port_pressure: [[1, '5']]                           # asmbench
+  throughput: 1.0                                     # asmbench
+  uops: 1                                             # asmbench
+- name: [vunpckhpd, vunpckhps, vunpcklpd, vunpcklps]  # asmbench
+  operands:                                           # asmbench
+  - class: register                                   # asmbench
+    name: zmm                                         # asmbench
+  - class: register                                   # asmbench
+    name: zmm                                         # asmbench
+  - class: register                                   # asmbench
+    name: zmm                                         # asmbench
+  latency: 1                                          # asmbench
+  port_pressure: [[1, '5']]                           # asmbench
+  throughput: 1.0                                     # asmbench
+  uops: 1                                             # asmbench
+- name: [vunpckhpd, vunpckhps, vunpcklpd, vunpcklps]  # asmbench
+  operands:                                           # asmbench
+  - class: register                                   # asmbench
+    name: xmm                                         # asmbench
+  - class: register                                   # asmbench
+    name: xmm                                         # asmbench
+  - class: register                                   # asmbench
+    name: xmm                                         # asmbench
+    mask: True                                        # asmbench
+  latency: 1                                          # asmbench
+  port_pressure: [[1, '5']]                           # asmbench
+  throughput: 1.0                                     # asmbench
+  uops: 1                                             # asmbench
+- name: [vunpckhpd, vunpckhps, vunpcklpd, vunpcklps]  # asmbench
+  operands:                                           # asmbench
+  - class: register                                   # asmbench
+    name: ymm                                         # asmbench
+  - class: register                                   # asmbench
+    name: ymm                                         # asmbench
+  - class: register                                   # asmbench
+    name: ymm                                         # asmbench
+    mask: True                                        # asmbench
+  latency: 1                                          # asmbench
+  port_pressure: [[1, '5']]                           # asmbench
+  throughput: 1.0                                     # asmbench
+  uops: 1                                             # asmbench
+- name: [vunpckhpd, vunpckhps, vunpcklpd, vunpcklps]  # asmbench
+  operands:                                           # asmbench
+  - class: register                                   # asmbench
+    name: zmm                                         # asmbench
+  - class: register                                   # asmbench
+    name: zmm                                         # asmbench
+  - class: register                                   # asmbench
+    name: zmm                                         # asmbench
+    mask: True                                        # asmbench
+  latency: 1                                          # asmbench
+  port_pressure: [[1, '5']]                           # asmbench
+  throughput: 1.0                                     # asmbench
+  uops: 1                                             # asmbench
+- name: [vpcmpgtb, vpcmpgtw, vpcmpgtd, vpcmpgtq]
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: k
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: [vpcmpgtb, vpcmpgtw, vpcmpgtd, vpcmpgtq]
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: k
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: [vpcmpgtb, vpcmpgtw, vpcmpgtd, vpcmpgtq, vpcmpeqb, vpcmpeqw, vpcmpeqd, vpcmpeqq]
+  operands:
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  - class: register
+    name: k
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vpcmpd
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: k
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vpcmpd
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: k
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: vpcmpd
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  - class: register
+    name: k
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+- name: [vpcmpeqb, vpcmpeqw, vpcmpeqd, vpcmpeqq]
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  latency: 1
+  port_pressure: [[1, '01']]
+  throughput: 0.5
+  uops: 1
+- name: [vpcmpeqb, vpcmpeqw, vpcmpeqd, vpcmpeqq]
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 1
+  port_pressure: [[1, '01']]
+  throughput: 0.5
+  uops: 1
+- name: [vcmpltpd, vcmpltps]                # uops.info
+  operands:                   # uops.info
+  - class: register           # uops.info
+    name: zmm                 # uops.info
+  - class: register           # uops.info
+    name: zmm                 # uops.info
+  - class: register           # uops.info
+    name: k                 # uops.info
+    mask: True                # uops.info
+  latency: 4                  # uops.info
+  port_pressure: [[1, '05']]  # uops.info
+  throughput: 0.5             # uops.info
+  uops: 1                     # uops.info
+- name: [vcmpltpd, vcmpltps]                # uops.info
+  operands:                   # uops.info
+  - class: register           # uops.info
+    name: ymm                 # uops.info
+  - class: register           # uops.info
+    name: ymm                 # uops.info
+  - class: register           # uops.info
+    name: ymm                 # uops.info
+  latency: 4                  # uops.info
+  port_pressure: [[1, '05']]  # uops.info
+  throughput: 0.5             # uops.info
+  uops: 1                     # uops.info
+- name: VCMPPS                                           
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: xmm                                             
+  - class: register                                       
+    name: xmm                                             
+  - class: register                                       
+    name: xmm                                             
+  latency: 4                                              
+  port_pressure: [[1, '01']]                              
+  throughput: 0.5                                         
+  uops: 1                                                 
+- name: VCMPPS                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: ymm                                             
+  - class: register                                       
+    name: ymm                                             
+  - class: register                                       
+    name: ymm                                             
+  latency: 4                                              
+  port_pressure: [[1, '01']]                              
+  throughput: 0.5                                         
+  uops: 1                                                 
+- name: VCMPPD                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: xmm                                             
+  - class: register                                       
+    name: xmm                                             
+  - class: register                                       
+    name: xmm                                             
+  latency: 4                                              
+  port_pressure: [[1, '01']]                              
+  throughput: 0.5                                         
+  uops: 1                                                 
+- name: VCMPPD                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: ymm                                             
+  - class: register                                       
+    name: ymm                                             
+  - class: register                                       
+    name: ymm                                             
+  latency: 4                                              
+  port_pressure: [[1, '01']]                              
+  throughput: 0.5                                         
+  uops: 1                                                 
+- name: VCMPPS                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: zmm                                             
+  - class: register                                       
+    name: zmm                                             
+  - class: register                                       
+    name: k                                               
+  latency: 3                                              
+  port_pressure: [[1, '5']]                               
+  throughput: 1.0                                         
+  uops: 1                                                 
+- name: VCMPPS                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: zmm                                             
+  - class: register                                       
+    name: zmm                                             
+  - class: register                                       
+    name: k                                               
+    mask: True
+  latency: 3                                              
+  port_pressure: [[1, '5']]                               
+  throughput: 1.0                                         
+  uops: 1                                                 
+- name: VCMPPS                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: xmm                                             
+  - class: register                                       
+    name: xmm                                             
+  - class: register                                       
+    name: k                                               
+    mask: True
+  latency: 3                                              
+  port_pressure: [[1, '5']]                               
+  throughput: 1.0                                         
+  uops: 1                                                 
+- name: VCMPPS                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: ymm                                             
+  - class: register                                       
+    name: ymm                                             
+  - class: register                                       
+    name: k
+    mask: True  
+  latency: 3                                              
+  port_pressure: [[1, '5']]                               
+  throughput: 1.0                                         
+  uops: 1                                                 
+- name: VCMPPD                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: zmm                                             
+  - class: register                                       
+    name: zmm                                             
+  - class: register                                       
+    name: k                                               
+  latency: 3                                              
+  port_pressure: [[1, '5']]                               
+  throughput: 1.0                                         
+  uops: 1                                                 
+- name: VCMPPD                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: zmm                                             
+  - class: register                                       
+    name: zmm                                             
+  - class: register                                       
+    name: k                                               
+    mask: True
+  latency: 3                                              
+  port_pressure: [[1, '5']]                               
+  throughput: 1.0                                         
+  uops: 1                                                 
+- name: VCMPPD                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: xmm                                             
+  - class: register                                       
+    name: xmm                                             
+  - class: register                                       
+    name: k                                               
+    mask: True
+  latency: 3                                              
+  port_pressure: [[1, '5']]                               
+  throughput: 1.0                                         
+  uops: 1                                                 
+- name: VCMPPD                                            
+  operands:                                               
+  - class: immediate                                      
+    imd: int                                              
+  - class: register                                       
+    name: ymm                                             
+  - class: register                                       
+    name: ymm                                             
+  - class: register                                       
+    name: k                                               
+    mask: True
+  latency: 3                                              
+  port_pressure: [[1, '5']]                               
+  throughput: 1.0                                         
+  uops: 1                                                 
+- name: vpunpckhqdq
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  latency: 1
+  port_pressure: [[1, '15']]
+  throughput: 0.5
+  uops: 1
+- name: vpunpckhqdq
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 1
+  port_pressure: [[1, '15']]
+  throughput: 0.5
+  uops: 1
+- name: vpunpckhqdq
+  operands:
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  latency: 1
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
+
+########### /\                  ##########
+########### || assumed from ICX ##########
+- name: AND                                                          
+  operands:                                                          
+  - class: immediate                                                 
+    imd: int                                                         
+  - class: register                                                  
+    name: gpr                                                        
+  latency: 1                                                         
+  port_pressure: [[1, ['0','1','5','6','11']]]                                       
+  throughput: 0.20                                                   
+  uops: 1                                                            
+- name: RET                                                          
+  operands: []                                                       
+  latency: 0                                                         
+  port_pressure: [[1, '49'], [1, '78']]                              
+  throughput: 0.5                                                    
+  uops: 2                                                            
+- name: CALL                                                         
+  operands:                                                          
+  - class: identifier                                                
+  latency: 0                                                         
+  port_pressure: [[1, '49'], [1, '78']]                              
+  throughput: 0.5                                                    
+  uops: 2                                                            
+- name: TEST                                                         
+  operands:                                                          
+  - class: immediate                                                 
+    imd: int                                                         
+  - class: register                                                  
+    name: gpr                                                        
+  latency: 1                                                         
+  port_pressure: [[1, ['0','1','5','6','11']]]                                       
+  throughput: 0.20                                                   
+  uops: 1                                                            
+- name: TEST                                                         
+  operands:                                                          
+  - class: register                                                  
+    name: gpr                                                        
+  - class: register                                                  
+    name: gpr                                                        
+  latency: 1                                                         
+  port_pressure: [[1, ['0','1','5','6','11']]]                                       
+  throughput: 0.20
+  uops: 1                                                            
+- name: PTEST                                                        
+  operands:                                                          
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: xmm                                                        
+  latency: 4                                                         
+  port_pressure: [[1, '0'], [1, '5']]                                
+  throughput: 1.0                                                    
+  uops: 2                                                            
+- name: VPTEST                                                       
+  operands:                                                          
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: xmm                                                        
+  latency: 4                                                         
+  port_pressure: [[1, '0'], [1, '5']]                                
+  throughput: 1.0                                                    
+  uops: 2                                                            
+- name: VPTEST                                                       
+  operands:                                                          
+  - class: register                                                  
+    name: ymm                                                        
+  - class: register                                                  
+    name: ymm                                                        
+  latency: 6                                                         
+  port_pressure: [[1, '0'], [1, '5']]                                
+  throughput: 1.0                                                    
+  uops: 2                                                            
+- name: [VTESTPD, VTESTPS]
+  operands:                                                          
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: xmm                                                        
+  latency: 3                                                         
+  port_pressure: [[1, '0']]
+  throughput: 1.0                                                    
+  uops: 1                                                            
+- name: [VTESTPD, VTESTPS]
+  operands:                                                          
+  - class: register                                                  
+    name: ymm                                                        
+  - class: register                                                  
+    name: ymm                                                        
+  latency: 5                                                         
+  port_pressure: [[1, '0']]
+  throughput: 1.0                                                    
+  uops: 1                                                            
+- name: VXORPD                                                       
+  operands:                                                          
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: xmm                                                        
+  latency: 1                                                         
+  port_pressure: [[1, ['0','1','5','6','11']]]                                       
+  throughput: 0.20
+  uops: 1                                                            
+- name: VXORPD                                                       
+  operands:                                                          
+  - class: register                                                  
+    name: ymm                                                        
+  - class: register                                                  
+    name: ymm                                                        
+  - class: register                                                  
+    name: ymm                                                        
+  latency: 1                                                         
+  port_pressure: [[1, ['0','1','5','6','11']]]                                       
+  throughput: 0.20
+  uops: 1                                                            
+- name: VXORPS                                                       
+  operands:                                                          
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: xmm                                                        
+  latency: 1                                                         
+  port_pressure: [[1, ['0','1','5','6','11']]]                                       
+  throughput: 0.20
+  uops: 1                                                            
+- name: VXORPS                                                       
+  operands:                                                          
+  - class: register                                                  
+    name: ymm                                                        
+  - class: register                                                  
+    name: ymm                                                        
+  - class: register                                                  
+    name: ymm                                                        
+  latency: 1                                                         
+  port_pressure: [[1, ['0','1','5','6','11']]]                                       
+  throughput: 0.20
+  uops: 1                                                            
+- name: VBROADCASTSS                                                 
+  operands:                                                          
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: xmm                                                        
+  latency: 1                                                         
+  port_pressure: [[1, '5']]                                          
+  throughput: 1.0                                                    
+  uops: 1                                                            
+- name: [VBROADCASTSD, VBROADCASTSS]                                 
+  operands:                                                          
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: ymm                                                        
+  latency: 3                                                         
+  port_pressure: [[1, '5']]                                          
+  throughput: 1.0                                                    
+  uops: 1                                                            
+- name: [VBROADCASTSD, VBROADCASTSS]                                 
+  operands:                                                          
+  - class: register                                                  
+    name: xmm                                                        
+  - class: register                                                  
+    name: zmm                                                        
+  latency: 3                                                         
+  port_pressure: [[1, '5']]                                          
+  throughput: 1.0                                                    
+  uops: 1                                                            
+- name: [VBROADCASTSD, VBROADCASTSS]                            
+  operands:                                                     
+  - class: memory
+    base: "*"
+    offset: "*"
+    index: "*"
+    scale: "*"
+  - class: register                                                
+    name: ymm                                                      
+  latency: 5                                                       
+  port_pressure: [[1, '23'], [1, ['2D', '3D']], [1, '015']]       
+  throughput: 1.0                                                  
+  uops: 1                                                          
+- name: [VBROADCASTSD, VBROADCASTSS]                               
+  operands:                                                        
+  - class: memory
+    base: "*"
+    offset: "*"
+    index: "*"
+    scale: "*"
+  - class: register                                                
+    name: zmm                                                      
+  latency: 5                                                       
+  port_pressure: [[1, '23'], [1, ['2D', '3D']], [1, '015']]      
+  throughput: 1.0                                                  
+  uops: 1                                                          
+- name: vandpd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  latency: 1
+  port_pressure: [[1, '015']]
+  throughput: 0.33333
+  uops: 1
+- name: vandpd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  latency: 1
+  port_pressure: [[1, '015']]
+  throughput: 0.33333
+  uops: 1
+- name: vandpd
+  operands:
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  latency: 1
+  port_pressure: [[1, '05']]
+  throughput: 0.5
+  uops: 1
+- name: vshuff64x2
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  - class: register
+    name: zmm
+  latency: 3
+  port_pressure: [[1, '5']]
+  throughput: 1.0
+  uops: 1
diff --git a/osaca/osaca.py b/osaca/osaca.py
index 59e342e..c60e950 100755
--- a/osaca/osaca.py
+++ b/osaca/osaca.py
@@ -30,6 +30,7 @@ SUPPORTED_ARCHS = [
     "CSX",
     "ICL",
     "ICX",
+    "SPR",
     "ZEN1",
     "ZEN2",
     "ZEN3",
@@ -102,8 +103,8 @@ def create_parser(parser=None):
     parser.add_argument(
         "--arch",
         type=str,
-        help="Define architecture (SNB, IVB, HSW, BDW, SKX, CSX, ICL, ICX, ZEN1, ZEN2, ZEN3, TX2, N1, "
-        "A64FX, TSV110, A72, M1, V2). If no architecture is given, OSACA assumes a default uarch for "
+        help="Define architecture (SNB, IVB, HSW, BDW, SKX, CSX, ICL, ICX, SPR, ZEN1, ZEN2, ZEN3, "
+        "TX2, N1, A64FX, TSV110, A72, M1, V2). If no architecture is given, OSACA assumes a default uarch for "
         "x86/AArch64.",
     )
     parser.add_argument(
diff --git a/osaca/semantics/hw_model.py b/osaca/semantics/hw_model.py
index cc19579..9bc67d5 100755
--- a/osaca/semantics/hw_model.py
+++ b/osaca/semantics/hw_model.py
@@ -303,6 +303,7 @@ class MachineModel(object):
             "cfl": "x86",
             "icl": "x86",
             "icx": "x86",
+            "spr": "x86",
         }
         arch = arch.lower()
         if arch in arch_dict: