From 7a8f5862a3e486c70767e18140452a83da3019ba Mon Sep 17 00:00:00 2001 From: JanLJL Date: Tue, 3 Mar 2020 14:15:34 +0100 Subject: [PATCH] initial upload of zen2 data --- osaca/data/zen2.yml | 1039 +++++++++++++++++++++++++++++++++++++++++++ osaca/osaca.py | 8 +- 2 files changed, 1044 insertions(+), 3 deletions(-) create mode 100644 osaca/data/zen2.yml diff --git a/osaca/data/zen2.yml b/osaca/data/zen2.yml new file mode 100644 index 0000000..c007acc --- /dev/null +++ b/osaca/data/zen2.yml @@ -0,0 +1,1039 @@ +osaca_version: 0.3.2.dev5 +micro_architecture: AMD Zen2 +arch_code: ZEN2 +isa: x86 +load_latency: {gpr: 4.0, mm: 4.0, xmm: 4.0, ymm: 4.0} +load_throughput: +- {base: gpr, index: ~, offset: ~, scale: 1, port_pressure: [[1, ['8','9','10']], [1, ['8D', '9D']]]} +- {base: gpr, index: ~, offset: imd, scale: 1, port_pressure: [[1, ['8','9','10']], [1, ['8D', '9D']]]} +- {base: gpr, index: gpr, offset: ~, scale: 1, port_pressure: [[1, ['8','9']], [1, ['8D', '9D']]]} +- {base: gpr, index: gpr, offset: ~, scale: 8, port_pressure: [[1, ['8','9']], [1, ['8D', '9D']]]} +- {base: gpr, index: gpr, offset: imd, scale: 1, port_pressure: [[1, ['8','9']], [1, ['8D', '9D']]]} +- {base: gpr, index: gpr, offset: imd, scale: 8, port_pressure: [[1, ['8','9']], [1, ['8D', '9D']]]} +load_throughput_default: [[1, ['8','9','10']], [1, ['8D', '9D']]] +store_throughput: +- {base: gpr, index: ~, offset: ~, scale: 1, port_pressure: [[1, ['8','9','10']], [1, ['10D']]]} +- {base: gpr, index: ~, offset: imd, scale: 1, port_pressure: [[1, ['8','9','10']], [1, ['10D']]]} +- {base: gpr, index: gpr, offset: ~, scale: 1, port_pressure: [[1, ['8','9']], [1, ['10D']]]} +- {base: gpr, index: gpr, offset: ~, scale: 8, port_pressure: [[1, ['8','9']], [1, ['10D']]]} +- {base: gpr, index: gpr, offset: imd, scale: 1, port_pressure: [[1, ['8','9']], [1, ['10D']]]} +- {base: gpr, index: gpr, offset: imd, scale: 8, port_pressure: [[1, ['8','9']], [1, ['10D']]]} +store_throughput_default: [[1, ['8','9','10']], [1, ['10D']]] +hidden_loads: false +ports: ['0', '1', '2', '3', 3DV, '4', '5', '6', '7', '8', 8D, '9', 9D, '10', 10D] +port_model_scheme: | + +--------------------------------------+ +-------------------------------------------------------+ + | 160 entries OoO scheduler | | 180 entries OoO scheduler | + +--------------------------------------+ +-------------------------------------------------------+ + 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | + \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ \/ + +-------+ +-------+ +-------+ +-------+ +------+ +-----+ +-----+ +------+ +-----+ +-----+ +-----+ + |SSE ALU| |SSE ALU| |SSE ALU| |SSE ALU| | ALU | | ALU | | ALU | | ALU | | AGU | | AGU | | AGU | + +-------+ +-------+ +-------+ +-------+ +------+ +-----+ +-----+ +------+ +-----+ +-----+ +-----+ + +-------+ +-------+ +-------+ +-------+ +------+ +-----+ +-----+ +------+ +-----+ +-----+ +-----+ + |SSE MUL| |SSE MUL| |SSE ADD| |SSE ADD| |BRANCH| | MUL | | DIV | |BRANCH| | LD | | LD | | ST | + +-------+ +-------+ +-------+ +-------+ +------+ +-----+ +-----+ +------+ +-----+ +-----+ +-----+ + +-------+ +-------+ +-------+ +-------+ + |SSE FMA| |SSE FMA| | SSE | |SSE DIV| + +-------+ +-------+ | SHUF | +-------+ + +-------+ +-------+ + | SSE | + | SHUF | + +-------+ +instruction_forms: +- name: vmovapd + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovapd + operands: + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovapd + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovapd + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovapd + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovapd + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovapd + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovapd + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, ['8','9']], [1, [10D]]] +- name: vmovapd + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovapd + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, '89'], [1, [10D]]] +- name: vmovupd + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovupd + operands: + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovupd + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovupd + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovupd + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovupd + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovupd + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovupd + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, ['8','9']], [1, [10D]]] +- name: vmovupd + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovupd + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, '89'], [1, [10D]]] +- name: vmovaps + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovaps + operands: + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovaps + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovaps + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovaps + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovaps + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovaps + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovaps + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, ['8','9']], [1, [10D]]] +- name: vmovaps + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovaps + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, '89'], [1, [10D]]] +- name: vmovups + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovups + operands: + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovups + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovups + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovups + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovups + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovups + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovups + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, ['8','9']], [1, [10D]]] +- name: vmovups + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovups + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, '89'], [1, [10D]]] +- name: vmovsd + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovsd + operands: + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovsd + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovsd + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovsd + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovsd + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovsd + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovsd + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, ['8','9']], [1, [10D]]] +- name: vmovsd + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovsd + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, '89'], [1, [10D]]] +- name: vmovss + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovss + operands: + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: vmovss + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovss + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: xmm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovss + operands: + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9','10']], [1, [8D,9D]]] +- name: vmovss + operands: + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + - class: register + name: ymm + throughput: 0.5 + latency: 4.0 # 1*p8910+1*p8D9D + port_pressure: [[1, ['8','9']], [1, [8D,9D]]] +- name: vmovss + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovss + operands: + - class: register + name: xmm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, ['8','9']], [1, [10D]]] +- name: vmovss + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: ~ + scale: 1 + throughput: 1.0 + latency: 0 # 1*p8910+1*p10D + port_pressure: [[1, ['8','9', '10']], [1, [10D]]] +- name: vmovss + operands: + - class: register + name: ymm + - class: memory + base: gpr + offset: "*" + index: gpr + scale: "*" + throughput: 1.0 + latency: 0 # 1*p89+1*p10D + port_pressure: [[1, '89'], [1, [10D]]] +- name: add + operands: + - class: immediate + imd: int + - class: register + name: gpr + throughput: 0.25 + latency: 1.0 # 1*p4567 + port_pressure: [[1, '4567']] +- name: add + operands: + - class: register + name: gpr + - class: register + name: gpr + throughput: 0.25 + latency: 1 # 1*p4567 + port_pressure: [[1, '4567']] +- name: cmp + operands: + - class: register + name: gpr + - class: register + name: gpr + throughput: 0.25 + latency: 1.0 # 1*p4567 + port_pressure: [[1, '4567']] +- name: inc + operands: + - class: register + name: gpr + throughput: 0.25 + latency: 1.0 # 1*p4567 + port_pressure: [[1, '4567']] +- name: [jo, jno, js, jns, jp, jpe, jnp, jpo] + operands: + - class: identifier + throughput: 0.0 + latency: 0 + port_pressure: [] +- name: [jc, hb, jae, jnb, jna, jbe, ja, jnbe] + operands: + - class: identifier + throughput: 0.0 + latency: 0 + port_pressure: [] +- name: [je, jz, jne, jnz, jl, jnge] + operands: + - class: identifier + throughput: 0.0 + latency: 0 + port_pressure: [] +- name: lea + operands: + - class: memory + base: gpr + offset: imd + index: ~ + scale: 1 + - class: register + name: gpr + throughput: 0.33333 + latency: 1.0 # 1*p8.9.10 + port_pressure: [[1, ['8','9','10']]] +- name: mov + operands: + - class: register + name: gpr + - class: register + name: gpr + throughput: 0.0 + latency: 0.0 + port_pressure: [] +- name: mulsd + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 1*p01 + port_pressure: [[1, '01']] +- name: mulss + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 1*p01 + port_pressure: [[1, '01']] +- name: rcpss + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: 1.0 + latency: 5.0 + port_pressure: [[2, '01']] +- name: sqrtsd + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: ~ #8.5 + latency: 20.0 + port_pressure: [[1, '3'], [8.5, ['3DV']]] +- name: sqrtss + operands: + - class: register + name: xmm + - class: register + name: xmm + throughput: ~ #5.5 + latency: 14.0 + port_pressure: [[1, '3'], [5.5, ['3DV']]] +- name: sub + operands: + - class: register + name: gpr + - class: register + name: gpr + throughput: 0.25 + latency: 1.0 # 1*p4567 + port_pressure: [[1, '4567']] +- name: sub + operands: + - class: immediate + imd: int + - class: register + name: gpr + throughput: 0.25 + latency: 1.0 # 1*p4567 + port_pressure: [[1, '4567']] +- name: vaddpd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 1*p23 + port_pressure: [[1, '23']] +- name: vaddpd + operands: + - class: register + name: ymm + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.5 + latency: 3.0 # 1*p23 + port_pressure: [[1, '23']] +- name: vaddsd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 1*p23 + port_pressure: [[1, '23']] +- name: vaddss + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 1*p23 + port_pressure: [[1, '23']] +- name: vdivsd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 5.0 + latency: 13.0 # 1*p3+5*p3DV + port_pressure: [[1, '3'], [5.0, [3DV]]] +- name: vdivss + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 3.5 + latency: 10.0 + port_pressure: [[1, '3'], [3.5, [3DV]]] +- name: vfmadd213pd + operands: + - class: register + name: ymm + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.5 + latency: 5.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vfmadd213pd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 5.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vfmadd213pd + operands: + - class: register + name: ymm + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.5 + latency: 5.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vfmadd231pd + operands: + - class: register + name: ymm + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.5 + latency: 5.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vfmadd132pd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 5.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vfmadd132pd + operands: + - class: register + name: ymm + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.5 + latency: 5.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vmulsd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vmulss + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vmulpd + operands: + - class: register + name: xmm + - class: register + name: xmm + - class: register + name: xmm + throughput: 0.5 + latency: 3.0 # 1*p01 + port_pressure: [[1, '01']] +- name: vmulpd + operands: + - class: register + name: ymm + - class: register + name: ymm + - class: register + name: ymm + throughput: 0.5 + latency: 3.0 # 1*p01 + port_pressure: [[1, '01']] diff --git a/osaca/osaca.py b/osaca/osaca.py index 5cb6ff8..8d63aa9 100755 --- a/osaca/osaca.py +++ b/osaca/osaca.py @@ -66,7 +66,9 @@ def create_parser(parser=None): '-V', '--version', action='version', version='%(prog)s ' + __find_version('__init__.py') ) parser.add_argument( - '--arch', type=str, help='Define architecture (SNB, IVB, HSW, BDW, SKX, CSX, ZEN1, TX2).' + '--arch', + type=str, + help='Define architecture (SNB, IVB, HSW, BDW, SKX, CSX, ZEN1, ZEN2, TX2).', ) parser.add_argument( '--fixed', @@ -130,7 +132,7 @@ def check_arguments(args, parser): :param args: arguments given from :class:`~argparse.ArgumentParser` after parsing :param parser: :class:`~argparse.ArgumentParser` object """ - supported_archs = ['SNB', 'IVB', 'HSW', 'BDW', 'SKX', 'CSX', 'ZEN1', 'TX2'] + supported_archs = ['SNB', 'IVB', 'HSW', 'BDW', 'SKX', 'CSX', 'ZEN1', 'ZEN2', 'TX2'] supported_import_files = ['ibench', 'asmbench'] if 'arch' in args and (args.arch is None or args.arch.upper() not in supported_archs): @@ -188,7 +190,7 @@ def insert_byte_marker(args): output_file=marked_assembly, block_selection='manual', pointer_increment='auto_with_manual_fallback', - isa=MachineModel.get_isa_for_arch(args.arch) + isa=MachineModel.get_isa_for_arch(args.arch), ) marked_assembly.seek(0)