From 895a262d5d88fa953f1e8820fa7c930ef08ce728 Mon Sep 17 00:00:00 2001 From: Julian Hammer Date: Fri, 11 Jan 2019 16:48:07 +0100 Subject: [PATCH] Masking instruction duplication mentioned in #24 --- osaca/data/model_importer.py | 7 +- osaca/data/skx_data.csv | 2909 ++++++++++++++++++++++++++++++++++ osaca/eu_sched.py | 3 +- 3 files changed, 2916 insertions(+), 3 deletions(-) diff --git a/osaca/data/model_importer.py b/osaca/data/model_importer.py index db741c4..3fc2f70 100755 --- a/osaca/data/model_importer.py +++ b/osaca/data/model_importer.py @@ -132,8 +132,11 @@ def dump_csv(model_data): if p not in port_occupancy: port_occupancy[p] = 0.0 po_items = sorted(port_occupancy.items()) - csv += '{},{},{},"({})"\n'.format(mnemonic, throughput, latency, - ','.join([str(c) for p, c in po_items])) + csv_line = '{},{},{},"({})"\n'.format(mnemonic, throughput, latency, + ','.join([str(c) for p, c in po_items])) + csv += csv_line + if '{opmask}' in csv_line: + csv += csv_line.replace('{opmask}', '') return csv diff --git a/osaca/data/skx_data.csv b/osaca/data/skx_data.csv index c1c7765..2ef4099 100644 --- a/osaca/data/skx_data.csv +++ b/osaca/data/skx_data.csv @@ -3151,103 +3151,201 @@ pext-r32_r32_r32,1.0,None,"(0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" pext-r64_r64_mem,1.0,None,"(0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" pext-r64_r64_r64,1.0,None,"(0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" vfpclassss-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassss-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vfpclassss-k{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfpclassss-k_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovsd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovsd-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovsd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovsd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vfpclasssd-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasssd-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vfpclasssd-k{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfpclasssd-k_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmulhuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmulhuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulhuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmulhuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulhuw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhuw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpmulhuw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovss-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovss-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovss-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovss-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vrsqrt14ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrsqrt14ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprolvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprolvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprolvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vfmaddsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmaddsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrsqrt14sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrsqrt14sd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfmaddsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmaddsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vptestnmq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vprolvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprolvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprolvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprolvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vreducepd-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducepd-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vreducepd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreducepd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreducepd-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducepd-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vreducepd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreducepd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreducepd-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vreducepd-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vreducepd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreducepd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuludq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmuludq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpmuludq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuludq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuludq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmuludq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuludq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuludq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmuludq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuludq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vprolq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprolq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprolq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprolq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprolq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprolq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprolq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpslldq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" @@ -3255,36 +3353,67 @@ vpslldq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpslldq-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpslldq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpternlogq-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpternlogq-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpternlogq-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogq-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpternlogq-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogq-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpternlogq-xmm{opmask}_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpternlogq-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpternlogq-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpternlogq-ymm{opmask}_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpternlogq-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpternlogq-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vrangesd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangesd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vrangesd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangesd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2uqq-xmm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2uqq-ymm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2uqq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2uqq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vpternlogd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpternlogd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpternlogd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpternlogd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpternlogd-xmm{opmask}_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpternlogd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpternlogd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpternlogd-ymm{opmask}_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpternlogd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpternlogd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vrangess-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangess-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vrangess-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangess-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovq-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" @@ -3295,397 +3424,786 @@ vmovd-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.333 vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpmulhrsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmulhrsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulhrsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmulhrsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulhrsw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhrsw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpmulhrsw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsubadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmovdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovdb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovdb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovdb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vfmsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vinsertf64x2-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x2-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinsertf64x2-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf64x2-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vinsertf64x2-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x2-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinsertf64x2-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf64x2-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpunpcklbw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklbw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklbw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklbw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklbw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklbw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vinsertf64x4-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x4-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinsertf64x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf64x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2uqq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2uqq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvttpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2uqq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2uqq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvttpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2uqq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvttpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vinserti32x4-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x4-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinserti32x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti32x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vinserti32x4-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x4-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinserti32x4-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti32x4-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpermd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsdb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsdb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsdb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vplzcntd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vplzcntd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vplzcntd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntd-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntd-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vplzcntd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntd-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntd-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vplzcntd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmovdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovdw-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovdw-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovdw-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vcvtph2ps-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtph2ps-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtph2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtph2ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtph2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtph2ps-ymm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtph2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpermq-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermq-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermq-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermq-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermq-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermq-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermw-xmm{opmask}_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpermw-xmm{opmask}_xmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpermw-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vpermw-ymm{opmask}_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpermw-ymm{opmask}_ymm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpermw-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vpermw-zmm{opmask}_zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-zmm_zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpermw-zmm{opmask}_zmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpermw-zmm_zmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vmovshdup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovshdup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovshdup-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovshdup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovshdup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovshdup-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovshdup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovshdup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovshdup-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpmovsdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsdw-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsdw-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsdw-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vplzcntq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vplzcntq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vplzcntq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vplzcntq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vplzcntq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vplzcntq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2qq-xmm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvttps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2qq-ymm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvttps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2qq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttps2qq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvttps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvttps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vextractf64x4-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x4-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextractf64x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextractf64x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vfnmadd213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpermilps-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilps-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilps-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilps-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxwq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxwq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxwq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxwq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxwq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxwq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vgatherqpd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherqpd-zmm_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" vgatherqpd-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vgatherqpd-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" vgatherqpd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherqpd-ymm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vfnmadd213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgatherqps-ymm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vgatherqps-ymm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vgatherqps-xmm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherqps-xmm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vgatherqps-xmm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherqps-xmm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vfnmsub213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmaxss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vscalefpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vscalefpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefpd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vscalefpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefpd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vscalefpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcmpeqq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpavgw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpavgw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpavgw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpavgw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpavgw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpavgw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpmovusqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqw-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqw-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqw-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpcmpeqd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vscalefps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vscalefps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vscalefps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vscalefps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vscalefps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcmpeqb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovusqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusqd-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqd-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusqd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqd-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusqd-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusqd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusqd-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpblendmq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpblendmq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpblendmq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpblendmq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpblendmq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpblendmq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpmovsxdq-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxdq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxdq-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxdq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxdq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxdq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxdq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxsd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpblendmw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpblendmw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpblendmw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpblendmw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcasti64x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti64x2-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vbroadcasti64x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti64x2-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmulss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vandpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vandpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vandpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vandpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vandpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovddup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovddup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovddup-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovddup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovddup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovddup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovddup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpmaxsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpblendmb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpblendmb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpblendmb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpblendmb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqu32-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu32-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovdqu32-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu32-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqu32-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu32-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqu32-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqu32-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqu32-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu32-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqu32-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqu32-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqu32-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu32-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpblendmd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpblendmd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpblendmd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpblendmd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpblendmd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpblendmd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpblendmd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsrlvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxsq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmaxsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxsq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmaxsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxsq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmaxsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vandps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vandps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vandps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vandps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vandps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmulsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmulps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmulps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmulps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmulps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmulps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrldq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" @@ -3696,225 +4214,436 @@ vmovntdqa-zmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vmovntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovntdqa-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovaps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovaps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovaps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovaps-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovaps-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovaps-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovaps-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovaps-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovaps-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovaps-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovaps-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovaps-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vgetmantsd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetmantsd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2udq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttpd2udq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvttpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvttpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvttpd2udq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2udq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvttpd2udq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2udq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vpshufhw-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufhw-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufhw-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufhw-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufhw-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufhw-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vgetmantss-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetmantss-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandnd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandnd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpandnd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandnd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandnd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpandnd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandnd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandnd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpandnd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandnd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpconflictq-zmm{opmask}_zmm,11.5,None,"(9.5,0.0,0.0,0.0,0.0,11.5,0.0,0.0)" +vpconflictq-zmm_zmm,11.5,None,"(9.5,0.0,0.0,0.0,0.0,11.5,0.0,0.0)" vpconflictq-zmm{opmask}_mem,11.5,None,"(9.5,0.0,0.5,0.5,0.0,11.5,0.0,0.0)" +vpconflictq-zmm_mem,11.5,None,"(9.5,0.0,0.5,0.5,0.0,11.5,0.0,0.0)" vpconflictq-zmm{opmask}_mem,11.5,None,"(9.5,0.0,0.5,0.5,0.0,11.5,0.0,0.0)" +vpconflictq-zmm_mem,11.5,None,"(9.5,0.0,0.5,0.5,0.0,11.5,0.0,0.0)" vpconflictq-xmm{opmask}_xmm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" vpconflictq-xmm{opmask}_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" vpconflictq-xmm{opmask}_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" vpconflictq-ymm{opmask}_ymm,6.333333333333333,None,"(3.833333333333333,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)" +vpconflictq-ymm_ymm,6.333333333333333,None,"(3.833333333333333,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)" vpconflictq-ymm{opmask}_mem,6.333333333333333,None,"(3.833333333333333,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +vpconflictq-ymm_mem,6.333333333333333,None,"(3.833333333333333,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" vpconflictq-ymm{opmask}_mem,6.333333333333333,None,"(3.833333333333333,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +vpconflictq-ymm_mem,6.333333333333333,None,"(3.833333333333333,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" vorpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vorpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vorpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vorpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpconflictd-zmm{opmask}_zmm,20.5,None,"(14.5,0.0,0.0,0.0,0.0,20.5,0.0,0.0)" +vpconflictd-zmm_zmm,20.5,None,"(14.5,0.0,0.0,0.0,0.0,20.5,0.0,0.0)" vpconflictd-zmm{opmask}_mem,20.5,None,"(14.5,0.0,0.5,0.5,0.0,20.5,0.0,0.0)" +vpconflictd-zmm_mem,20.5,None,"(14.5,0.0,0.5,0.5,0.0,20.5,0.0,0.0)" vpconflictd-zmm{opmask}_mem,20.5,None,"(14.5,0.0,0.5,0.5,0.0,20.5,0.0,0.0)" +vpconflictd-zmm_mem,20.5,None,"(14.5,0.0,0.5,0.5,0.0,20.5,0.0,0.0)" vpconflictd-xmm{opmask}_xmm,6.333333333333333,None,"(3.833333333333333,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)" +vpconflictd-xmm_xmm,6.333333333333333,None,"(3.833333333333333,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)" vpconflictd-xmm{opmask}_mem,2.6666666666666665,None,"(1.6666666666666665,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)" +vpconflictd-xmm_mem,2.6666666666666665,None,"(1.6666666666666665,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)" vpconflictd-xmm{opmask}_mem,2.6666666666666665,None,"(1.6666666666666665,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)" +vpconflictd-xmm_mem,2.6666666666666665,None,"(1.6666666666666665,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)" vpconflictd-ymm{opmask}_ymm,10.666666666666666,None,"(5.166666666666667,5.166666666666667,0.0,0.0,0.0,10.666666666666666,0.0,0.0)" +vpconflictd-ymm_ymm,10.666666666666666,None,"(5.166666666666667,5.166666666666667,0.0,0.0,0.0,10.666666666666666,0.0,0.0)" vpconflictd-ymm{opmask}_mem,10.666666666666666,None,"(5.166666666666667,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)" +vpconflictd-ymm_mem,10.666666666666666,None,"(5.166666666666667,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)" vpconflictd-ymm{opmask}_mem,10.666666666666666,None,"(5.166666666666667,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)" +vpconflictd-ymm_mem,10.666666666666666,None,"(5.166666666666667,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)" vpandnq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandnq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpandnq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandnq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandnq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpandnq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandnq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandnq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpandnq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandnq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmaxsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpminsd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfmsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2qq-xmm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2qq-ymm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2qq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2qq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vpminsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpminsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpminsq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpminsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminsq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpminsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminsq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpminsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vbroadcasti32x2-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vbroadcasti32x2-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti32x2-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vbroadcasti32x2-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vbroadcasti32x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti32x2-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vbroadcasti32x2-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vbroadcasti32x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti32x2-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpackssdw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackssdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackssdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackssdw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackssdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackssdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackssdw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackssdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackssdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcvtpd2udq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2udq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtpd2udq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2udq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtpd2udq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2udq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vfpclassps-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassps-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vfpclassps-k{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassps-k_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vfpclassps-k{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassps-k_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovd2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmovd2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmovd2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vfpclasspd-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasspd-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vfpclasspd-k{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasspd-k_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vfpclasspd-k{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasspd-k_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vsqrtsd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vsqrtsd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vorps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vorps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vorps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vorps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmovsxbq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbq-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxbq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxbq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" vshuff32x4-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff32x4-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshuff32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshuff32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshuff32x4-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshuff32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshuff32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vsqrtss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vsqrtss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vunpckhpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpckhpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpckhpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpckhpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcvtss2sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtss2sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmovzxbd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbd-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxbd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxbd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrad-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrad-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrad-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrad-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrad-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrad-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrad-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vcvtusi2ss-xmm_xmm_r32,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtusi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" vpmovb2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" @@ -3923,1062 +4652,2081 @@ vpmovb2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufd-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpsraw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsraw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsraw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsraw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsraw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsraw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsraw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vcvtusi2sd-xmm_xmm_r32,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtusi2sd-xmm_xmm_r64,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vpshufb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshufb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshufb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vbroadcastf32x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x4-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcastf32x4-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf32x4-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovsldup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovsldup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovsldup-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovsldup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovsldup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovsldup-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovsldup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovsldup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovsldup-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpcmpgtb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxbw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxbw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxbw-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vdivps-zmm{opmask}_zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vdivps-zmm_zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vdivps-zmm{opmask}_zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivps-zmm_zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vdivps-zmm{opmask}_zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivps-zmm_zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vdivps-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vdivps-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vdivps-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vdivps-ymm{opmask}_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vdivps-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vdivps-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vcmpss-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpss-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcmpss-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpss-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshuflw-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshuflw-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshuflw-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshuflw-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpshuflw-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpshuflw-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfmsub132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsubadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcmpsd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpsd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcmpsd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpsd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpsllq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsllq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsllq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsllq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmovzxbq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxbq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxbq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfmsubadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsubadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsllw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsllw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsllw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsllw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfmsub132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpermi2pd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2pd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2pd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfmsub231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vshufpd-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufpd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufpd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufpd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufpd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufpd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufpd-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufpd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufpd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vsubsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vsubsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsqrtps-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsqrtps-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vsqrtps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtps-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsqrtps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtps-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsqrtps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vsqrtps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vsqrtps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vsqrtps-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vsqrtps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vsqrtps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpandd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpandd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpandd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpandd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvtps2dq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2dq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2dq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2dq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmovw2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmovw2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmovw2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpermi2ps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2ps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2ps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpandq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpandq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpandq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpandq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpandq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpandq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vsqrtpd-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsqrtpd-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vsqrtpd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtpd-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsqrtpd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtpd-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsqrtpd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vsqrtpd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vsqrtpd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vsqrtpd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vsqrtpd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vsqrtpd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vsubss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vsubss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vshufps-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufps-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufps-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufps-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufps-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufps-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufps-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufps-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufps-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfnmadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vdbpsadbw-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vdbpsadbw-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdbpsadbw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vdbpsadbw-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vdbpsadbw-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdbpsadbw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vdbpsadbw-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vdbpsadbw-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdbpsadbw-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vprold-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprold-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprold-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprold-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprold-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprold-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprold-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprold-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprold-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vexpandpd-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-zmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vexpandpd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandpd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vexpandpd-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-xmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vexpandpd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vexpandpd-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-ymm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vexpandpd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandpd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vfmsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vexpandps-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-zmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vexpandps-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandps-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vexpandps-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-xmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vexpandps-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vexpandps-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-ymm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vexpandps-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandps-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmuldq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmuldq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpmuldq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuldq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuldq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmuldq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuldq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuldq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmuldq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmuldq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgatherdps-zmm{opmask}_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherdps-zmm_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" vgatherdps-xmm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vgatherdps-xmm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vgatherdps-ymm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherdps-ymm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vpgatherqd-ymm{opmask}_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherqd-ymm_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" vpgatherqd-xmm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherqd-xmm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vpgatherqd-xmm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherqd-xmm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vgatherdpd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherdpd-zmm_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" vgatherdpd-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vgatherdpd-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" vgatherdpd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherdpd-ymm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpunpckhdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcvtpd2dq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2dq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtpd2dq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtpd2dq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vpgatherqq-zmm{opmask}_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherqq-zmm_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" vpgatherqq-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vpgatherqq-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" vpgatherqq-ymm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherqq-ymm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vcvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvtqq2pd-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtqq2pd-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtqq2pd-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtqq2pd-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtqq2pd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsub231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcastf64x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf64x4-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtqq2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtqq2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtqq2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtqq2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtqq2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtqq2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vbroadcastf64x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf64x2-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vbroadcastf64x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf64x2-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmulpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmulpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmulpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmulpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmulpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcompressd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpcompressd-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpcompressd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpcompressd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpcompressd-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpcompressd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpcompressd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpcompressd-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpcompressd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovzxbw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxbw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxbw-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxbw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcvttps2udq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2udq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvttps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2udq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2udq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvttps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2udq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2udq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvttps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcompressq-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpcompressq-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpcompressq-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressq-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpcompressq-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpcompressq-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpcompressq-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressq-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpcompressq-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpcompressq-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpcompressq-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressq-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpaddsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpmovsqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqw-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqw-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqw-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vgetmantpd-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetmantpd-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vgetmantpd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantpd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantpd-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantpd-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetmantpd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantpd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantpd-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantpd-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetmantpd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantpd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpalignr-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpalignr-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpalignr-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpalignr-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpalignr-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpalignr-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsqd-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqd-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsqd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqd-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsqd-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqd-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovsqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovsqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovsqb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpaddsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpmovwb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovwb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovwb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovwb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovwb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovwb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovwb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovwb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovwb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vgetmantps-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetmantps-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vgetmantps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantps-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantps-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetmantps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantps-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantps-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetmantps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetmantps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaxpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmaxpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmaxpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmaxpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpackuswb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackuswb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackuswb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackuswb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackuswb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackuswb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmaxps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaxps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmaxps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmaxps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vmaxps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmaxps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpunpckhqdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhqdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhqdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpabsw-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsw-xmm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsw-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsw-ymm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsw-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsw-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsq-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsq-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsq-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsq-xmm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsq-xmm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsq-ymm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsq-ymm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vfmsub213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrcp14sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrcp14sd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfmsub213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsub213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vextractf32x4-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x4-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextractf32x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextractf32x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vextractf32x4-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x4-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextractf32x4-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextractf32x4-mem_ymm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpabsb-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsb-xmm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsb-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsb-ymm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsb-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsb-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrcp14ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrcp14ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vextractf32x8-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x8-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextractf32x8-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextractf32x8-mem_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpcmpuw-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpuw-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuw-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpuw-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpuw-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuw-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpuw-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpuw-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuw-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcvtsd2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvtsd2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvtsd2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvtsd2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddusw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddusw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddusw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddusw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddusw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddusw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddusb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddusb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddusb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddusb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddusb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpaddusb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vunpckhps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpckhps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpckhps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpckhps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpckhps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpbroadcastd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpbroadcastd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpbroadcastd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastd-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastd-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpbroadcastd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastd-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastd-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpbroadcastd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastd-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vfmadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqu8-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqu8-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqu8-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu8-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqu8-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqu8-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqu8-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu8-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqu8-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu8-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovdqu8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu8-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqu8-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.6666666666666666,0.6666666666666666,2.0,1.0,0.0,0.6666666666666666)" +vmovdqu8-mem_zmm,2.0,None,"(0.0,0.0,0.6666666666666666,0.6666666666666666,2.0,1.0,0.0,0.6666666666666666)" vshufi32x4-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi32x4-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufi32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufi32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufi32x4-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufi32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufi32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovusdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusdb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusdb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusdb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmulhw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmulhw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulhw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmulhw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulhw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpmulhw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vxorpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vxorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vxorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vxorpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vxorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vxorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vxorpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vxorpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vxorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vxorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpermilpd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilpd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermilpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermilpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovusdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusdw-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusdw-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovusdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovusdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovusdw-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpbroadcastq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpbroadcastq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpbroadcastq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastq-zmm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-zmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastq-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastq-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpbroadcastq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastq-xmm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastq-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastq-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpbroadcastq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastq-ymm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmaddubsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaddubsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmaddubsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaddubsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmaddubsw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddubsw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpmaddubsw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vxorps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vxorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vxorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vxorps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vxorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vxorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vxorps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vxorps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vxorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vxorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscaless-xmm{opmask}_xmm_xmm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaless-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vrndscaless-xmm{opmask}_xmm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaless-xmm_xmm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vandnps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vandnps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandnps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandnps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vandnps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandnps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandnps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandnps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vandnps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vandnps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovups-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovups-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovups-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovups-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovups-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovups-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovups-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovups-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovups-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovups-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovups-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovups-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovups-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovups-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpsravq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vinserti32x8-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x8-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinserti32x8-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti32x8-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtuqq2pd-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtuqq2pd-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtuqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtuqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtuqq2pd-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtuqq2pd-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtuqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtuqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtuqq2pd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtuqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtuqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscalesd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalesd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vrndscalesd-xmm{opmask}_xmm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalesd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vmovupd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovupd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovupd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovupd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovupd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovupd-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovupd-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovupd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovupd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovupd-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovupd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovupd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpsravd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsravd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsravd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vcvttps2dq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2dq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvttps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2dq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvttps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2dq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvttps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vdivss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vdivss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfnmadd231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vdivsd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vdivsd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vmovntdq-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vcvtuqq2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtuqq2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtuqq2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtuqq2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtuqq2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtuqq2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtuqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtuqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtuqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtuqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vfnmadd231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexpsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetexpsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcmpps-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcmpps-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmpps-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmpps-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcmpps-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmpps-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmpps-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcmpps-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmpps-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcmppd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vbroadcasti32x8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti32x8-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsubpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vsubpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vsubpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vsubpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vandnpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vandnpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandnpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandnpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vandnpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandnpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vandnpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandnpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vandnpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vandnpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vminss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vminss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcasti32x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti32x4-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcasti32x4-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti32x4-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vfixupimmps-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfixupimmps-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfixupimmps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmps-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfixupimmps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmps-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfixupimmps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcastf32x8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x8-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsubps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vsubps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vsubps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vsubps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vsubps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmpd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfixupimmpd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmpd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmpd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfixupimmpd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmpd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmpd-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfixupimmpd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfixupimmpd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcastf32x2-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastf32x2-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vbroadcastf32x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf32x2-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vbroadcastf32x2-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastf32x2-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vbroadcastf32x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x2-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcmpw-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpw-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpw-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpw-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpw-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpw-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpw-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpw-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpw-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vscatterqps-mem{opmask}_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vscatterqps-mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vscatterqps-mem{opmask}_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vscatterqps-mem_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" vscatterqps-mem{opmask}_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vscatterqps-mem_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" vpsubusb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubusb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsubusb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubusb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsubusb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubusb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpcmpd-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpd-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpb-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpb-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpb-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpb-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpb-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpb-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpsubusw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubusw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsubusw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubusw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsubusw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubusw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfnmsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vshufi64x2-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi64x2-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufi64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufi64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufi64x2-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshufi64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshufi64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vrndscaleps-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vrndscaleps-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vrndscaleps-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vrndscaleps-xmm{opmask}_xmm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaleps-xmm_xmm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vrndscaleps-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-xmm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscaleps-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-xmm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscaleps-ymm{opmask}_ymm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm_ymm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vrndscaleps-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscaleps-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexpps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetexpps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vgetexpps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexpps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexpps-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpps-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetexpps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexpps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexpps-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpps-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetexpps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexpps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vfmadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vgetexppd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetexppd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vgetexppd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexppd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexppd-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexppd-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetexppd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexppd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexppd-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexppd-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetexppd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexppd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscalepd-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vrndscalepd-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vrndscalepd-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscalepd-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vrndscalepd-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscalepd-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vrndscalepd-xmm{opmask}_xmm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalepd-xmm_xmm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vrndscalepd-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-xmm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscalepd-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-xmm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscalepd-ymm{opmask}_ymm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm_ymm_imd,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vrndscalepd-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vrndscalepd-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm_mem_imd,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vpabsd-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsd-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsd-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsd-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsd-xmm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsd-xmm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsd-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpabsd-ymm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpabsd-ymm{opmask}_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpaddq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpaddq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpaddq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpaddq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpaddq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpaddq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpcmpuq-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpuq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpuq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpuq-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpuq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpuq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpuq-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpuq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpuq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpaddw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpaddw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpaddw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpaddw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpexpandd-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-zmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vpexpandd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpexpandd-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-xmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vpexpandd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpexpandd-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-ymm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vpexpandd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpcmpub-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpub-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpub-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpub-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpub-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpub-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpub-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpub-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpub-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpaddb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpaddb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpaddb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpaddb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcmpud-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpud-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpud-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpud-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpud-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpud-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpud-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpud-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpud-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpaddd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpaddd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpaddd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpaddd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpaddd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpaddd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpaddd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpexpandq-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-zmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vpexpandq-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandq-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpexpandq-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-xmm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vpexpandq-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandq-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpexpandq-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-ymm_mem,2.0,None,"(0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" vpexpandq-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandq-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vcvttsd2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvttsd2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvttsd2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvttsd2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vshuff64x2-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff64x2-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshuff64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshuff64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshuff64x2-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vshuff64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vshuff64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovq2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmovq2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmovq2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprorq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprorq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprorq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprorq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprorq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprorq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vfnmsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vprord-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprord-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprord-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprord-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprord-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprord-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprord-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprord-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprord-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" @@ -4987,580 +6735,1147 @@ vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" vcvtpd2qq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2qq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2qq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2qq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2qq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrcp14pd-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vrcp14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrcp14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrcp14pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrcp14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrcp14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrcp14pd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrcp14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrcp14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vaddpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vaddpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vaddpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vaddpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vaddpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrcp14ps-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vrcp14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrcp14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrcp14ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrcp14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrcp14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrcp14ps-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrcp14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrcp14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfnmsub132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vaddps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vaddps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vaddps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vaddps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vaddps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsraq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsraq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsraq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsraq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsraq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsraq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsraq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsraq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vptestmw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmw-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmw-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmw-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmulld-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulld-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmulld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmulld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmulld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmulld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmulld-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vpmulld-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulld-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulld-ymm{opmask}_ymm_ymm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vpmulld-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vpmulld-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vptestnmd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestnmb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestnmb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmullq-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmullq-xmm_xmm_xmm,1.0,None,"(1.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmullq-xmm{opmask}_xmm_mem,1.0,None,"(1.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-xmm_xmm_mem,1.0,None,"(1.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmullq-xmm{opmask}_xmm_mem,1.0,None,"(1.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-xmm_xmm_mem,1.0,None,"(1.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmullq-ymm{opmask}_ymm_ymm,1.0,None,"(1.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmullq-ymm_ymm_ymm,1.0,None,"(1.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmullq-ymm{opmask}_ymm_mem,1.0,None,"(1.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-ymm_ymm_mem,1.0,None,"(1.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmullq-ymm{opmask}_ymm_mem,1.0,None,"(1.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-ymm_ymm_mem,1.0,None,"(1.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmullq-zmm{opmask}_zmm_zmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vpmullq-zmm_zmm_zmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vpmullq-zmm{opmask}_zmm_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vpmullq-zmm_zmm_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vpmullq-zmm{opmask}_zmm_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vpmullq-zmm_zmm_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vpmullw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmullw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmullw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmullw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmullw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmullw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpmullw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vextractf64x2-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x2-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextractf64x2-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextractf64x2-mem_ymm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vextractf64x2-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x2-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextractf64x2-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextractf64x2-mem_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfnmsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcompresspd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vcompresspd-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vcompresspd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompresspd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vcompresspd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vcompresspd-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vcompresspd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompresspd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vcompresspd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vcompresspd-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vcompresspd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompresspd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpunpcklwd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklwd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklwd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklwd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklwd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklwd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfnmsub213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcompressps-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vcompressps-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vcompressps-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompressps-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vcompressps-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vcompressps-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vcompressps-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompressps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vcompressps-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vcompressps-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vcompressps-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompressps-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vinserti64x2-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x2-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinserti64x2-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti64x2-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vinserti64x2-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x2-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinserti64x2-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti64x2-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vinserti64x4-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x4-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinserti64x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti64x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" valignq-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" valignq-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignq-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignq-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" valignq-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignq-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignq-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" valignq-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignq-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vreducesd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducesd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vreducesd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducesd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" valignd-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" valignd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" valignd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignd-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" valignd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" valignd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vreducess-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducess-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vreducess-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducess-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpermi2w-xmm{opmask}_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" vpermi2w-xmm{opmask}_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" vpermi2w-ymm{opmask}_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" vpermi2w-ymm{opmask}_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" vpermi2w-zmm{opmask}_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +vpermi2w-zmm_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" vpermi2w-zmm{opmask}_zmm_mem,2.5,None,"(0.5,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +vpermi2w-zmm_zmm_mem,2.5,None,"(0.5,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfmadd213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpackusdw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackusdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackusdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackusdw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackusdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackusdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackusdw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpackusdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpackusdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxud-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxud-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxud-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpermi2q-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2q-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2q-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovdqu16-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqu16-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqu16-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu16-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqu16-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqu16-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqu16-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu16-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqu16-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu16-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovdqu16-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu16-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqu16-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu16-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpmaxuq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmaxuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxuq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmaxuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxuq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmaxuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmaxuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxbd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxbd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxbd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxbd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2d-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2d-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2d-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermi2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermi2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfmadd213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmaxuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxuw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxuw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vdivpd-zmm{opmask}_zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vdivpd-zmm_zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vdivpd-zmm{opmask}_zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivpd-zmm_zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vdivpd-zmm{opmask}_zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivpd-zmm_zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vdivpd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vdivpd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vdivpd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vdivpd-ymm{opmask}_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vdivpd-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vdivpd-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrlw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrlw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrlw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrlq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrlq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrlq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrlq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrlq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vmovapd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovapd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovapd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovapd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovapd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovapd-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovapd-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovapd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovapd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovapd-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovapd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovapd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpbroadcastb-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastb-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpbroadcastb-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastb-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastb-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpbroadcastb-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastb-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastb-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpbroadcastb-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklqdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklqdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklqdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpcklqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpcklqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfnmadd132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsrld-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrld-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrld-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrld-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrld-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrld-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpsrld-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrld-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsrld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsrld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmovzxwd-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxwd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwd-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxwd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxwd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxwd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxwd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfnmadd132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqu64-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu64-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovdqu64-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu64-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqu64-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu64-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqu64-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqu64-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqu64-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu64-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqu64-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqu64-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqu64-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu64-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vfixupimmss-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfixupimmss-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscatterqpd-mem{opmask}_zmm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vscatterqpd-mem_zmm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" vscatterqpd-mem{opmask}_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vscatterqpd-mem_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" vscatterqpd-mem{opmask}_ymm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vscatterqpd-mem_ymm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" vcvtudq2ps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2ps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtudq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2ps-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtudq2ps-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtudq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2ps-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtudq2ps-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtudq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcastsd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastsd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcastsd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastsd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vbroadcastsd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastsd-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vbroadcastsd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vmovdqa64-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqa64-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovdqa64-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqa64-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqa64-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqa64-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqa64-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqa64-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqa64-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqa64-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqa64-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqa64-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqa64-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqa64-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpcmpeqw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpeqw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpeqw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfixupimmsd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfixupimmsd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2uqq-xmm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvttps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2uqq-ymm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvttps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttps2uqq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttps2uqq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvttps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvttps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vbroadcastss-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastss-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vbroadcastss-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vbroadcastss-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vbroadcastss-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vbroadcastss-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vbroadcastss-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vcvtudq2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtudq2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtudq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtudq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtudq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtudq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vminpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vminpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vminpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vminpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2ps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtdq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2ps-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtdq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2ps-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtdq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vprorvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprorvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprorvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprorvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vptestmd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfnmsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpbroadcastw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpbroadcastw-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpbroadcastw-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastw-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpbroadcastw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpbroadcastw-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckldq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckldq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckldq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckldq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckldq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckldq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckldq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckldq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckldq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vptestmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcvtdq2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtdq2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtdq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtdq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtdq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtdq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vprorvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vprorvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprorvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vprorvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vprorvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vminps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vminps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vminps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vminps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vminps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vminps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsubb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpsubb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpsubb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpsubb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsubd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpsubd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsubd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsubd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpsubd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpsubd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpsubq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsubq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsubq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpsubq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpsubq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpsubw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpsubw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsubw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpsubw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsubadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" @@ -5572,619 +7887,1213 @@ vcvtss2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.33333333333333 vcvtss2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtss2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vfmsubadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsubadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpxorq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpxorq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpxorq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxorq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpxorq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxorq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpxorq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpxorq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpxorq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpxorq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpxorq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpxorq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vextracti64x4-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x4-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextracti64x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextracti64x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vinsertf32x8-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x8-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinsertf32x8-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf32x8-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vextracti64x2-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x2-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextracti64x2-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextracti64x2-mem_ymm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vextracti64x2-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x2-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextracti64x2-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextracti64x2-mem_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vinsertf32x4-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x4-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinsertf32x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf32x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vinsertf32x4-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x4-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vinsertf32x4-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf32x4-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpslld-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpslld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpslld-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpslld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpslld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpslld-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpslld-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpslld-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpslld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpslld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpslld-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" vpslld-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpslld-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpslld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpslld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_mem_imd,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vextracti32x4-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x4-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextracti32x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextracti32x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vextracti32x4-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x4-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextracti32x4-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextracti32x4-mem_ymm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpxord-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpxord-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpxord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpxord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpxord-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxord-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpxord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpxord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpxord-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpxord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpxord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpermt2ps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2ps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2ps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vextracti32x8-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x8-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vextracti32x8-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vextracti32x8-mem_zmm_imd,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpmovzxdq-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxdq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxdq-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxdq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxdq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovzxdq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovzxdq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcvtsi2ss-xmm_xmm_r32,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtsi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" vrangepd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangepd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vrangepd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangepd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangepd-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangepd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vrangepd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangepd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangepd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrangepd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vrangepd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangepd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreduceps-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreduceps-xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vreduceps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreduceps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreduceps-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreduceps-ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vreduceps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreduceps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreduceps-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vreduceps-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vreduceps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vreduceps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtsd2ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtsd2ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtsd2ss-xmm_xmm_mem,1.0,None,"(1.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" vpmovuswb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovuswb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovuswb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovuswb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovuswb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovuswb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovuswb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovuswb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovuswb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpavgb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpavgb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpavgb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpavgb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpavgb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpavgb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrangeps-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangeps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vrangeps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangeps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangeps-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangeps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vrangeps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangeps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangeps-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrangeps-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vrangeps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrangeps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtsi2sd-xmm_xmm_r32,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtsi2sd-xmm_xmm_r64,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vpmovswb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovswb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovswb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovswb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovswb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovswb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovswb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovswb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovswb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vcvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpscatterqq-mem{opmask}_zmm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vpscatterqq-mem_zmm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" vpscatterqq-mem{opmask}_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vpscatterqq-mem_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" vpscatterqq-mem{opmask}_ymm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vpscatterqq-mem_ymm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" vbroadcasti64x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti64x4-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttss2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvttss2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvttss2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvttss2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpmovsxwd-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxwd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxwd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxwd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxwd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxwd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpscatterqd-mem{opmask}_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpscatterqd-mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpscatterqd-mem{opmask}_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vpscatterqd-mem_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" vpscatterqd-mem{opmask}_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vpscatterqd-mem_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" vfmsubadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmsubadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmsubadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmsubadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmovsxwq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxwq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxwq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxwq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpmovsxwq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovsxwq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vfnmadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscatterdps-mem{opmask}_zmm,16.0,None,"(1.5,0.5,8.0,8.0,16.0,1.5,0.5,0.0)" +vscatterdps-mem_zmm,16.0,None,"(1.5,0.5,8.0,8.0,16.0,1.5,0.5,0.0)" vscatterdps-mem{opmask}_xmm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,1.5,0.5,0.0)" +vscatterdps-mem_xmm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,1.5,0.5,0.0)" vscatterdps-mem{opmask}_ymm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,1.5,0.5,0.0)" +vscatterdps-mem_ymm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,1.5,0.5,0.0)" vcvtpd2uqq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2uqq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2uqq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2uqq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2uqq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscatterdpd-mem{opmask}_zmm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vscatterdpd-mem_zmm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" vscatterdpd-mem{opmask}_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vscatterdpd-mem_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" vscatterdpd-mem{opmask}_ymm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vscatterdpd-mem_ymm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" vpsubsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsubsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsubsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfnmsub231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpermt2d-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2d-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2d-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vrsqrt14pd-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrsqrt14pd-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vrsqrt14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14pd-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrsqrt14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14pd-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrsqrt14pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrsqrt14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrsqrt14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrsqrt14pd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrsqrt14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrsqrt14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfnmsub231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmsub231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrsqrt14ps-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vrsqrt14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrsqrt14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vrsqrt14ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrsqrt14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrsqrt14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrsqrt14ps-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vrsqrt14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vrsqrt14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpermt2w-xmm{opmask}_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" vpermt2w-xmm{opmask}_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" vpermt2w-ymm{opmask}_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" vpermt2w-ymm{opmask}_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" vpermt2w-zmm{opmask}_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +vpermt2w-zmm_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" vpermt2w-zmm{opmask}_zmm_mem,2.5,None,"(0.5,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +vpermt2w-zmm_zmm_mem,2.5,None,"(0.5,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" vcvtps2udq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2udq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2udq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2udq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2udq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2udq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvtps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpermt2q-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2q-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2q-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vmovntpd-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpminuq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpminuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminuq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpminuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminuq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpminuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminuw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpminuw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpermps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpcklps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpcklps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpcklps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpminub-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminub-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminub-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminub-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminub-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpminub-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vmovntps-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vpminud-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpminud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpminud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpminud-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminud-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpminud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpminud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vunpcklpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpcklpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpcklpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vunpcklpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vunpcklpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermpd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermpd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vscalefsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vscalefsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmaddsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vgetexpss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vgetexpss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vblendmps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendmps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vblendmps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vblendmps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vblendmps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vblendmps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vblendmps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vblendmps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vblendmps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vblendmps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vfmaddsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmaddsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vscalefss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vscalefss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqa32-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqa32-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vmovdqa32-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqa32-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vmovdqa32-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqa32-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqa32-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqa32-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqa32-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqa32-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vmovdqa32-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vmovdqa32-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vmovdqa32-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqa32-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" vblendmpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendmpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vblendmpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vblendmpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vblendmpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vblendmpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vblendmpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vblendmpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vblendmpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vblendmpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpunpckhbw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhbw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhbw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhbw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhbw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhbw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2pd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2pd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2pd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpermt2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpermt2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vcvttpd2qq-xmm{opmask}_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2qq-xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvttpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2qq-ymm{opmask}_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2qq-ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vcvttpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2qq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vcvttpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvttpd2dq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttpd2dq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvttpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvttpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvttpd2dq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvttpd2dq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vfmadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcmpgtd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpscatterdd-mem{opmask}_zmm,16.0,None,"(1.5,0.5,8.0,8.0,16.0,1.5,0.5,0.0)" +vpscatterdd-mem_zmm,16.0,None,"(1.5,0.5,8.0,8.0,16.0,1.5,0.5,0.0)" vpscatterdd-mem{opmask}_xmm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,1.5,0.5,0.0)" +vpscatterdd-mem_xmm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,1.5,0.5,0.0)" vpscatterdd-mem{opmask}_ymm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,1.5,0.5,0.0)" +vpscatterdd-mem_ymm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,1.5,0.5,0.0)" vpmaddwd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaddwd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmaddwd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaddwd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmaddwd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddwd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpmaddwd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcmpgtq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpscatterdq-mem{opmask}_zmm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vpscatterdq-mem_zmm,8.0,None,"(1.5,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" vpscatterdq-mem{opmask}_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vpscatterdq-mem_xmm,2.0,None,"(1.5,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" vpscatterdq-mem{opmask}_ymm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vpscatterdq-mem_ymm,4.0,None,"(1.5,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" vfmadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpcmpgtw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpcmpgtw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpcmpgtw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpsubsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsubsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsubsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsubsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxub-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxub-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxub-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxub-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpmaxub-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpmaxub-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vfmaddsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmaddsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfmaddsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfmaddsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfmaddsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpgatherdd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherdd-zmm_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" vpgatherdd-xmm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherdd-xmm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpgatherdd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherdd-ymm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vpunpckhwd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhwd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhwd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhwd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpunpckhwd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpunpckhwd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpord-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpord-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vpord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpord-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpord-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpord-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vpord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpmovqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovqw-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovqw-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovqw-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpgatherdq-zmm{opmask}_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherdq-zmm_mem,1.5,None,"(1.5,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" vpgatherdq-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vpgatherdq-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" vpgatherdq-ymm{opmask}_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherdq-ymm_mem,2.0,None,"(1.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" vfnmadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vfnmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vfnmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vfnmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpmovqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovqb-mem_zmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovqb-mem_xmm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" vpmovqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" +vpmovqb-mem_ymm,2.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,2.0,0.0,0.3333333333333333)" vpmovqd-ymm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-ymm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovqd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpmovqd-mem_zmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" vpmovqd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovqd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpmovqd-mem_xmm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" vpmovqd-xmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-xmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpmovqd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpmovqd-mem_ymm,1.0,None,"(0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" vporq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vporq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" vporq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vporq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vporq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vporq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vporq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vporq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vporq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vporq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vporq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vporq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vporq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vcvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" vpsllvw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvw-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvw-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vcvtpd2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtpd2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2ps-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtpd2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2ps-ymm_mem,1.5,None,"(0.5,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" vcvtpd2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtpd2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vpsllvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vaddsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vaddsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2ph-ymm{opmask}_zmm_imd,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2ph-ymm_zmm_imd,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtps2ph-mem{opmask}_zmm_imd,1.0,None,"(0.5,0.0,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)" +vcvtps2ph-mem_zmm_imd,1.0,None,"(0.5,0.0,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)" vcvtps2ph-xmm{opmask}_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtps2ph-mem{opmask}_xmm_imd,1.0,None,"(0.3333333333333333,0.3333333333333333,0.3333333333333333,0.3333333333333333,1.0,0.3333333333333333,0.0,0.3333333333333333)" +vcvtps2ph-mem_xmm_imd,1.0,None,"(0.3333333333333333,0.3333333333333333,0.3333333333333333,0.3333333333333333,1.0,0.3333333333333333,0.0,0.3333333333333333)" vcvtps2ph-xmm{opmask}_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" vcvtps2ph-mem{opmask}_ymm_imd,1.0,None,"(0.3333333333333333,0.3333333333333333,0.3333333333333333,0.3333333333333333,1.0,0.3333333333333333,0.0,0.3333333333333333)" +vcvtps2ph-mem_ymm_imd,1.0,None,"(0.3333333333333333,0.3333333333333333,0.3333333333333333,0.3333333333333333,1.0,0.3333333333333333,0.0,0.3333333333333333)" vpacksswb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpacksswb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpacksswb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpacksswb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vpacksswb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" vpacksswb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" vaddss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vaddss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vpsllvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" vpsllvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vpsllvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" vcvtps2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" vcvtps2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-zmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtps2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" vcvtps2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" vcvtps2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" diff --git a/osaca/eu_sched.py b/osaca/eu_sched.py index 433b08e..af1799f 100755 --- a/osaca/eu_sched.py +++ b/osaca/eu_sched.py @@ -74,8 +74,9 @@ class Scheduler(object): # Check if there's a port occupation stored in the CSV, otherwise leave the # occ_port list item empty for i, instrForm in enumerate(self.instrList): + search_string = instrForm[0] + '-' + self.get_operand_suffix(instrForm) + print(search_string) try: - search_string = instrForm[0] + '-' + self.get_operand_suffix(instrForm) entry = self.df.loc[lambda df, sStr=search_string: df.instr == sStr] tup = entry.ports.values[0] if len(tup) == 1 and tup[0] == -1: