mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2026-01-05 02:30:08 +01:00
new instructions
This commit is contained in:
@@ -57,6 +57,28 @@ port_model_scheme: |
|
|||||||
| CALC |
|
| CALC |
|
||||||
+--------+
|
+--------+
|
||||||
instruction_forms:
|
instruction_forms:
|
||||||
|
- name: add
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: add
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: immediate
|
||||||
|
imd: int
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
- name: add
|
- name: add
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
@@ -101,6 +123,56 @@ instruction_forms:
|
|||||||
throughput: 0.5
|
throughput: 0.5
|
||||||
latency: 1.0 # 1*p34
|
latency: 1.0 # 1*p34
|
||||||
port_pressure: [[1, '34']]
|
port_pressure: [[1, '34']]
|
||||||
|
- name: and
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: and
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: immediate
|
||||||
|
imd: int
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: and
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: and
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: immediate
|
||||||
|
imd: int
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: b
|
||||||
|
operands:
|
||||||
|
- class: identifier
|
||||||
|
throughput: 1.0
|
||||||
|
latency: 0.0
|
||||||
|
port_pressure: [[1, '7']]
|
||||||
- name: b.ne
|
- name: b.ne
|
||||||
operands:
|
operands:
|
||||||
- class: identifier
|
- class: identifier
|
||||||
@@ -119,6 +191,24 @@ instruction_forms:
|
|||||||
throughput: 1.0
|
throughput: 1.0
|
||||||
latency: 0.0
|
latency: 0.0
|
||||||
port_pressure: [[1, '7']]
|
port_pressure: [[1, '7']]
|
||||||
|
- name: b.lt
|
||||||
|
operands:
|
||||||
|
- class: identifier
|
||||||
|
throughput: 1.0
|
||||||
|
latency: 0.0
|
||||||
|
port_pressure: [[1, '7']]
|
||||||
|
- name: b.eq
|
||||||
|
operands:
|
||||||
|
- class: identifier
|
||||||
|
throughput: 1.0
|
||||||
|
latency: 0.0
|
||||||
|
port_pressure: [[1, '7']]
|
||||||
|
- name: b.hs
|
||||||
|
operands:
|
||||||
|
- class: identifier
|
||||||
|
throughput: 1.0
|
||||||
|
latency: 0.0
|
||||||
|
port_pressure: [[1, '7']]
|
||||||
- name: b.gt
|
- name: b.gt
|
||||||
operands:
|
operands:
|
||||||
- class: identifier
|
- class: identifier
|
||||||
@@ -175,6 +265,19 @@ instruction_forms:
|
|||||||
throughput: 1.0
|
throughput: 1.0
|
||||||
latency: 6.0 # 1*p0
|
latency: 6.0 # 1*p0
|
||||||
port_pressure: [[1, '0']]
|
port_pressure: [[1, '0']]
|
||||||
|
- name: dup
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: v
|
||||||
|
shape: d
|
||||||
|
width: '*'
|
||||||
|
- class: register
|
||||||
|
prefix: v
|
||||||
|
shape: d
|
||||||
|
width: '*'
|
||||||
|
throughput: 1.0
|
||||||
|
latency: 6.0 # 1*p0
|
||||||
|
port_pressure: [[1, '0']]
|
||||||
- name: fadd
|
- name: fadd
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
@@ -755,6 +858,15 @@ instruction_forms:
|
|||||||
throughput: 0.5
|
throughput: 0.5
|
||||||
latency: 5.0 # 2*p56+2*p5D6D
|
latency: 5.0 # 2*p56+2*p5D6D
|
||||||
port_pressure: [[1, '56'], [1, ['5D', '6D']]]
|
port_pressure: [[1, '56'], [1, ['5D', '6D']]]
|
||||||
|
- name: ldr
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
throughput: 0.0
|
||||||
|
latency: 0.0
|
||||||
|
port_pressure: []
|
||||||
- name: ldr
|
- name: ldr
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
@@ -782,6 +894,55 @@ instruction_forms:
|
|||||||
throughput: 0.0
|
throughput: 0.0
|
||||||
latency: 0.0
|
latency: 0.0
|
||||||
port_pressure: []
|
port_pressure: []
|
||||||
|
- name: lsl
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: immediate
|
||||||
|
imd: int
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: lsl
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: immediate
|
||||||
|
imd: int
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: mov
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: immediate
|
||||||
|
imd: int
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: mov
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: immediate
|
||||||
|
imd: int
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: mov
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
throughput: 0.25
|
||||||
|
latency: 1.0 # 1*p0234
|
||||||
|
port_pressure: [[1, '0234']]
|
||||||
- name: mov
|
- name: mov
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
@@ -815,6 +976,33 @@ instruction_forms:
|
|||||||
throughput: 0.5
|
throughput: 0.5
|
||||||
latency: 4.0 # 1*p02
|
latency: 4.0 # 1*p02
|
||||||
port_pressure: [[1, '02']]
|
port_pressure: [[1, '02']]
|
||||||
|
- name: mul
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
throughput: 1.0
|
||||||
|
latency: 5.0 # 1*p1
|
||||||
|
port_pressure: [[1, '3']]
|
||||||
|
- name: mul
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
throughput: 1.0
|
||||||
|
latency: 5.0 # 1*p3
|
||||||
|
port_pressure: [[1, '3']]
|
||||||
|
- name: ret
|
||||||
|
operands: []
|
||||||
|
throughput: 0.5
|
||||||
|
latency: ~ # 1*p56
|
||||||
|
port_pressure: [[1, '56']]
|
||||||
- name: stp
|
- name: stp
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
@@ -831,6 +1019,70 @@ instruction_forms:
|
|||||||
throughput: 2.0
|
throughput: 2.0
|
||||||
latency: 0 # 2*p56+2*p0
|
latency: 0 # 2*p56+2*p0
|
||||||
port_pressure: [[2, '56'], [2, '0']]
|
port_pressure: [[2, '56'], [2, '0']]
|
||||||
|
- name: stp
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: memory
|
||||||
|
base: x
|
||||||
|
offset: '*'
|
||||||
|
index: '*'
|
||||||
|
scale: '*'
|
||||||
|
pre-indexed: false
|
||||||
|
post-indexed: true
|
||||||
|
throughput: 2.0
|
||||||
|
latency: 0 # 2*p56+2*p0+1*0234
|
||||||
|
port_pressure: [[2, '56'], [2, '0'], [1, '0234']]
|
||||||
|
- name: stp
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: memory
|
||||||
|
base: x
|
||||||
|
offset: '*'
|
||||||
|
index: '*'
|
||||||
|
scale: '*'
|
||||||
|
pre-indexed: false
|
||||||
|
post-indexed: false
|
||||||
|
throughput: 2.0
|
||||||
|
latency: 0 # 2*p56+2*p0
|
||||||
|
port_pressure: [[2, '56'], [2, '0']]
|
||||||
|
- name: stp
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: memory
|
||||||
|
base: x
|
||||||
|
offset: '*'
|
||||||
|
index: '*'
|
||||||
|
scale: '*'
|
||||||
|
pre-indexed: false
|
||||||
|
post-indexed: true
|
||||||
|
throughput: 2.0
|
||||||
|
latency: 0 # 2*p56+2*p0+1*0234
|
||||||
|
port_pressure: [[2, '56'], [2, '0'], [1, '0234']]
|
||||||
|
- name: stp
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: memory
|
||||||
|
base: x
|
||||||
|
offset: '*'
|
||||||
|
index: '*'
|
||||||
|
scale: '*'
|
||||||
|
pre-indexed: false
|
||||||
|
post-indexed: false
|
||||||
|
throughput: 2.0
|
||||||
|
latency: 0 # 2*p56+2*p0
|
||||||
|
port_pressure: [[2, '56'], [2, '0']]
|
||||||
- name: stp
|
- name: stp
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
@@ -891,6 +1143,20 @@ instruction_forms:
|
|||||||
throughput: 1.0
|
throughput: 1.0
|
||||||
latency: 0 # 1*p56+1*p0
|
latency: 0 # 1*p56+1*p0
|
||||||
port_pressure: [[1, '56'], [1, '0']]
|
port_pressure: [[1, '56'], [1, '0']]
|
||||||
|
- name: str
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: memory
|
||||||
|
base: x
|
||||||
|
offset: '*'
|
||||||
|
index: '*'
|
||||||
|
scale: '*'
|
||||||
|
pre-indexed: false
|
||||||
|
post-indexed: false
|
||||||
|
throughput: 1.0
|
||||||
|
latency: 0 # 1*p56+1*p0
|
||||||
|
port_pressure: [[1, '56'], [1, '0']]
|
||||||
- name: str
|
- name: str
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
@@ -992,6 +1258,17 @@ instruction_forms:
|
|||||||
throughput: 1.0
|
throughput: 1.0
|
||||||
latency: 0 # 1*p5+1*p6+1*p0
|
latency: 0 # 1*p5+1*p6+1*p0
|
||||||
port_pressure: [[1, '5'], [1, '6'], [1, '0']]
|
port_pressure: [[1, '5'], [1, '6'], [1, '0']]
|
||||||
|
- name: sub
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
- class: register
|
||||||
|
prefix: x
|
||||||
|
throughput: 0.5
|
||||||
|
latency: 1.0 # 1*p34
|
||||||
|
port_pressure: [[1, '34']]
|
||||||
- name: sub
|
- name: sub
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
@@ -1025,6 +1302,28 @@ instruction_forms:
|
|||||||
throughput: 0.25
|
throughput: 0.25
|
||||||
latency: 1.0 # 1*p0234
|
latency: 1.0 # 1*p0234
|
||||||
port_pressure: [[1, '0234']]
|
port_pressure: [[1, '0234']]
|
||||||
|
- name: sub
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
throughput: 0.5
|
||||||
|
latency: 1.0 # 1*p34
|
||||||
|
port_pressure: [[1, '34']]
|
||||||
|
- name: subs
|
||||||
|
operands:
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: register
|
||||||
|
prefix: w
|
||||||
|
- class: immediate
|
||||||
|
imd: int
|
||||||
|
throughput: 0.5
|
||||||
|
latency: 1.0 # 1*p34
|
||||||
|
port_pressure: [[1, '34']]
|
||||||
- name: [whilele, whilelo, whilels, whilelt]
|
- name: [whilele, whilelo, whilels, whilelt]
|
||||||
operands:
|
operands:
|
||||||
- class: register
|
- class: register
|
||||||
|
|||||||
Reference in New Issue
Block a user