diff --git a/.travis.yml b/.travis.yml
index 2285bd3..ceeba8e 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -3,6 +3,28 @@ language: python
 python:
     - "3.5"
     - "3.6"
-    - "3.7"
-install: pip install tox-travis
-script: tox
+# Python 3.7 not working yet
+#    - "3.7"
+before_install: 
+#  - pip install tox-travis
+  - pip install codecov
+install:
+  - pip install -e .
+cache: pip
+script: 
+#  - tox
+  - coverage run -p tests/all_tests.py
+after_success:
+  - coverage combine
+  - codecov
+deploy:
+  provider: pypi
+  user: "__token__"
+  password:
+    secure: "fRRCETOwDkJ4pFacYZghPfCQ9mSsV4PlD3sTDp8rDHoCnebPjvFYc1tIdv+Wds0ae162KNUaj9GbxjK0MTGiRcy4pD08n7ufv8snmBQ2rtOLkj7RCRg1hw30WcMHjzqScFJgQcBrpjdPmR5AlesUufh6OadGvF1NspmVRWKr8ir3KQhmNV+itAliYoqaSTRTg1zC/znm+49l5gkzlLxd+mPj5/dtcc8vZ/i2M2+nNTTjDxq71q4Ddqv+bgZV1y7OZY2YuvjEDPflUbwc3fjOxpj891uMDHodsGmEHBu8WsLpF2tAO0C/x63S0jXamkV+/4cAQqQAwWr0Lby9/BjCfUwyUMOEgZ0S+z9WoFpBpQTQEfkD2JH/UFrv4CMnLFqgDkVMcx0vc/rT4Od8eJ5wOSG5+VdniJNOLpodFOXuKc09eJMk2lE9vk9OBrcsZ09UOTPTUCMZSIP4cBDxaIkx+RHQEy63TQdJZcElRBEWGEgj2e9hbiktvIoOvbFGQDscpz7ShBDklXIpu9hnxcKHtNDEjyywTUJmx7lTMILL05DPUnpUmnMb1Gyx5lbHzhSExc9re0cxEA354UUQKBS5HwHQcEBw9stMfsaForiBAUOocUKdGqlGP9cOXFoxdC9M+ff5FNstgbjPYSowb/JbATMlmCWKgH/bXXcTGCO10sk="
+  distributions: sdist
+  skip_existing: true
+  skip_cleanup: true
+  on:
+    repo: RRZE-HPC/OSACA
+    tag: true
\ No newline at end of file
diff --git a/MANIFEST.in b/MANIFEST.in
index bb68385..f4d516a 100644
--- a/MANIFEST.in
+++ b/MANIFEST.in
@@ -1,7 +1,7 @@
 include README.rst
 include LICENSE
 include tox.ini
-recursive-include osaca/data/ *.csv
+recursive-include osaca/data/ *.yml
 include examples/*
 recursive-include tests *.py *.out
 recursive-include tests/testfiles/ *
diff --git a/README.rst b/README.rst
index de7fbc4..348fb26 100644
--- a/README.rst
+++ b/README.rst
@@ -16,9 +16,15 @@ analysis and throughput prediction for a innermost loop kernel.
 .. image:: https://travis-ci.com/RRZE-HPC/OSACA.svg?token=393L6z2HEXNiGLtZ43s6&branch=master
     :target: https://travis-ci.com/RRZE-HPC/OSACA
 
-.. image:: https://landscape.io/github/RRZE-HPC/OSACA/master/landscape.svg?style=flat&badge_auth_token=c95f01b247f94bc79c09d21c5c827697
-   :target: https://landscape.io/github/RRZE-HPC/OSACA/master
-   :alt: Code Health
+.. ..image:: https://landscape.io/github/RRZE-HPC/OSACA/master/landscape.svg?style=flat&badge_auth_token=c95f01b247f94bc79c09d21c5c827697
+..   :target: https://landscape.io/github/RRZE-HPC/OSACA/master
+..   :alt: Code Health
+
+.. image:: https://codecov.io/github/RRZE-HPC/OSACA/coverage.svg?branch=master
+    :target: https://codecov.io/github/RRZE-HPC/OSACA?branch=master
+
+.. image:: https://img.shields.io/badge/code%20style-black-000000.svg
+    :target: https://github.com/ambv/black
 
 Getting started
 ===============
@@ -46,8 +52,7 @@ Dependencies:
 Additional requirements are:
 
 -  `Python3 <https://www.python.org/>`_
--  `pandas <http://pandas.pydata.org/>`_
--  `NumPy <http://www.numpy.org/>`_
+-  `Graphviz <https://www.graphviz.org/>`_ for dependency graph creation (minimal dependency is `libgraphviz-dev` on Ubuntu)
 -  `Kerncraft <https://github.com/RRZE-HPC/kerncraft>`_ for marker insertion
 -   `ibench <https://github.com/hofm/ibench>`_ for throughput/latency measurements
 
@@ -66,213 +71,169 @@ The usage of OSACA can be listed as:
 
 .. code:: bash
 
-    osaca [-h] [-V] [--arch ARCH] [--tp-list] [-i | --iaca | -m] FILEPATH
+    osaca [-h] [-V] [--arch ARCH] [--export-graph GRAPHNAME] FILEPATH
 
-- ``-h`` or ``--help`` prints out the help message.
-- ``-V`` or ``--version`` shows the program’s version number.
-- ``ARCH`` needs to be replaced with the wished architecture abbreviation. This flag is necessary for the throughput analysis (default function) and the inclusion of an ibench output (``-i``). Possible options are ``SNB``, ``IVB``, ``HSW``, ``BDW`` and ``SKL`` for the latest Intel micro architectures starting from Intel Sandy Bridge and ``ZEN`` for AMD Zen (17h family) architecture .
-- While in the throughput analysis mode, one can add ``--tp-list`` for printing the additional throughput list of the kernel or ``--iaca`` for letting OSACA to know it has to search for IACA binary markers.
-- ``-i`` or ``--include-ibench`` starts the integration of ibench output into the CSV data file determined by ``ARCH``.
-- With the flag ``-m`` or ``--insert-marker`` OSACA calls the Kerncraft module for the interactively insertion of `IACA <https://software.intel.com/en-us/articles/intel-architecture-code-analyzer>`_ marker in suggested assembly blocks.
-- ``FILEPATH`` describes the filepath to the file to work with and is always necessary
+-h, --help
+  prints out the help message.
+-V, --version
+  shows the program’s version number.
+--arch ARCH
+  needs to be replaced with the wished architecture abbreviation.
+  This flag is necessary for the throughput analysis (default function) and the inclusion of an ibench output (``-i``).
+  Possible options are ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKX`` and ``CSX`` for the latest Intel micro architectures starting from Intel Sandy Bridge and ``ZEN1`` for AMD Zen (17h family) architecture.
+  Furthermore, `VULCAN` for Marvell`s ARM-based ThunderX2 architecture is available.
+--insert-marker
+  OSACA calls the Kerncraft module for the interactively insertion of `IACA <https://software.intel.com/en-us/articles/intel-architecture-code-analyzer>`_ marker in suggested assembly blocks.
+--db-check
+  Run a sanity check on the by "--arch" specified database.
+  The output depends on the verbosity level.
+  Keep in mind you have to provide a (dummy) filename in anyway.
+--export-graph EXPORT_PATH
+  Output path for .dot file export. If "." is given, the file will be stored as "./osaca_dg.dot".
+  After the file was created, you can convert it to a PDF file using dot: `dot -Tpdf osaca_dg.dot -o osaca_dependency_graph.pdf`
+
+The **FILEPATH** describes the filepath to the file to work with and is always necessary
+
+______________________
 
 Hereinafter OSACA's scope of function will be described.
 
-Throughput analysis
-~~~~~~~~~~~~~~~~~~~
-As main functionality of OSACA this process starts by default. It is always necessary to specify the core architecture by the flag ``--arch ARCH``, where ``ARCH`` can stand for ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKL`` or ``ZEN``.
+Throughput & Latency analysis
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+As main functionality of OSACA this process starts by default. It is always necessary to specify the core architecture by the flag ``--arch ARCH``, where ``ARCH`` can stand for ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKX``, ``CSX``, ``ZEN`` or ``VULCAN``.
 
-For extracting the right kernel, one has to mark it beforehand. For this there are two different approaches:
+For extracting the right kernel, one has to mark it beforehand.
+Currently, only the detechtion of markers in the assembly code and therefore the analysis of assemly files is supported by OSACA.
 
-| **High level code**
+**Assembly code**
 
-The OSACA marker is ``//STARTLOOP`` and must be put in one line in front of the loop head, and the loop code must be indented consistently. This means the marker and the head must have the same indentation level while the whole loop body needs to be more indented than the code before and after. For instance, this is a valid OSACA marker:
-
-.. code-block:: c
-
-    int i = 0;
-    //STARTLOOP
-    while(i < N){
-        // do something...
-        i++;
-    }
-
-| **Assembly code**
-
-Another way for marking a kernel is to insert the IACA byte markers in the assembly file in before and after the loop.
+Marking a kernel means to insert the byte markers in the assembly file in before and after the loop.
 For this, the start marker has to be inserted right in front of the loop label and the end marker directly after the jump instruction.
-Start and end marker can be seen in the example below:
+For the convience of the user, in x86 assembly IACA byte markers are used.
+
+**x86 Byte Markers**
 
 .. code-block:: gas
 
-    movl    $111,%ebx       ;IACA START MARKER
-    .byte   100,103,144     ;IACA START MARKER
-    ; LABEL
-        ; do something
-        ; ...
-        ; conditional jump to LABEL
-    movl    $222,%ebx       ;IACA END MARKER
-    .byte   100,103,144     ;IACA END MARKER
+    movl    $111,%ebx       #IACA/OSACA START MARKER
+    .byte   100,103,144     #IACA/OSACA START MARKER
+    Loop:
+      # ...
+    movl    $222,%ebx       #IACA/OSACA END MARKER
+    .byte   100,103,144     #IACA/OSACA END MARKER
 
-The optional flag ``--iaca`` defines if OSACA needs to search for the IACA byte markers or the OSACA marker in the chosen file.
+**AArch64 Byte Markers**
 
-With an additional, optional ``--tp-list``, OSACA adds a simple list of all kernel instruction forms together with their reciprocal throughput to the output. This is helpful in case of no further information about the port binding of the single instruction forms.
+.. code-block:: asm
 
-Include new measurements into the data file
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-Running OSACA with the flag ``-i`` or ``--include-ibench`` and a specified micro architecture ``ARCH``, it
-takes the values given in an ibench output file and checks them for reasonability. If a value is not in the data file already, it will be added, otherwise OSACA prints out a warning message and keeps the old value in the data file. If a value does not pass the validation, a warning message is shown, however, OSACA will keep working with the new value.
-The handling of ibench is shortly described in the example section below.
+    mov x1, #111            // OSACA START
+    .byte 213,3,32,31       // OSACA START
+      \\ ...
+    mov x1, #222            // OSACA END
+    .byte 213,3,32,31       // OSACA END
+
+.. Include new measurements into the data file
+.. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.. Running OSACA with the flag ``-i`` or ``--include-ibench`` and a specified micro architecture ``ARCH``, it takes the values given in an ibench output file and checks them for reasonability. If a value is not in the data file already, it will be added, otherwise OSACA prints out a warning message and keeps the old value in the data file. If a value does not pass the validation, a warning message is shown, however, OSACA will keep working with the new value. The handling of ibench is shortly described in the example section below.
 
 Insert IACA markers
 ~~~~~~~~~~~~~~~~~~~
-Using the ``-m`` or ``--insert-marker`` flags for a given file, OSACA calls the implemented Kerncraft module for identifying and marking the inner-loop block in *manual mode*. More information about how this is done can be found in the `Kerncraft repository <https://github.com/RRZE-HPC/kerncraft>`_.
+Using the ``--insert-marker`` flags for a given file, OSACA calls the implemented Kerncraft module for identifying and marking the inner-loop block in *manual mode*. More information about how this is done can be found in the `Kerncraft repository <https://github.com/RRZE-HPC/kerncraft>`_.
+Note that this currrently only works for x86 loop kernels
 
 Example
 =======
-For clarifying the functionality of OSACA a sample kernel is analyzed for an Intel IVB core hereafter:
+For clarifying the functionality of OSACA a sample kernel is analyzed for an Intel CSX core hereafter:
 
 .. code-block:: c
 
     double a[N], double b[N];
     double s;
     
-    //STARTLOOP
+    // loop
     for(int i = 0; i < N; ++i)
         a[i] = s * b[i];
         
-The code shows a simple scalar multiplication of a vector ``b`` and a floating-point number ``s``. The result is
-written in vector ``a``.
-After including the OSACA marker ``//STARTLOOP`` and compiling the source, one can
-start the analysis typing 
+The code shows a simple scalar multiplication of a vector ``b`` and a floating-point number ``s``.
+The result is written in vector ``a``.
+After including the OSACA byte marker into the assembly, one can start the analysis typing 
 
 .. code:: bash
 
-    osaca --arch IVB PATH/TO/FILE
+    osaca --arch CSX PATH/TO/FILE
 
-in the command line. Optionally, one can create the assembly code out of the file, identify and mark the kernel of interest and run OSACA with the additional ``--iaca`` flag.
+in the command line.
 
 The output is:
 
 .. code-block::
 
+    Open Source Architecture Code Analyzer (OSACA) - v0.3
+    Analyzed file:      scale.s.csx.O3.s
+    Architecture:       csx
+    Timestamp:          2019-10-03 23:36:21
+
+     P - Throughput of LOAD operation can be hidden behind a past or future STORE instruction
+     * - Instruction micro-ops not bound to a port
+     X - No throughput/latency information for this instruction in data file
+
+
     Throughput Analysis Report
     --------------------------
-    P - Load operation can be hidden behind a past or future store instruction
-    X - No information for this instruction in database
-    * - Instruction micro-ops not bound to a port
-    
-    Port Binding in Cycles Per Iteration:
-    -------------------------------------------------
-    |  Port  |   0  |   1  |  2  |  3  |  4  |   5  |
-    -------------------------------------------------
-    | Cycles | 2.33 | 1.33 | 5.0 | 5.0 | 2.0 | 1.33 |
-    -------------------------------------------------
-             
-             Ports Pressure in cycles          
-    |  0   |  1   |  2   |  3   |  4   |  5   |
-    -------------------------------------------
-    |      |      | 0.50 | 0.50 | 1.00 |      | movl   $0x0,-0x24(%rbp)
-    |      |      |      |      |      |      | jmp    10b <scale+0x10b>
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x48(%rbp),%rax
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x24(%rbp),%edx
-    | 0.33 | 0.33 |      |      |      | 0.33 | movslq %edx,%rdx
-    |      |      | 0.50 | 0.50 |      |      | vmovsd (%rax,%rdx,8),%xmm0
-    | 1.00 |      | 0.50 | 0.50 |      |      | vmulsd -0x50(%rbp),%xmm0,%xmm0
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x38(%rbp),%rax
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x24(%rbp),%edx
-    | 0.33 | 0.33 |      |      |      | 0.33 | movslq %edx,%rdx
-    |      |      | 0.50 | 0.50 | 1.00 |      | vmovsd %xmm0,(%rax,%rdx,8)
-    |      |      |      |      |      |      | X addl   $0x1,-0x24(%rbp)
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x24(%rbp),%eax
-    | 0.33 | 0.33 | 0.50 | 0.50 |      | 0.33 | cmp    -0x54(%rbp),%eax
-    |      |      |      |      |      |      | jl     e4 <scale+0xe4>
-    | 0.33 | 0.33 |      |      |      | 0.33 | mov    %rcx,%rsp
-    Total number of estimated throughput: 5.0
+                                  Port pressure in cycles                              
+         |  0   - 0DV  |  1   |  2   -  2D  |  3   -  3D  |  4   |  5   |  6   |  7   |
+    -----------------------------------------------------------------------------------
+     170 |             |      |             |             |      |      |      |      |   .L22:
+     171 | 0.50        | 0.50 | 0.50   0.50 | 0.50   0.50 |      |      |      |      |   vmulpd	(%r12,%rax), %ymm1, %ymm0
+     172 |             |      | 0.50        | 0.50        | 1.00 |      |      |      |   vmovapd	%ymm0, 0(%r13,%rax)
+     173 | 0.25        | 0.25 |             |             |      | 0.25 | 0.25 |      |   addq	$32, %rax
+     174 | 0.25        | 0.25 |             |             |      | 0.25 | 0.25 |      |   cmpq	%rax, %r14
+     175 |             |      |             |             |      |      |      |      | * jne	.L22
+
+           1.00          1.00   1.00   0.50   1.00   0.50   1.00   0.50   0.50         
+
+
+    Latency Analysis Report
+    -----------------------
+     171 |  8.0 | | vmulpd	(%r12,%rax), %ymm1, %ymm0
+     172 |  5.0 | | vmovapd	%ymm0, 0(%r13,%rax)
+
+           13.0
+
+
+    Loop-Carried Dependencies Analysis Report
+    -----------------------------------------
+    173 |  1.0 | addq	$32, %rax                      | [173]
 
 It shows the whole kernel together with the average port pressure of each instruction form and the overall port binding.
-In the fifth to last line containing ``addl $0x1, -0x24(%rbp)`` one can see an ``X`` in front of the instruction form and no port occupation.
-This means either there are no measured values for this instruction form or no port binding is provided in the
-data file.
-In the first case, OSACA automatically creates two benchmark assembly files (``add-mem_imd.S`` for latency and ``add-mem_imd-TP.S`` for throughput) in the benchmark folder, if it not already exists there.
+Furthermore, the critical path of the loop kernel and all loop-carried dependencies, each with a list of line numbers being part of this dependency chain on the right.
 
-One can now run ibench to get the throughput value for addl with the given file. Mind that the assembly
-file, which is used for ibench, is implemented in Intel syntax. So for a valid run instruction ``addl`` must be
-changed to ``add`` manually.
+.. For measuring the instruction forms with ibench we highly recommend to use an exclusively allocated node, so there is no other workload falsifying the results. For the correct function of ibench the benchmark files from OSACA need to be placed in a subdirectory of src in root so ibench can create the a folder with the subdirectory’s name and the shared objects. For running the tests the frequencies of all cores must set to a constant value and this has to be given as an argument together with the directory of the shared objects to ibench, e.g.:
 
-For measuring the instruction forms with ibench we highly recommend to use an exclusively allocated node,
-so there is no other workload falsifying the results. For the correct function of ibench the benchmark files
-from OSACA need to be placed in a subdirectory of src in root so ibench can create the a folder with the
-subdirectory’s name and the shared objects. For running the tests the frequencies of all cores must set to a
-constant value and this has to be given as an argument together with the directory of the shared objects to
-ibench, e.g.:
-
-.. code:: bash
+.. .. code:: bash
 
     ./ibench ./AVX 2.2
     
-for running ibench in the directory ``AVX`` with a core frequency of 2.2 GHz.
-We get an output like:
+.. for running ibench in the directory ``AVX`` with a core frequency of 2.2 GHz. We get an output like:
 
-.. code:: bash
+.. .. code:: bash
 
     Using frequency 2.20GHz.
     add-mem_imd-TP: 1.023 (clock cycles) [DEBUG - result: 1.000000]
     add-mem_imd: 6.050 (clock cycles) [DEBUG - result: 1.000000]
     
-The debug output as resulting value of register ``xmm0`` is additional validation information depending on
-the executed instruction form meant for the user and is not considered by OSACA.
-The ibench output information can be included by OSACA running the program with the flag ``--include-ibench`` or just
-``-i`` and the specify micro architecture:
+.. The debug output as resulting value of register ``xmm0`` is additional validation information depending on the executed instruction form meant for the user and is not considered by OSACA. The ibench output information can be included by OSACA running the program with the flag ``--include-ibench`` or just ``-i`` and the specify micro architecture:
 
-.. code-block:: bash
+.. .. code-block:: bash
 
     osaca --arch IVB -i PATH/TO/IBENCH-OUTPUTFILE
 
-For now no automatic allocation of ports for a instruction form is implemented, so for getting an output in the Ports Pressure table, one must add the port occupation by hand.
-We know that the inserted instruction form must be assigned always to Port 2, 3 and 4 and additionally to either 0, 1 or 5, a valid data file therefore would look like this:
+.. For now no automatic allocation of ports for a instruction form is implemented, so for getting an output in the Ports Pressure table, one must add the port occupation by hand. We know that the inserted instruction form must be assigned always to Port 2, 3 and 4 and additionally to either 0, 1 or 5, a valid data file therefore would look like this:
 
-.. code:: bash
+.. .. code:: bash
 
     addl-mem_imd,1.0,6.0,"(0.33,0.33,1.00,1.00,1.00,0.33)"
     
-Another throughput analysis with OSACA now returns all information for the kernel:
-
-.. code-block::
-
-    Throughput Analysis Report
-    --------------------------
-    P - Load operation can be hidden behind a past or future store instruction
-    X - No information for this instruction in database
-    * - Instruction micro-ops not bound to a port
-    
-    Port Binding in Cycles Per Iteration:
-    -------------------------------------------------
-    |  Port  |   0  |   1  |  2  |  3  |  4  |   5  |
-    -------------------------------------------------
-    | Cycles | 2.67 | 1.67 | 6.0 | 6.0 | 3.0 | 1.67 |
-    -------------------------------------------------
-             
-             Ports Pressure in cycles          
-    |  0   |  1   |  2   |  3   |  4   |  5   |
-    -------------------------------------------
-    |      |      | 0.50 | 0.50 | 1.00 |      | movl   $0x0,-0x24(%rbp)
-    |      |      |      |      |      |      | jmp    10b <scale+0x10b>
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x48(%rbp),%rax
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x24(%rbp),%edx
-    | 0.33 | 0.33 |      |      |      | 0.33 | movslq %edx,%rdx
-    |      |      | 0.50 | 0.50 |      |      | vmovsd (%rax,%rdx,8),%xmm0
-    | 1.00 |      | 0.50 | 0.50 |      |      | vmulsd -0x50(%rbp),%xmm0,%xmm0
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x38(%rbp),%rax
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x24(%rbp),%edx
-    | 0.33 | 0.33 |      |      |      | 0.33 | movslq %edx,%rdx
-    |      |      | 0.50 | 0.50 | 1.00 |      | vmovsd %xmm0,(%rax,%rdx,8)
-    | 0.33 | 0.33 | 1.00 | 1.00 | 1.00 | 0.33 | addl   $0x1,-0x24(%rbp)
-    |      |      | 0.50 | 0.50 |      |      | mov    -0x24(%rbp),%eax
-    | 0.33 | 0.33 | 0.50 | 0.50 |      | 0.33 | cmp    -0x54(%rbp),%eax
-    |      |      |      |      |      |      | jl     e4 <scale+0xe4>
-    | 0.33 | 0.33 |      |      |      | 0.33 | mov    %rcx,%rsp
-    Total number of estimated throughput: 6.0
 
 Credits
 =======
diff --git a/doc/osaca-workflow.png b/doc/osaca-workflow.png
index 1d883b8..0426117 100644
Binary files a/doc/osaca-workflow.png and b/doc/osaca-workflow.png differ
diff --git a/examples/2d-5pt-ivb-iaca.S b/examples/2d-5pt-ivb-iaca.S
deleted file mode 100644
index 7e90401..0000000
--- a/examples/2d-5pt-ivb-iaca.S
+++ /dev/null
@@ -1,286 +0,0 @@
-# mark_description "Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 17.0.5.239 Build 20170817";
-# mark_description "-fno-alias -O3 -fopenmp -xCORE-AVX-I -S -o 2d.S";
-	.file "2d-5pt.c"
-	.text
-..TXTST0:
-# -- Begin  jacobi2D5pt
-	.text
-# mark_begin;
-       .align    16,0x90
-	.globl jacobi2D5pt
-# --- jacobi2D5pt(int, int)
-jacobi2D5pt:
-# parameter 1: %edi
-# parameter 2: %esi
-..B1.1:                         # Preds ..B1.0
-                                # Execution count [1.00e+00]
-	.cfi_startproc
-..___tag_value_jacobi2D5pt.1:
-..L2:
-                                                          #2.31
-        pushq     %rbx                                          #2.31
-	.cfi_def_cfa_offset 16
-        movq      %rsp, %rbx                                    #2.31
-	.cfi_def_cfa 3, 16
-	.cfi_offset 3, -16
-        andq      $-32, %rsp                                    #2.31
-        pushq     %rbp                                          #2.31
-        pushq     %rbp                                          #2.31
-        movq      8(%rbx), %rbp                                 #2.31
-        movq      %rbp, 8(%rsp)                                 #2.31
-        movq      %rsp, %rbp                                    #2.31
-	.cfi_escape 0x10, 0x06, 0x02, 0x76, 0x00
-        pushq     %r13                                          #2.31
-        pushq     %r14                                          #2.31
-        pushq     %r15                                          #2.31
-        subq      $88, %rsp                                     #2.31
-        movslq    %esi, %rsi                                    #2.31
-        movslq    %edi, %rcx                                    #2.31
-	.cfi_escape 0x10, 0x0d, 0x02, 0x76, 0x78
-	.cfi_escape 0x10, 0x0e, 0x02, 0x76, 0x70
-	.cfi_escape 0x10, 0x0f, 0x02, 0x76, 0x68
-        movq      %rsi, %r13                                    #4.17
-        imulq     %rcx, %r13                                    #4.17
-        shlq      $3, %r13                                      #4.12
-        movq      %r13, %rax                                    #4.12
-        addq      $31, %rax                                     #4.12
-        andq      $-32, %rax                                    #4.12
-        subq      %rax, %rsp                                    #4.12
-        movq      %rsp, %rax                                    #4.12
-                                # LOE rax rcx rsi r12 r13 edi
-..B1.29:                        # Preds ..B1.1
-                                # Execution count [1.00e+00]
-        movq      %rax, %r14                                    #4.12
-                                # LOE rcx rsi r12 r13 r14 edi
-..B1.2:                         # Preds ..B1.29
-                                # Execution count [1.00e+00]
-        movq      %r13, %rax                                    #5.12
-        addq      $31, %rax                                     #5.12
-        andq      $-32, %rax                                    #5.12
-        subq      %rax, %rsp                                    #5.12
-        movq      %rsp, %rax                                    #5.12
-                                # LOE rax rcx rsi r12 r13 r14 edi
-..B1.30:                        # Preds ..B1.2
-                                # Execution count [1.00e+00]
-        movq      %rax, %r15                                    #5.12
-                                # LOE rcx rsi r12 r13 r14 r15 edi
-..B1.3:                         # Preds ..B1.30
-                                # Execution count [1.00e+00]
-        xorl      %r10d, %r10d                                  #9.5
-        lea       (%r15,%rcx,8), %r11                           #13.13
-        vxorpd    %xmm1, %xmm1, %xmm1                           #6.5
-        lea       (%r14,%rcx,8), %rdx                           #13.37
-        cmpq      $2, %rsi                                      #9.18
-        jle       ..B1.21       # Prob 9%                       #9.18
-                                # LOE rdx rcx rsi r10 r11 r12 r13 r14 r15 edi xmm1
-..B1.4:                         # Preds ..B1.3
-                                # Execution count [9.00e-01]
-        addl      $-2, %edi                                     #12.9
-        movq      %rcx, %r9                                     #13.61
-        movl      %edi, %eax                                    #12.9
-        addq      $-2, %rsi                                     #9.18
-        andl      $-16, %eax                                    #12.9
-        xorl      %r8d, %r8d                                    #9.5
-        shlq      $4, %r9                                       #13.61
-        movslq    %eax, %rax                                    #12.9
-        addq      %r14, %r9                                     #13.61
-        movslq    %edi, %rdi                                    #12.9
-        vxorps    %ymm0, %ymm0, %ymm0                           #6.5
-        movq      %rax, -80(%rbp)                               #12.9[spill]
-        movq      %rdi, -88(%rbp)                               #12.9[spill]
-        movl      %eax, -72(%rbp)                               #9.5[spill]
-        movq      %rsi, -48(%rbp)                               #9.5[spill]
-        movq      %rdx, -64(%rbp)                               #9.5[spill]
-        movq      %r15, -96(%rbp)                               #9.5[spill]
-        movq      %r14, -56(%rbp)                               #9.5[spill]
-        movq      %r13, -104(%rbp)                              #9.5[spill]
-        movq      %r12, -112(%rbp)                              #9.5[spill]
-	.cfi_escape 0x10, 0x0c, 0x03, 0x76, 0x90, 0x7f
-                                # LOE rcx r8 r9 r10 r11 edi xmm1 ymm0
-..B1.5:                         # Preds ..B1.19 ..B1.4
-                                # Execution count [5.00e+00]
-        cmpq      $2, %rcx                                      #12.22
-        jle       ..B1.19       # Prob 50%                      #12.22
-                                # LOE rcx r8 r9 r10 r11 edi xmm1 ymm0
-..B1.6:                         # Preds ..B1.5
-                                # Execution count [4.50e+00]
-        cmpl      $16, %edi                                     #12.9
-        jl        ..B1.26       # Prob 10%                      #12.9
-                                # LOE rcx r8 r9 r10 r11 edi xmm1 ymm0
-..B1.7:                         # Preds ..B1.6
-                                # Execution count [4.50e+00]
-        movl      -72(%rbp), %r14d                              #12.9[spill]
-        xorl      %edx, %edx                                    #12.9
-        movq      -80(%rbp), %r12                               #13.13[spill]
-        lea       (%r11,%r8), %rax                              #13.13
-                                # LOE rax rdx rcx r8 r9 r10 r11 r12 edi r14d xmm1 ymm0
-..B1.8:                         # Preds ..B1.8 ..B1.7
-                                # Execution count [2.50e+01]
-        vmovupd   %ymm0, 8(%rax,%rdx,8)                         #13.13
-        vmovupd   %ymm0, 40(%rax,%rdx,8)                        #13.13
-        vmovupd   %ymm0, 72(%rax,%rdx,8)                        #13.13
-        vmovupd   %ymm0, 104(%rax,%rdx,8)                       #13.13
-        addq      $16, %rdx                                     #12.9
-        cmpq      %r12, %rdx                                    #12.9
-        jb        ..B1.8        # Prob 82%                      #12.9
-                                # LOE rax rdx rcx r8 r9 r10 r11 r12 edi r14d xmm1 ymm0
-..B1.10:                        # Preds ..B1.8 ..B1.26
-                                # Execution count [5.00e+00]
-        lea       1(%r14), %eax                                 #12.9
-        cmpl      %edi, %eax                                    #12.9
-        ja        ..B1.19       # Prob 50%                      #12.9
-                                # LOE rcx r8 r9 r10 r11 edi r14d xmm1 ymm0
-..B1.11:                        # Preds ..B1.10
-                                # Execution count [4.50e+00]
-        movslq    %r14d, %r14                                   #12.9
-        movq      -88(%rbp), %r13                               #12.9[spill]
-        subq      %r14, %r13                                    #12.9
-        cmpq      $4, %r13                                      #12.9
-        jl        ..B1.25       # Prob 10%                      #12.9
-                                # LOE rcx r8 r9 r10 r11 r13 r14 edi xmm1 ymm0
-..B1.12:                        # Preds ..B1.11
-                                # Execution count [4.50e+00]
-        movl      %r13d, %r15d                                  #12.9
-        lea       (%r11,%r8), %rax                              #13.13
-        andl      $-4, %r15d                                    #12.9
-        xorl      %edx, %edx                                    #12.9
-        movslq    %r15d, %r15                                   #12.9
-        lea       (%rax,%r14,8), %rax                           #13.13
-                                # LOE rax rdx rcx r8 r9 r10 r11 r13 r14 r15 edi xmm1 ymm0
-..B1.13:                        # Preds ..B1.13 ..B1.12
-                                # Execution count [2.50e+01]
-        vmovupd   %ymm0, 8(%rax,%rdx,8)                         #13.13
-        addq      $4, %rdx                                      #12.9
-        cmpq      %r15, %rdx                                    #12.9
-        jb        ..B1.13       # Prob 82%                      #12.9
-                                # LOE rax rdx rcx r8 r9 r10 r11 r13 r14 r15 edi xmm1 ymm0
-..B1.15:                        # Preds ..B1.13 ..B1.25
-                                # Execution count [5.00e+00]
-        cmpq      %r13, %r15                                    #12.9
-        jae       ..B1.19       # Prob 10%                      #12.9
-                                # LOE rcx r8 r9 r10 r11 r13 r14 r15 edi xmm1 ymm0
-..B1.16:                        # Preds ..B1.15
-                                # Execution count [4.50e+00]
-        movq      -56(%rbp), %rax                               #13.49[spill]
-        lea       (%r11,%r8), %r12                              #13.13
-        movq      -64(%rbp), %rsi                               #13.25[spill]
-        lea       (%r9,%r8), %rdx                               #13.61
-        lea       (%r12,%r14,8), %r12                           #13.13
-        addq      %r8, %rax                                     #13.49
-        addq      %r8, %rsi                                     #13.25
-        lea       (%rdx,%r14,8), %rdx                           #13.61
-        lea       (%rax,%r14,8), %rax                           #13.49
-        lea       (%rsi,%r14,8), %r14                           #13.25
-                                # LOE rax rdx rcx r8 r9 r10 r11 r12 r13 r14 r15 edi xmm1 ymm0
-        movl      $111, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     100        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     103        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     144        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-..B1.17:                        # Preds ..B1.17 ..B1.16
-                                # Execution count [2.50e+01]
-        vmovsd    (%r14,%r15,8), %xmm2                          #13.25
-        vaddsd    16(%r14,%r15,8), %xmm2, %xmm3                 #13.37
-        vaddsd    8(%rax,%r15,8), %xmm3, %xmm4                  #13.49
-        vaddsd    8(%rdx,%r15,8), %xmm4, %xmm5                  #13.61
-        vmulsd    %xmm5, %xmm1, %xmm6                           #13.74
-        vmovsd    %xmm6, 8(%r12,%r15,8)                         #13.13
-        incq      %r15                                          #12.9
-        cmpq      %r13, %r15                                    #12.9
-        jb        ..B1.17       # Prob 82%                      #12.9
-        movl      $222, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     100        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     103        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     144        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-                                # LOE rax rdx rcx r8 r9 r10 r11 r12 r13 r14 r15 edi xmm1 ymm0
-..B1.19:                        # Preds ..B1.17 ..B1.5 ..B1.10 ..B1.15
-                                # Execution count [5.00e+00]
-        incq      %r10                                          #9.5
-        lea       (%r8,%rcx,8), %r8                             #9.5
-        cmpq      -48(%rbp), %r10                               #9.5[spill]
-        jb        ..B1.5        # Prob 82%                      #9.5
-                                # LOE rcx r8 r9 r10 r11 edi xmm1 ymm0
-..B1.20:                        # Preds ..B1.19
-                                # Execution count [9.00e-01]
-        movq      -64(%rbp), %rdx                               #[spill]
-        movq      -96(%rbp), %r15                               #[spill]
-        movq      -56(%rbp), %r14                               #[spill]
-        movq      -104(%rbp), %r13                              #[spill]
-        movq      -112(%rbp), %r12                              #[spill]
-	.cfi_restore 12
-                                # LOE rdx r11 r12 r13 r14 r15
-..B1.21:                        # Preds ..B1.3 ..B1.20
-                                # Execution count [1.00e+00]
-        addq      $8, %rdx                                      #16.5
-        addq      $8, %r11                                      #16.5
-        movq      %rdx, %rdi                                    #16.5
-        movq      %r11, %rsi                                    #16.5
-        vzeroupper                                              #16.5
-..___tag_value_jacobi2D5pt.12:
-#       dummy(double *, double *)
-        call      dummy                                         #16.5
-..___tag_value_jacobi2D5pt.13:
-                                # LOE r12 r13 r14 r15
-..B1.22:                        # Preds ..B1.21
-                                # Execution count [1.00e+00]
-        movq      %r15, %rdx                                    #16.5
-        movq      %r13, %rax                                    #16.5
-        addq      $31, %rax                                     #16.5
-        andq      $-32, %rax                                    #16.5
-        addq      %rax, %rsp                                    #16.5
-                                # LOE r12 r13 r14
-..B1.23:                        # Preds ..B1.22
-                                # Execution count [1.00e+00]
-        movq      %r14, %rdx                                    #16.5
-        movq      %r13, %rax                                    #16.5
-        addq      $31, %rax                                     #16.5
-        andq      $-32, %rax                                    #16.5
-        addq      %rax, %rsp                                    #16.5
-                                # LOE r12
-..B1.24:                        # Preds ..B1.23
-                                # Execution count [1.00e+00]
-        lea       -24(%rbp), %rsp                               #17.1
-	.cfi_restore 15
-        popq      %r15                                          #17.1
-	.cfi_restore 14
-        popq      %r14                                          #17.1
-	.cfi_restore 13
-        popq      %r13                                          #17.1
-        popq      %rbp                                          #17.1
-	.cfi_restore 6
-        movq      %rbx, %rsp                                    #17.1
-        popq      %rbx                                          #17.1
-	.cfi_def_cfa 7, 8
-	.cfi_restore 3
-        ret                                                     #17.1
-	.cfi_def_cfa 3, 16
-	.cfi_offset 3, -16
-	.cfi_escape 0x10, 0x06, 0x02, 0x76, 0x00
-	.cfi_escape 0x10, 0x0c, 0x03, 0x76, 0x90, 0x7f
-	.cfi_escape 0x10, 0x0d, 0x02, 0x76, 0x78
-	.cfi_escape 0x10, 0x0e, 0x02, 0x76, 0x70
-	.cfi_escape 0x10, 0x0f, 0x02, 0x76, 0x68
-                                # LOE
-..B1.25:                        # Preds ..B1.11
-                                # Execution count [4.50e-01]: Infreq
-        xorl      %r15d, %r15d                                  #12.9
-        jmp       ..B1.15       # Prob 100%                     #12.9
-                                # LOE rcx r8 r9 r10 r11 r13 r14 r15 edi xmm1 ymm0
-..B1.26:                        # Preds ..B1.6
-                                # Execution count [4.50e-01]: Infreq
-        xorl      %r14d, %r14d                                  #12.9
-        jmp       ..B1.10       # Prob 100%                     #12.9
-        .align    16,0x90
-                                # LOE rcx r8 r9 r10 r11 edi r14d xmm1 ymm0
-	.cfi_endproc
-# mark_end;
-	.type	jacobi2D5pt,@function
-	.size	jacobi2D5pt,.-jacobi2D5pt
-	.data
-# -- End  jacobi2D5pt
-	.data
-	.section .note.GNU-stack, ""
-// -- Begin DWARF2 SEGMENT .eh_frame
-	.section .eh_frame,"a",@progbits
-.eh_frame_seg:
-	.align 8
-# End
diff --git a/examples/2d-5pt.c b/examples/2d-5pt.c
deleted file mode 100644
index 2935540..0000000
--- a/examples/2d-5pt.c
+++ /dev/null
@@ -1,16 +0,0 @@
-
-void jacobi2D5pt(int N, int M){
-    void dummy(double*, double*);
-    double a[M][N];
-    double b[M][N];
-    double s;
-
-    for(int j=1; j<M-1; ++j){
-        #pragma vector aligned
-        //STARTLOOP
-        for(int i=1; i<N-1; ++i){
-            b[j][i] = ( a[j][i-1] + a[j][i+1] + a[j-1][i] + a[j+1][i]) * s;
-        }
-    }   
-    dummy(&a[1][1], &b[1][1]);
-}
diff --git a/examples/daxpy.c b/examples/daxpy.c
deleted file mode 100644
index 0d4765b..0000000
--- a/examples/daxpy.c
+++ /dev/null
@@ -1,13 +0,0 @@
-
-void daxpy(int N){
-    void dummy(double*, double*);
-    double a[N], b[N];
-    double s;
-
-    //STARTLOOP  
-    for(int i=0; i<N; ++i)
-            a[i] = a[i] + s * b[i];
-
-    dummy(&a[1], &b[1]);
-}
-
diff --git a/examples/scale.c b/examples/scale.c
deleted file mode 100644
index 08d679e..0000000
--- a/examples/scale.c
+++ /dev/null
@@ -1,13 +0,0 @@
-
-void scale(int N){
-    void dummy(double*, double*);
-    double a[N], b[N];
-    double s;
-    
-    //STARTLOOP
-    for(int i=0; i<N; ++i){
-            a[i] = s * b[i];
-    }
-
-    dummy(&a[1],&b[1]);
-}
diff --git a/examples/taxCalc-ivb b/examples/taxCalc-ivb
deleted file mode 100755
index d2c1c63..0000000
Binary files a/examples/taxCalc-ivb and /dev/null differ
diff --git a/examples/taxCalc-ivb-iaca b/examples/taxCalc-ivb-iaca
deleted file mode 100644
index 8d3bf79..0000000
Binary files a/examples/taxCalc-ivb-iaca and /dev/null differ
diff --git a/examples/taxCalc-ivb-iaca.S b/examples/taxCalc-ivb-iaca.S
deleted file mode 100644
index 9a12435..0000000
--- a/examples/taxCalc-ivb-iaca.S
+++ /dev/null
@@ -1,199 +0,0 @@
-# mark_description "Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 16.0.3.210 Build 20160415";
-# mark_description "-I../../iaca-lin64/include -fno-alias -O3 -fopenmp -xCORE-AVX-I -S -o ivb-asm.S";
-	.file "taxCalc.c"
-	.text
-..TXTST0:
-# -- Begin  main
-	.text
-# mark_begin;
-       .align    16,0x90
-	.globl main
-# --- main(void)
-main:
-..B1.1:                         # Preds ..B1.0
-	.cfi_startproc
-..___tag_value_main.1:
-..L2:
-                                                          #4.15
-        pushq     %rbp                                          #4.15
-	.cfi_def_cfa_offset 16
-        movq      %rsp, %rbp                                    #4.15
-	.cfi_def_cfa 6, 16
-	.cfi_offset 6, -16
-        andq      $-128, %rsp                                   #4.15
-        subq      $4096, %rsp                                   #4.15
-        movl      $104446, %esi                                 #4.15
-        movl      $3, %edi                                      #4.15
-        call      __intel_new_feature_proc_init                 #4.15
-                                # LOE rbx r12 r13 r14 r15
-..B1.10:                        # Preds ..B1.1
-        vstmxcsr  (%rsp)                                        #4.15
-        movl      $.2.3_2_kmpc_loc_struct_pack.3, %edi          #4.15
-        xorl      %esi, %esi                                    #4.15
-        orl       $32832, (%rsp)                                #4.15
-        xorl      %eax, %eax                                    #4.15
-        vldmxcsr  (%rsp)                                        #4.15
-..___tag_value_main.6:
-        call      __kmpc_begin                                  #4.15
-..___tag_value_main.7:
-                                # LOE rbx r12 r13 r14 r15
-..B1.2:                         # Preds ..B1.10
-        movl      $il0_peep_printf_format_0, %edi               #5.5
-        call      puts                                          #5.5
-                                # LOE rbx r12 r13 r14 r15
-..B1.3:                         # Preds ..B1.2
-        vmovss    .L_2il0floatpacket.0(%rip), %xmm0             #8.15
-        xorl      %eax, %eax                                    #11.5
-        vxorps    %xmm1, %xmm1, %xmm1                           #9.5
-        vmovss    %xmm1, (%rsp)                                 #9.5
-
-        movl $111,%ebx          #IACA START
-        .byte 100,103,144       #IACA START
-                                # LOE rax rbx r12 r13 r14 r15 xmm0 xmm1
-
-..B1.4:                         # Preds ..B1.4 ..B1.3
-        lea       1(%rax,%rax), %edx                            #12.9
-        vcvtsi2ss %edx, %xmm2, %xmm2                            #12.27
-        vmulss    %xmm2, %xmm0, %xmm3                           #12.29
-        lea       2(%rax,%rax), %ecx                            #12.9
-        vaddss    %xmm3, %xmm1, %xmm4                           #12.29
-        vxorps    %xmm1, %xmm1, %xmm1                           #12.27
-        vcvtsi2ss %ecx, %xmm1, %xmm1                            #12.27
-        vmulss    %xmm1, %xmm0, %xmm5                           #12.29
-        vmovss    %xmm4, 4(%rsp,%rax,8)                         #12.9
-        vaddss    %xmm5, %xmm4, %xmm1                           #12.29
-        vmovss    %xmm1, 8(%rsp,%rax,8)                         #12.9
-        incq      %rax                                          #11.5
-        cmpq      $499, %rax                                    #11.5
-        jb        ..B1.4        # Prob 99%                      #11.5
-
-        movl $222,%ebx          #IACA END
-        .byte 100,103,144       #IACA END
-
-                                # LOE rax rbx r12 r13 r14 r15 xmm0 xmm1
-..B1.5:                         # Preds ..B1.4
-        vmovss    3992(%rsp), %xmm0                             #12.18
-        movl      $il0_peep_printf_format_1, %edi               #15.5
-        vaddss    .L_2il0floatpacket.1(%rip), %xmm0, %xmm1      #12.29
-        vmovss    %xmm1, 3996(%rsp)                             #12.9
-        call      puts                                          #15.5
-                                # LOE rbx r12 r13 r14 r15
-..B1.6:                         # Preds ..B1.5
-        movl      $.2.3_2_kmpc_loc_struct_pack.14, %edi         #16.12
-        xorl      %eax, %eax                                    #16.12
-..___tag_value_main.8:
-        call      __kmpc_end                                    #16.12
-..___tag_value_main.9:
-                                # LOE rbx r12 r13 r14 r15
-..B1.7:                         # Preds ..B1.6
-        xorl      %eax, %eax                                    #16.12
-        movq      %rbp, %rsp                                    #16.12
-        popq      %rbp                                          #16.12
-	.cfi_def_cfa 7, 8
-	.cfi_restore 6
-        ret                                                     #16.12
-        .align    16,0x90
-	.cfi_endproc
-                                # LOE
-# mark_end;
-	.type	main,@function
-	.size	main,.-main
-	.data
-	.align 4
-	.align 4
-.2.3_2_kmpc_loc_struct_pack.3:
-	.long	0
-	.long	2
-	.long	0
-	.long	0
-	.quad	.2.3_2__kmpc_loc_pack.2
-	.align 4
-.2.3_2__kmpc_loc_pack.2:
-	.byte	59
-	.byte	117
-	.byte	110
-	.byte	107
-	.byte	110
-	.byte	111
-	.byte	119
-	.byte	110
-	.byte	59
-	.byte	109
-	.byte	97
-	.byte	105
-	.byte	110
-	.byte	59
-	.byte	52
-	.byte	59
-	.byte	52
-	.byte	59
-	.byte	59
-	.space 1, 0x00 	# pad
-	.align 4
-.2.3_2_kmpc_loc_struct_pack.14:
-	.long	0
-	.long	2
-	.long	0
-	.long	0
-	.quad	.2.3_2__kmpc_loc_pack.13
-	.align 4
-.2.3_2__kmpc_loc_pack.13:
-	.byte	59
-	.byte	117
-	.byte	110
-	.byte	107
-	.byte	110
-	.byte	111
-	.byte	119
-	.byte	110
-	.byte	59
-	.byte	109
-	.byte	97
-	.byte	105
-	.byte	110
-	.byte	59
-	.byte	49
-	.byte	54
-	.byte	59
-	.byte	49
-	.byte	54
-	.byte	59
-	.byte	59
-	.section .rodata.str1.4, "aMS",@progbits,1
-	.align 4
-	.align 4
-il0_peep_printf_format_0:
-	.long	1128354639
-	.long	1702109249
-	.long	1931506803
-	.long	1953653108
-	.byte	0
-	.space 3, 0x00 	# pad
-	.align 4
-il0_peep_printf_format_1:
-	.long	1128354639
-	.long	1702109249
-	.long	1696625779
-	.word	25710
-	.byte	0
-	.data
-# -- End  main
-	.section .rodata, "a"
-	.align 4
-	.align 4
-.L_2il0floatpacket.0:
-	.long	0x3e428f5c
-	.type	.L_2il0floatpacket.0,@object
-	.size	.L_2il0floatpacket.0,4
-	.align 4
-.L_2il0floatpacket.1:
-	.long	0x433dcf5c
-	.type	.L_2il0floatpacket.1,@object
-	.size	.L_2il0floatpacket.1,4
-	.data
-	.section .note.GNU-stack, ""
-// -- Begin DWARF2 SEGMENT .eh_frame
-	.section .eh_frame,"a",@progbits
-.eh_frame_seg:
-	.align 8
-# End
diff --git a/examples/taxCalc.c b/examples/taxCalc.c
deleted file mode 100644
index c2c72b2..0000000
--- a/examples/taxCalc.c
+++ /dev/null
@@ -1,18 +0,0 @@
-#include <stdio.h>
-//#include "iacaMarks.h"
-
-int main(void){
-    printf("OSACA test start\n");
-    int i = 1;
-    float arr[1000];
-    float tax = 0.19;
-    arr[0] = 0;
-    //STARTLOOP
-    while(i < 1000){
-        arr[i] = arr[i-1]+i*tax;
-        i += 1;
-    }
-
-    printf("OSACA test end\n");
-    return 0;
-}
diff --git a/examples/triad.c b/examples/triad.c
deleted file mode 100644
index 2a73520..0000000
--- a/examples/triad.c
+++ /dev/null
@@ -1,12 +0,0 @@
-
-void triad(int N){
-    void dummy(double*);
-    double a[N], b[N], c[N], d[N];
-    double s;
-
-    //STARTLOOP
-    for(int i=0; i<N; ++i)
-        a[i] = b[i] + c[i] * d[i];
-    
-    dummy(&a[1]);
-}
diff --git a/osaca/__init__.py b/osaca/__init__.py
index c5e0457..94bec96 100644
--- a/osaca/__init__.py
+++ b/osaca/__init__.py
@@ -1,2 +1,10 @@
+"""Open Source Architecture Code Analyzer"""
 name = 'osaca'
-__version__ = '0.2.2'
+__version__ = '0.3.1.dev1'
+
+# To trigger travis deployment to pypi, do the following:
+# 1. Increment __version___
+# 2. commit to RRZE-HPC/osaca's master branch
+# 3. wait for travis to complete successful (unless already tested)
+# 4. tag commit with 'v{}'.format(__version__) (`git tag vX.Y.Z`)
+# 5. push tag to github (`git push origin vX.Y.Z` or push all tags with `git push --tags`)
diff --git a/osaca/api/__init__.py b/osaca/api/__init__.py
new file mode 100644
index 0000000..ec3d818
--- /dev/null
+++ b/osaca/api/__init__.py
@@ -0,0 +1,8 @@
+"""
+APIs for handling interfaces to kerncraft, etc.
+
+Only the classes below will be exported, so please add new semantic tools to __all__.
+"""
+from .kerncraft_interface import KerncraftAPI
+
+__all__ = ['KerncraftAPI']
diff --git a/osaca/api/kerncraft_interface.py b/osaca/api/kerncraft_interface.py
new file mode 100755
index 0000000..e31ddac
--- /dev/null
+++ b/osaca/api/kerncraft_interface.py
@@ -0,0 +1,80 @@
+#!/usr/bin/env python3
+
+import collections
+import sys
+from io import StringIO
+
+from osaca.frontend import Frontend
+from osaca.parser import ParserAArch64v81, ParserX86ATT
+from osaca.semantics import (INSTR_FLAGS, KernelDG, MachineModel,
+                             SemanticsAppender, reduce_to_section)
+
+
+# Stolen from https://stackoverflow.com/a/16571630
+class Capturing(list):
+    def __enter__(self):
+        self._stdout = sys.stdout
+        sys.stdout = self._stringio = StringIO()
+        return self
+
+    def __exit__(self, *args):
+        self.extend(self._stringio.getvalue().splitlines())
+        del self._stringio    # free up some memory
+        sys.stdout = self._stdout
+
+
+class KerncraftAPI(object):
+    def __init__(self, arch, code):
+        self.machine_model = MachineModel(arch=arch)
+        self.semantics = SemanticsAppender(self.machine_model)
+        isa = self.machine_model.get_ISA().lower()
+        if isa == 'aarch64':
+            self.parser = ParserAArch64v81()
+        elif isa == 'x86':
+            self.parser = ParserX86ATT()
+
+        parsed_code = self.parser.parse_file(code)
+        self.kernel = reduce_to_section(parsed_code, self.machine_model.get_ISA())
+        self.semantics.add_semantics(self.kernel)
+
+    def create_output(self, verbose=False):
+        kernel_graph = KernelDG(self.kernel, self.parser, self.machine_model)
+        frontend = Frontend(arch=self.machine_model.get_arch())
+        with Capturing() as output:
+            frontend.print_full_analysis(self.kernel, kernel_graph, verbose=verbose)
+        return '\n'.join(output)
+
+    def get_unmatched_instruction_ratio(self):
+        unmatched_counter = 0
+        for instruction in self.kernel:
+            if (
+                INSTR_FLAGS.TP_UNKWN in instruction['flags']
+                and INSTR_FLAGS.LT_UNKWN in instruction['flags']
+            ):
+                unmatched_counter += 1
+        return unmatched_counter / len(self.kernel)
+
+    def get_port_occupation_cycles(self):
+        throughput_values = self.semantics.get_throughput_sum(self.kernel)
+        port_names = self.machine_model['ports']
+        return collections.OrderedDict(list(zip(port_names, throughput_values)))
+
+    def get_total_throughput(self):
+        return max(self.semantics.get_throughput_sum(self.kernel))
+
+    def get_latency(self):
+        return (self.get_lcd(), self.get_cp())
+
+    def get_cp(self):
+        kernel_graph = KernelDG(self.kernel, self.parser, self.machine_model)
+        kernel_cp = kernel_graph.get_critical_path()
+        return sum([x['latency_cp'] for x in kernel_cp])
+
+    def get_lcd(self):
+        kernel_graph = KernelDG(self.kernel, self.parser, self.machine_model)
+        lcd_dict = kernel_graph.get_loopcarried_dependencies()
+        lcd = 0.0
+        for dep in lcd_dict:
+            lcd_tmp = sum([x['latency_lcd'] for x in lcd_dict[dep]['dependencies']])
+            lcd = lcd_tmp if lcd_tmp > lcd else lcd
+        return lcd
diff --git a/osaca/create_testcase.py b/osaca/create_testcase.py
deleted file mode 100755
index a7f6578..0000000
--- a/osaca/create_testcase.py
+++ /dev/null
@@ -1,41 +0,0 @@
-#!/usr/bin/env python3
-
-from param import Register, MemAddr, Parameter
-from testcase import Testcase
-
-# Choose out of various operands
-reg8 = Register('al')
-reg16 = Register('ax')
-reg32 = Register('eax')
-reg64 = Register('rax')
-xmm = Register('xmm0')
-ymm = Register('ymm0')
-zmm = Register('zmm0')
-mem0 = MemAddr('(%rax, %esi, 4)')
-imd1 = Parameter('IMD')
-
-
-# -----------------------------------------------
-# -USER INPUT------------------------------------
-# -----------------------------------------------
-#  Enter your mnemonic
-mnemonic = 'add'
-
-# Define your operands. If you don't need it, just type in None
-dst = mem0
-op1 = imd1
-op2 = None
-
-# Define the number of instructions per loop (default: 12)
-per_loop = '32'
-
-# -----------------------------------------------
-# -----------------------------------------------
-
-# Start
-operands = [x for x in [dst, op1, op2] if x is not None]
-opListStr = ', '.join([str(x) for x in operands])
-print('Create Testcase for {} {}'.format(mnemonic, opListStr), end='')
-tc = Testcase(mnemonic, operands, per_loop)
-tc.write_testcase()
-print('  --------> SUCCEEDED')
diff --git a/osaca/data/CFL_data.csv b/osaca/data/CFL_data.csv
deleted file mode 100644
index 228e019..0000000
--- a/osaca/data/CFL_data.csv
+++ /dev/null
@@ -1,3669 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,2.5,None,"(2.5,0.0,1.0,0.5,0.5,1.0,0.0,2.5,0.0)"
-sldt-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-sldt-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-sldtl-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-sldt-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-sldtq-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-lgdt-mem,8.0,None,"(8.0,0.0,5.0,2.3333333333333335,2.3333333333333335,1.0,0.0,6.0,0.3333333333333333)"
-call-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-call-r64,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-callq-r64,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-call-LBL,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-mov-LBL,19.833333333333336,None,"(19.833333333333336,0.0,8.333333333333334,0.0,0.0,2.0,11.833333333333334,12.0,0.0)"
-mov-LBL,12.333333333333334,None,"(12.333333333333334,0.0,4.333333333333334,0.0,0.0,0.0,5.333333333333334,8.0,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wrmsr-,48.5,None,"(48.5,0.0,23.0,0.0,0.0,1.0,26.5,33.0,0.0)"
-repe scasb-,7.0,None,"(7.0,0.0,3.5,1.5,1.5,0.0,2.5,5.0,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-mem,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-cmovbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lsl-mem,26.5,None,"(26.5,0.0,13.0,1.5,1.5,0.0,11.5,16.0,0.0)"
-lsl-r32_mem,27.0,None,"(27.0,0.0,13.0,1.0,1.0,0.0,12.0,16.0,0.0)"
-lsl-r64_mem,26.5,None,"(26.5,0.0,12.5,1.5,1.5,0.0,11.5,16.5,0.0)"
-lslq-r64_mem,26.5,None,"(26.5,0.0,12.5,1.5,1.5,0.0,11.5,16.5,0.0)"
-lsl-,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)"
-lsl-r32_r32,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)"
-lsl-r64_r32,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)"
-lahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpsw-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adcb-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adc-mem,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adc-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adcl-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adc-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adcq-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-cmpsd-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lodsw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lodsd-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-std-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sti-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-str-mem,2.5,None,"(2.5,0.0,1.0,0.5,0.5,1.0,0.0,2.5,0.0)"
-str-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-str-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-strl-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-str-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-strq-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rdmsr-,27.0,None,"(27.0,0.0,17.5,0.0,0.0,0.0,17.0,18.5,0.0)"
-rep lodsb-,6.5,None,"(6.5,0.0,3.5,1.5,1.5,0.0,2.0,5.0,0.0)"
-lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-idiv-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)"
-idiv-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)"
-idivb-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)"
-idiv-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)"
-idiv-mem,22.833333333333332,None,"(22.833333333333332,18,10.833333333333332,0.5,0.5,0.0,9.833333333333332,13.5,0.0)"
-idiv-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-idivl-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-idiv-r64,23.166666666666668,None,"(23.166666666666668,18,10.666666666666668,0.0,0.0,0.0,10.166666666666668,14.0,0.0)"
-idivq-r64,23.166666666666668,None,"(23.166666666666668,18,10.666666666666668,0.0,0.0,0.0,10.166666666666668,14.0,0.0)"
-repne cmpsb-,7.333333333333333,None,"(7.333333333333333,0.0,3.833333333333333,2.0,2.0,0.0,2.833333333333333,5.0,0.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrd-mem_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrd-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrdl-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrd-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrdq-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shrdb-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shrd-mem_r32_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shrd-mem_r64_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shrd-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrdb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-movsd-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsx-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsw-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-mov-r64_r8,4.083333333333333,None,"(4.083333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,1.5833333333333333,3.75,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-bts-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btsl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-bts-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btsq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btr-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btrl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btr-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btrq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sgdt-mem,3.0,None,"(2.0,0.0,3.0,0.8333333333333333,0.8333333333333333,2.0,0.0,2.0,0.3333333333333333)"
-loop-LBL,2.5,None,"(2.5,0.0,1.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btc-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btcl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btc-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btcq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wbinvd-,425143.5,None,"(425143.5,0.0,284323.5,131656.66666666666,131656.66666666666,295223.0,285031.5,199555.5,35553.666666666664)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-mul-r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pushw-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pushw-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cli-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cld-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-clc-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lldt-mem,4.5,None,"(4.5,0.0,3.0,1.3333333333333333,1.3333333333333333,1.0,0.0,4.5,0.3333333333333333)"
-lldt-,3.8333333333333335,None,"(3.8333333333333335,0.0,3.3333333333333335,0.8333333333333333,0.8333333333333333,1.0,0.3333333333333333,3.5,0.3333333333333333)"
-ret-imd,1.75,None,"(1.75,0.0,0.25,0.5,0.5,0.0,0.25,1.75,0.0)"
-ret-,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock subl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock subq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btc-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btc-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)"
-lock btcl-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)"
-lock btc-mem_r64,3.083333333333333,None,"(3.083333333333333,0.0,1.5833333333333333,1.0,1.0,2.0,0.5833333333333333,2.75,0.0)"
-lock btcq-mem_r64,3.083333333333333,None,"(3.083333333333333,0.0,1.5833333333333333,1.0,1.0,2.0,0.5833333333333333,2.75,0.0)"
-setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-verr-mem,24.75,None,"(24.75,0.0,12.75,1.5,1.5,0.0,12.25,15.25,0.0)"
-verr-,6.0,None,"(6.0,0.0,4.0,2.0,2.0,0.0,4.0,4.0,0.0)"
-rep stosb-,20.0,None,"(20.0,0.0,13.5,3.5,3.5,0.0,13.0,10.5,0.0)"
-cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock andb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock andl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock andq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rdpmc-,12.666666666666666,None,"(12.666666666666666,0.0,7.166666666666666,0.0,0.0,0.0,6.166666666666666,9.0,0.0)"
-lock cmpxchg-mem_r8,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchgb-mem_r8,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchg-mem_r32,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchgl-mem_r32,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchg-mem_r64,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchgq-mem_r64,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock orb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock orl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock orq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-enter-imd_imd,13.5,None,"(13.5,0.0,9.0,6.5,6.5,4.0,9.0,8.5,0.0)"
-repne scasb-,7.0,None,"(7.0,0.0,3.5,1.5,1.5,0.0,2.5,5.0,0.0)"
-leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xadd-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xaddb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xadd-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xadd-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xaddl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xadd-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xaddq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lidt-mem,8.0,None,"(8.0,0.0,5.0,1.8333333333333333,1.8333333333333333,1.0,0.0,6.0,0.3333333333333333)"
-xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xchg-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchgb-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchgb-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-lock xchg-mem,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchg-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchgl-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchg-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchgq-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-mem,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchgl-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchgq-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-smsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0,1.0,0.0)"
-smsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smsw-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smswl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smsw-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smswq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-andb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-andl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-andq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-movb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-mov-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-movb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cpuid-,54.5,None,"(54.5,0.0,31.0,4.0,4.0,8.0,29.5,35.0,3.0)"
-rdtsc-,5.75,None,"(5.75,0.0,5.75,0.0,0.0,0.0,2.75,3.75,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.0,1.0,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock addb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock addl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock addq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-sidt-mem,3.0,None,"(1.5,0.0,3.0,0.8333333333333333,0.8333333333333333,2.0,0.0,1.5,0.3333333333333333)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbb-mem,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbb-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbbl-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbb-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbbq-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-imul-r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imul-mem_imd,1.25,None,"(0.25,0.0,1.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.25,None,"(0.25,0.0,1.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)"
-rcr-r8_imd,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-rcrb-r8_imd,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcrl-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcrq-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcr-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcrb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcr-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcr-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcrl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcr-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcrq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcr-mem_r8,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)"
-rcrb-mem_r8,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)"
-rcr-r8_r8,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-rcrb-r8_r8,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcrb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-r32_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-r64_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-mem_imd,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)"
-rcl-r8_imd,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)"
-rclb-r8_imd,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)"
-rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rclq-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcl-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rclb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcl-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcl-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rclq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcl-mem_r8,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)"
-rclb-mem_r8,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)"
-rcl-r8_r8,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)"
-rclb-r8_r8,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rclb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-r32_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-r64_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-div-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)"
-div-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-divb-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-div-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)"
-div-mem,18,None,"(12.5,18,5.0,0.5,0.5,0.0,7.0,7.5,0.0)"
-div-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-divl-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-div-r64,18,None,"(12.833333333333334,18,5.333333333333334,0.0,0.0,0.0,7.333333333333334,7.5,0.0)"
-divq-r64,18,None,"(12.833333333333334,18,5.333333333333334,0.0,0.0,0.0,7.333333333333334,7.5,0.0)"
-stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rep movsb-,16.5,None,"(16.5,0.0,12.5,5.0,5.0,0.0,11.5,11.5,0.0)"
-cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-bt-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-btl-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-bt-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)"
-btq-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-shld-mem_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shld-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shldl-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shld-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shldq-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shldb-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shld-mem_r32_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shld-mem_r64_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shld-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shldb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shld-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shld-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-invlpg-mem,13.833333333333332,None,"(13.833333333333332,0.0,7.833333333333333,2.0,2.0,5.0,8.833333333333334,6.5,1.0)"
-sahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lmsw-mem,7.25,None,"(7.25,0.0,4.75,0.8333333333333333,0.8333333333333333,1.0,4.25,4.75,0.3333333333333333)"
-lmsw-,6.0,None,"(6.0,0.0,2.5,0.3333333333333333,0.3333333333333333,1.0,4.5,4.0,0.3333333333333333)"
-lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock bts-mem,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)"
-lock bts-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)"
-lock btsl-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)"
-lock bts-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock btsq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xorb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xorl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xorq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-orb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-orl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-orq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-repe cmpsb-,7.333333333333333,None,"(7.333333333333333,0.0,3.833333333333333,2.0,2.0,0.0,2.833333333333333,5.0,0.0)"
-clts-,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,2.0,2.0,0.0)"
-movzx-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-verw-mem,25.0,None,"(25.0,0.0,11.0,1.5,1.5,0.0,13.0,15.0,0.0)"
-verw-,6.0,None,"(6.0,0.0,4.0,2.0,2.0,0.0,3.0,3.0,0.0)"
-jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-subl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-subq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmpxchg8b-mem,4.666666666666666,None,"(4.666666666666666,0.0,2.1666666666666665,1.0,1.0,1.0,2.1666666666666665,4.0,0.0)"
-lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btr-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btr-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btrl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btr-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock btrq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-addb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-addl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-addq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adc-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adc-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock cmpxchg8b-mem,6.0,None,"(6.0,0.0,3.0,1.0,1.0,1.0,3.0,4.0,0.0)"
-cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lea-mem,0.75,None,"(0.25,0.0,0.75,0.0,0.0,0.0,0.75,0.25,0.0)"
-lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setbe-mem,1.0,None,"(1.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock neg-mem,2.0,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,2.0,0.3333333333333333,1.0,0.0)"
-bswap-r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bswapl-r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-divps-xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divps-xmm_xmm,5,None,"(0.5,5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mmx,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpss-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxsave64-mem,38.0,None,"(21.25,0.0,13.25,19.666666666666668,19.666666666666668,38.0,13.25,9.25,0.6666666666666666)"
-andnps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andnps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-ldmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.0,0.5,0.0)"
-orps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-orps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divss-xmm_xmm,5,None,"(0.3333333333333333,5,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtss-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtss-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-xorps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-xorps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-subps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-minss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-minss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-addps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_r64,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,30.166666666666668,None,"(29.166666666666668,0.0,11.166666666666666,19.5,19.5,0.0,30.166666666666668,9.5,0.0)"
-fxsave-mem,38.0,None,"(21.0,0.0,13.5,19.666666666666668,19.666666666666668,38.0,13.0,9.5,0.6666666666666666)"
-sqrtps-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtps-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-minps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-andps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-fxrstor-mem,30.166666666666668,None,"(29.166666666666668,0.0,11.166666666666666,19.5,19.5,0.0,30.166666666666668,9.5,0.0)"
-stmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-maxps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-comiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-divpd-xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divpd-xmm_xmm,8,None,"(0.5,8,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pcmpgtw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.0,2.0,2.0,2.0,2.0,0.5,0.0)"
-andnpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andnpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psadbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmullw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-divsd-xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divsd-xmm_xmm,8,None,"(0.5,8,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-orpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-orpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cmppd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmppd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq2dq-xmm_mmx,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-psubb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psubusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaxsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cmpsd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpsd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-minsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-minsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cvtsd2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsd2ss-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-pslld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtsd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtsd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psllq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmulhw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cvtss2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-xorpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-xorpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-maxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-minpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-minpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-subsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-lfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2pi-mmx_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-mfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maxpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-psubsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-comisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pcmpgtw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packuswb-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-psubd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psadbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packssdw-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pxor-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pxor-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-por-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pandn-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pandn-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pminsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-emms-,5.5,None,"(5.5,0.0,0.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pand-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-psubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maskmovq-mmx_mmx,2.0,None,"(2.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packsswb-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-repe scasq-,6.833333333333333,None,"(6.833333333333333,0.0,3.833333333333333,1.5,1.5,0.0,2.333333333333333,5.0,0.0)"
-cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep lodsq-,6.5,None,"(6.5,0.0,3.5,1.5,1.5,0.0,2.0,5.0,0.0)"
-repne cmpsq-,7.0,None,"(7.0,0.0,4.0,2.0,2.0,0.0,3.0,5.0,0.0)"
-movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-pushfq-,1.0,None,"(0.5,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-rep movsq-,15.0,None,"(15.0,0.0,9.0,2.0,2.0,0.0,10.5,11.5,0.0)"
-movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep stosq-,18.5,None,"(18.5,0.0,13.0,4.0,4.0,0.0,14.0,10.5,0.0)"
-swapgs-,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-repne scasq-,6.666666666666666,None,"(6.666666666666666,0.0,3.6666666666666665,1.5,1.5,0.0,2.6666666666666665,5.0,0.0)"
-popfq-,1.5,None,"(1.5,0.0,1.5,0.5,0.5,0.0,0.5,1.5,0.0)"
-stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-cmpxchg16b-mem,7.5,None,"(7.5,0.0,2.0,1.0,1.0,1.0,6.0,4.5,0.0)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-repe cmpsq-,7.0,None,"(7.0,0.0,4.0,2.0,2.0,0.0,3.0,5.0,0.0)"
-lock cmpxchg16b-mem,9.166666666666668,None,"(9.166666666666668,0.0,1.6666666666666667,1.0,1.0,1.0,7.166666666666667,4.0,0.0)"
-bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-roundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-roundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mpsadbw-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-mpsadbw-xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmulld-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulld-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendpd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)"
-pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)"
-rex.w pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)"
-rex.w pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)"
-pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-pcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-rex.w pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-rex.w pcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-pmuldq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuldq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-dpps-xmm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)"
-dpps-xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-blendvps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendvps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-blendvpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendvpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-roundss-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundss-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-roundsd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundsd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendvb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pblendvb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-phsubd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phsubd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phsubw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-psignw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-phaddsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phaddsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-phaddsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-phsubsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phsubsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-phsubsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-pabsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phaddd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pabsd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phaddw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-addsubps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-haddpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-haddps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-rdtscp-,7.5,None,"(7.5,0.0,6.0,0.0,0.0,0.0,3.0,3.5,0.0)"
-aesdec-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesdec-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aeskeygenassist-xmm_xmm_imd,7.0,None,"(5.5,0.0,0.0,0.0,0.0,0.0,7.0,0.5,0.0)"
-aeskeygenassist-xmm_mem_imd,6.0,None,"(5.5,0.0,0.0,0.5,0.5,0.0,6.0,0.5,0.0)"
-aesenclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesenclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesdeclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesdeclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesenc-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesenc-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-clflushopt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rdseed-,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdseed-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdseedl-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdseed-r64,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,1.0,4.5,0.0)"
-rdseedq-r64,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,1.0,4.5,0.0)"
-movbe-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r64_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-movbeq-r64_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-movbe-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)"
-movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)"
-movbe-mem_r64,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-movbeq-mem_r64,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-clflush-mem,1.0,None,"(0.5,0.0,1.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-rdrand-,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdrand-r32,7.25,None,"(7.25,0.0,3.25,0.5,0.5,0.0,1.25,3.25,0.0)"
-rdrandl-r32,7.25,None,"(7.25,0.0,3.25,0.5,0.5,0.0,1.25,3.25,0.0)"
-rdrand-r64,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdrandq-r64,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-pause-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhaddpd-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhaddpd-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhaddpd-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhaddpd-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vstmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vsqrtsd-xmm_xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsqrtss-xmm_xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendvb-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vpblendvb-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vzeroall-,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,2.0,3.0,0.0)"
-vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdivpd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,16,None,"(1.0,16,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_ymm,16,None,"(1.0,16,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vdivps-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,10,None,"(1.0,10,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_ymm,10,None,"(1.0,10,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vldmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.0,0.5,0.0)"
-vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvpd-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_ymm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vsqrtpd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_ymm,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)"
-vdpps-xmm_xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)"
-vdpps-ymm_ymm_ymm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaskmovpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaskmovps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vroundsd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundsd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_ymm,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhsubpd-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhsubpd-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhsubpd-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhsubpd-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vhsubps-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhsubps-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhsubps-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhsubps-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhaddps-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhaddps-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhaddps-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhaddps-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vcmpps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphaddsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvps-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)"
-vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)"
-rex.w vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)"
-rex.w vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)"
-vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-vpcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-rex.w vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-rex.w vpcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vzeroupper-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovaps-xmm_mem,0.3333333333333333,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vroundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.0,2.0,2.0,2.0,2.0,0.5,0.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphsubsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvttsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendvb-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vpblendvb-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphaddsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphsubw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphsubsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtps2ph-mem_xmm_imd,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vcvtps2ph-xmm_xmm_imd,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtps2ph-mem_ymm_imd,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvtps2ph-xmm_ymm_imd,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vgatherqpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherqpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherqps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherqps-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherdps-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherdps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherdpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherdpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherqq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherdd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vaesdec-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesdec-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesenc-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesenc-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesenclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesenclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaeskeygenassist-xmm_xmm_imd,7.0,None,"(5.5,0.0,0.0,0.0,0.0,0.0,7.0,0.5,0.0)"
-vaeskeygenassist-xmm_mem_imd,6.0,None,"(5.5,0.0,0.0,0.5,0.5,0.0,6.0,0.5,0.0)"
-shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
diff --git a/osaca/data/KBL_data.csv b/osaca/data/KBL_data.csv
deleted file mode 100644
index 1d6c03d..0000000
--- a/osaca/data/KBL_data.csv
+++ /dev/null
@@ -1,3669 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,2.5,None,"(2.5,0.0,1.0,0.5,0.5,1.0,0.0,2.5,0.0)"
-sldt-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-sldt-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-sldtl-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-sldt-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-sldtq-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-lgdt-mem,8.0,None,"(8.0,0.0,5.0,2.3333333333333335,2.3333333333333335,1.0,0.0,6.0,0.3333333333333333)"
-call-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-call-r64,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-callq-r64,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-call-LBL,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-mov-LBL,19.666666666666664,None,"(19.666666666666664,0.0,8.166666666666666,0.0,0.0,2.0,12.166666666666666,12.0,0.0)"
-mov-LBL,12.0,None,"(12.0,0.0,4.0,0.0,0.0,0.0,6.0,8.0,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wrmsr-,48.5,None,"(48.5,0.0,24.0,0.0,0.0,1.0,25.5,33.0,0.0)"
-repe scasb-,7.666666666666667,None,"(7.666666666666667,0.0,4.166666666666667,0.5,0.5,0.0,3.166666666666667,5.0,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-mem,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-cmovbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lsl-mem,26.25,None,"(26.25,0.0,13.25,1.5,1.5,0.0,11.25,16.25,0.0)"
-lsl-r32_mem,26.083333333333336,None,"(26.083333333333336,0.0,13.083333333333334,1.5,1.5,0.0,11.583333333333334,16.25,0.0)"
-lsl-r64_mem,25.916666666666664,None,"(25.916666666666664,0.0,12.916666666666666,1.5,1.5,0.0,11.916666666666666,16.25,0.0)"
-lslq-r64_mem,25.916666666666664,None,"(25.916666666666664,0.0,12.916666666666666,1.5,1.5,0.0,11.916666666666666,16.25,0.0)"
-lsl-,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)"
-lsl-r32_r32,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)"
-lsl-r64_r32,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)"
-lahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpsw-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adcb-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adc-mem,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adc-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adcl-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adc-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock adcq-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-cmpsd-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lodsw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lodsd-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-std-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sti-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-str-mem,2.5,None,"(2.5,0.0,1.0,0.5,0.5,1.0,0.0,2.5,0.0)"
-str-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-str-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-strl-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-str-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-strq-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rdmsr-,28.0,None,"(28.0,0.0,19.5,0.0,0.0,0.0,15.0,17.5,0.0)"
-rep lodsb-,7.0,None,"(7.0,0.0,4.0,0.5,0.5,0.0,3.0,5.0,0.0)"
-lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-idiv-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)"
-idiv-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)"
-idivb-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)"
-idiv-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)"
-idiv-mem,22.666666666666668,None,"(22.666666666666668,18,10.666666666666668,0.5,0.5,0.0,10.166666666666668,13.5,0.0)"
-idiv-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-idivl-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-idiv-r64,23.166666666666668,None,"(23.166666666666668,18,10.666666666666668,0.0,0.0,0.0,10.166666666666668,14.0,0.0)"
-idivq-r64,23.166666666666668,None,"(23.166666666666668,18,10.666666666666668,0.0,0.0,0.0,10.166666666666668,14.0,0.0)"
-repne cmpsb-,8.0,None,"(8.0,0.0,4.5,0.6666666666666666,0.6666666666666666,0.0,3.5,5.0,0.6666666666666666)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrd-mem_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrd-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrdl-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrd-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrdq-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shrdb-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shrd-mem_r32_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shrd-mem_r64_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shrd-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrdb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-movsd-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsx-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsw-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-mov-r64_r8,4.083333333333333,None,"(4.083333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,1.5833333333333333,3.75,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-bts-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btsl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-bts-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btsq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btr-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btrl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btr-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btrq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sgdt-mem,3.0,None,"(2.0,0.0,3.0,0.8333333333333333,0.8333333333333333,2.0,0.0,2.0,0.3333333333333333)"
-loop-LBL,2.5,None,"(2.5,0.0,1.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btc-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btcl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btc-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btcq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wbinvd-,397159.5,None,"(397159.5,0.0,235401.5,111916.16666666667,111916.16666666667,234230.0,246961.0,176369.0,22724.666666666668)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-mul-r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pushw-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-push-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pushw-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cli-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cld-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-clc-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lldt-mem,4.5,None,"(4.5,0.0,3.0,1.3333333333333333,1.3333333333333333,1.0,0.0,4.5,0.3333333333333333)"
-lldt-,3.75,None,"(3.75,0.0,3.25,0.8333333333333333,0.8333333333333333,1.0,0.25,3.75,0.3333333333333333)"
-ret-imd,1.75,None,"(1.75,0.0,0.25,0.5,0.5,0.0,0.25,1.75,0.0)"
-ret-,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,2.0,0.3333333333333333,1.0,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock subl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock sub-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock subq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btc-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btc-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btcl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btc-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock btcq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-verr-mem,25.0,None,"(25.0,0.0,11.5,1.5,1.5,0.0,12.5,15.0,0.0)"
-verr-,6.0,None,"(6.0,0.0,4.0,2.0,2.0,0.0,4.0,4.0,0.0)"
-rep stosb-,17.5,None,"(17.5,0.0,13.0,4.0,4.0,0.0,15.0,10.5,0.0)"
-cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock andb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock andl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock and-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock andq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rdpmc-,12.666666666666666,None,"(12.666666666666666,0.0,7.166666666666666,0.0,0.0,0.0,6.166666666666666,9.0,0.0)"
-lock cmpxchg-mem_r8,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchgb-mem_r8,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchg-mem_r32,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchgl-mem_r32,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchg-mem_r64,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock cmpxchgq-mem_r64,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock orb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock orl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock or-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock orq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-enter-imd_imd,13.5,None,"(13.5,0.0,9.0,6.5,6.5,4.0,9.0,8.5,0.0)"
-repne scasb-,7.666666666666667,None,"(7.666666666666667,0.0,4.166666666666667,0.5,0.5,0.0,3.166666666666667,5.0,0.0)"
-leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xadd-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xaddb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xadd-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xadd-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xaddl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xadd-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xaddq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lidt-mem,8.0,None,"(8.0,0.0,5.0,1.8333333333333333,1.8333333333333333,1.0,0.0,6.0,0.3333333333333333)"
-xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xchg-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchgb-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchgb-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-lock xchg-mem,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchg-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchgl-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchg-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-lock xchgq-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-mem,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchgl-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchgq-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)"
-xchg-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-smsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0,1.0,0.0)"
-smsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smsw-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smswl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smsw-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smswq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-andb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-andl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-andq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-movb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-mov-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-movb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cpuid-,54.5,None,"(54.5,0.0,31.0,4.0,4.0,8.0,29.5,35.0,3.0)"
-rdtsc-,5.666666666666667,None,"(5.666666666666667,0.0,5.666666666666667,0.0,0.0,0.0,3.166666666666667,3.5,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock addb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock addl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock add-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock addq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-sidt-mem,3.0,None,"(1.5,0.0,3.0,0.8333333333333333,0.8333333333333333,2.0,0.0,1.5,0.3333333333333333)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbb-mem,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbb-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbbl-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbb-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock sbbq-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-imul-r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imul-mem_imd,1.25,None,"(0.25,0.0,1.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.25,None,"(0.25,0.0,1.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)"
-rcr-r8_imd,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-rcrb-r8_imd,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcrl-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcrq-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcr-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcrb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcr-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcr-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcrl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcr-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcrq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcr-mem_r8,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)"
-rcrb-mem_r8,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)"
-rcr-r8_r8,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-rcrb-r8_r8,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcr-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcrb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-r32_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcr-r64_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-mem_imd,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)"
-rcl-r8_imd,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)"
-rclb-r8_imd,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)"
-rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rclq-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcl-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rclb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-rcl-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcl-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rclq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rcl-mem_r8,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)"
-rclb-mem_r8,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)"
-rcl-r8_r8,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)"
-rclb-r8_r8,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rclb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-r32_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-rcl-r64_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)"
-div-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)"
-div-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-divb-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-div-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)"
-div-mem,18,None,"(12.5,18,5.0,0.5,0.5,0.0,7.0,7.5,0.0)"
-div-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-divl-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-div-r64,18,None,"(12.833333333333334,18,5.333333333333334,0.0,0.0,0.0,7.333333333333334,7.5,0.0)"
-divq-r64,18,None,"(12.833333333333334,18,5.333333333333334,0.0,0.0,0.0,7.333333333333334,7.5,0.0)"
-stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rep movsb-,16.5,None,"(16.5,0.0,12.5,5.0,5.0,0.0,11.5,11.5,0.0)"
-cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-bt-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-btl-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-bt-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)"
-btq-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-shld-mem_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shld-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shldl-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shld-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shldq-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shldb-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shld-mem_r32_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shld-mem_r64_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-shld-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shldb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shld-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shld-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-invlpg-mem,13.833333333333332,None,"(13.833333333333332,0.0,7.833333333333333,2.0,2.0,5.0,8.833333333333334,6.5,1.0)"
-sahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lmsw-mem,7.75,None,"(7.75,0.0,4.75,1.3333333333333333,1.3333333333333333,2.0,5.25,6.25,0.3333333333333333)"
-lmsw-,6.0,None,"(6.0,0.0,2.5,0.3333333333333333,0.3333333333333333,1.0,4.5,4.0,0.3333333333333333)"
-lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock bts-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock bts-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btsl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock bts-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock btsq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xorb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xorl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xor-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock xorq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-orb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-orl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-orq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-repe cmpsb-,8.0,None,"(8.0,0.0,4.5,0.6666666666666666,0.6666666666666666,0.0,3.5,5.0,0.6666666666666666)"
-clts-,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,2.0,2.0,0.0)"
-movzx-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-verw-mem,24.5,None,"(24.5,0.0,12.0,1.5,1.5,0.0,12.5,15.0,0.0)"
-verw-,6.0,None,"(6.0,0.0,4.0,2.0,2.0,0.0,3.0,3.0,0.0)"
-jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)"
-ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-subl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-subq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmpxchg8b-mem,4.666666666666666,None,"(4.666666666666666,0.0,2.1666666666666665,1.0,1.0,1.0,2.1666666666666665,4.0,0.0)"
-lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)"
-lock btr-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btr-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btrl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btr-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock btrq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-addb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-addl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-addq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adc-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adc-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)"
-adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock cmpxchg8b-mem,6.0,None,"(6.0,0.0,3.0,1.0,1.0,1.0,3.0,4.0,0.0)"
-cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lea-mem,0.75,None,"(0.25,0.0,0.75,0.0,0.0,0.0,0.75,0.25,0.0)"
-lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)"
-dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setbe-mem,1.0,None,"(1.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,1.0,0.3333333333333333)"
-setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)"
-bswap-r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bswapl-r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-divps-xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divps-xmm_xmm,5,None,"(0.5,5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mmx,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpss-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxsave64-mem,38.0,None,"(21.0,0.0,13.5,19.666666666666668,19.666666666666668,38.0,13.0,9.5,0.6666666666666666)"
-andnps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andnps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-ldmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.0,0.5,0.0)"
-orps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-orps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divss-xmm_xmm,5,None,"(0.3333333333333333,5,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtss-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtss-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-xorps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-xorps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-subps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-minss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-minss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-addps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_r64,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,30.166666666666668,None,"(29.166666666666668,0.0,11.166666666666666,19.5,19.5,0.0,30.166666666666668,9.5,0.0)"
-fxsave-mem,38.0,None,"(20.75,0.0,13.25,19.666666666666668,19.666666666666668,38.0,12.75,9.25,0.6666666666666666)"
-sqrtps-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtps-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-minps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-andps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-fxrstor-mem,30.166666666666668,None,"(29.166666666666668,0.0,11.166666666666666,19.5,19.5,0.0,30.166666666666668,9.5,0.0)"
-stmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-maxps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-comiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-divpd-xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divpd-xmm_xmm,8,None,"(0.5,8,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pcmpgtw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.0,2.0,2.0,2.0,2.0,0.5,0.0)"
-andnpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andnpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psadbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmullw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-divsd-xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divsd-xmm_xmm,8,None,"(0.3333333333333333,8,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pcmpeqw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-orpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-orpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cmppd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmppd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq2dq-xmm_mmx,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-psubb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psubusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaxsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cmpsd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpsd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-minsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-minsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cvtsd2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsd2ss-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-pslld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtsd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtsd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psllq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmulhw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cvtss2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-xorpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-xorpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-maxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-minpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-minpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-subsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-lfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2pi-mmx_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-mfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maxpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-psubsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-comisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pcmpgtw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packuswb-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-psubd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psadbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packssdw-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pxor-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pxor-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-por-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pandn-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pandn-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pminsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-emms-,5.5,None,"(5.5,0.0,0.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pand-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-psubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maskmovq-mmx_mmx,2.0,None,"(2.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packsswb-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-repe scasq-,7.333333333333333,None,"(7.333333333333333,0.0,4.333333333333333,0.3333333333333333,0.3333333333333333,0.0,3.333333333333333,5.0,0.3333333333333333)"
-cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep lodsq-,7.0,None,"(7.0,0.0,4.0,0.3333333333333333,0.3333333333333333,0.0,3.0,5.0,0.3333333333333333)"
-repne cmpsq-,8.0,None,"(8.0,0.0,4.5,0.8333333333333333,0.8333333333333333,0.0,3.5,5.0,0.3333333333333333)"
-movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-pushfq-,1.0,None,"(0.5,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-rep movsq-,15.0,None,"(15.0,0.0,9.0,2.0,2.0,0.0,10.5,11.5,0.0)"
-movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep stosq-,17.5,None,"(17.5,0.0,13.0,4.0,4.0,0.0,15.0,10.5,0.0)"
-swapgs-,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-repne scasq-,6.833333333333333,None,"(6.833333333333333,0.0,4.333333333333333,0.3333333333333333,0.3333333333333333,0.0,3.333333333333333,4.5,0.3333333333333333)"
-popfq-,1.5,None,"(1.5,0.0,1.5,0.5,0.5,0.0,0.5,1.5,0.0)"
-stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-cmpxchg16b-mem,7.5,None,"(7.5,0.0,2.0,1.0,1.0,1.0,6.0,4.5,0.0)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-repe cmpsq-,8.0,None,"(8.0,0.0,4.5,0.8333333333333333,0.8333333333333333,0.0,3.5,5.0,0.3333333333333333)"
-lock cmpxchg16b-mem,9.166666666666668,None,"(9.166666666666668,0.0,1.6666666666666667,1.0,1.0,1.0,7.166666666666667,4.0,0.0)"
-bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-roundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-roundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mpsadbw-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-mpsadbw-xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmulld-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulld-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)"
-pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)"
-rex.w pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)"
-rex.w pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)"
-pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-pcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-rex.w pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-rex.w pcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-pmuldq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuldq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-dpps-xmm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)"
-dpps-xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-blendvps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendvps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-blendvpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendvpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-roundss-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundss-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-roundsd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundsd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendvb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pblendvb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-phsubd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phsubd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phsubw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-psignw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-phaddsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phaddsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-phaddsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-phsubsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phsubsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-phsubsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-pabsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phaddd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pabsd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phaddw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-addsubps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-haddpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-haddps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-rdtscp-,7.5,None,"(7.5,0.0,6.0,0.0,0.0,0.0,3.0,3.5,0.0)"
-aesdec-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesdec-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aeskeygenassist-xmm_xmm_imd,7.0,None,"(5.5,0.0,0.0,0.0,0.0,0.0,7.0,0.5,0.0)"
-aeskeygenassist-xmm_mem_imd,6.0,None,"(5.5,0.0,0.0,0.5,0.5,0.0,6.0,0.5,0.0)"
-aesenclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesenclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesdeclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesdeclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesenc-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesenc-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-clflushopt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rdseed-,7.0,None,"(7.0,0.0,4.5,0.5,0.5,0.0,0.5,4.0,0.0)"
-rdseed-r32,6.25,None,"(6.25,0.0,3.25,0.5,0.5,0.0,1.25,4.25,0.0)"
-rdseedl-r32,6.25,None,"(6.25,0.0,3.25,0.5,0.5,0.0,1.25,4.25,0.0)"
-rdseed-r64,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)"
-rdseedq-r64,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)"
-movbe-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r64_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-movbeq-r64_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-movbe-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)"
-movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)"
-movbe-mem_r64,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-movbeq-mem_r64,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.5,0.3333333333333333)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-clflush-mem,1.0,None,"(0.5,0.0,1.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-rdrand-,6.916666666666666,None,"(6.916666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,1.4166666666666665,3.25,0.0)"
-rdrand-r32,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)"
-rdrandl-r32,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)"
-rdrand-r64,6.833333333333333,None,"(6.833333333333333,0.0,2.3333333333333335,0.5,0.5,0.0,1.8333333333333333,4.0,0.0)"
-rdrandq-r64,6.833333333333333,None,"(6.833333333333333,0.0,2.3333333333333335,0.5,0.5,0.0,1.8333333333333333,4.0,0.0)"
-pause-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhaddpd-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhaddpd-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhaddpd-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhaddpd-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vstmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vsqrtsd-xmm_xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsqrtss-xmm_xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendvb-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vpblendvb-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vzeroall-,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,2.0,3.0,0.0)"
-vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdivpd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,16,None,"(1.0,16,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_ymm,16,None,"(1.0,16,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vdivps-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,10,None,"(1.0,10,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_ymm,10,None,"(1.0,10,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vldmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.0,0.5,0.0)"
-vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvpd-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_ymm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vsqrtpd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_ymm,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)"
-vdpps-xmm_xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)"
-vdpps-ymm_ymm_ymm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaskmovpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaskmovps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vroundsd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundsd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhsubpd-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhsubpd-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhsubpd-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhsubpd-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vhsubps-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhsubps-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhsubps-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhsubps-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhaddps-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhaddps-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vhaddps-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vhaddps-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vcmpps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphaddsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvps-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)"
-vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)"
-rex.w vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)"
-rex.w vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)"
-vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-vpcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-rex.w vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-rex.w vpcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vzeroupper-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vroundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.0,2.0,2.0,2.0,2.0,0.5,0.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphsubsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvttsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendvb-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vpblendvb-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphaddsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphsubw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphsubsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtps2ph-mem_xmm_imd,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-vcvtps2ph-xmm_xmm_imd,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtps2ph-mem_ymm_imd,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvtps2ph-xmm_ymm_imd,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vgatherqpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherqpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherqps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherqps-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherdps-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherdps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherdpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherdpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherqq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherdd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vaesdec-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesdec-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesenc-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesenc-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesenclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesenclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaeskeygenassist-xmm_xmm_imd,7.0,None,"(5.5,0.0,0.0,0.0,0.0,0.0,7.0,0.5,0.0)"
-vaeskeygenassist-xmm_mem_imd,6.0,None,"(5.5,0.0,0.0,0.5,0.5,0.0,6.0,0.5,0.0)"
-shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
diff --git a/osaca/data/bdw_data.csv b/osaca/data/bdw_data.csv
deleted file mode 100644
index 617a459..0000000
--- a/osaca/data/bdw_data.csv
+++ /dev/null
@@ -1,3845 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sldt-,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldt-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldtl-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldt-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldtq-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-lgdt-mem,6.5,None,"(6.5,0.0,5.0,0.0,0.0,1.0,0.0,4.5,0.0)"
-call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-LBL,17.833333333333332,None,"(17.833333333333332,0.0,4.833333333333333,1.0,1.0,2.0,10.833333333333334,14.5,0.0)"
-mov-LBL,12.166666666666666,None,"(12.166666666666666,0.0,3.6666666666666665,0.0,0.0,0.0,5.666666666666666,8.5,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wrmsr-,39.5,None,"(39.5,0.0,20.0,0.0,0.0,1.0,20.0,26.5,0.0)"
-repe scasb-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lar-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-larl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-larq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)"
-lar-r32_r32,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)"
-larl-r32_r32,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)"
-lar-r64_r64,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)"
-larq-r64_r64,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-mem,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-cmovbe-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovbe-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovbel-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovbe-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovbeq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovbe-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovbe-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovbel-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovbe-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovbeq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lsl-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lslq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-,4.0,None,"(4.0,0.0,3.6666666666666665,1.0,1.0,0.0,2.0,3.3333333333333335,0.0)"
-lsl-r32_r32,4.0,None,"(4.0,0.0,3.6666666666666665,1.0,1.0,0.0,2.0,3.3333333333333335,0.0)"
-lsl-r64_r32,4.0,None,"(4.0,0.0,3.6666666666666665,1.0,1.0,0.0,2.0,3.3333333333333335,0.0)"
-lahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpsw-,1.0,None,"(0.8333333333333333,0.0,0.5,1.0,1.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock adc-mem_imd,1.5833333333333333,None,"(1.5833333333333333,0.0,0.75,1.0,1.0,1.0,1.0833333333333333,1.5833333333333333,0.0)"
-lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock adc-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adcb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adcl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adcq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-cmpsb-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,0.0,0.5833333333333333,0.5833333333333333,0.0)"
-cmpsd-,1.0,None,"(0.8333333333333333,0.0,0.5,1.0,1.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-out-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-outb-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-outl-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-r16_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-r16_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lodsb-,0.5833333333333333,None,"(0.5833333333333333,0.0,0.25,0.5,0.5,0.0,0.5833333333333333,0.5833333333333333,0.0)"
-lodsw-,0.5833333333333333,None,"(0.5833333333333333,0.0,0.25,0.5,0.5,0.0,0.5833333333333333,0.5833333333333333,0.0)"
-lodsd-,0.5,None,"(0.3333333333333333,0.0,0.0,0.5,0.5,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-std-,1.75,None,"(1.75,0.0,1.25,0.0,0.0,0.0,1.25,1.75,0.0)"
-stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sar-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sarb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sar-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sarb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sar-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sar-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sti-,2.3333333333333335,None,"(2.3333333333333335,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,2.3333333333333335,0.0)"
-str-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rdmsr-,23.5,None,"(23.5,0.0,14.5,0.0,0.0,0.0,10.5,19.5,0.0)"
-rep lodsb-,4.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,0.0,4.0,0.0)"
-lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-idiv-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)"
-idiv-r8,12,None,"(2.8333333333333335,12,2.5,0.0,0.0,0.0,2.833333333333333,0.8333333333333333,0.0)"
-idivb-r8,12,None,"(2.8333333333333335,12,2.5,0.0,0.0,0.0,2.833333333333333,0.8333333333333333,0.0)"
-idiv-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)"
-idiv-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)"
-idiv-r32,24.25,None,"(24.25,0.0,14.75,0.0,0.0,0.0,14.75,12.25,0.0)"
-idivl-r32,24.25,None,"(24.25,0.0,14.75,0.0,0.0,0.0,14.75,12.25,0.0)"
-idiv-r64,24.25,None,"(24.25,0.0,14.75,0.0,0.0,0.0,14.75,12.25,0.0)"
-idivq-r64,24.25,None,"(24.25,0.0,14.75,0.0,0.0,0.0,14.75,12.25,0.0)"
-repne cmpsb-,4.5,None,"(4.5,0.0,1.0,0.0,0.0,0.0,1.0,4.5,0.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shr-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shr-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shr-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shr-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrdl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrdq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shrdb-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shrd-mem_r32_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shrd-mem_r64_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shrd-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shrdb-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shrd-r32_r32_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shrd-r64_r64_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-movsd-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,1.0,0.5833333333333333,0.5833333333333333,0.0)"
-movsb-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,1.0,0.5833333333333333,0.5833333333333333,0.0)"
-movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsw-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,1.0,0.5833333333333333,0.5833333333333333,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shl-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shlb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shl-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shlb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shl-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shl-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-mov-r64_r8,4.083333333333333,None,"(4.083333333333333,0.0,0.25,0.0,0.0,0.0,1.5833333333333333,4.083333333333333,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-mem,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)"
-bts-mem_r32,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)"
-btsl-mem_r32,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)"
-bts-mem_r64,2.083333333333333,None,"(2.083333333333333,0.0,1.25,1.0,1.0,1.0,0.5833333333333333,2.083333333333333,0.0)"
-btsq-mem_r64,2.083333333333333,None,"(2.083333333333333,0.0,1.25,1.0,1.0,1.0,0.5833333333333333,2.083333333333333,0.0)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)"
-btr-mem_r32,2.4166666666666665,None,"(2.4166666666666665,0.0,1.25,1.0,1.0,1.0,0.9166666666666666,2.4166666666666665,0.0)"
-btrl-mem_r32,2.4166666666666665,None,"(2.4166666666666665,0.0,1.25,1.0,1.0,1.0,0.9166666666666666,2.4166666666666665,0.0)"
-btr-mem_r64,2.333333333333333,None,"(2.333333333333333,0.0,1.5,1.0,1.0,1.0,0.8333333333333333,2.333333333333333,0.0)"
-btrq-mem_r64,2.333333333333333,None,"(2.333333333333333,0.0,1.5,1.0,1.0,1.0,0.8333333333333333,2.333333333333333,0.0)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sgdt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-loop-LBL,2.5,None,"(2.5,0.0,1.0,0.0,0.0,0.0,1.0,2.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-mem,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)"
-btc-mem_r32,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,1.5,2.5,0.0)"
-btcl-mem_r32,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,1.5,2.5,0.0)"
-btc-mem_r64,2.333333333333333,None,"(2.333333333333333,0.0,1.5,1.0,1.0,1.0,0.8333333333333333,2.333333333333333,0.0)"
-btcq-mem_r64,2.333333333333333,None,"(2.333333333333333,0.0,1.5,1.0,1.0,1.0,0.8333333333333333,2.333333333333333,0.0)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wbinvd-,132280.0,None,"(106397.0,1,113334.0,0.0,0.0,132280.0,38340.0,27655.0,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cli-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cld-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-clc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lldt-mem,4.5,None,"(4.5,0.0,3.0,1.5,1.5,1.0,0.0,4.5,0.0)"
-lldt-,3.8333333333333335,None,"(3.8333333333333335,0.0,3.0,1.0,1.0,1.0,0.3333333333333333,3.8333333333333335,0.0)"
-ret-imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-ret-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock subl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock subq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btc-mem,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)"
-lock btc-mem_r32,3.75,None,"(3.75,0.0,1.5833333333333333,1.0,1.0,2.0,1.25,3.4166666666666665,0.0)"
-lock btcl-mem_r32,3.75,None,"(3.75,0.0,1.5833333333333333,1.0,1.0,2.0,1.25,3.4166666666666665,0.0)"
-lock btc-mem_r64,3.5,None,"(3.5,0.0,2.0,1.0,1.0,2.0,1.0,2.5,0.0)"
-lock btcq-mem_r64,3.5,None,"(3.5,0.0,2.0,1.0,1.0,2.0,1.0,2.5,0.0)"
-setnbe-mem,1.0,None,"(0.75,0.0,0.25,0.5,0.5,1.0,0.25,0.75,0.0)"
-setnbe-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-setnbeb-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-verr-mem,17.0,None,"(14.5,0.0,11.0,0.0,0.0,0.0,17.0,1.5,0.0)"
-verr-,5.0,None,"(3.5,0.0,5.0,0.0,0.0,0.0,3.0,1.5,0.0)"
-rep stosb-,7.5,None,"(7.5,0.0,2.0,0.0,0.0,0.0,2.0,5.5,0.0)"
-cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock andb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock andl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock andq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rdpmc-,13.333333333333332,None,"(13.333333333333332,0.0,6.833333333333333,0.0,0.0,0.0,5.333333333333333,8.5,0.0)"
-lock cmpxchg-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchg-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchg-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ret far-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock orb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock orl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock orq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-enter-imd_imd,1.75,None,"(1.25,0.0,1.75,0.5,0.5,1.0,0.75,1.25,0.0)"
-repne scasb-,10.166666666666666,None,"(10.166666666666666,0.0,6.166666666666666,1.5,1.5,0.0,6.166666666666666,6.5,0.0)"
-leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xadd-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddb-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddl-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddq-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lidt-mem,6.5,None,"(6.5,0.0,5.0,0.0,0.0,1.0,0.0,4.5,0.0)"
-xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xchg-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchgb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchgb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-lock xchg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchg-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchgl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchg-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchgq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchgl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchgq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchg-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchgl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchg-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchgq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchg-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchgl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchg-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchgq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchg-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchgl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchg-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-xchgq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-smsw-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-smsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smsw-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smswl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smsw-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smswq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-mov-r32,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-movl-r32,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-mov-r64,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-movq-r64,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cpuid-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-rdtsc-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock addb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock addl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock addq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-sidt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock sbb-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock sbb-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock sbb-mem_imd,1.6666666666666665,None,"(1.6666666666666665,0.0,0.5,1.0,1.0,1.0,1.1666666666666665,1.6666666666666665,0.0)"
-lock sbb-mem_imd,2.0,None,"(2.0,0.0,0.6666666666666666,1.0,1.0,1.0,1.0,1.3333333333333333,0.0)"
-lock sbb-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock sbb-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)"
-lock sbb-mem_imd,1.9166666666666665,None,"(1.9166666666666665,0.0,0.25,1.0,1.0,1.0,0.9166666666666666,1.9166666666666665,0.0)"
-lock sbb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbbl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbbq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-insb-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-insd-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcr-r8_r8,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,1.5,2.5,0.0)"
-rcrb-r8_r8,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,1.5,2.5,0.0)"
-rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcr-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcrb-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcr-r32_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcr-r64_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcl-r8_r8,2.75,None,"(2.75,0.0,2.25,0.0,0.0,0.0,1.25,2.75,0.0)"
-rclb-r8_r8,2.75,None,"(2.75,0.0,2.25,0.0,0.0,0.0,1.25,2.75,0.0)"
-rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcl-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rclb-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcl-r32_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcl-r64_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-insw-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-div-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)"
-div-r8,12,None,"(2.75,12,2.25,0.0,0.0,0.0,2.25,0.75,0.0)"
-divb-r8,12,None,"(2.75,12,2.25,0.0,0.0,0.0,2.25,0.75,0.0)"
-div-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)"
-div-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)"
-div-r32,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)"
-divl-r32,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)"
-div-r64,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)"
-divq-r64,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)"
-stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rep movsb-,8.0,None,"(8.0,0.0,2.0,0.0,0.0,0.0,3.0,6.0,0.0)"
-in-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-inb-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-inl-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r8_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r32_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem,2.9166666666666665,None,"(2.9166666666666665,0.0,1.75,0.5,0.5,0.0,1.4166666666666665,2.9166666666666665,0.0)"
-bt-mem_r32,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,0.5,0.5,0.0,1.1666666666666665,2.6666666666666665,0.0)"
-btl-mem_r32,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,0.5,0.5,0.0,1.1666666666666665,2.6666666666666665,0.0)"
-bt-mem_r64,2.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,0.5,0.5,0.0,1.3333333333333333,1.5,0.0)"
-btq-mem_r64,2.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,0.5,0.5,0.0,1.3333333333333333,1.5,0.0)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-shld-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shldl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shldq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shldb-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shld-mem_r32_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shld-mem_r64_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shld-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shldb-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shld-r32_r32_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shld-r64_r64_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-invlpg-mem,14.833333333333332,None,"(14.833333333333332,0.0,6.333333333333333,2.5,2.5,5.0,8.333333333333334,7.5,0.0)"
-sahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lmsw-mem,7.25,None,"(7.25,0.0,4.75,1.0,1.0,1.0,5.25,5.75,0.0)"
-lmsw-,6.166666666666666,None,"(6.166666666666666,0.0,2.0,0.5,0.5,1.0,5.666666666666666,5.166666666666667,0.0)"
-lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock bts-mem,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)"
-lock bts-mem_r32,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)"
-lock btsl-mem_r32,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)"
-lock bts-mem_r64,3.4166666666666665,None,"(3.4166666666666665,0.0,1.5833333333333333,1.0,1.0,2.0,0.9166666666666665,3.083333333333333,0.0)"
-lock btsq-mem_r64,3.4166666666666665,None,"(3.4166666666666665,0.0,1.5833333333333333,1.0,1.0,2.0,0.9166666666666665,3.083333333333333,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xorb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xorl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xorq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-repe cmpsb-,4.5,None,"(4.5,0.0,1.0,0.0,0.0,0.0,1.0,4.5,0.0)"
-clts-,2.3333333333333335,None,"(2.3333333333333335,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,2.0,0.0)"
-movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rol-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rolb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rol-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rolb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rol-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rol-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-verw-mem,17.0,None,"(14.5,0.0,11.0,0.0,0.0,0.0,17.0,1.5,0.0)"
-verw-,4.0,None,"(3.5,0.0,4.0,0.0,0.0,0.0,4.0,1.5,0.0)"
-jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rorb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rorb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-ror-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-ror-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbe-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnbe-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnbel-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnbe-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnbeq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnbe-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnbe-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnbel-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnbe-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnbeq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-subl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-subq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmpxchg8b-mem,3.25,None,"(3.25,0.0,2.25,1.0,1.0,1.0,2.25,3.25,0.0)"
-lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btr-mem,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)"
-lock btr-mem_r32,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)"
-lock btrl-mem_r32,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)"
-lock btr-mem_r64,3.4166666666666665,None,"(3.4166666666666665,0.0,1.5833333333333333,1.0,1.0,2.0,0.9166666666666665,3.083333333333333,0.0)"
-lock btrq-mem_r64,3.4166666666666665,None,"(3.4166666666666665,0.0,1.5833333333333333,1.0,1.0,2.0,0.9166666666666665,3.083333333333333,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock cmpxchg8b-mem,3.75,None,"(3.75,0.0,2.75,1.0,1.0,1.0,2.75,3.75,0.0)"
-cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lea-mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setbe-mem,1.0,None,"(0.75,0.0,0.25,0.5,0.5,1.0,0.25,0.75,0.0)"
-setbe-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-setbeb-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-bswap-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapl-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-jmp far-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-divps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxsave64-mem,38.0,None,"(19.166666666666664,0.0,13.0,20.0,20.0,38.0,21.166666666666668,8.666666666666666,0.0)"
-andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,19.166666666666668,None,"(19.166666666666668,0.0,16.166666666666668,15.5,15.5,0.0,14.166666666666668,7.5,0.0)"
-fxsave-mem,38.0,None,"(19.166666666666664,0.0,13.0,20.0,20.0,38.0,21.166666666666668,8.666666666666666,0.0)"
-sqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fxrstor-mem,18.666666666666668,None,"(18.666666666666668,0.0,16.666666666666668,16.5,16.5,0.0,14.666666666666668,7.0,0.0)"
-stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-comiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divpd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divpd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pcmpgtw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpgtb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpgtd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maskmovdqu-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psadbw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmullw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divsd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divsd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq2dq-xmm_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psubb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pslld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pslld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtsd-xmm_mem,13,None,"(1.0,13,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtsd-xmm_xmm,13,None,"(1.0,13,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psllw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psllq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psllq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,13,None,"(1.0,13,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_xmm,13,None,"(1.0,13,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmulhw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psrlq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psrlw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psrld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-cvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,0.8333333333333333,None,"(0.8333333333333333,0.0,0.8333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pavgw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pavgw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psubsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pavgb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pavgb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psraw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psraw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-comisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psrad-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldl2t-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldl2e-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fyl2x-,4.5,None,"(4.5,0.0,4.5,0.0,0.0,0.0,0.5,1.5,0.0)"
-faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxtract-,2.5,None,"(0.5,0.0,2.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcompp-,1.5,None,"(0.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fyl2xp1-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-frndint-,7.75,None,"(7.75,0.0,6.75,0.0,0.0,0.0,1.75,1.75,0.0)"
-fnclex-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-fptan-,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fcos-,9.5,None,"(9.5,0.0,6.0,0.0,0.0,0.0,3.0,2.5,0.0)"
-fscale-,2.75,None,"(2.25,0.0,2.75,0.0,0.0,0.0,0.75,1.25,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fxam-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fprem1-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fninit-,7.5,None,"(3.0,0.0,3.0,0.0,0.0,0.0,7.5,1.5,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fnop-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fldpi-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fnstsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fnstsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-fwait-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-f2xm1-,5.25,None,"(5.25,0.0,3.75,0.0,0.0,0.0,0.75,2.25,0.0)"
-fprem-,2.25,None,"(2.25,0.0,2.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-fincstp-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldenv-mem,18.833333333333332,None,"(18.833333333333332,0.0,15.833333333333332,4.0,4.0,0.0,12.833333333333332,8.5,0.0)"
-fldenv-mem,18.833333333333332,None,"(18.833333333333332,0.0,15.833333333333332,4.0,4.0,0.0,12.833333333333332,8.5,0.0)"
-fpatan-,31.0,None,"(31.0,0.0,13.5,0.0,0.0,0.0,5.5,5.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsin-,10.75,None,"(10.75,0.0,5.75,0.0,0.0,0.0,2.75,2.75,0.0)"
-fldcw-mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldln2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxch-fpu,5.25,None,"(5.25,0.0,2.25,0.0,0.0,0.0,1.25,3.25,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdecstp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldlg2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldz-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fbstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fucompp-,1.5,None,"(0.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fnstenv-mem,28.833333333333332,None,"(28.833333333333332,0.0,18.833333333333332,5.5,5.5,11.0,17.333333333333332,13.0,0.0)"
-fnstenv-mem,28.833333333333332,None,"(28.833333333333332,0.0,18.833333333333332,5.5,5.5,11.0,17.333333333333332,13.0,0.0)"
-fld1-,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsincos-,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fnstcw-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pcmpgtw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpgtb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpgtd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packuswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-psubd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psadbw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packssdw-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pxor-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psubb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pandn-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-emms-,12.583333333333332,None,"(9.583333333333332,0.0,12.583333333333332,0.0,0.0,0.0,8.583333333333332,0.25,0.0)"
-punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaxub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-psubsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pavgw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pavgw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pavgb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pavgb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-maskmovq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packsswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-repe scasq-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)"
-cmpsq-,1.0,None,"(0.8333333333333333,0.0,0.5,1.0,1.0,0.0,0.8333333333333333,0.8333333333333333,0.0)"
-lodsq-,0.5,None,"(0.3333333333333333,0.0,0.0,0.5,0.5,0.0,0.3333333333333333,0.3333333333333333,0.0)"
-cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep lodsq-,4.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,0.0,4.0,0.0)"
-syscall-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-repne cmpsq-,3.0,None,"(3.0,0.0,2.0,0.5,0.5,0.0,2.0,3.0,0.0)"
-movsq-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,1.0,0.5833333333333333,0.5833333333333333,0.0)"
-pushfq-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rep movsq-,16.0,None,"(11.166666666666666,0.0,7.833333333333333,16.0,16.0,16.0,7.166666666666667,6.833333333333334,0.0)"
-movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep stosq-,16.0,None,"(10.833333333333332,0.0,7.166666666666666,8.0,8.0,16.0,7.833333333333333,6.166666666666666,0.0)"
-swapgs-,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-repne scasq-,4.5,None,"(4.5,0.0,1.0,0.0,0.0,0.0,1.0,4.5,0.0)"
-popfq-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-repe cmpsq-,4.5,None,"(4.5,0.0,1.0,0.0,0.0,0.0,1.0,4.5,0.0)"
-iretq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lock cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)"
-bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-roundpd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundpd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-roundps-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundps-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mpsadbw-xmm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-mpsadbw-xmm_xmm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmulld-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulld-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pminsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-rex.w pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-rex.w pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-rex.w pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-rex.w pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-pmuldq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuldq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-dpps-xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-dpps-xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pminud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-blendvps-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-blendvps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-blendvpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-blendvpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-roundss-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundss-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-roundsd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundsd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendvb-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-pblendvb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-phsubd-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubd-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubd-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubd-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-psignw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-phaddsw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddsw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddsw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddsw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubsw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubsw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubsw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubsw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-pabsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-phaddd-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddd-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddd-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddd-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pabsd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-phaddw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vmclear-mem,4.5,None,"(3.5,0.0,3.5,1.0,1.0,1.0,4.5,3.5,0.0)"
-vmptrst-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-xsetbv-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)"
-xgetbv-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-xrstor-mem,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,4.0,4.5,0.0)"
-xrstor64-mem,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,4.0,4.5,0.0)"
-xsave-mem,8.5,None,"(8.5,0.0,5.5,1.0,1.0,1.0,5.5,5.5,0.0)"
-xsave64-mem,7.916666666666666,None,"(7.916666666666666,0.0,5.416666666666666,1.0,1.0,1.0,5.416666666666666,5.25,0.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-rdtscp-,7.333333333333333,None,"(5.333333333333333,0.0,5.333333333333333,0.0,0.0,0.0,7.333333333333333,4.0,0.0)"
-aesdec-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-aesdec-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-aeskeygenassist-xmm_xmm_imd,7.666666666666667,None,"(2.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,7.666666666666667,0.0,0.0)"
-aeskeygenassist-xmm_mem_imd,7.333333333333333,None,"(2.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,7.333333333333333,0.0,0.0)"
-aesenclast-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-aesenclast-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-aesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-aesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-aesdeclast-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-aesdeclast-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-aesenc-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-aesenc-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-xsaveopt64-mem,9.75,None,"(9.75,0.0,6.75,1.0,1.0,1.0,6.75,5.75,0.0)"
-xsaveopt-mem,8.5,None,"(8.5,0.0,5.5,1.0,1.0,1.0,5.5,5.5,0.0)"
-clac-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mwait-,2.75,None,"(2.75,0.0,1.75,0.0,0.0,0.0,2.75,2.75,0.0)"
-rdseed-,4.166666666666667,None,"(4.166666666666667,0.0,2.8333333333333335,0.5,0.5,0.0,3.1666666666666665,3.8333333333333335,0.0)"
-rdseed-r32,5.0,None,"(5.0,0.0,2.3333333333333335,0.5,0.5,0.0,3.0,3.6666666666666665,0.0)"
-rdseedl-r32,5.0,None,"(5.0,0.0,2.3333333333333335,0.5,0.5,0.0,3.0,3.6666666666666665,0.0)"
-rdseed-r64,5.333333333333333,None,"(5.333333333333333,0.0,1.6666666666666665,0.5,0.5,0.0,3.333333333333333,3.6666666666666665,0.0)"
-rdseedq-r64,5.333333333333333,None,"(5.333333333333333,0.0,1.6666666666666665,0.5,0.5,0.0,3.333333333333333,3.6666666666666665,0.0)"
-movbe-mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbeq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-mem,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbe-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbeq-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pclmulqdq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pclmulqdq-xmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-clflush-mem,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-rdrand-,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)"
-rdrand-r32,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)"
-rdrandl-r32,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)"
-rdrand-r64,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)"
-rdrandq-r64,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)"
-pause-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)"
-vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vandpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vandps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vstmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vaddsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vsqrtsd-xmm_xmm_mem,13,None,"(1.0,13,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,13,None,"(1.0,13,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsqrtss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendvb-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpblendvb-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vzeroall-,16.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,16.0,0.0,0.0)"
-vcomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdivpd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,16,None,"(2.5,16,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_ymm,16,None,"(2.5,16,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,10,None,"(2.5,10,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_ymm,10,None,"(2.5,10,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-vpslld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvpd-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vblendvpd-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vblendvpd-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vblendvpd-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsllw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsubsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,14,None,"(2.5,14,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_ymm,14,None,"(2.5,14,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddd-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddd-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vsqrtpd-xmm_mem,13,None,"(1.0,13,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_xmm,13,None,"(1.0,13,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,26,None,"(2.5,26,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_ymm,26,None,"(2.5,26,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdpps-xmm_xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdpps-ymm_ymm_ymm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmaskmovpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmaskmovpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaskmovps-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmaskmovps-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmaxpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsignb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsignd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vxorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vxorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vxorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vroundsd-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundsd-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vxorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vxorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vxorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vhsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddsw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vminsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vblendvps-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vblendvps-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vblendvps-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vblendvps-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-rex.w vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-rex.w vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-rex.w vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-rex.w vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vzeroupper-,1.0833333333333333,None,"(1.0833333333333333,0.0,1.0833333333333333,0.0,0.0,0.0,1.0833333333333333,0.75,0.0)"
-vandnps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandnps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vandnps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandnps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandnpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandnpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vandnpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandnpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vblendpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vblendpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vblendps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vblendps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_ymm,2.5,None,"(2.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubd-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubd-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsrlw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_ymm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-ymm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-ymm_ymm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_ymm,2.5,None,"(2.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaskmovdqu-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddwd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubsw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpavgw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpavgw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpavgb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpavgb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsrlvq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaxsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsrlvd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpminsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpminsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxub-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxub-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendvb-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpblendvb-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsrad-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddd-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddd-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpmuldq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsignb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddusw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddusw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddusb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsignd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastw-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsravd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsravd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsravd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpabsw-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsw-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vphaddsw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddsw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpsubusb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubusb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubusw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpabsb-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsb-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vphsubw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vphsubd-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubd-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmulld-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxud-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaxuw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsrlw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaskmovq-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpmaskmovq-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpsubq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaskmovd-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpmaskmovd-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpsadbw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsadbw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpblendd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpblendd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminuw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminuw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminub-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpminud-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminud-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddwd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpabsd-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsd-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubsw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpsllvd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllvd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllvd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllvd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllvq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2ph-mem_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvtps2ph-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtps2ph-mem_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvtps2ph-xmm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vgatherqpd-ymm_mem_ymm,3.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,3.25,0.25,0.0)"
-vgatherqpd-xmm_mem_xmm,3.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,3.25,0.25,0.0)"
-vgatherqps-xmm_mem_xmm,5.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,5.25,0.25,0.0)"
-vgatherqps-xmm_mem_xmm,5.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,5.25,0.25,0.0)"
-vgatherdps-ymm_mem_ymm,4.25,None,"(0.25,0.0,0.25,4.0,4.0,1.0,4.25,0.25,0.0)"
-vgatherdps-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,4.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,4.25,0.25,0.0)"
-vpgatherqd-xmm_mem_xmm,4.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,4.25,0.25,0.0)"
-vgatherdpd-ymm_mem_ymm,3.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,3.25,0.25,0.0)"
-vgatherdpd-xmm_mem_xmm,3.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,3.25,0.25,0.0)"
-vpgatherqq-ymm_mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherqq-xmm_mem_xmm,3.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,3.25,0.25,0.0)"
-vpgatherdd-ymm_mem_ymm,4.25,None,"(0.25,0.0,0.25,4.0,4.0,1.0,4.25,0.25,0.0)"
-vpgatherdd-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherdq-ymm_mem_ymm,3.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,3.25,0.25,0.0)"
-vpgatherdq-xmm_mem_xmm,3.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,3.25,0.25,0.0)"
-vaesdec-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaesdec-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vaesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vaesenc-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaesenc-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaesenclast-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaesenclast-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaeskeygenassist-xmm_xmm_imd,7.666666666666667,None,"(2.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,7.666666666666667,0.0,0.0)"
-vaeskeygenassist-xmm_mem_imd,7.333333333333333,None,"(2.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,7.333333333333333,0.0,0.0)"
-shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
diff --git a/osaca/data/csx.yml b/osaca/data/csx.yml
new file mode 100644
index 0000000..b3ac7e9
--- /dev/null
+++ b/osaca/data/csx.yml
@@ -0,0 +1,540 @@
+osaca_version: 0.3.2
+micro_architecture: Cascade Lake SP
+arch_code: CSX
+isa: x86
+ROB_size: 224
+retired_uOps_per_cycle: 4
+scheduler_size: 97
+hidden_loads: false
+load_latency: {gpr: 4.0, xmm: 4.0, ymm: 4.0, zmm: 4.0}
+load_throughput:
+- {base: gpr, index: ~, offset: ~, scale: 1, port_pressure:     [[1, '23'], [1, ['2D', '3D']]]}
+- {base: gpr, index: ~, offset: ~, scale: 8, port_pressure:     [[1, '23'], [1, ['2D', '3D']]]}
+- {base: gpr, index: ~, offset: imd, scale: 1, port_pressure:   [[1, '23'], [1, ['2D', '3D']]]}
+- {base: gpr, index: ~, offset: imd, scale: 8, port_pressure:   [[1, '23'], [1, ['2D', '3D']]]}
+- {base: gpr, index: gpr, offset: ~, scale: 1, port_pressure:   [[1, '23'], [1, ['2D', '3D']]]}
+- {base: gpr, index: gpr, offset: ~, scale: 8, port_pressure:   [[1, '23'], [1, ['2D', '3D']]]}
+- {base: gpr, index: gpr, offset: imd, scale: 1, port_pressure: [[1, '23'], [1, ['2D', '3D']]]}
+- {base: gpr, index: gpr, offset: imd, scale: 8, port_pressure: [[1, '23'], [1, ['2D', '3D']]]}
+ports: ['0', 0DV, '1', '2', 2D, '3', 3D, '4', '5', '6', '7']
+port_model_scheme: |
+  ┌------------------------------------------------------------------------┐
+  |                         97 entry unified scheduler                     |
+  └------------------------------------------------------------------------┘
+     0 |       1 |      2 |     3 |     4 |      5 |        6 |       7 |
+       ▼         ▼        ▼       ▼       ▼        ▼          ▼         ▼
+   ┌-------┐ ┌-------┐ ┌-----┐ ┌-----┐ ┌-----┐ ┌-------┐ ┌--------┐  ┌-----┐
+   |  ALU  | |  ALU  | |  LD | |  LD | |  ST | |  ALU  | |  ALU & |  | AGU |
+   └-------┘ └-------┘ └-----┘ └-----┘ └-----┘ └-------┘ |  Shift |  └-----┘
+   ┌-------┐ ┌-------┐ ┌-----┐ ┌-----┐         ┌-------┐ └--------┘
+   |  2ND  | |  Fast | | AGU | | AGU |         |  Fast |
+   | BRANCH| |  LEA  | └-----┘ └-----┘         |  LEA  |
+   └-------┘ └-------┘                         └-------┘
+   ┌-------┐ ┌-------┐                         ┌-------┐
+   |AVX DIV| |AVX FMA|                         |  AVX  |
+   └-------┘ └-------┘                         |  SHUF |
+   ┌-------┐ ┌-------┐                         └-------┘
+   |AVX FMA| |AVX MUL|                         ┌-------┐
+   └-------┘ └-------┘                         |AVX-512|
+   ┌-------┐ ┌-------┐                         |  FMA  |
+   |AVX MUL| |AVX ADD|                         └-------┘
+   └-------┘ └-------┘                         ┌-------┐
+   ┌-------┐ ┌-------┐                         |AVX-512|
+   |AVX ADD| |AVX ALU|                         |  ADD  |
+   └-------┘ └-------┘                         └-------┘
+   ┌-------┐ ┌-------┐                         ┌-------┐
+   |AVX ALU| |  AVX  |                         |AVX-512|
+   └-------┘ | Shift |                         |  MUL  |
+   ┌-------┐ └-------┘                         └-------┘
+   |  AVX  | ┌-------┐                         ┌-------┐
+   | Shift | |  Slow |                         |AVX-512|
+   └-------┘ |  LEA  |                         |  ALU  |
+   ┌-------┐ └-------┘                         └-------┘
+   |  VNNI | ┌-------┐
+   └-------┘ |  VNNI |
+             └-------┘
+instruction_forms:
+- name: addsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: addss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: addl
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p0156
+  port_pressure: [[1, '0156']]
+- name: addq
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p0156
+  port_pressure: [[1, '0156']]
+- name: cmpl
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: ~  # 	1*p0156
+  port_pressure: [[1, '0156']]
+- name: cmpq
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: ~  # 	1*p0156
+  port_pressure: [[1, '0156']]
+- name: incq
+  operands:
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: ~  # 	1*p0156
+  port_pressure: [[1, '0156']]
+- name: ja
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: jb
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: jne
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: mulsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: mulss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: movl
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: movq
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: movq
+  operands:
+  - class: memory
+    base: gpr
+    offset: ~
+    index: ~
+    scale: 1
+  - class: register
+    name: gpr
+  throughput: 0.5
+  latency: 3.0  # 	1*p23+1*p2D3D
+  port_pressure: [[1, '23'], [1, [2D, 3D]]]
+- name: movq
+  operands:
+  - class: register
+    name: gpr
+  - class: memory
+    base: gpr
+    offset: imd
+    index: ~
+    scale: 1
+  throughput: 0.5
+  latency: 2.0  # 	1*p23+1*p4
+  port_pressure: [[1, '23'], [1, '4']]
+- name: rcpss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 1.0
+  latency: 4.0
+  port_pressure: ~
+- name: sqrtsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 6.0
+  latency: 22.0  # 	1*p0+6*p0DV
+  port_pressure: [[1, '0'], [6.0, [0DV]]]
+- name: sqrtss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 3.0
+  latency: 16.0  # 	1*p0+3*p0DV
+  port_pressure: [[1, '0'], [3.0, [0DV]]]
+- name: subq
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p0156
+  port_pressure: [[1, '0156']]
+- name: vaddpd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vaddpd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vaddsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vaddss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vdivsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 4.0
+  latency: 14.0  # 	1*p0+4*p0DV
+  port_pressure: [[1, '0'], [4.0, [0DV]]]
+- name: vdivss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 3.0
+  latency: 11.0  # 	1*p0+3*p0DV
+  port_pressure: [[1, '0'], [3.0, [0DV]]]
+- name: vfmadd213pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vfmadd132pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vfmadd231pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vfmadd132pd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vfmadd213pd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vfmadd231pd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulpd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmovapd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovapd
+  operands:
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  - class: register
+    name: xmm
+  throughput: 1.0
+  latency: 4.0  # 	1*p23+1*p2D3D
+  port_pressure: [[1, '23'], [1, [2D, 3D]]]
+- name: vmovapd
+  operands:
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	1*p23+1*p2D3D
+  port_pressure: [[1, '23'], [1, [2D, 3D]]]
+- name: vmovapd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p23+1*p4
+  port_pressure: [[1, '23'], [1, '4']]
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 5.0  # 	1*p23+1*p4
+  port_pressure: [[1, '23'], [1, '4']]
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 5.0  # 	1*p23+1*p4
+  port_pressure: [[1, '23'], [1, '4']]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 5.0  # 	1*p23+1*p4
+  port_pressure: [[1, '23'], [1, '4']]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 5.0  # 	1*p23+1*p4
+  port_pressure: [[1, '23'], [1, '4']]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovsd
+  operands:
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p23+1*p2D3D
+  port_pressure: [[1, '23'], [1, [2D, 3D]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p23+1*p4
+  port_pressure: [[1, '23'], [1, '4']]
diff --git a/osaca/data/hsw_data.csv b/osaca/data/hsw_data.csv
deleted file mode 100644
index 6bcab5d..0000000
--- a/osaca/data/hsw_data.csv
+++ /dev/null
@@ -1,3844 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sldt-,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldt-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldtl-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldt-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldtq-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-lgdt-mem,10.0,None,"(2.0,0.0,4.0,0.0,0.0,1.0,0.0,10.0,0.0)"
-call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-LBL,24.0,None,"(9.333333333333334,0.0,3.8333333333333335,1.0,1.0,2.0,10.833333333333334,24.0,0.0)"
-mov-LBL,11.0,None,"(11.0,0.0,3.0,0.0,0.0,0.0,6.0,10.0,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wrmsr-,43.5,None,"(20.5,0.0,23.5,0.0,0.0,1.0,19.5,43.5,0.0)"
-repe scasb-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lar-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-larl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-larq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-lar-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-larl-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-lar-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-larq-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-mem,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-cmovbe-mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovbe-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovle-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovle-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovlel-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovle-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovleq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovle-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovle-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovlel-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovle-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovleq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lsl-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lslq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-,6.5,None,"(1.5,0.0,3.5,1.0,1.0,0.0,1.5,6.5,0.0)"
-lsl-r32_r32,6.5,None,"(1.5,0.0,3.5,1.0,1.0,0.0,1.5,6.5,0.0)"
-lsl-r64_r32,6.5,None,"(1.5,0.0,3.5,1.0,1.0,0.0,1.5,6.5,0.0)"
-lahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpsw-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock adc-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adcb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adcl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adcq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-cmpsd-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-out-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-outb-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-outl-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-r16_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-r16_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-cmovnle-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnle-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnlel-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnle-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnleq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnle-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnle-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnlel-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnle-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnleq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-r8_r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r8_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-sbb-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-sbb-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-sbbl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-sbb-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-sbbq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lodsw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lodsd-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-std-,1.75,None,"(1.75,0.0,1.25,0.0,0.0,0.0,1.25,1.75,0.0)"
-stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sar-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sarb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sar-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sarb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sar-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sar-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sti-,3.75,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,3.75,0.0)"
-str-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rdmsr-,30.0,None,"(14.0,0.0,12.0,0.0,0.0,0.0,9.0,30.0,0.0)"
-rep lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-idiv-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)"
-idiv-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,2.5,1.5,0.0)"
-idivb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,2.5,1.5,0.0)"
-idiv-mem,3.0,None,"(2.5,0.0,3.0,0.5,0.5,0.0,3.0,0.5,0.0)"
-idiv-mem,20.25,None,"(15.25,0.0,10.75,0.5,0.5,0.0,9.75,20.25,0.0)"
-idiv-r32,24.75,None,"(24.75,0.0,15.25,0.0,0.0,0.0,13.75,12.25,0.0)"
-idivl-r32,24.75,None,"(24.75,0.0,15.25,0.0,0.0,0.0,13.75,12.25,0.0)"
-idiv-r64,24.75,None,"(24.75,0.0,15.25,0.0,0.0,0.0,13.75,12.25,0.0)"
-idivq-r64,24.75,None,"(24.75,0.0,15.25,0.0,0.0,0.0,13.75,12.25,0.0)"
-repne cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shr-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shr-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shr-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shr-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrdl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrdq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shrdb-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shrd-mem_r32_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shrd-mem_r64_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shrd-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shrdb-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shrd-r32_r32_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shrd-r64_r64_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-movsd-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsw-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shl-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shlb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-shl-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shlb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shl-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shl-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-mov-r64_r8,6.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.5,6.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-bts-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btsl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-bts-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btsq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btr-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btrl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btr-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btrq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sgdt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-loop-LBL,2.5,None,"(2.5,0.0,1.0,0.0,0.0,0.0,1.0,2.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btc-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btcl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btc-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btcq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wbinvd-,557552.0,None,"(138153.0,0.0,0.0,0.0,0.0,132837.0,56454.0,557552.0,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mul-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mulq-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cli-,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-cld-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-clc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lldt-mem,9.0,None,"(0.0,0.0,3.0,1.5,1.5,1.0,0.0,9.0,0.0)"
-lldt-,7.0,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,1.0,0.3333333333333333,7.0,0.0)"
-ret-imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-ret-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock subl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sub-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock subq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btc-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btc-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btcl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btc-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btcq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-setnbe-mem,1.0,None,"(0.75,0.0,0.25,0.5,0.5,1.0,0.25,0.75,0.0)"
-setnbe-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-setnbeb-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-verr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-verr-,6.0,None,"(2.0,0.0,2.0,0.0,0.0,0.0,3.0,6.0,0.0)"
-rep stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock andb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock andl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock and-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock andq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rdpmc-,11.75,None,"(10.083333333333334,0.0,5.083333333333334,0.0,0.0,0.0,7.083333333333334,11.75,0.0)"
-lock cmpxchg-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchg-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchg-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-cmovnp-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnp-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnpl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnp-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnpq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnp-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnp-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnpl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnp-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnpq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-ret far-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock orb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock orl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock or-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock orq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-enter-imd_imd,1.75,None,"(1.25,0.0,1.75,0.5,0.5,1.0,0.75,1.25,0.0)"
-repne scasb-,10.166666666666666,None,"(10.166666666666666,0.0,6.166666666666666,1.5,1.5,0.0,6.166666666666666,6.5,0.0)"
-leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xadd-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddb-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddl-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddq-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lidt-mem,10.0,None,"(2.0,0.0,4.0,0.0,0.0,1.0,0.0,10.0,0.0)"
-xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xchg-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchgb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchgb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-lock xchg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchg-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchgl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchg-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xchgq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchgl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchgq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-xchg-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-smsw-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-smsw-,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)"
-smsw-r32,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)"
-smswl-r32,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)"
-smsw-r64,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)"
-smswq-r64,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cpuid-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-rdtsc-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock addb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock addl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock add-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock addq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-sidt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock sbb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbbl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbbq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-insb-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-insd-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-imul-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-imulq-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcr-r8_r8,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,1.5,2.5,0.0)"
-rcrb-r8_r8,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,1.5,2.5,0.0)"
-rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-rcr-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcrb-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcr-r32_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcr-r64_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcl-r8_r8,2.75,None,"(2.75,0.0,2.25,0.0,0.0,0.0,1.25,2.75,0.0)"
-rclb-r8_r8,2.75,None,"(2.75,0.0,2.25,0.0,0.0,0.0,1.25,2.75,0.0)"
-rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcl-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rclb-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcl-r32_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-rcl-r64_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-insw-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-div-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)"
-div-r8,2.25,None,"(2.25,0.0,2.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-divb-r8,2.25,None,"(2.25,0.0,2.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-div-mem,3.0,None,"(3.0,0.0,3.0,0.5,0.5,0.0,3.0,1.0,0.0)"
-div-mem,12.0,None,"(7.333333333333334,0.0,6.333333333333334,0.5,0.5,0.0,5.333333333333334,12.0,0.0)"
-div-r32,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)"
-divl-r32,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)"
-div-r64,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)"
-divq-r64,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)"
-stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rep movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-in-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-inb-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-inl-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r8_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r32_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-cmovnz-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnz-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnzl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnz-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnzq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnz-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnz-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnzl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnz-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnzq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovns-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovns-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnsl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovns-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnsq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovns-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovns-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnsl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovns-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnsq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovno-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovno-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnol-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovno-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnoq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovno-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovno-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnol-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovno-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnoq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnl-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnl-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnlq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnl-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnl-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnlq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnb-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnb-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnbl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnb-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnbq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovnb-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnb-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnbl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnb-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovnbq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovo-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovo-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovol-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovo-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovoq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovo-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovo-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovol-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovo-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovoq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-bt-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-bt-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-btq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-shld-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shldl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shldq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shldb-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shld-mem_r32_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shld-mem_r64_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-shld-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shldb-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shld-r32_r32_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-shld-r64_r64_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-invlpg-mem,14.0,None,"(7.333333333333333,0.0,7.333333333333333,2.5,2.5,5.0,8.333333333333334,14.0,0.0)"
-sahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovz-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovz-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovzl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovz-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovzq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovz-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovz-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovzl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovz-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovzq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovp-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovp-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovpl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovp-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovpq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovp-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovp-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovpl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovp-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovpq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovs-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovs-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovsl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovs-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovsq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovs-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovs-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovsl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovs-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovsq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovl-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovl-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovlq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovl-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovl-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovlq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovb-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovb-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovbl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovb-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovbq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-cmovb-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovb-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovbl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovb-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-cmovbq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lmsw-mem,11.0,None,"(2.0,0.0,4.5,1.0,1.0,1.0,5.5,11.0,0.0)"
-lmsw-,9.5,None,"(1.8333333333333333,0.0,2.833333333333333,0.5,0.5,1.0,4.833333333333333,9.5,0.0)"
-lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock bts-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock bts-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btsl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock bts-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btsq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xorb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xorl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xor-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock xorq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-repe cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-clts-,3.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,3.0,0.0)"
-movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rol-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rolb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-rol-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rolb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rol-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rol-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-verw-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-verw-,6.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,4.0,6.0,0.0)"
-jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rorb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-rorb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-ror-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-ror-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbe-mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)"
-cmovnbe-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-subl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-subq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmpxchg8b-mem,3.25,None,"(3.25,0.0,2.25,1.0,1.0,1.0,2.25,3.25,0.0)"
-lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)"
-lock btr-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btr-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btrl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btr-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-lock btrq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-r8_r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r8_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-adcb-r8_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-adc-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-adc-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-adcl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-adc-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-adcq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock cmpxchg8b-mem,3.75,None,"(3.75,0.0,2.75,1.0,1.0,1.0,2.75,3.75,0.0)"
-cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lea-mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setbe-mem,1.0,None,"(0.75,0.0,0.25,0.5,0.5,1.0,0.25,0.75,0.0)"
-setbe-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-setbeb-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-bswap-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapl-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-jmp far-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-divps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxsave64-mem,38.0,None,"(11.0,0.0,14.0,20.0,20.0,38.0,20.0,17.0,0.0)"
-andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,19.166666666666668,None,"(19.166666666666668,0.0,16.166666666666668,15.5,15.5,0.0,14.166666666666668,7.5,0.0)"
-fxsave-mem,38.0,None,"(11.0,0.0,14.0,20.0,20.0,38.0,20.0,17.0,0.0)"
-sqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fxrstor-mem,18.666666666666668,None,"(18.666666666666668,0.0,16.666666666666668,16.5,16.5,0.0,14.666666666666668,7.0,0.0)"
-stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-comiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pcmpgtw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpgtb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpgtd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maskmovdqu-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psadbw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmullw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divsd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divsd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq2dq-xmm_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psubb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pslld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pslld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtsd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtsd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psllw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psllq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psllq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmulhw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psrlq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psrlw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psrld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-cvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,0.8333333333333333,None,"(0.8333333333333333,0.0,0.8333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pavgw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pavgw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psubsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pavgb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pavgb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psraw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psraw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-comisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psrad-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvttpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcomi-fpu,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldl2t-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldl2e-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fyl2x-,4.5,None,"(4.5,0.0,4.5,0.0,0.0,0.0,0.5,1.5,0.0)"
-fcmovnu-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-fcomip-fpu,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmovnb-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-fcmovne-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmovbe-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-fxtract-,2.5,None,"(0.5,0.0,2.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcompp-,1.5,None,"(0.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fyl2xp1-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-frndint-,7.75,None,"(7.75,0.0,6.75,0.0,0.0,0.0,1.75,1.75,0.0)"
-fnclex-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-fptan-,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fcos-,9.5,None,"(9.5,0.0,6.0,0.0,0.0,0.0,3.0,2.5,0.0)"
-fscale-,2.75,None,"(2.25,0.0,2.75,0.0,0.0,0.0,0.75,1.25,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fxam-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ffree-fpu,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fprem1-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-fpu,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fninit-,7.5,None,"(3.0,0.0,3.0,0.0,0.0,0.0,7.5,1.5,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fnop-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fldpi-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fnstsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fnstsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-fwait-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-fcmovnbe-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-f2xm1-,5.25,None,"(5.25,0.0,3.75,0.0,0.0,0.0,0.75,2.25,0.0)"
-fprem-,2.25,None,"(2.25,0.0,2.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-fincstp-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldenv-mem,18.833333333333332,None,"(18.833333333333332,0.0,15.833333333333332,4.0,4.0,0.0,12.833333333333332,8.5,0.0)"
-fldenv-mem,18.833333333333332,None,"(18.833333333333332,0.0,15.833333333333332,4.0,4.0,0.0,12.833333333333332,8.5,0.0)"
-fpatan-,31.25,None,"(31.25,0.0,13.25,0.0,0.0,0.0,5.25,5.25,0.0)"
-fst-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fst-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fst-fpu,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmovu-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsin-,10.75,None,"(10.75,0.0,5.75,0.0,0.0,0.0,2.75,2.75,0.0)"
-fcmove-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldcw-mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-fcmovb-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldln2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxch-fpu,6.0,None,"(6.0,0.0,3.0,0.0,0.0,0.0,3.0,3.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fld-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucomi-fpu,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdecstp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldlg2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldz-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fbstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fucompp-,1.5,None,"(0.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fnstenv-mem,28.833333333333332,None,"(28.833333333333332,0.0,18.833333333333332,5.5,5.5,11.0,17.333333333333332,13.0,0.0)"
-fnstenv-mem,28.833333333333332,None,"(28.833333333333332,0.0,18.833333333333332,5.5,5.5,11.0,17.333333333333332,13.0,0.0)"
-fld1-,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsincos-,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucomip-fpu,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fnstcw-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pcmpgtw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpgtb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpgtd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpgtd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packuswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-psubd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psadbw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packssdw-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pcmpeqd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pxor-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psubb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pandn-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-emms-,12.583333333333332,None,"(9.583333333333332,0.0,12.583333333333332,0.0,0.0,0.0,8.583333333333332,0.25,0.0)"
-punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaxub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-psubsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pavgw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pavgw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pavgb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pavgb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-maskmovq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packsswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-repe scasq-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)"
-cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-syscall-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-repne cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-pushfq-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rep movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-swapgs-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-repne scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-popfq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-repe cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-iretq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lock cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)"
-bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-roundpd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundpd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-roundps-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundps-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mpsadbw-xmm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-mpsadbw-xmm_xmm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmulld-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulld-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pminsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-rex.w pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-rex.w pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-rex.w pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-rex.w pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-pmuldq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuldq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-dpps-xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-dpps-xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pmaxud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pminud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pminud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-blendvps-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-blendvps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-blendvpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-blendvpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-roundss-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundss-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-roundsd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-roundsd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendvb-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-pblendvb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-phsubd-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubd-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubd-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubd-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-psignw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-phaddsw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddsw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddsw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddsw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubsw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubsw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubsw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubsw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-pabsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-phaddd-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddd-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddd-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddd-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pabsd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-phaddw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vmclear-mem,4.5,None,"(3.5,0.0,3.5,1.0,1.0,1.0,4.5,3.5,0.0)"
-vmptrst-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-xsetbv-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)"
-xgetbv-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-xrstor-mem,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,4.0,4.5,0.0)"
-xrstor64-mem,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,4.0,4.5,0.0)"
-xsave-mem,8.5,None,"(8.5,0.0,5.5,1.0,1.0,1.0,5.5,5.5,0.0)"
-xsave64-mem,7.916666666666666,None,"(7.916666666666666,0.0,5.416666666666666,1.0,1.0,1.0,5.416666666666666,5.25,0.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-rdtscp-,7.333333333333333,None,"(5.333333333333333,0.0,5.333333333333333,0.0,0.0,0.0,7.333333333333333,4.0,0.0)"
-aesdec-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-aesdec-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-aeskeygenassist-xmm_xmm_imd,7.666666666666667,None,"(2.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,7.666666666666667,0.0,0.0)"
-aeskeygenassist-xmm_mem_imd,7.333333333333333,None,"(2.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,7.333333333333333,0.0,0.0)"
-aesenclast-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-aesenclast-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-aesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-aesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-aesdeclast-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-aesdeclast-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-aesenc-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-aesenc-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-xsaveopt64-mem,9.75,None,"(9.75,0.0,6.75,1.0,1.0,1.0,6.75,5.75,0.0)"
-xsaveopt-mem,8.5,None,"(8.5,0.0,5.5,1.0,1.0,1.0,5.5,5.5,0.0)"
-mwait-,2.75,None,"(2.75,0.0,1.75,0.0,0.0,0.0,2.75,2.75,0.0)"
-movbe-mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbeq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-mem,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbe-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbeq-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-prefetchwt1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pclmulqdq-xmm_xmm_imd,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pclmulqdq-xmm_mem_imd,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-clflush-mem,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-rdrand-,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)"
-rdrand-r32,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)"
-rdrandl-r32,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)"
-rdrand-r64,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)"
-rdrandq-r64,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)"
-pause-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)"
-vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vandpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vandps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vstmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vaddsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vsqrtsd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsqrtss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendvb-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpblendvb-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vzeroall-,16.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,16.0,0.0,0.0)"
-vcomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdivpd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,28,None,"(2.5,28,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_ymm,28,None,"(2.5,28,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,14,None,"(2.5,14,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_ymm,14,None,"(2.5,14,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-vpslld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvpd-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vblendvpd-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vblendvpd-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vblendvpd-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsllw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsubsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,14,None,"(2.5,14,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_ymm,14,None,"(2.5,14,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddd-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddd-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vsqrtpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,28,None,"(2.5,28,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_ymm,28,None,"(2.5,28,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdpps-xmm_xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdpps-ymm_ymm_ymm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmaskmovpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmaskmovpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaskmovps-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmaskmovps-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmaxpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsignb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsignd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vxorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vxorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vxorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vroundsd-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundsd-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vxorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vxorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vxorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vhsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddsw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vminsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vblendvps-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vblendvps-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vblendvps-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vblendvps-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-rex.w vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-rex.w vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-rex.w vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-rex.w vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vzeroupper-,1.0833333333333333,None,"(1.0833333333333333,0.0,1.0833333333333333,0.0,0.0,0.0,1.0833333333333333,0.75,0.0)"
-vandnps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandnps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vandnps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandnps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandnpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandnpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vandnpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandnpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vblendpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vblendpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vblendps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vblendps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_ymm,2.5,None,"(2.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubd-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubd-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsrlw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_ymm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-ymm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-ymm_ymm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_xmm_imd,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_ymm,2.5,None,"(2.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaskmovdqu-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddwd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubsw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpavgw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpavgw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpavgb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpavgb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsrlvq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaxsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsrlvd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpminsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpminsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxub-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxub-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendvb-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpblendvb-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsrad-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddd-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddd-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpmuldq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsignb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddusw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddusw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddusb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsignd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsignd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastw-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsravd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsravd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsravd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpabsw-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsw-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vphaddsw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphaddsw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpsubusb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubusb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubusw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpabsb-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsb-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vphsubw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vphsubd-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubd-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmulld-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxud-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaxuw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsrlw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaskmovq-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpmaskmovq-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpsubq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaskmovd-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpmaskmovd-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-vpsadbw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsadbw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpblendd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpblendd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminuw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminuw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminub-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpminud-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminud-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddwd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpabsd-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsd-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)"
-vphsubsw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpsllvd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllvd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllvd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllvd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllvq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2ph-mem_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vcvtps2ph-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtps2ph-mem_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vcvtps2ph-xmm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vgatherqpd-ymm_mem_ymm,8.666666666666668,None,"(8.666666666666668,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)"
-vgatherqpd-xmm_mem_xmm,5.0,None,"(5.0,0.0,1.5,1.0,1.0,0.0,4.5,1.0,0.0)"
-vgatherqps-xmm_mem_xmm,6.0,None,"(6.0,0.0,3.0,1.0,1.0,0.0,0.0,1.0,0.0)"
-vgatherqps-xmm_mem_xmm,6.0,None,"(6.0,0.0,3.0,1.0,1.0,0.0,0.0,1.0,0.0)"
-vgatherdps-ymm_mem_ymm,12.0,None,"(12.0,0.0,3.5,4.0,4.0,0.0,6.5,4.0,0.0)"
-vgatherdps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,8.666666666666668,None,"(8.666666666666668,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)"
-vpgatherqd-xmm_mem_xmm,8.666666666666668,None,"(8.666666666666668,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)"
-vgatherdpd-ymm_mem_ymm,6.666666666666667,None,"(6.666666666666667,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)"
-vgatherdpd-xmm_mem_xmm,4.0,None,"(4.0,0.0,1.5,1.0,1.0,0.0,3.5,1.0,0.0)"
-vpgatherqq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqq-xmm_mem_xmm,5.0,None,"(5.0,0.0,1.5,1.0,1.0,0.0,4.5,1.0,0.0)"
-vpgatherdd-ymm_mem_ymm,12.0,None,"(12.0,0.0,3.5,4.0,4.0,0.0,6.5,4.0,0.0)"
-vpgatherdd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdq-ymm_mem_ymm,6.666666666666667,None,"(6.666666666666667,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)"
-vpgatherdq-xmm_mem_xmm,4.0,None,"(4.0,0.0,1.5,1.0,1.0,0.0,3.5,1.0,0.0)"
-vaesdec-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaesdec-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vaesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vaesenc-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaesenc-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaesenclast-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaesenclast-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaeskeygenassist-xmm_xmm_imd,7.666666666666667,None,"(2.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,7.666666666666667,0.0,0.0)"
-vaeskeygenassist-xmm_mem_imd,7.333333333333333,None,"(2.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,7.333333333333333,0.0,0.0)"
-shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulx-r64_r64_r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mulxq-r64_r64_r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mulx-r64_r64_mem,1.0,None,"(0.5,0.0,1.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mulxq-r64_r64_mem,1.0,None,"(0.5,0.0,1.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
diff --git a/osaca/data/isa/aarch64.yml b/osaca/data/isa/aarch64.yml
new file mode 100644
index 0000000..6ba17e0
--- /dev/null
+++ b/osaca/data/isa/aarch64.yml
@@ -0,0 +1,374 @@
+osaca_version: 0.3.0
+isa: "AArch64"
+# Contains all operand-irregular instruction forms OSACA supports for AArch64.
+# Operand-regular for a AArch64 instruction form with N operands in the shape of
+#   mnemonic op1 ... opN
+# means that op1 is the only destination operand and op2 to op(N) are source operands.
+instruction_forms:
+    - name: "fmla"
+      operands:
+        - class: "register"
+          prefix: "v"
+          shape: "s"
+          source: true
+          destination: true
+        - class: "register"
+          prefix: "v"
+          shape: "s"
+          source: true
+          destination: false
+        - class: "register"
+          prefix: "v"
+          shape: "s"
+          source: true
+          destination: false
+    - name: "fmla"
+      operands:
+        - class: "register"
+          prefix: "v"
+          shape: "d"
+          source: true
+          destination: true
+        - class: "register"
+          prefix: "v"
+          shape: "d"
+          source: true
+          destination: false
+        - class: "register"
+          prefix: "v"
+          shape: "d"
+          source: true
+          destination: false
+    - name: "ldp"
+      operands:
+        - class: "register"
+          prefix: "d"
+          source: false
+          destination: true
+        - class: "register"
+          prefix: "d"
+          source: false
+          destination: true
+        - class: "memory"
+          base: "x"
+          offset: "imd"
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: true
+          destination: false
+    - name: "ldp"
+      operands:
+        - class: "register"
+          prefix: "d"
+          source: false
+          destination: true
+        - class: "register"
+          prefix: "d"
+          source: false
+          destination: true
+        - class: "memory"
+          base: "x"
+          offset: "imd"
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: true
+          source: true
+          destination: false   
+    - name: "ldp"
+      operands:
+        - class: "register"
+          prefix: "d"
+          source: false
+          destination: true
+        - class: "register"
+          prefix: "d"
+          source: false
+          destination: true
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: true
+          source: true
+          destination: false
+    - name: "ldp"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: false
+          destination: true
+        - class: "register"
+          prefix: "q"
+          source: false
+          destination: true
+        - class: "memory"
+          base: "x"
+          offset: "imd"
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: true
+          destination: false
+    - name: "ldp"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: false
+          destination: true
+        - class: "register"
+          prefix: "q"
+          source: false
+          destination: true
+        - class: "memory"
+          base: "x"
+          offset: ~ 
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: true 
+          source: true
+          destination: false
+    - name: "ldp"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: false
+          destination: true
+        - class: "register"
+          prefix: "q"
+          source: false
+          destination: true
+        - class: "memory"
+          base: "x"
+          offset: ~ 
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: true
+          destination: false
+    - name: "ldp"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: false
+          destination: true
+        - class: "register"
+          prefix: "q"
+          source: false
+          destination: true
+        - class: "memory"
+          base: "x"
+          offset: "imd" 
+          index: ~
+          scale: 1
+          pre-indexed: true
+          post-indexed: false 
+          source: true
+          destination: true
+    - name: "stp"
+      operands:
+        - class: "register"
+          prefix: "d"
+          source: true
+          destination: false
+        - class: "register"
+          prefix: "d"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: false
+          destination: true   
+    - name: "stp"
+      operands:
+        - class: "register"
+          prefix: "d"
+          source: true
+          destination: false
+        - class: "register"
+          prefix: "d"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: "imd"
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: false
+          destination: true
+    - name: "stp"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: false
+          destination: true
+    - name: "stp"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: True
+          source: false
+          destination: true
+    - name: "stp"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: "imd"
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: false
+          destination: true
+    - name: "str"
+      operands:
+        - class: "register"
+          prefix: "x"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: false
+          destination: true
+    - name: "str"
+      operands:
+        - class: "register"
+          prefix: "d"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: "imd"
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: false
+          destination: true
+    - name: "str"
+      operands:
+        - class: "register"
+          prefix: "d"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: true
+          source: false
+          destination: true
+    - name: "str"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: "x"
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: false
+          destination: true
+    - name: "str"
+      operands:
+        - class: "register"
+          prefix: "q"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: true
+          source: false
+          destination: true
+    - name: "str"
+      operands:
+        - class: "register"
+          prefix: "x"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: ~
+          scale: 1
+          pre-indexed: false
+          post-indexed: true
+          source: false
+          destination: true
+    - name: "str"
+      operands:
+        - class: "register"
+          prefix: "x"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "x"
+          offset: ~
+          index: "x"
+          scale: 1
+          pre-indexed: false
+          post-indexed: false
+          source: false
+          destination: true
diff --git a/osaca/data/isa/x86.yml b/osaca/data/isa/x86.yml
new file mode 100644
index 0000000..00c8982
--- /dev/null
+++ b/osaca/data/isa/x86.yml
@@ -0,0 +1,218 @@
+osaca_version: 0.3.0
+isa: "x86"
+# Contains all operand-irregular instruction forms OSACA supports for x86.
+# Operand-regular for a x86 AT&T instruction form with N operands in the shape of
+#   mnemonic op1 ... opN
+# means that opN is the only destination operand and op1 to op(N-1) are source operands.
+instruction_forms:
+    - name: addl
+      operands:
+        - class: "immediate"
+          imd: "int"
+          source: true
+          destination: false
+        - class: "register"
+          name: "gpr"
+          source: true
+          destination: true
+    - name: addq
+      operands:
+        - class: "immediate"
+          imd: "int"
+          source: true
+          destination: false
+        - class: "register"
+          name: "gpr"
+          source: true
+          destination: true
+    - name: addsd
+      operands:
+        - class: "register"
+          name: "xmm"
+          source: true
+          destination: true
+        - class: "register"
+          name: "xmm"
+          source: true
+          destination: false
+    - name: addss
+      operands:
+        - class: "register"
+          name: "xmm"
+          source: true
+          destination: true
+        - class: "register"
+          name: "xmm"
+          source: true
+          destination: false
+    - name: cmpl
+      operands:
+        - class: "register"
+          name: "gpr"
+          source: true
+          destination: false
+        - class: "register"
+          name: "gpr"
+          source: true
+          destination: false
+    - name: cmpq
+      operands:
+        - class: "register"
+          name: "gpr"
+          source: true
+          destination: false
+        - class: "register"
+          name: "gpr"
+          source: true
+          destination: false
+    - name: cmpq
+      operands:
+        - class: "register"
+          name: "gpr"
+          source: true
+          destination: false
+        - class: "memory"
+          base: "gpr"
+          offset: "imd"
+          index: ~
+          scale: 1
+          source: true
+          destination: false
+    - name: ja
+      operands:
+        - class: "identifier"
+          source: true
+          destination: false
+    - name: mulsd
+      operands:
+        - class: "register"
+          name: "xmm"
+          source: true
+          destination: true
+        - class: "register"
+          name: "xmm"
+          source: true
+          destination: false
+    - name: mulss
+      operands:
+        - class: "register"
+          name: "xmm"
+          source: true
+          destination: true
+        - class: "register"
+          name: "xmm"
+          source: true
+          destination: false
+    - name: subq
+      operands:
+        - class: "immediate"
+          imd: "int"
+          source: true
+          destination: false
+        - class: "register"
+          name: "gpr"
+          source: true
+          destination: true
+    - name: vfmadd132pd
+      operands:
+        - class: "memory"
+          base: "gpr"
+          offset: ~
+          index: "gpr"
+          scale: 1
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: true
+    - name: vfmadd132pd
+      operands:
+        - class: "memory"
+          base: "gpr"
+          offset: "imd"
+          index: "gpr"
+          scale: 1
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: true
+    - name: vfmadd213pd
+      operands:
+        - class: "memory"
+          base: "gpr"
+          offset: ~
+          index: "gpr"
+          scale: 1
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: true
+    - name: vfmadd213pd
+      operands:
+        - class: "memory"
+          base: "gpr"
+          offset: "imd"
+          index: "gpr"
+          scale: 1
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: true
+    - name: vfmadd231pd
+      operands:
+        - class: "memory"
+          base: "gpr"
+          offset: "imd"
+          index: "gpr"
+          scale: 1
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: true
+    - name: vfmadd231pd
+      operands:
+        - class: "memory"
+          base: "gpr"
+          offset: ~
+          index: "gpr"
+          scale: 1
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: false
+        - class: "register"
+          name: "ymm"
+          source: true
+          destination: true
+
diff --git a/osaca/data/ivb_data.csv b/osaca/data/ivb_data.csv
deleted file mode 100644
index d50c253..0000000
--- a/osaca/data/ivb_data.csv
+++ /dev/null
@@ -1,3179 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,1.0,3.3333333333333335)"
-sldt-,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-sldt-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-sldtl-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-sldt-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-sldtq-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-lgdt-mem,11.0,None,"(2.0,0.0,2.0,0.0,0.0,1.0,11.0)"
-call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-mov-LBL,24.0,None,"(15.5,0.0,6.5,0.0,0.0,1.0,24.0)"
-mov-LBL,15.0,None,"(10.5,0.0,3.5,0.0,0.0,0.0,15.0)"
-jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-wrmsr-,54.5,None,"(33.0,0.0,19.5,0.0,0.0,1.0,54.5)"
-repe scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cmc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cmovbe-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbe-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbel-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbe-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbeq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbe-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovbe-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovbel-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovbe-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovbeq-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_r8,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpb-mem_r8,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_r32,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpl-mem_r32,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_r64,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpq-mem_r64,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmovle-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovle-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovlel-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovle-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovleq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lsl-mem,30.0,None,"(6.0,0.0,0.0,0.0,0.0,0.0,30.0)"
-lsl-r32_mem,30.0,None,"(6.0,0.0,0.0,0.0,0.0,0.0,30.0)"
-lsl-r64_mem,30.0,None,"(6.0,0.0,0.0,0.0,0.0,0.0,30.0)"
-lslq-r64_mem,30.0,None,"(6.0,0.0,0.0,0.0,0.0,0.0,30.0)"
-lsl-,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)"
-lsl-r32_r32,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)"
-lsl-r64_r32,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)"
-lahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cbw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpsw-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adcb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adc-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adc-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adcl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adc-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adcq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-cmpsd-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-out-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-outb-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-outl-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-r16_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-out-r16_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-cmovnle-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnle-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnlel-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnle-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnleq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbb-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbb-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbbl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbb-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbbq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbb-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lodsb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)"
-lodsw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)"
-lodsd-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-std-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-stosd-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xorb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xor-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xor-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xorl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xor-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xorq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-stc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sti-,3.6666666666666665,None,"(0.6666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-str-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,1.0,3.3333333333333335)"
-str-,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-str-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-strl-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-str-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-strq-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-stosb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-rdmsr-,44.5,None,"(20.0,0.0,11.5,0.0,0.0,0.0,44.5)"
-rep lodsb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-idiv-mem,2.3333333333333335,None,"(2.3333333333333335,0.0,2.3333333333333335,0.5,0.5,0.0,2.3333333333333335)"
-idiv-r8,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)"
-idivb-r8,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)"
-idiv-mem,3.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.5,0.5,0.0,3.333333333333333)"
-idiv-mem,28.0,None,"(20.5,0.0,16.5,0.5,0.5,0.0,28.0)"
-idiv-r32,3.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.0,0.0,0.0,3.333333333333333)"
-idivl-r32,3.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.0,0.0,0.0,3.333333333333333)"
-idiv-r64,28.0,None,"(20.5,0.0,15.5,0.0,0.0,0.0,28.0)"
-idivq-r64,28.0,None,"(20.5,0.0,15.5,0.0,0.0,0.0,28.0)"
-repne cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shrd-mem_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrd-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrdl-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrd-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrdq-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrd-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrd-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrdl-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrd-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrdq-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrd-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shrdb-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shrd-mem_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shrd-mem_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shrd-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shrdb-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shrd-r32_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shrd-r64_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-movsd-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsw-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-mov-r64_r8,4.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,4.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bts-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btsl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bts-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btsq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btr-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btrl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btr-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btrq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sgdt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,2.0,2.3333333333333335)"
-loop-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btc-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btcl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btc-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btcq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-wbinvd-,294978.0,None,"(184405.0,0.0,0.0,0.0,0.0,135105.0,294978.0)"
-jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-mul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-mul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-push-r16,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pushw-r16,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-push-r16,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-pushw-r16,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cli-,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-cld-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-clc-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lldt-mem,8.333333333333334,None,"(0.3333333333333333,0.0,3.3333333333333335,1.5,1.5,1.0,8.333333333333334)"
-lldt-,6.666666666666667,None,"(0.6666666666666666,0.0,3.6666666666666665,1.0,1.0,1.0,6.666666666666667)"
-ret-imd,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-ret-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btc-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btcl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btc-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btcq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cmpxchg-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchgb-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchg-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgb-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchg-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchgl-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchg-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchgq-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchg-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgl-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchg-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgq-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-verr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)"
-verr-,8.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,8.0)"
-rep stosb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-cwd-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-scasw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-scasd-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rdpmc-,13.833333333333332,None,"(13.333333333333334,0.0,7.833333333333333,0.0,0.0,0.0,13.833333333333332)"
-lock cmpxchg-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchgb-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchg-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchgl-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchg-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchgq-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-cmovnp-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnp-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnpl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnp-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnpq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-ret far-,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-enter-imd_imd,16.0,None,"(10.0,0.0,0.0,0.0,0.0,2.0,16.0)"
-repne scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-leave-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-lock xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lidt-mem,11.0,None,"(2.0,0.0,2.0,0.0,0.0,1.0,11.0)"
-xlat-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)"
-lock xchg-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lock xchgb-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgb-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r8_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgb-r8_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lock xchg-mem,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-lock xchg-mem_r32,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-lock xchgl-mem_r32,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-lock xchg-mem_r64,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-lock xchgq-mem_r64,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-xchg-mem,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-xchg-mem_r32,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-xchgl-mem_r32,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-xchg-mem_r64,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-xchgq-mem_r64,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)"
-xchg-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-smsw-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,0.5,0.5,1.0,3.3333333333333335)"
-smsw-,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-smsw-r32,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-smswl-r32,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-smsw-r64,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-smswq-r64,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-andb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-and-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-and-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-andl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-and-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-andq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-mov-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-mov-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-mov-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-mov-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cpuid-,42.0,None,"(13.0,0.0,0.0,0.0,0.0,0.0,42.0)"
-rdtsc-,9.0,None,"(6.5,0.0,5.5,0.0,0.0,0.0,9.0)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sidt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,2.0,1.3333333333333333)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbb-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbb-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbbl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbb-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbbq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.3333333333333333,None,"(0.8333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-imul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r32,1.3333333333333333,None,"(0.8333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-imul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,4.333333333333334,None,"(4.333333333333334,0.0,1.8333333333333333,1.0,1.0,1.0,3.8333333333333335)"
-rcr-r8_imd,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)"
-rcrb-r8_imd,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)"
-rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-imd,3.6666666666666665,None,"(2.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-rcr-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcrl-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcrq-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcrb-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcr-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcrl-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcr-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcrq-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcr-mem_r8,4.333333333333334,None,"(3.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,4.333333333333334)"
-rcrb-mem_r8,4.333333333333334,None,"(3.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,4.333333333333334)"
-rcr-r8_r8,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)"
-rcrb-r8_r8,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)"
-rcr-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)"
-rcrb-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)"
-rcr-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)"
-rcrb-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)"
-rcr-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)"
-rcrb-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)"
-rcr-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcrb-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-r32_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-r64_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcl-mem_imd,4.5,None,"(4.0,0.0,1.5,1.0,1.0,1.0,4.5)"
-rcl-r8_imd,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-rclb-r8_imd,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcl-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcl-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rclq-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rclb-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcl-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcl-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rclq-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcl-mem_r8,4.5,None,"(4.0,0.0,1.5,1.0,1.0,1.0,4.5)"
-rclb-mem_r8,4.5,None,"(4.0,0.0,1.5,1.0,1.0,1.0,4.5)"
-rcl-r8_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-rclb-r8_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rclb-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcl-r32_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcl-r64_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-div-mem,2.3333333333333335,None,"(2.3333333333333335,0.0,2.3333333333333335,0.5,0.5,0.0,2.3333333333333335)"
-div-r8,3.6666666666666665,None,"(2.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-divb-r8,3.6666666666666665,None,"(2.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-div-mem,4.5,None,"(2.5,0.0,3.0,0.5,0.5,0.0,4.5)"
-div-mem,15.0,None,"(9.0,0.0,7.0,0.5,0.5,0.0,15.0)"
-div-r32,4.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.0,0.0,0.0,4.333333333333333)"
-divl-r32,4.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.0,0.0,0.0,4.333333333333333)"
-div-r64,15.333333333333332,None,"(9.333333333333334,0.0,7.333333333333333,0.0,0.0,0.0,15.333333333333332)"
-divq-r64,15.333333333333332,None,"(9.333333333333334,0.0,7.333333333333333,0.0,0.0,0.0,15.333333333333332)"
-stosw-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-rep movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-cmovnz-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnz-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnzl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnz-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnzq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovns-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnsl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovns-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnsq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovns-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovno-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnol-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovno-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnoq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovno-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnl-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnlq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovo-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovol-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovo-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovoq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovo-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bt-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bt-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-jrcxz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-shld-mem_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shld-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shldl-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shld-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shldq-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shld-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shld-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shldl-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shld-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shldq-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shld-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shldb-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shld-mem_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shld-mem_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shld-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shldb-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shld-r32_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shld-r64_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-invlpg-mem,19.333333333333332,None,"(10.333333333333334,0.0,10.333333333333334,2.0,2.0,4.0,19.333333333333332)"
-sahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmovz-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovz-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovzl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovz-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovzq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovp-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovpl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovp-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovpq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovs-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovsl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovs-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovsq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovs-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovl-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovlq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lmsw-mem,10.666666666666666,None,"(3.6666666666666665,0.0,5.666666666666667,1.0,1.0,1.0,10.666666666666666)"
-lmsw-,9.333333333333334,None,"(4.333333333333333,0.0,2.333333333333333,0.5,0.5,1.0,9.333333333333334)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock bts-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btsl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock bts-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btsq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-orb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-or-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-or-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-orl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-or-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-orq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-repe cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-clts-,5.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,5.0)"
-movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rolb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-r8_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rolb-r8_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rolb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rolb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rolb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-r32_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-r64_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-verw-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)"
-verw-,8.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,8.0)"
-jmp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-r8_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorb-r8_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-r32_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-r64_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmovnbe-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbe-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbel-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbe-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbeq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbe-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovnbe-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovnbel-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovnbe-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovnbeq-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-sub-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-sub-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-subl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-sub-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-subq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmpxchg8b-mem,5.0,None,"(3.5,0.0,2.5,1.0,1.0,1.0,5.0)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btr-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btrl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btr-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btrq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-addb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-add-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-add-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-addl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-add-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-addq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcb-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adcb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adc-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcb-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adc-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adcl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adc-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adcq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adc-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adcb-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adc-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adc-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adcl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adc-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adcq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adc-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-adcb-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lock cmpxchg8b-mem,8.5,None,"(5.5,0.0,3.0,0.0,0.0,1.0,8.5)"
-cwde-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lea-mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-lea-r32_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-leal-r32_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-lea-r64_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-leaq-r64_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-bswap-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-bswapl-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-bswap-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-bswapq-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-jmp far-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-divps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)"
-divps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fxsave64-mem,38.0,None,"(14.0,0.0,15.0,20.0,20.0,38.0,28.0)"
-andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-cvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ldmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)"
-divss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-sqrtss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)"
-sqrtss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtsi2ss-xmm_r32,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtsi2ss-xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-mulss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mulss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,43.833333333333336,None,"(16.333333333333336,0.0,13.833333333333334,19.5,19.5,0.0,43.833333333333336)"
-fxsave-mem,38.0,None,"(14.0,0.0,15.0,20.0,20.0,38.0,28.0)"
-sqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)"
-sqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mulps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mulps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-fxrstor-mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,2.0)"
-stmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-comiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-punpckhdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-divpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-divpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-pcmpgtw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpgtb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpgtd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-packuswb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-packuswb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-maskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.5,2.0,2.0,2.0,2.0)"
-andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pslldq-xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-psadbw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-packssdw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-packssdw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmullw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmullw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divsd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-divsd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpeqb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpeqd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpcklqdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklqdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpcklwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movq2dq-xmm_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-psubb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-paddd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psrldq-xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpckhqdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhqdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pslld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pslld-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-sqrtsd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-sqrtsd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psllw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-psllq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psllq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckldq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-mulsd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mulsd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-sqrtpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmulhw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pminsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pshufd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-cvtss2sd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-cvtss2sd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psrlq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psrlw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psrlw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psrld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psrld-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-lfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mulpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mulpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-punpckhbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmuludq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmaddwd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpckhwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvtpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-mfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pshuflw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshuflw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pminub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pinsrw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrw-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psubsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pavgw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pavgw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-psubsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pavgb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pavgb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psraw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psraw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-comisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psrad-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-packsswb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-packsswb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpcklbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-ucomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvttpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pshufhw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufhw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fchs-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomi-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fldl2t-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fldl2e-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcmovnu-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fcomip-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fcmovnb-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fcmovne-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcmovbe-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcompp-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fxam-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-ffree-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fninit-,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fnop-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fldpi-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fnstsw-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fnstsw-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-fwait-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fcmovnbe-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fincstp-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fst-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fabs-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fcmovu-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fcmove-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fldcw-mem,2.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,2.0)"
-fcmovb-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivp-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,17,None,"(1.0,17,0.0,0.5,0.5,0.0,0.0)"
-fdivr-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,17,None,"(1.0,17,0.0,0.5,0.5,0.0,0.0)"
-fdivr-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,17,None,"(1.0,17,0.0,0.5,0.5,0.0,0.0)"
-fdiv-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,17,None,"(1.0,17,0.0,0.5,0.5,0.0,0.0)"
-fdiv-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)"
-fldln2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fxch-fpu,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)"
-fld-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)"
-fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)"
-fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fucomi-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fdecstp-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fldlg2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fldz-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fucompp-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fld1-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fucomip-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fnstcw-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-punpckhdq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhdq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-pcmpgtw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpgtb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpgtd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-packuswb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-packuswb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psadbw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-packssdw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-packssdw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpeqb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpeqd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpcklwd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklwd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pxor-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-psubb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckldq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pandn-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pminsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pshufw-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufw-mmx_mmx_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-emms-,18.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,18.0)"
-punpckhbw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhbw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pand-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pmaxub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpckhwd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhwd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pinsrw-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrw-mmx_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-psubsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pavgw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pavgw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pavgb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pavgb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-maskmovq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-packsswb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklbw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklbw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-repe scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-lodsq-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cdqe-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep lodsq-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-repne cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-pushfq-,1.0,None,"(0.5,0.0,1.0,0.5,0.5,1.0,0.5)"
-rep movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxd-r64_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep stosq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-swapgs-,1.8333333333333333,None,"(0.3333333333333333,0.0,1.8333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-repne scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-popfq-,2.6666666666666665,None,"(0.6666666666666666,0.0,1.6666666666666665,0.5,0.5,0.0,2.6666666666666665)"
-stosq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-cmpxchg16b-mem,9.5,None,"(7.0,0.0,3.5,0.5,0.5,1.0,9.5)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-repe cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-lock cmpxchg16b-mem,11.0,None,"(7.5,0.0,4.5,0.0,0.0,1.0,11.0)"
-bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovzxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovsxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-roundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-roundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-roundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-roundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pblendw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pblendw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-mpsadbw-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-mpsadbw-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmovsxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmovsxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmulld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-packusdw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-packusdw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmaxsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-blendpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-blendpd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmovzxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-rex.w pcmpestri-xmm_mem_imd,14.333333333333334,None,"(11.333333333333334,0.0,6.333333333333333,0.5,0.5,0.0,14.333333333333334)"
-rex.w pcmpestri-xmm_xmm_imd,21.0,None,"(12.0,0.0,0.0,0.0,0.0,0.0,21.0)"
-pcmpestrm-xmm_mem_imd,4.0,None,"(4.0,0.0,1.5,0.0,0.0,0.0,2.5)"
-pcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-rex.w pcmpestrm-xmm_mem_imd,14.333333333333334,None,"(11.333333333333334,0.0,6.333333333333333,0.5,0.5,0.0,14.333333333333334)"
-rex.w pcmpestrm-xmm_xmm_imd,22.0,None,"(11.0,0.0,0.0,0.0,0.0,0.0,22.0)"
-pmuldq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmuldq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovsxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovsxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovsxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-dpps-xmm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)"
-dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)"
-pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrd-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-blendps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-blendps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pinsrq-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrq-xmm_r64_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-pinsrd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrd-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-pinsrb-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrb-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-blendvps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-blendvps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-blendvpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-blendvpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-roundss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-roundss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-roundsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-roundsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovzxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pblendvb-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-pblendvb-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-pmovzxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-phsubd-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubd-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phsubd-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubd-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhrsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phsubw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-psignw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-phaddsw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddsw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phaddsw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddsw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmaddubsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubsw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubsw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phsubsw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubsw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-pabsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-phaddd-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddd-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phaddd-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddd-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-palignr-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-palignr-mmx_mmx_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-palignr-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-palignr-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pshufb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pshufb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-phaddw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phaddw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rdtscp-,10.333333333333334,None,"(5.333333333333333,0.0,7.333333333333333,0.0,0.0,0.0,10.333333333333334)"
-aesdec-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesdec-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-aeskeygenassist-xmm_xmm_imd,7.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.0,0.0,0.0,7.833333333333333)"
-aeskeygenassist-xmm_mem_imd,6.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.5,0.5,0.0,6.833333333333333)"
-aesenclast-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesenclast-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-aesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-aesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)"
-aesdeclast-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesdeclast-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-aesenc-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesenc-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-prefetchwt1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-clflush-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,1.0)"
-rdrand-,5.0,None,"(2.5,0.0,4.5,0.5,0.5,0.0,5.0)"
-rdrand-r32,4.666666666666666,None,"(2.6666666666666665,0.0,4.666666666666666,0.5,0.5,0.0,4.666666666666666)"
-rdrandl-r32,4.666666666666666,None,"(2.6666666666666665,0.0,4.666666666666666,0.5,0.5,0.0,4.666666666666666)"
-rdrand-r64,4.666666666666666,None,"(2.6666666666666665,0.0,4.666666666666666,0.5,0.5,0.0,4.666666666666666)"
-rdrandq-r64,4.666666666666666,None,"(2.6666666666666665,0.0,4.666666666666666,0.5,0.5,0.0,4.666666666666666)"
-pause-,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vpmuludq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vhaddpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhaddpd-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhaddpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhaddpd-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vpunpcklbw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpcklbw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpmovzxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmulss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vandpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vandps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vandps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmulsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpshufhw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshufhw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaxss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vstmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpackssdw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpackssdw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpinsrb-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpinsrb-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vaddsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vsqrtsd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vsqrtss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vcvtss2sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpblendvb-xmm_xmm_mem_xmm,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vpblendvb-xmm_xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vzeroall-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-vcomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrad-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshufd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshufd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsraw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsraw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshufb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vdivpd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,28,None,"(2.5,28,0.0,0.5,0.5,0.0,0.5)"
-vdivpd-ymm_ymm_ymm,28,None,"(2.5,28,0.0,0.0,0.0,0.0,0.5)"
-vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovdqu-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vdivps-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)"
-vdivps-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,14,None,"(2.0,14,0.0,0.5,0.5,0.0,0.0)"
-vdivps-ymm_ymm_ymm,14,None,"(2.0,14,0.0,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmpss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshuflw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vldmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-vpslld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpslld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpslld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmpsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsllq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvpd-xmm_xmm_mem_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vblendvpd-xmm_xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vblendvpd-ymm_ymm_mem_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vblendvpd-ymm_ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpsllw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsllw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vphaddw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphaddw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vsubsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)"
-vsqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,14,None,"(2.0,14,0.0,0.5,0.5,0.0,0.0)"
-vsqrtps-ymm_ymm,14,None,"(2.0,14,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vphaddd-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphaddd-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vsqrtpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-vsqrtpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,28,None,"(2.5,28,0.0,0.5,0.5,0.0,0.5)"
-vsqrtpd-ymm_ymm,28,None,"(2.5,28,0.0,0.0,0.0,0.0,0.5)"
-vsubss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vdpps-xmm_xmm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)"
-vdpps-xmm_xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)"
-vdpps-ymm_ymm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)"
-vdpps-ymm_ymm_ymm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vpunpckhdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmovzxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmovzxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaskmovpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmaskmovpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmaskmovpd-mem_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0)"
-vmaskmovpd-mem_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,2.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpalignr-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpalignr-xmm_xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaskmovps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmaskmovps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmaskmovps-mem_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0)"
-vmaskmovps-mem_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,2.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaxpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpackuswb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaxps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhqdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsignw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsignw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsignb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsignb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpunpcklwd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpcklwd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsignd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsignd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmulhw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vxorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vxorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vxorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vroundsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vxorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vxorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vxorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vhsubpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhsubpd-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhsubpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhsubpd-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vhsubps-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhsubps-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhsubps-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhsubps-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhaddps-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhaddps-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhaddps-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhaddps-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vcvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)"
-vdivss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovntdq-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vcmpps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmpps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmpps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmppd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmppd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vphaddsw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphaddsw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vminsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vblendvps-xmm_xmm_mem_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vblendvps-xmm_xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vblendvps-ymm_ymm_mem_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vblendvps-ymm_ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmpsadbw-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vmpsadbw-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-rex.w vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-rex.w vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-vpcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-rex.w vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-rex.w vpcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vzeroupper-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandnps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandnps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vandnps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandnps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vandnpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandnpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vandnpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandnpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vblendpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vblendpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vblendps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vblendps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vblendps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vblendps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vrsqrtps-ymm_ymm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vphsubw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphsubw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vpextrq-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vphsubd-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphsubd-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpblendw-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpblendw-xmm_xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpmovsxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpackusdw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpackusdw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpinsrd-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpinsrd-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-vpinsrq-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpinsrq-xmm_xmm_r64_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-vpinsrw-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpinsrw-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrlw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrlw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrlq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vpunpcklqdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpcklqdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vminpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckldq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vcvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtdq2pd-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vminps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vbroadcastf128-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vroundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vroundps-ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundps-ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtsi2ss-xmm_xmm_r32,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vpclmulqdq-xmm_xmm_xmm_imd,6.833333333333334,None,"(5.333333333333334,0.0,5.833333333333333,0.0,0.0,0.0,6.833333333333334)"
-vpclmulqdq-xmm_xmm_mem_imd,6.666666666666666,None,"(4.666666666666666,0.0,5.666666666666667,0.5,0.5,0.0,6.666666666666666)"
-vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vrcpps-ymm_ymm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpmovsxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpmovsxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmaskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.5,2.0,2.0,2.0,2.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovntpd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovntps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpunpckhbw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhbw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvttpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmaddwd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpcmpgtq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhwd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhwd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vphsubsw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphsubsw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtpd2ps-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vaddsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpacksswb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vaddss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vcvtps2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vcvtph2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vcvtph2ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vcvtps2ph-mem_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,1.0,1.0)"
-vcvtps2ph-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtps2ph-mem_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,1.0,1.0)"
-vcvtps2ph-xmm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vaesdec-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-vaesdec-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-vaesdeclast-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-vaesdeclast-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-vaesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-vaesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)"
-vaesenc-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-vaesenc-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-vaesenclast-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-vaesenclast-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-vaeskeygenassist-xmm_xmm_imd,7.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.0,0.0,0.0,7.833333333333333)"
-vaeskeygenassist-xmm_mem_imd,6.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.5,0.5,0.0,6.833333333333333)"
-vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
diff --git a/osaca/data/model_importer.py b/osaca/data/model_importer.py
index 08406f0..d654893 100755
--- a/osaca/data/model_importer.py
+++ b/osaca/data/model_importer.py
@@ -1,222 +1,202 @@
 #!/usr/bin/env python3
-from collections import defaultdict, OrderedDict
-import xml.etree.ElementTree as ET
-import re
-import sys
 import argparse
+import sys
+import xml.etree.ElementTree as ET
 from distutils.version import StrictVersion
 
-from osaca.param import Parameter, Register
-from osaca.eu_sched import Scheduler
+from osaca.parser import get_parser
+from osaca.semantics import MachineModel
 
 
-def normalize_reg_name(reg_name):
-    # strip spaces
-    reg_name = reg_name.strip()
-    # masks are denoted with curly brackets in uops.info
-    reg_name = re.sub(r'{K([0-7])}', r'K\1', reg_name)
-    reg_name = re.sub(r'ST\(([0-7])\)', r'ST\1', reg_name)
-    return reg_name
+def port_pressure_from_tag_attributes(attrib):
+    # '1*p015+1*p1+1*p23+1*p4+3*p5' ->
+    # [[1, '015'], [1, '1'], [1, '23'], [1, '4'], [3, '5']]
+    port_occupation = []
+    for p in attrib['ports'].split('+'):
+        cycles, ports = p.split('*p')
+        port_occupation.append([int(cycles), ports])
 
-
-def port_occupancy_from_tag_attributes(attrib, arch):
-    occupancy = defaultdict(int)
-    for k, v in attrib.items():
-        m = re.match('^port([0-9]+)', k)
-        if not m:
-            continue
-        ports = m.group(1)
-        # Ignore Port7 on HSW, BDW, SKL and SKX if present in combination with ports 2 and 3.
-        # Port7 is only used for simple address generation, while 2 and 3 handle all addressing,
-        # but uops.info does not differentiate.
-        if arch in ['HSW', 'BDW', 'SKL', 'SKX'] and ports == '237':
-            ports = ports.replace('7', '')
-        potential_ports = list(ports)
-        per_port_occupancy = int(v) / len(potential_ports)
-        for pp in potential_ports:
-            occupancy[pp] += per_port_occupancy
-
-    # Also consider DIV pipeline
+    # Also
     if 'div_cycles' in attrib:
-        occupancy['0DV'] = int(attrib['div_cycles'])
+        port_occupation.append([int(attrib['div_cycles']), ['DIV']])
 
-    return dict(occupancy)
+    return port_occupation
 
 
-def extract_paramters(instruction_tag):
+def extract_paramters(instruction_tag, parser, isa):
     # Extract parameter components
     parameters = []  # used to store string representations
-    parameter_tags = sorted(instruction_tag.findall("operand"),
-                            key=lambda p: int(p.attrib['idx']))
+    parameter_tags = sorted(instruction_tag.findall("operand"), key=lambda p: int(p.attrib['idx']))
     for parameter_tag in parameter_tags:
+        parameter = {}
         # Ignore parameters with suppressed=1
         if int(parameter_tag.attrib.get('suppressed', '0')):
             continue
 
         p_type = parameter_tag.attrib['type']
         if p_type == 'imm':
-            parameters.append('imd')  # Parameter('IMD')
+            parameter['class'] = 'immediate'
+            parameter['imd'] = 'int'
+            parameters.append(parameter)
         elif p_type == 'mem':
-            parameters.append('mem')  # Parameter('MEM')
+            parameter['class'] = 'memory'
+            parameter['base'] = 'gpr'
+            parameter['offset'] = None
+            parameter['index'] = None
+            parameter['scale'] = 1
+            parameters.append(parameter)
         elif p_type == 'reg':
-            possible_regs = [normalize_reg_name(r)
-                             for r in parameter_tag.text.split(',')]
-            reg_groups = [Register.sizes.get(r, None) for r in possible_regs]
-            if reg_groups[1:] == reg_groups[:-1]:
-                if reg_groups[0] is None:
-                    raise ValueError("Unknown register type for {} with {}.".format(
-                        parameter_tag.attrib, parameter_tag.text))
-                elif reg_groups[0][1] == 'GPR':
-                    parameters.append('r{}'.format(reg_groups[0][0]))
-                    # Register(possible_regs[0]))
-                elif '{' in parameter_tag.text:
-                    # We have a mask
-                    parameters[-1] += '{opmask}'
+            parameter['class'] = 'register'
+            possible_regs = [parser.parse_register('%' + r) for r in parameter_tag.text.split(',')]
+            if possible_regs[0] is None:
+                raise ValueError(
+                    'Unknown register type for {} with {}.'.format(
+                        parameter_tag.attrib, parameter_tag.text
+                    )
+                )
+            if isa == 'x86':
+                if parser.is_vector_register(possible_regs[0]['register']):
+                    possible_regs[0]['register']['name'] = possible_regs[0]['register'][
+                        'name'
+                    ].lower()[:3]
+                    if 'mask' in possible_regs[0]['register']:
+                        possible_regs[0]['register']['mask'] = True
                 else:
-                    parameters.append(reg_groups[0][1].lower())
+                    possible_regs[0]['register']['name'] = 'gpr'
+            elif isa == 'aarch64':
+                del possible_regs['register']['name']
+            for key in possible_regs[0]['register']:
+                parameter[key] = possible_regs[0]['register'][key]
+            parameters.append(parameter)
         elif p_type == 'relbr':
-            parameters.append('LBL')
+            parameter['class'] = 'identifier'
+            parameters.append(parameter)
         elif p_type == 'agen':
-            parameters.append('mem')
+            # FIXME actually only address generation
+            parameter['class'] = 'memory'
+            parameter['base'] = 'gpr'
+            parameter['offset'] = None
+            parameter['index'] = None
+            parameter['scale'] = 1
+            parameters.append(parameter)
+            parameters.append(parameter)
         else:
             raise ValueError("Unknown paramter type {}".format(parameter_tag.attrib))
     return parameters
 
 
 def extract_model(tree, arch):
-    model_data = []
-    for instruction_tag in tree.findall('//instruction'):
+    isa = MachineModel.get_isa_for_arch(arch)
+    mm = MachineModel(isa=isa)
+    parser = get_parser(isa)
+
+    for instruction_tag in tree.findall('.//instruction'):
         ignore = False
 
         mnemonic = instruction_tag.attrib['asm']
 
         # Extract parameter components
         try:
-            parameters = extract_paramters(instruction_tag)
+            parameters = extract_paramters(instruction_tag, parser, isa)
+            if isa == 'x86':
+                parameters.reverse()
         except ValueError as e:
             print(e, file=sys.stderr)
 
         # Extract port occupation, throughput and latency
-        port_occupancy, throughput, latency = [], 0.0, None
-        arch_tag = instruction_tag.find('architecture[@name="'+arch+'"]')
+        port_pressure, throughput, latency, uops = [], None, None, None
+        arch_tag = instruction_tag.find('architecture[@name="' + arch.upper() + '"]')
         if arch_tag is None:
             continue
         # We collect all measurement and IACA information and compare them later
         for measurement_tag in arch_tag.iter('measurement'):
-            port_occupancy.append(port_occupancy_from_tag_attributes(measurement_tag.attrib, arch))
-            # FIXME handle min/max Latencies ('maxCycles' and 'minCycles')
-            latencies = [int(l_tag.attrib['cycles'])
-                         for l_tag in measurement_tag.iter('latency') if 'latency' in l_tag.attrib]
-
+            if 'TP_ports' in measurement_tag.attrib:
+                throughput = measurement_tag.attrib['TP_ports']
+            else:
+                throughput = (
+                    measurement_tag.attrib['TP'] if 'TP' in measurement_tag.attrib else None
+                )
+            uops = (
+                int(measurement_tag.attrib['uops']) if 'uops' in measurement_tag.attrib else None
+            )
+            if 'ports' in measurement_tag.attrib:
+                port_pressure.append(port_pressure_from_tag_attributes(measurement_tag.attrib))
+            latencies = [
+                int(l_tag.attrib['cycles'])
+                for l_tag in measurement_tag.iter('latency')
+                if 'cycles' in l_tag.attrib
+            ]
+            if len(latencies) == 0:
+                latencies = [
+                    int(l_tag.attrib['max_cycles'])
+                    for l_tag in measurement_tag.iter('latency')
+                    if 'max_cycles' in l_tag.attrib
+                ]
             if latencies[1:] != latencies[:-1]:
                 print("Contradicting latencies found:", mnemonic, file=sys.stderr)
                 ignore = True
             elif latencies:
                 latency = latencies[0]
+
         # Ordered by IACA version (newest last)
-        for iaca_tag in sorted(arch_tag.iter('IACA'),
-                               key=lambda i: StrictVersion(i.attrib['version'])):
-            port_occupancy.append(port_occupancy_from_tag_attributes(iaca_tag.attrib, arch))
-        if ignore: continue
+        for iaca_tag in sorted(
+            arch_tag.iter('IACA'), key=lambda i: StrictVersion(i.attrib['version'])
+        ):
+            if 'ports' in iaca_tag.attrib:
+                port_pressure.append(port_pressure_from_tag_attributes(iaca_tag.attrib))
+        if ignore:
+            continue
 
         # Check if all are equal
-        if port_occupancy:
-            if port_occupancy[1:] != port_occupancy[:-1]:
-                print("Contradicting port occupancies, using latest IACA:", mnemonic,
-                      file=sys.stderr)
-            port_occupancy = port_occupancy[-1]
-            throughput = max(list(port_occupancy.values())+[0.0])
+        if port_pressure:
+            if port_pressure[1:] != port_pressure[:-1]:
+                print(
+                    "Contradicting port occupancies, using latest IACA:", mnemonic, file=sys.stderr
+                )
+            port_pressure = port_pressure[-1]
+
+            # Add missing ports:
+            for ports in [pp[1] for pp in port_pressure]:
+                for p in ports:
+                    mm.add_port(p)
+
+            throughput = max(mm.average_port_pressure(port_pressure))
         else:
             # print("No data available for this architecture:", mnemonic, file=sys.stderr)
             continue
+        # ---------------------------------------------
+        mm.set_instruction(mnemonic, parameters, latency, port_pressure, throughput, uops)
 
-        for m, p in build_variants(mnemonic, parameters):
-            model_data.append((m.lower() + '-' + '_'.join(p),
-                              throughput, latency, port_occupancy))
-
-    return model_data
-
-
-def all_or_false(iterator):
-    if not iterator:
-        return False
-    else:
-        return all(iterator)
-
-
-def build_variants(mnemonic, parameters):
-    """Yield all resonable variants of this instruction form."""
-    # The one that was given
-    mnemonic = mnemonic.upper()
-    yield mnemonic, parameters
-
-    # Without opmask
-    if any(['{opmask}' in p for p in parameters]):
-        yield mnemonic, list([p.replace('{opmask}', '') for p in parameters])
-
-    # With suffix (assuming suffix was not already present)
-    suffixes = {'Q': 'r64',
-                'L': 'r32',
-                'W': 'r16',
-                'B': 'r8'}
-    for s, reg in suffixes.items():
-        if not mnemonic.endswith(s) and all_or_false(
-                [p == reg for p in parameters if p not in ['mem', 'imd']]):
-            yield mnemonic+s, parameters
+    return mm
 
 
 def architectures(tree):
     return set([a.attrib['name'] for a in tree.findall('.//architecture')])
 
 
-def int_or_zero(s):
-    try:
-        return int(s)
-    except ValueError:
-        return 0
-
-
-def dump_csv(model_data, arch):
-    csv = 'instr,TP,LT,ports\n'
-    ports = set()
-    for mnemonic, throughput, latency, port_occupancy in model_data:
-        for p in port_occupancy:
-            ports.add(p)
-    ports = sorted(ports)
-    # If not all ports have been used (happens with port7 due to blacklist
-    # port_occupancy_from_tag_attributes), extend list accordingly:
-    while len(ports) < Scheduler.arch_dict[arch] + len(Scheduler.arch_pipeline_ports.get(arch, [])):
-        max_index = ports.index(str(max(map(int_or_zero, ports))))
-        ports.insert(max_index + 1, str(max(map(int_or_zero, ports)) + 1))
-
-    for mnemonic, throughput, latency, port_occupancy in model_data:
-        for p in ports:
-            if p not in port_occupancy:
-                port_occupancy[p] = 0.0
-        po_items = sorted(port_occupancy.items())
-        csv_line = '{},{},{},"({})"\n'.format(mnemonic, throughput, latency,
-                                              ','.join([str(c) for p, c in po_items]))
-        csv += csv_line
-    return csv
-
-
 def main():
     parser = argparse.ArgumentParser()
     parser.add_argument('xml', help='path of instructions.xml from http://uops.info')
-    parser.add_argument('arch', nargs='?',
-                        help='architecture to extract, use IACA abbreviations (e.g., SNB). '
-                             'if not given, all will be extracted and saved to file in CWD.')
+    parser.add_argument(
+        'arch',
+        nargs='?',
+        help='architecture to extract, use IACA abbreviations (e.g., SNB). '
+        'if not given, all will be extracted and saved to file in CWD.',
+    )
     args = parser.parse_args()
 
     tree = ET.parse(args.xml)
+    print('Available architectures:', ', '.join(architectures(tree)))
     if args.arch:
-        model_data = extract_model(tree, args.arch)
-        print(dump_csv(model_data, args.arch))
+        model = extract_model(tree, args.arch)
+        print(model.dump())
     else:
         for arch in architectures(tree):
-            model_data = extract_model(tree, arch)
-            with open('{}_data.csv'.format(arch), 'w') as f:
-                f.write(dump_csv(model_data, arch))
+            print(arch, end='')
+            model = extract_model(tree, arch.lower())
+            with open('{}.yml'.format(arch.lower()), 'w') as f:
+                model.dump(f)
+            print('.')
 
 
 if __name__ == '__main__':
diff --git a/osaca/data/nhm_data.csv b/osaca/data/nhm_data.csv
deleted file mode 100644
index 396093c..0000000
--- a/osaca/data/nhm_data.csv
+++ /dev/null
@@ -1,2434 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sldt-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sldt-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sldtl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sldt-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sldtq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-lgdt-mem,6.0,None,"(2.0,0.0,6.0,5.0,1.0,1.0,0.0)"
-call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-call-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-callq-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-call-LBL,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-mov-LBL,24.166666666666664,None,"(11.166666666666666,0.0,8.666666666666666,0.0,1.0,1.0,24.166666666666664)"
-mov-LBL,17.166666666666664,None,"(9.166666666666666,0.0,3.6666666666666665,0.0,0.0,0.0,17.166666666666664)"
-jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-wrmsr-,45.33333333333333,None,"(45.33333333333333,0.0,28.333333333333332,6.0,1.0,1.0,29.333333333333332)"
-repe scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cmc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cmovbe-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbe-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbe-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbeq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbe-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbe-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbe-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbeq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmovle-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovle-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovlel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovle-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovleq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lsl-mem,16.5,None,"(16.5,0.0,16.0,5.0,0.0,0.0,2.5)"
-lsl-r32_mem,16.5,None,"(16.5,0.0,16.0,5.0,0.0,0.0,2.5)"
-lsl-r64_mem,16.5,None,"(16.5,0.0,16.0,5.0,0.0,0.0,2.5)"
-lslq-r64_mem,16.5,None,"(16.5,0.0,16.0,5.0,0.0,0.0,2.5)"
-lsl-,4.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,4.0,0.0,0.0,4.833333333333333)"
-lsl-r32_r32,4.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,4.0,0.0,0.0,4.833333333333333)"
-lsl-r64_r32,4.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,4.0,0.0,0.0,4.833333333333333)"
-lahf-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cbw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nopl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nopq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpsw-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adcb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adcl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adcq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-cmpsd-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-out-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-outb-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-outl-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-r16_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-r16_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-cmovnle-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnle-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnlel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnle-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnleq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbbl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbbq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbb-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-lodsb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-lodsw-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-lodsd-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-std-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-stosd-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-xor-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xor-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xorl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xor-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xorq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-stc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sti-,5.166666666666666,None,"(1.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,5.166666666666666)"
-str-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-stosb-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rdmsr-,36.83333333333333,None,"(20.833333333333332,0.0,13.333333333333332,1.0,0.0,0.0,36.83333333333333)"
-rep lodsb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-idiv-mem,11,None,"(1.6666666666666665,11,2.6666666666666665,1.0,0.0,0.0,0.6666666666666666)"
-idiv-r8,11,None,"(1.6666666666666665,11,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)"
-idivb-r8,11,None,"(1.6666666666666665,11,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)"
-idiv-mem,17,None,"(2.1666666666666665,17,2.6666666666666665,1.0,0.0,0.0,1.1666666666666665)"
-idiv-mem,36,None,"(17.5,36,9.0,1.0,0.0,0.0,25.5)"
-idiv-r32,17,None,"(2.5,17,3.0,0.0,0.0,0.0,1.5)"
-idivl-r32,17,None,"(2.5,17,3.0,0.0,0.0,0.0,1.5)"
-idiv-r64,36,None,"(17.5,36,9.0,0.0,0.0,0.0,26.5)"
-idivq-r64,36,None,"(17.5,36,9.0,0.0,0.0,0.0,26.5)"
-repne cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrd-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrdl-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrdq-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrdl-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrdq-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrdb-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-mem_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-mem_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrdb-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-r32_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-r64_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsd-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsx-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsw-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-mov-r64_r8,2.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,2.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bts-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btsl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bts-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btsq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btr-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btrl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btr-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btrq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sgdt-mem,2.0,None,"(1.1666666666666665,0.0,1.6666666666666665,2.0,2.0,2.0,1.1666666666666665)"
-loop-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btc-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btcl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btc-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btcq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-wbinvd-,131105.0,None,"(65592.83333333333,0.0,65583.33333333333,0.0,131105.0,131105.0,131080.83333333334)"
-jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-mul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-push-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pushw-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-push-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pushw-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cli-,4.333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,4.333333333333333)"
-cld-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-clc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lldt-mem,6.833333333333333,None,"(1.8333333333333333,0.0,1.3333333333333333,4.0,1.0,1.0,6.833333333333333)"
-lldt-,5.666666666666667,None,"(1.6666666666666667,0.0,1.6666666666666667,3.0,1.0,1.0,5.666666666666667)"
-ret-imd,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-ret-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btc-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btcl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btc-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btcq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-setnbe-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnbe-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnbeb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmpxchg-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchgb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchg-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgb-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchg-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchgl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchg-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchgq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchg-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgl-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchg-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgq-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-verr-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-verr-,5.0,None,"(3.0,0.0,5.0,4.0,0.0,0.0,0.0)"
-rep stosb-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cwd-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-scasw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-scasd-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rdpmc-,13.5,None,"(9.5,0.0,5.0,0.0,0.0,0.0,13.5)"
-lock cmpxchg-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchgb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchg-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchgl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchg-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchgq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-cmovnp-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnp-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnpl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnp-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnpq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-ret far-,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-enter-imd_imd,7.666666666666667,None,"(4.166666666666666,0.0,7.666666666666667,5.0,5.0,5.0,1.1666666666666665)"
-repne scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-leave-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-lock xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lidt-mem,5.0,None,"(3.0,0.0,5.0,5.0,1.0,1.0,0.0)"
-xlat-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-lock xchg-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchgb-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchgb-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-lock xchg-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchg-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchgl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchg-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchgq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchgl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchgq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-smsw-mem,2.6666666666666665,None,"(1.1666666666666665,0.0,2.6666666666666665,0.0,1.0,1.0,2.1666666666666665)"
-smsw-,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-smsw-r32,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-smswl-r32,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-smsw-r64,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-smswq-r64,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-andb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-and-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-and-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-andl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-and-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-andq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-mov-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-mov-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-mov-,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r32,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movl-r32,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cpuid-,14.0,None,"(11.5,0.0,14.0,0.0,2.0,2.0,13.5)"
-rdtsc-,8.833333333333334,None,"(7.833333333333334,0.0,5.333333333333334,0.0,0.0,0.0,8.833333333333334)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sidt-mem,2.0,None,"(0.6666666666666666,0.0,1.6666666666666665,2.0,2.0,2.0,0.6666666666666666)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbbl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbbq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,4.0,None,"(2.5,0.0,4.0,1.0,1.0,1.0,2.5)"
-rcr-r8_imd,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)"
-rcrb-r8_imd,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)"
-rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-imd,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.6666666666666665)"
-rcr-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcrl-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcr-r64_imd,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.6666666666666665)"
-rcrq-r64_imd,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.6666666666666665)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcrb-r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcr-r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcrl-r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcr-r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcrq-r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcr-mem_r8,4.0,None,"(2.5,0.0,4.0,1.0,1.0,1.0,2.5)"
-rcrb-mem_r8,4.0,None,"(2.5,0.0,4.0,1.0,1.0,1.0,2.5)"
-rcr-r8_r8,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)"
-rcrb-r8_r8,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)"
-rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcrb-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcr-r32_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcr-r64_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-r8_imd,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,3.0)"
-rclb-r8_imd,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,3.0)"
-rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcl-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcl-r64_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rclq-r64_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rclb-r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcl-r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcl-r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rclq-r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,3.0)"
-rclb-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,3.0)"
-rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rclb-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcl-r32_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcl-r64_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-div-mem,11,None,"(1.0,11,2.0,1.0,0.0,0.0,0.0)"
-div-r8,11,None,"(1.3333333333333333,11,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)"
-divb-r8,11,None,"(1.3333333333333333,11,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)"
-div-mem,17,None,"(2.333333333333333,17,2.3333333333333335,1.0,0.0,0.0,1.3333333333333333)"
-div-mem,36,None,"(8.5,36,6.0,1.0,0.0,0.0,13.5)"
-div-r32,17,None,"(2.1666666666666665,17,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)"
-divl-r32,17,None,"(2.1666666666666665,17,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)"
-div-r64,36,None,"(8.5,36,6.0,0.0,0.0,0.0,14.5)"
-divq-r64,36,None,"(8.5,36,6.0,0.0,0.0,0.0,14.5)"
-stosw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-cmovnz-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnz-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnzl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnz-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnzq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovns-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnsl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovns-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnsq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovns-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovno-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnol-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovno-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnoq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovno-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnl-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnlq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnb-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnb-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovo-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovol-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovo-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovoq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovo-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bt-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bt-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-pop-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-popq-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-jrcxz-LBL,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-shld-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shldl-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shldq-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shldl-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shldq-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shldb-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-mem_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-mem_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shldb-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-r32_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-r64_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-invlpg-mem,17.333333333333332,None,"(9.333333333333334,0.0,12.333333333333334,1.0,4.0,4.0,17.333333333333332)"
-sahf-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmovz-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovz-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovzl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovz-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovzq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovp-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovpl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovp-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovpq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovs-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovsl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovs-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovsq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovs-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovl-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovlq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovb-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovb-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lmsw-mem,9.666666666666666,None,"(4.666666666666667,0.0,5.666666666666667,2.0,1.0,1.0,9.666666666666666)"
-lmsw-,8.833333333333334,None,"(4.833333333333334,0.0,3.3333333333333335,0.0,1.0,1.0,8.833333333333334)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock bts-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btsl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock bts-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btsq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-orb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-or-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-or-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-orl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-or-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-orq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-repe cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-clts-,3.5,None,"(1.5,0.0,2.0,0.0,0.0,0.0,3.5)"
-movzx-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-verw-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-verw-,5.0,None,"(4.0,0.0,3.0,5.0,0.0,0.0,0.0)"
-jmp-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmovnbe-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbe-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbe-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbeq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbe-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbe-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbe-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbeq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-sub-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-sub-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-subl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-sub-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-subq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmpxchg8b-mem,4.333333333333333,None,"(4.333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,4.333333333333333)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btr-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btrl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btr-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btrq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-addb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-add-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-add-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-addl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-add-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-addq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adcb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcb-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adcl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adcq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adcb-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adc-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adc-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adc-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adc-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-lock cmpxchg8b-mem,5.166666666666667,None,"(5.166666666666667,0.0,1.6666666666666667,1.0,1.0,1.0,5.166666666666667)"
-cwde-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lea-mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lea-r32_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-leal-r32_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lea-r64_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-leaq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setbe-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setbe-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setbeb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-bswap-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bswapl-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bswap-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bswapq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-jmp far-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-divps-xmm_mem,14,None,"(1.0,14,0.0,1.0,0.0,0.0,0.0)"
-divps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fxsave64-mem,38.0,None,"(16.0,0.0,18.0,5.0,38.0,38.0,26.0)"
-andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-prefetcht2-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-prefetcht1-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-prefetcht0-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-cvttss2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttss2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttss2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttss2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttss2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ldmxcsr-mem,2.6666666666666665,None,"(1.6666666666666665,0.0,0.6666666666666666,1.0,0.0,0.0,2.6666666666666665)"
-orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,14,None,"(1.0,14,0.0,1.0,0.0,0.0,0.0)"
-divss-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-sqrtss-xmm_mem,18,None,"(1.0,18,0.0,1.0,0.0,0.0,0.0)"
-sqrtss-xmm_xmm,18,None,"(1.0,18,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movss-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-mulss-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mulss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,42.0,None,"(25.166666666666668,0.0,16.666666666666668,42.0,0.0,0.0,28.166666666666668)"
-fxsave-mem,38.0,None,"(16.0,0.0,18.0,5.0,38.0,38.0,26.0)"
-sqrtps-xmm_mem,18,None,"(1.0,18,0.0,1.0,0.0,0.0,0.0)"
-sqrtps-xmm_xmm,18,None,"(1.0,18,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movaps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movaps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mulps-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mulps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtss2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtss2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtss2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtss2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movups-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movups-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-fxrstor-mem,42.0,None,"(25.166666666666668,0.0,16.666666666666668,42.0,0.0,0.0,28.166666666666668)"
-stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-prefetchnta-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-comiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-punpckhdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-divpd-xmm_mem,21,None,"(1.0,21,0.0,1.0,0.0,0.0,0.0)"
-divpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-movsd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pcmpgtw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpgtb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpgtd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-packuswb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-packuswb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-maskmovdqu-xmm_xmm,2.333333333333333,None,"(2.333333333333333,0.0,0.3333333333333333,2.0,2.0,2.0,1.3333333333333333)"
-andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pslldq-xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-psadbw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddusw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddusb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-packssdw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-packssdw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmullw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmullw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-divsd-xmm_mem,21,None,"(1.0,21,0.0,1.0,0.0,0.0,0.0)"
-divsd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpeqb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpeqd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpcklqdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklqdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpcklwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pxor-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movq2dq-xmm_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqu-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-psubb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubusw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaxsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-paddd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psrldq-xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpckhqdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhqdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhuw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttsd2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttsd2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttsd2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttsd2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pslld-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-pslld-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-sqrtsd-xmm_mem,32,None,"(1.0,32,0.0,1.0,0.0,0.0,0.0)"
-sqrtsd-xmm_xmm,32,None,"(1.0,32,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psllw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psllq-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-psubusb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckldq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-mulsd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mulsd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,32,None,"(1.0,32,0.0,1.0,0.0,0.0,0.0)"
-sqrtpd-xmm_xmm,32,None,"(1.0,32,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmulhw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movq-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-xmm_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movq-r64_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pminsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pshufd-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-cvtss2sd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psrlq-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-psrlw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psrlw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-psrld-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psrld-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lfence-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-cvtsd2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsd2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsd2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsd2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsd2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movd-xmm_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movd-r32_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movapd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movapd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mulpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mulpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-punpckhbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movupd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movupd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pmuludq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmuludq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmaddwd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pand-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpckhwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvtpd2pi-mmx_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-cvtpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-mfence-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pshuflw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshuflw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pminub-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrw-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqa-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-psubsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pavgw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-psubsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pavgb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psraw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psraw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-comisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psrad-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-packsswb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-packsswb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpcklbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-cvttpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-pshufhw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufhw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomi-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fldl2t-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fldl2e-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fcmovnu-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcomip-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcmovnb-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmovne-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcmovbe-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcompp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fxam-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ffree-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fnop-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fldpi-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fnstsw-mem,2.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,2.0)"
-fnstsw-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-fwait-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-fcmovnbe-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fincstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fst-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmovu-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmove-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldcw-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-fcmovb-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivp-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)"
-fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)"
-fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)"
-fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)"
-fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fldln2-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fxch-fpu,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fld-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fucomi-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fdecstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldlg2-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fldz-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucompp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fld1-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fucomip-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fnstcw-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-punpckhdq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhdq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pcmpgtw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpgtb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpgtd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-packuswb-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-packuswb-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psubd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psadbw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddusw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddusb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddusb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-packssdw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-packssdw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpeqb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpeqd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpcklwd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklwd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pxor-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-psubb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubusw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubusw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaxsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmulhuw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pslld-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubusb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckldq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pandn-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pmulhw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-mmx_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movq-r64_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pminsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pshufw-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufw-mmx_mmx_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psrlq-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movd-mmx_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movd-mmx_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movd-r32_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-emms-,3.6666666666666665,None,"(3.6666666666666665,0.0,3.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-punpckhbw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhbw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaddwd-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pand-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pmaxub-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxub-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpckhwd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhwd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pminub-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminub-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrw-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrw-mmx_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pavgw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pavgw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pavgb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pavgb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-maskmovq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-psraw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-packsswb-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-punpcklbw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklbw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-repe scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-lodsq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cdqe-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep lodsq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-repne cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-pushfq-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-rep movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsxd-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxdq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxd-r64_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep stosq-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-swapgs-,1.6666666666666665,None,"(1.6666666666666665,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-repne scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-popfq-,2.666666666666667,None,"(1.6666666666666667,0.0,2.666666666666667,1.0,0.0,0.0,2.666666666666667)"
-stosq-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpxchg16b-mem,7.833333333333334,None,"(7.833333333333334,0.0,2.3333333333333335,1.0,1.0,1.0,7.833333333333334)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-repe cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-lock cmpxchg16b-mem,7.833333333333334,None,"(7.833333333333334,0.0,2.3333333333333335,1.0,1.0,1.0,7.833333333333334)"
-bndmov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndmov-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndmov-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcn-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcn-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcnq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcu-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcu-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcuq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndstx-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcl-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcl-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndclq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndldx-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndmk-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxbq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovzxbd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxbd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovsxwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-roundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-roundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-roundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-roundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pblendw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pblendw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-mpsadbw-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-mpsadbw-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-phminposuw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-phminposuw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,2.6666666666666665,None,"(0.6666666666666666,0.0,2.6666666666666665,1.0,0.0,0.0,0.6666666666666666)"
-pcmpistrm-xmm_xmm_imd,2.6666666666666665,None,"(0.6666666666666666,0.0,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)"
-insertps-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmovsxdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movntdqa-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-pmovsxbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmulld-xmm_mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-pmulld-xmm_xmm,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pminsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-packusdw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-packusdw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-extractps-r32_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmaxsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaxsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-blendpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-blendpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ptest-xmm_mem,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.8333333333333333)"
-ptest-xmm_xmm,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pmovzxbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpestri-xmm_mem_imd,4.333333333333333,None,"(1.8333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.8333333333333333)"
-pcmpestri-xmm_xmm_imd,4.333333333333333,None,"(1.8333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-rex.w pcmpestri-xmm_mem_imd,4.0,None,"(2.0,0.0,4.0,1.0,0.0,0.0,2.0)"
-rex.w pcmpestri-xmm_xmm_imd,4.333333333333333,None,"(1.8333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-pcmpestrm-xmm_mem_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,2.333333333333333)"
-pcmpestrm-xmm_xmm_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,2.333333333333333)"
-rex.w pcmpestrm-xmm_mem_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,2.333333333333333)"
-rex.w pcmpestrm-xmm_xmm_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,2.333333333333333)"
-pmuldq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmuldq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmovzxdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pminsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovsxbd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxbd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovsxwq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxwq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovsxbq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxbq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-dpps-xmm_mem_imd,2.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,1.0,0.0,0.0,1.3333333333333333)"
-dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)"
-pcmpistri-xmm_mem_imd,2.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,1.0,0.0,0.0,0.3333333333333333)"
-pcmpistri-xmm_xmm_imd,2.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)"
-pextrd-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-pextrd-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pmaxuw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaxud-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-blendps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-blendps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pextrb-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-pextrb-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pminuw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pminud-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrq-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrq-xmm_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrd-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrd-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrb-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrb-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-blendvps-xmm_mem,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)"
-blendvps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-blendvpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)"
-blendvpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-roundss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-roundss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-roundsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-roundsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-pextrq-r64_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pmovzxwq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxwq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pblendvb-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-pblendvb-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmovzxwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-phsubd-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubd-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phsubd-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubd-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-pmulhrsw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-phsubw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phsubw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-psignw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-phaddsw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddsw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phaddsw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddsw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-pmaddubsw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-phsubsw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubsw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phsubsw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubsw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-pabsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-phaddd-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddd-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phaddd-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddd-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-palignr-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-palignr-mmx_mmx_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-palignr-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-palignr-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pshufb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pshufb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-phaddw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phaddw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)"
-hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)"
-haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-movshdup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)"
-haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-movsldup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)"
-lddqu-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movddup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rdtscp-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,2.0)"
-prefetchwt1-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-clflush-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-pause-,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
diff --git a/osaca/data/skl_data.csv b/osaca/data/skl_data.csv
deleted file mode 100644
index 49d89e2..0000000
--- a/osaca/data/skl_data.csv
+++ /dev/null
@@ -1,3847 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sldt-,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldt-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldtl-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldt-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldtq-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-lgdt-mem,7.5,None,"(7.5,0.0,5.5,2.0,2.0,1.0,0.0,7.0,0.0)"
-call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-LBL,19.5,None,"(19.5,0.0,9.0,0.0,0.0,2.0,12.5,11.0,0.0)"
-mov-LBL,12.166666666666666,None,"(12.166666666666666,0.0,4.666666666666666,0.0,0.0,0.0,5.666666666666666,7.5,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wrmsr-,46.5,None,"(46.5,0.0,26.0,0.0,0.0,1.0,28.5,32.0,0.0)"
-repe scasb-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lar-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-larl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-larq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-lar-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-larl-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-lar-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-larq-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-mem,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-cmovbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lsl-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lslq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-,4.833333333333333,None,"(4.833333333333333,0.0,4.333333333333333,1.0,1.0,0.0,1.3333333333333333,3.5,0.0)"
-lsl-r32_r32,4.833333333333333,None,"(4.833333333333333,0.0,4.333333333333333,1.0,1.0,0.0,1.3333333333333333,3.5,0.0)"
-lsl-r64_r32,4.833333333333333,None,"(4.833333333333333,0.0,4.333333333333333,1.0,1.0,0.0,1.3333333333333333,3.5,0.0)"
-lahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpsw-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock adc-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adcb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adc-mem,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adc-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adcl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adc-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adcq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-cmpsd-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-out-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-outb-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-outl-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-r16_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-r16_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lodsw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lodsd-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-std-,1.75,None,"(1.75,0.0,1.25,0.0,0.0,0.0,1.25,1.75,0.0)"
-stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sti-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)"
-str-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rdmsr-,26.0,None,"(26.0,0.0,18.5,0.0,0.0,0.0,18.0,16.5,0.0)"
-rep lodsb-,5.416666666666667,None,"(5.416666666666667,0.0,4.916666666666667,1.5,1.5,0.0,3.416666666666667,3.25,0.0)"
-lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)"
-idiv-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)"
-idivb-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)"
-idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)"
-idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)"
-idiv-r32,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)"
-idivl-r32,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)"
-idiv-r64,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)"
-idivq-r64,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)"
-repne cmpsb-,6.75,None,"(6.75,0.0,4.75,2.0,2.0,0.0,3.75,3.75,0.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrd-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrdl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrdq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shrdb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shrd-mem_r32_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shrd-mem_r64_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shrd-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrdb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-movsd-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsw-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-mov-r64_r8,4.083333333333333,None,"(4.083333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,1.5833333333333333,3.75,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-bts-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btsl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-bts-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btsq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btr-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btrl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btr-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btrq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sgdt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-loop-LBL,2.5,None,"(2.5,0.0,1.0,0.0,0.0,0.0,1.0,2.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btc-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btcl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)"
-btc-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btcq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-wbinvd-,370940.8333333334,None,"(370940.8333333334,1,206172.33333333334,113098.0,113098.0,202777.0,227630.33333333334,163445.5,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cli-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cld-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-clc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lldt-mem,4.5,None,"(4.5,0.0,3.0,1.5,1.5,1.0,0.0,4.5,0.0)"
-lldt-,3.8333333333333335,None,"(3.8333333333333335,0.0,3.3333333333333335,1.0,1.0,1.0,0.3333333333333333,3.5,0.0)"
-ret-imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-ret-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock subl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock subq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btc-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btc-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btcl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btc-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock btcq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,1.0,0.0)"
-setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-verr-mem,24.5,None,"(24.5,0.0,12.5,1.5,1.5,0.0,12.0,15.0,0.0)"
-verr-,5.5,None,"(5.5,0.0,4.0,2.0,2.0,0.0,4.0,4.5,0.0)"
-rep stosb-,18.5,None,"(18.5,0.0,12.0,4.0,4.0,0.0,14.0,11.5,0.0)"
-cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock andb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock andl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock andq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rdpmc-,12.333333333333332,None,"(12.333333333333332,0.0,6.833333333333333,0.0,0.0,0.0,6.833333333333333,9.0,0.0)"
-lock cmpxchg-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchg-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchg-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ret far-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock orb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock orl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock orq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-enter-imd_imd,1.75,None,"(1.25,0.0,1.75,0.5,0.5,1.0,0.75,1.25,0.0)"
-repne scasb-,10.166666666666666,None,"(10.166666666666666,0.0,6.166666666666666,1.5,1.5,0.0,6.166666666666666,6.5,0.0)"
-leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xadd-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddb-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddl-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddq-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lidt-mem,7.5,None,"(7.5,0.0,5.5,1.5,1.5,1.0,0.0,7.0,0.0)"
-xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xchg-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchgb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchgb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-lock xchg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchg-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchgl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchg-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchgq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchgl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchgq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-smsw-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-smsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smsw-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smswl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smsw-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-smswq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cpuid-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-rdtsc-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock addb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock addl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock addq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-sidt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sbb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbb-mem,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbb-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbbl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbb-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbbq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-insb-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-insd-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcr-r8_r8,3.25,None,"(2.75,0.0,3.25,0.0,0.0,0.0,1.25,2.75,0.0)"
-rcrb-r8_r8,3.25,None,"(2.75,0.0,3.25,0.0,0.0,0.0,1.25,2.75,0.0)"
-rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcr-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcrb-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcr-r32_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcr-r64_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,1.0,3.0,0.0)"
-rclb-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,1.0,3.0,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rclb-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcl-r32_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcl-r64_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-insw-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-div-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)"
-div-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-divb-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)"
-div-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)"
-div-mem,18,None,"(12.0,18,5.5,0.5,0.5,0.0,7.5,7.0,0.0)"
-div-r32,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)"
-divl-r32,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)"
-div-r64,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)"
-divq-r64,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)"
-stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-rep movsb-,16.5,None,"(16.5,0.0,14.5,5.0,5.0,0.0,11.5,9.5,0.0)"
-in-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-inb-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-inl-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r8_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r32_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-bt-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-btl-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)"
-bt-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)"
-btq-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-shld-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shldl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shldq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shldb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shld-mem_r32_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shld-mem_r64_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shld-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shldb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shld-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shld-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-invlpg-mem,13.833333333333332,None,"(13.833333333333332,0.0,7.833333333333333,2.5,2.5,5.0,8.833333333333334,6.5,0.0)"
-sahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lmsw-mem,7.5,None,"(7.5,0.0,5.0,1.0,1.0,2.0,5.0,5.5,0.0)"
-lmsw-,6.0,None,"(6.0,0.0,2.5,0.5,0.5,1.0,4.5,4.0,0.0)"
-lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock bts-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock bts-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)"
-lock btsl-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)"
-lock bts-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock btsq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xorb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xorl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xorq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-repe cmpsb-,6.75,None,"(6.75,0.0,4.75,2.0,2.0,0.0,3.75,3.75,0.0)"
-clts-,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,2.0,2.0,0.0)"
-movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-verw-mem,24.0,None,"(24.0,0.0,12.0,1.5,1.5,0.0,12.0,15.0,0.0)"
-verw-,5.0,None,"(5.0,0.0,4.0,2.0,2.0,0.0,3.0,4.0,0.0)"
-jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-subl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-subq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmpxchg8b-mem,3.25,None,"(3.25,0.0,2.25,1.0,1.0,1.0,2.25,3.25,0.0)"
-lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btr-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btr-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btrl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)"
-lock btr-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-lock btrq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock cmpxchg8b-mem,4.75,None,"(4.75,0.0,2.75,1.0,1.0,1.0,2.75,4.75,0.0)"
-cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lea-mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,1.0,0.0)"
-setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-bswap-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapl-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-jmp far-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-divps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mmx,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cmpss-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-fxsave64-mem,38.0,None,"(21.25,0.0,13.25,20.0,20.0,38.0,13.25,9.25,0.0)"
-andnps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andnps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-cvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-ldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-orps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cmpps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-xorps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-xorps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-subps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-minss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-minss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-addps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_r32,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtsi2ss-xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,19.833333333333332,None,"(19.833333333333332,0.0,14.833333333333332,15.5,15.5,0.0,14.833333333333332,7.5,0.0)"
-fxsave-mem,38.0,None,"(21.25,0.0,13.25,20.0,20.0,38.0,13.25,9.25,0.0)"
-sqrtps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-minps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2pi-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-andps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fxrstor-mem,19.333333333333332,None,"(19.333333333333332,0.0,15.333333333333332,16.5,16.5,0.0,15.333333333333332,7.0,0.0)"
-stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-maxps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-maxps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-comiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-maxss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtdq2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvttps2dq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttps2dq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-divpd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divpd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pcmpgtw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maskmovdqu-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-andnpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andnpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psadbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2dq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmullw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmullw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-divsd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divsd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-orpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-orpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cmppd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cmppd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movq2dq-xmm_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psubb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psubusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaxsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpd2dq-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-paddd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cmpsd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cmpsd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmulhuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmulhuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-minsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-minsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-addpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtsd2ss-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvtsd2ss-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-pslld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtsd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtsd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-psllq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmulhw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmulhw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2dq-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2sd-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-xorpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-xorpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-maxsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-maxsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-minpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-minpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-addsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-subsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-subsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-lfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-cvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2pd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2pd-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmuludq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaddwd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmaddwd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtdq2ps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtdq2ps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaxub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-cvtpd2pi-mmx_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvtpd2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-mfence-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maxpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-maxpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psubsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-comisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvttpd2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucom-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldl2t-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldl2e-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fyl2x-,4.5,None,"(4.5,0.0,0.5,0.0,0.0,0.0,4.5,1.5,0.0)"
-faddp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fxtract-,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcompp-,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fcomp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fsubp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fyl2xp1-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-frndint-,7.75,None,"(7.75,0.0,0.75,0.0,0.0,0.0,7.75,1.75,0.0)"
-fnclex-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-fptan-,4.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fcos-,9.5,None,"(9.5,0.0,1.0,0.0,0.0,0.0,8.0,2.5,0.0)"
-fscale-,2.75,None,"(2.25,0.0,0.75,0.0,0.0,0.0,2.75,1.25,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fxam-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-fprem1-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fninit-,9.0,None,"(3.0,0.0,1.5,0.0,0.0,0.0,9.0,1.5,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fnop-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fldpi-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fnstsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fnstsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-fwait-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-f2xm1-,5.25,None,"(5.25,0.0,0.75,0.0,0.0,0.0,3.75,2.25,0.0)"
-fprem-,2.25,None,"(2.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-fincstp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-ftst-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldenv-mem,19.833333333333336,None,"(19.833333333333336,0.0,13.833333333333334,4.0,4.0,0.0,13.833333333333334,8.5,0.0)"
-fldenv-mem,19.833333333333336,None,"(19.833333333333336,0.0,13.833333333333334,4.0,4.0,0.0,13.833333333333334,8.5,0.0)"
-fpatan-,32.0,None,"(32.0,0.0,2.5,0.0,0.0,0.0,15.5,5.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsubrp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsin-,10.75,None,"(10.75,0.0,0.75,0.0,0.0,0.0,7.75,2.75,0.0)"
-fldcw-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldln2-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fxch-fpu,6.0,None,"(6.0,0.0,2.0,0.0,0.0,0.0,4.0,3.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fucomp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fdecstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldlg2-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-fbstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fucompp-,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-fnstenv-mem,30.166666666666668,None,"(30.166666666666668,0.0,12.166666666666666,5.5,5.5,11.0,22.666666666666664,13.0,0.0)"
-fnstenv-mem,30.166666666666668,None,"(30.166666666666668,0.0,12.166666666666666,5.5,5.5,11.0,22.666666666666664,13.0,0.0)"
-fld1-,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-fsincos-,3.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,3.5,0.0,0.0)"
-fnstcw-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pcmpgtw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packuswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-psubd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psadbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packssdw-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pxor-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pxor-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-por-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pandn-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pandn-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pminsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-emms-,4.75,None,"(4.75,0.0,0.25,0.0,0.0,0.0,4.75,0.25,0.0)"
-punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pand-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-psubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maskmovq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packsswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-repe scasq-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)"
-cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)"
-lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep lodsq-,5.416666666666667,None,"(5.416666666666667,0.0,4.916666666666667,1.5,1.5,0.0,3.416666666666667,3.25,0.0)"
-syscall-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-repne cmpsq-,6.416666666666667,None,"(6.416666666666667,0.0,4.916666666666667,2.0,2.0,0.0,3.916666666666667,3.75,0.0)"
-movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-pushfq-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rep movsq-,15.0,None,"(15.0,0.0,10.5,2.0,2.0,0.0,10.5,10.0,0.0)"
-movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-rep stosq-,18.0,None,"(18.0,0.0,13.0,4.0,4.0,0.0,14.5,10.5,0.0)"
-swapgs-,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-repne scasq-,6.25,None,"(6.25,0.0,4.75,1.5,1.5,0.0,3.25,3.75,0.0)"
-popfq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-repe cmpsq-,6.75,None,"(6.75,0.0,4.75,2.0,2.0,0.0,3.75,3.75,0.0)"
-iretq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lock cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)"
-bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-roundpd-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-roundpd-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-roundps-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-roundps-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mpsadbw-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-mpsadbw-xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phminposuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-phminposuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmulld-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-pmulld-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pcmpeqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-rex.w pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-rex.w pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-rex.w pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-rex.w pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-pmuldq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmuldq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,1.6666666666666665,0.0,0.0)"
-dppd-xmm_xmm_imd,1.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,1.6666666666666665,0.0,0.0)"
-dpps-xmm_mem_imd,2.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-blendvps-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-blendvps-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-blendvpd-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-blendvpd-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-roundss-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-roundss-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-roundsd-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-roundsd-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendvb-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-pblendvb-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-phsubd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phsubd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmulhrsw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-phsubw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phsubw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-psignw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-phaddsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phaddsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-phaddsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmaddubsw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-phsubsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-phsubsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phsubsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-phsubsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-pabsw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phaddd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pabsd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phaddw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vmclear-mem,4.5,None,"(3.5,0.0,3.5,1.0,1.0,1.0,4.5,3.5,0.0)"
-vmptrst-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-addsubps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-haddpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-haddps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-haddps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-xsetbv-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)"
-xgetbv-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-xrstor-mem,10.166666666666666,None,"(10.166666666666666,0.0,7.166666666666666,0.5,0.5,0.0,6.166666666666666,6.5,0.0)"
-xrstor64-mem,10.166666666666666,None,"(10.166666666666666,0.0,7.166666666666666,0.5,0.5,0.0,6.166666666666666,6.5,0.0)"
-xsave-mem,13.5,None,"(13.5,0.0,8.0,1.0,1.0,1.0,8.0,7.5,0.0)"
-xsave64-mem,12.916666666666668,None,"(12.916666666666668,0.0,7.916666666666667,1.0,1.0,1.0,7.916666666666667,7.25,0.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-rdtscp-,7.333333333333333,None,"(5.333333333333333,0.0,5.333333333333333,0.0,0.0,0.0,7.333333333333333,4.0,0.0)"
-aesdec-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesdec-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aeskeygenassist-xmm_xmm_imd,6.666666666666667,None,"(3.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,6.666666666666667,0.0,0.0)"
-aeskeygenassist-xmm_mem_imd,6.333333333333333,None,"(3.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)"
-aesenclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesenclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesdeclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesdeclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesenc-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesenc-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-clflushopt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-xsaveopt64-mem,14.666666666666668,None,"(14.666666666666668,0.0,9.166666666666668,1.0,1.0,1.0,9.166666666666668,8.0,0.0)"
-xsaveopt-mem,14.666666666666668,None,"(14.666666666666668,0.0,9.166666666666668,1.0,1.0,1.0,9.166666666666668,8.0,0.0)"
-stac-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-clac-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mwait-,2.75,None,"(2.75,0.0,1.75,0.0,0.0,0.0,2.75,2.75,0.0)"
-rdseed-,5.75,None,"(5.75,0.0,3.75,0.5,0.5,0.0,0.75,4.75,0.0)"
-rdseed-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdseedl-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdseed-r64,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdseedq-r64,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-movbe-mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbeq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-mem,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbe-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbeq-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pclmulqdq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pclmulqdq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-clflush-mem,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-rdrand-,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdrand-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdrandl-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)"
-rdrand-r64,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)"
-rdrandq-r64,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)"
-pause-,1.25,None,"(1.25,0.0,0.75,0.0,0.0,0.0,0.75,1.25,0.0)"
-vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovss-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vstmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vsqrtsd-xmm_xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsqrtss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendvb-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vpblendvb-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vzeroall-,4.166666666666667,None,"(4.166666666666667,0.0,4.166666666666667,0.0,0.0,0.0,4.166666666666667,3.5,0.0)"
-vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdivpd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_ymm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_ymm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvpd-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_ymm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vsqrtpd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_ymm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vdpps-xmm_xmm_mem_imd,1.5,None,"(1.5,0.0,1.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdpps-xmm_xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdpps-ymm_ymm_mem_imd,1.5,None,"(1.5,0.0,1.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdpps-ymm_ymm_ymm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaskmovpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaskmovps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vroundsd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundsd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vhsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vhaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vhaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphaddsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvps-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-rex.w vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-rex.w vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-rex.w vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-rex.w vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vzeroupper-,1.0833333333333333,None,"(1.0833333333333333,0.0,1.0833333333333333,0.0,0.0,0.0,1.0833333333333333,0.75,0.0)"
-vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vroundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundps-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vroundps-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovdqu-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphminposuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vphminposuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphsubsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-ymm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendvb-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vpblendvb-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphaddsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphsubw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphsubsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtph2ps-ymm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2ph-mem_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-xmm_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-mem_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-xmm_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherqpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherqpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherqps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherqps-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherdps-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherdps-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherdpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherdpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherqq-ymm_mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherqq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherdd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdd-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherdq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vaesdec-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesdec-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesenc-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesenc-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesenclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesenclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaeskeygenassist-xmm_xmm_imd,6.666666666666667,None,"(3.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,6.666666666666667,0.0,0.0)"
-vaeskeygenassist-xmm_mem_imd,6.333333333333333,None,"(3.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)"
-shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
diff --git a/osaca/data/skx_data.csv b/osaca/data/skx_data.csv
deleted file mode 100644
index 785f6ae..0000000
--- a/osaca/data/skx_data.csv
+++ /dev/null
@@ -1,9664 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sldt-,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldt-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldtl-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldt-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sldtq-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-repe scasb-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lar-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-larl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-larq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lar-,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-lar-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-larl-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-lar-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-larq-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-mem,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)"
-xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-cmovbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lsl-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lsl-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lslq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)"
-lahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-nop-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-lock adc-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adcb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adc-mem,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adc-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adcl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adc-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock adcq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-out-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-outb-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-outl-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-r16_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-out-r16_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)"
-call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-std-,1.75,None,"(1.75,0.0,1.25,0.0,0.0,0.0,1.25,1.75,0.0)"
-stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-str-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)"
-idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)"
-idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)"
-idiv-r32,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)"
-idivl-r32,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)"
-idiv-r64,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)"
-idivq-r64,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shrd-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrdl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrdq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shrd-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shrdb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shrd-mem_r32_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shrd-mem_r64_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shrd-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrdb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shrd-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sgdt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-loop-LBL,2.5,None,"(2.5,0.0,1.0,0.0,0.0,0.0,1.0,2.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cld-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-clc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ret-imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-ret-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock subl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock sub-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock subq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,1.0,0.0)"
-setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)"
-cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock andb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock andl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock and-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock andq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock cmpxchg-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchg-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchg-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock cmpxchgq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ret far-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock orb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock orl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock or-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock orq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-enter-imd_imd,1.75,None,"(1.25,0.0,1.75,0.5,0.5,1.0,0.75,1.25,0.0)"
-repne scasb-,10.166666666666666,None,"(10.166666666666666,0.0,6.166666666666666,1.5,1.5,0.0,6.166666666666666,6.5,0.0)"
-leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-lock xadd-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddb-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddl-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xadd-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xaddq-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)"
-lock xchg-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchgb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchgb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)"
-lock xchg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchg-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchgl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchg-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xchgq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchgl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchg-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-xchgq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-smsw-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-andq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cpuid-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-rdtsc-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock addb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock addl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock add-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock addq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-sidt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock sbb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbb-mem,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbb-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbbl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbb-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-lock sbbq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)"
-insb-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-insd-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcr-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcrq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcr-r8_r8,3.25,None,"(2.75,0.0,3.25,0.0,0.0,0.0,1.25,2.75,0.0)"
-rcrb-r8_r8,3.25,None,"(2.75,0.0,3.25,0.0,0.0,0.0,1.25,2.75,0.0)"
-rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)"
-rcr-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcrb-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcr-r32_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcr-r64_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)"
-rcl-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rclq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,1.0,3.0,0.0)"
-rclb-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,1.0,3.0,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)"
-rcl-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rclb-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcl-r32_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-rcl-r64_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)"
-insw-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)"
-div-r32,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)"
-divl-r32,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)"
-div-r64,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)"
-divq-r64,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)"
-stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-in-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-inb-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-inl-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r8_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-in-r32_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)"
-cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-shld-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shldl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shldq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)"
-shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-shld-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shldb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shld-mem_r32_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shld-mem_r64_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-shld-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shldb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shld-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-shld-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)"
-sahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xorb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xorl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xor-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock xorq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-orq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)"
-rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)"
-ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)"
-ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmovnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)"
-cmovnbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-subl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-subq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-cmpxchg8b-mem,3.25,None,"(3.25,0.0,2.25,1.0,1.0,1.0,2.25,3.25,0.0)"
-lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-addq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)"
-adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)"
-adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-lock cmpxchg8b-mem,4.75,None,"(4.75,0.0,2.75,1.0,1.0,1.0,2.75,4.75,0.0)"
-cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lea-mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)"
-dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-setbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,1.0,0.0)"
-setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)"
-lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)"
-bswap-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapl-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-jmp far-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-divps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-addss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtpi2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mmx,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cmpss-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-andnps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andnps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-cvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-cvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-ldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-orps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-orps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-subss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cmpps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cmpps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-xorps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-xorps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-subps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-subps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-minss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-minss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-addps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-addps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtsi2ss-xmm_r32,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-cvtsi2ss-xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-mulss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-fxrstor64-mem,19.833333333333332,None,"(19.833333333333332,0.0,14.833333333333332,15.5,15.5,0.0,14.833333333333332,7.5,0.0)"
-sqrtps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-minps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2pi-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mulps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-mulps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-andps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fxrstor-mem,19.333333333333332,None,"(19.333333333333332,0.0,15.333333333333332,16.5,16.5,0.0,15.333333333333332,7.0,0.0)"
-stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-maxps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-maxps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-comiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-maxss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtdq2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvttps2dq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttps2dq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-divpd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divpd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pcmpgtw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpi2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maskmovdqu-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-andnpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andnpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psadbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2dq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmullw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmullw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-divsd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-divsd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-orpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-orpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cmppd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cmppd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movq2dq-xmm_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psubb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psubusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaxsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtpd2dq-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-paddd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-paddq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cmpsd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cmpsd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmulhuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmulhuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-minsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-minsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-addpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-addpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtsd2ss-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvtsd2ss-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-pslld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-sqrtsd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtsd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-psllq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psubusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-mulsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-subpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-subpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-sqrtpd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-andpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmulhw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmulhw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2dq-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtss2sd-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-xorpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-xorpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-maxsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-maxsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-minpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-minpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-addsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-addsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-psrlq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-subsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-subsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-paddsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-lfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-cvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2pd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtps2pd-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-mulpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-mulpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movdq2q-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-psubq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmuludq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaddwd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmaddwd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-cvtdq2ps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-cvtdq2ps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmaxub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-cvtpd2ps-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-cvtpd2pi-mmx_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvtpd2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-mfence-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-maxpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-maxpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pminub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-psubsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-comisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-cvttpd2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucom-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldl2t-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldl2e-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fyl2x-,4.5,None,"(4.5,0.0,0.5,0.0,0.0,0.0,4.5,1.5,0.0)"
-faddp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fxtract-,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcompp-,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fcomp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fsubp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fyl2xp1-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-frndint-,7.75,None,"(7.75,0.0,0.75,0.0,0.0,0.0,7.75,1.75,0.0)"
-fnclex-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-fptan-,4.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fcos-,9.5,None,"(9.5,0.0,1.0,0.0,0.0,0.0,8.0,2.5,0.0)"
-fscale-,2.75,None,"(2.25,0.0,0.75,0.0,0.0,0.0,2.75,1.25,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fxam-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-fprem1-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fninit-,9.0,None,"(3.0,0.0,1.5,0.0,0.0,0.0,9.0,1.5,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fnop-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-fldpi-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fnstsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fnstsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-fwait-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-f2xm1-,5.25,None,"(5.25,0.0,0.75,0.0,0.0,0.0,3.75,2.25,0.0)"
-fprem-,2.25,None,"(2.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-fincstp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-ftst-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldenv-mem,19.833333333333336,None,"(19.833333333333336,0.0,13.833333333333334,4.0,4.0,0.0,13.833333333333334,8.5,0.0)"
-fldenv-mem,19.833333333333336,None,"(19.833333333333336,0.0,13.833333333333334,4.0,4.0,0.0,13.833333333333334,8.5,0.0)"
-fpatan-,32.0,None,"(32.0,0.0,2.5,0.0,0.0,0.0,15.5,5.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-fsubrp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsin-,10.75,None,"(10.75,0.0,0.75,0.0,0.0,0.0,7.75,2.75,0.0)"
-fldcw-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldln2-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fxch-fpu,6.0,None,"(6.0,0.0,2.0,0.0,0.0,0.0,4.0,3.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-fucomp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fdecstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldlg2-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fldz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-fbstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-fucompp-,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-fnstenv-mem,30.166666666666668,None,"(30.166666666666668,0.0,12.166666666666666,5.5,5.5,11.0,22.666666666666664,13.0,0.0)"
-fnstenv-mem,30.166666666666668,None,"(30.166666666666668,0.0,12.166666666666666,5.5,5.5,11.0,22.666666666666664,13.0,0.0)"
-fld1-,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-fsincos-,3.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,3.5,0.0,0.0)"
-fnstcw-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-pcmpgtw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpgtd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpgtd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packuswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-psubd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psadbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packssdw-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-paddsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pxor-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pxor-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psubusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-paddb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-por-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pandn-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pandn-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pminsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-emms-,4.75,None,"(4.75,0.0,0.25,0.0,0.0,0.0,4.75,0.25,0.0)"
-punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pand-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pand-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pmaxub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-psubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psubsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pavgb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pavgb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maskmovq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-packsswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)"
-punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-repe scasq-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)"
-cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-syscall-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-pushfq-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)"
-scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-popfq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)"
-cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-iretq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lock cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-roundpd-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-roundpd-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-roundps-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-roundps-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mpsadbw-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-mpsadbw-xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phminposuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-phminposuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmulld-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-pmulld-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pcmpeqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-rex.w pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-rex.w pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-rex.w pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-rex.w pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-pmuldq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmuldq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,1.6666666666666665,0.0,0.0)"
-dppd-xmm_xmm_imd,1.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,1.6666666666666665,0.0,0.0)"
-dpps-xmm_mem_imd,2.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmaxuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaxud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pminuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pminud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-blendvps-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-blendvps-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-blendvpd-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-blendvpd-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-roundss-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-roundss-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-roundsd-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-roundsd-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pblendvb-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-pblendvb-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-phsubd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phsubd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmulhrsw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-phsubw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phsubw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phsubw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phsubw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-psignw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-psignb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-psignb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-psignb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-phaddsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phaddsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-phaddsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-pmaddubsw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-phsubsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-phsubsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-phsubsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-phsubsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-pabsw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phaddd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pabsd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-pabsb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-pabsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-pabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-phaddw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-phaddw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-phaddw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-phaddw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vmclear-mem,4.5,None,"(3.5,0.0,3.5,1.0,1.0,1.0,4.5,3.5,0.0)"
-vmptrst-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-addsubps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-addsubps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-addsubpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-addsubpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-hsubps-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-hsubps-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-hsubpd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-hsubpd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-haddpd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-haddpd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-haddps-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-haddps-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-xsetbv-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)"
-xgetbv-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-xrstor-mem,10.166666666666666,None,"(10.166666666666666,0.0,7.166666666666666,0.5,0.5,0.0,6.166666666666666,6.5,0.0)"
-xrstor64-mem,10.166666666666666,None,"(10.166666666666666,0.0,7.166666666666666,0.5,0.5,0.0,6.166666666666666,6.5,0.0)"
-xsave-mem,13.5,None,"(13.5,0.0,8.0,1.0,1.0,1.0,8.0,7.5,0.0)"
-xsave64-mem,12.916666666666668,None,"(12.916666666666668,0.0,7.916666666666667,1.0,1.0,1.0,7.916666666666667,7.25,0.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)"
-bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)"
-blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-rdtscp-,7.333333333333333,None,"(5.333333333333333,0.0,5.333333333333333,0.0,0.0,0.0,7.333333333333333,4.0,0.0)"
-aesdec-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesdec-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aeskeygenassist-xmm_xmm_imd,6.666666666666667,None,"(3.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,6.666666666666667,0.0,0.0)"
-aeskeygenassist-xmm_mem_imd,6.333333333333333,None,"(3.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)"
-aesenclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesenclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesdeclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesdeclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-aesenc-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-aesenc-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-xsaveopt64-mem,14.666666666666668,None,"(14.666666666666668,0.0,9.166666666666668,1.0,1.0,1.0,9.166666666666668,8.0,0.0)"
-xsaveopt-mem,14.666666666666668,None,"(14.666666666666668,0.0,9.166666666666668,1.0,1.0,1.0,9.166666666666668,8.0,0.0)"
-stac-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-clac-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mwait-,2.75,None,"(2.75,0.0,1.75,0.0,0.0,0.0,2.75,2.75,0.0)"
-movbe-mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbeq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-movbe-mem,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbe-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-movbeq-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pclmulqdq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-pclmulqdq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-clflush-mem,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-pause-,1.25,None,"(1.25,0.0,0.75,0.0,0.0,0.0,0.75,1.25,0.0)"
-vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovss-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhaddpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vhaddpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vhaddpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vhaddpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vstmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vsqrtsd-xmm_xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsqrtss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendvb-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vpblendvb-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vzeroall-,4.166666666666667,None,"(4.166666666666667,0.0,4.166666666666667,0.0,0.0,0.0,4.166666666666667,3.5,0.0)"
-vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdivpd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_ymm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_ymm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcmpss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)"
-vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcmpsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvpd-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvpd-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_ymm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vsqrtpd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_ymm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_mem_imd,1.5,None,"(1.5,0.0,1.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdppd-xmm_xmm_xmm_imd,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdpps-xmm_xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdpps-ymm_ymm_ymm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaskmovpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaskmovps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vroundsd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vroundsd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vroundss-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vroundss-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vhsubpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vhsubpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vhsubpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vhsubpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vhsubps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vhsubps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vhsubps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vhsubps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vhaddps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vhaddps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vhaddps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vhaddps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcmpps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcmpps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcmpps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcmppd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcmppd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphaddsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvps-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vblendvps-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-rex.w vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)"
-rex.w vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)"
-vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-rex.w vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)"
-rex.w vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vzeroupper-,1.0833333333333333,None,"(1.0833333333333333,0.0,1.0833333333333333,0.0,0.0,0.0,1.0833333333333333,0.75,0.0)"
-vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendpd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendps-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vroundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vroundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vroundpd-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vroundpd-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vroundps-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vroundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vroundps-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vroundps-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmaskmovdqu-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphminposuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vphminposuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphsubsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovntdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendvb-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)"
-vpblendvb-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)"
-vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vphaddd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphaddd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsignw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsignd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsignd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphaddsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphaddsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vphsubw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vphsubd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vphsubsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)"
-vphsubsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-kmovb-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kmovb-k_mem,1.25,None,"(0.25,0.0,0.25,0.5,0.5,0.0,1.25,0.25,0.0)"
-kmovb-mem_k,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-kmovb-k_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kmovb-r32_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kxnorq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kxnorw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kxnorb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kxnord-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kxorq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kunpckdq-k_k_k,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kord-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-korq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kmovd-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kmovd-k_mem,1.25,None,"(0.25,0.0,0.25,0.5,0.5,0.0,1.25,0.25,0.0)"
-kmovd-mem_k,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-kmovd-k_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kmovd-r32_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kmovq-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kmovq-k_mem,1.25,None,"(0.25,0.0,0.25,0.5,0.5,0.0,1.25,0.25,0.0)"
-kmovq-mem_k,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-kmovq-k_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kmovq-r64_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kmovw-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kmovw-k_mem,1.25,None,"(0.25,0.0,0.25,0.5,0.5,0.0,1.25,0.25,0.0)"
-kmovw-mem_k,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-kmovw-k_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kmovw-r32_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kshiftrq-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kortestw-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kortestq-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kortestd-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kortestb-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kandnb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kaddw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kaddq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kandb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kandnd-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kandw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kaddd-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kandnq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kandnw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kandq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kaddb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ktestw-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ktestq-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-knotq-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-knotw-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-knotb-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-knotd-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kunpckwd-k_k_k,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kunpckbw-k_k_k,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-ktestb-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kshiftlq-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kxorb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kandd-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kxorw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ktestd-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kshiftrw-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kshiftrb-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kshiftrd-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-korb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kxord-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-kshiftld-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kshiftlb-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-kshiftlw-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-korw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2ph-mem_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-xmm_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-mem_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-xmm_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherqpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherqpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherqps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherqps-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherdps-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherdps-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherqd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vgatherdpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vgatherdpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherqq-ymm_mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherqq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherdd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdd-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherdq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)"
-vpgatherdq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)"
-vaesdec-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesdec-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesdeclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesenc-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesenc-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaesenclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaesenclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaeskeygenassist-xmm_xmm_imd,6.666666666666667,None,"(3.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,6.666666666666667,0.0,0.0)"
-vaeskeygenassist-xmm_mem_imd,6.333333333333333,None,"(3.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)"
-shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)"
-mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)"
-mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)"
-shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)"
-pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfpclassss-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclassss-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclassss-k{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfpclassss-k_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovsd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovsd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovsd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovsd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclasssd-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclasssd-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclasssd-k{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfpclasssd-k_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmw-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmw-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmw-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmulhuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhuw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhuw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhuw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhuw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovss-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovss-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovss-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovss-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vrsqrt14ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14ss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14ss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14sd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vptestnmq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vprolvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vreducepd-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreducepd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreducepd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreducepd-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreducepd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vreducepd-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vreducepd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducepd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmuludq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmuludq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuludq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vprolq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprolq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprolq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslldq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslldq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpslldq-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslldq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpternlogq-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpternlogq-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpternlogq-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpternlogq-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpternlogq-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpternlogq-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpternlogq-xmm{opmask}_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-ymm{opmask}_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogq-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vrangesd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangesd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangesd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangesd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2uqq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtps2uqq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vpternlogd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpternlogd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpternlogd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpternlogd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpternlogd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpternlogd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpternlogd-xmm{opmask}_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-ymm{opmask}_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpternlogd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vrangess-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangess-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangess-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangess-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhrsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhrsw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhrsw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhrsw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhrsw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmovdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vfmsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinsertf64x2-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf64x2-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf64x2-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf64x2-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf64x2-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf64x2-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf64x2-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinsertf64x2-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpunpcklbw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklbw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklbw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklbw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vinsertf64x4-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf64x4-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf64x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinsertf64x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttpd2uqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttpd2uqq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinserti32x4-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti32x4-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti32x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinserti32x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinserti32x4-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti32x4-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti32x4-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinserti32x4-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpermd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vplzcntd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vplzcntd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vplzcntd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vplzcntd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vplzcntd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vplzcntd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vplzcntd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmovdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovdw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcvtph2ps-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtph2ps-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtph2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtph2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtph2ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtph2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtph2ps-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtph2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpermq-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermw-xmm{opmask}_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpermw-xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpermw-xmm{opmask}_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpermw-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpermw-ymm{opmask}_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpermw-ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpermw-ymm{opmask}_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpermw-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpermw-zmm{opmask}_zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpermw-zmm_zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpermw-zmm{opmask}_zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpermw-zmm_zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vmovshdup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovshdup-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovshdup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovshdup-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovshdup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovshdup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsdw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vplzcntq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vplzcntq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vplzcntq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vplzcntq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vplzcntq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vplzcntq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vplzcntq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vplzcntq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2qq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2qq-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2qq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvttps2qq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvttps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vextractf64x4-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf64x4-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf64x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf64x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpermilps-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vgatherqpd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vgatherqpd-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vgatherqpd-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)"
-vgatherqpd-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)"
-vgatherqpd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vgatherqpd-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgatherqps-ymm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgatherqps-ymm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgatherqps-xmm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vgatherqps-xmm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vgatherqps-xmm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vgatherqps-xmm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vscalefpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vscalefpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpavgw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmovusqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vscalefps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vscalefps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vscalefps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpeqb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqb-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovusqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqd-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqd-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqd-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqd-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqd-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqd-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusqd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusqd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpblendmq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpblendmq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpblendmq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxdq-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxdq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpblendmw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpblendmw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpblendmw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcasti64x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcasti64x2-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcasti64x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcasti64x2-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovddup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovddup-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovddup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovddup-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovddup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovddup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovddup-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmaxsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpblendmb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpblendmb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpblendmb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu32-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqu32-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqu32-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu32-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu32-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu32-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu32-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu32-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu32-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu32-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu32-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu32-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu32-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu32-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu32-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu32-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu32-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu32-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpblendmd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpblendmd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpblendmd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpblendmd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpblendmd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsrlvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxsq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vandps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmulps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmulps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmulps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrldq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrldq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsrldq-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrldq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovntdqa-zmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovntdqa-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovaps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovaps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovaps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovaps-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovaps-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vgetmantsd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantsd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2udq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvttpd2udq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvttpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttpd2udq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttpd2udq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttpd2udq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttpd2udq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vpshufhw-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufhw-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufhw-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufhw-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vgetmantss-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantss-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpandnd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpandnd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpconflictq-zmm{opmask}_zmm,11.5,None,"(9.5,0.0,0.0,0.0,0.0,0.0,11.5,0.0,0.0)"
-vpconflictq-zmm_zmm,11.5,None,"(9.5,0.0,0.0,0.0,0.0,0.0,11.5,0.0,0.0)"
-vpconflictq-zmm{opmask}_mem,11.5,None,"(9.5,0.0,0.0,0.5,0.5,0.0,11.5,0.0,0.0)"
-vpconflictq-zmm_mem,11.5,None,"(9.5,0.0,0.0,0.5,0.5,0.0,11.5,0.0,0.0)"
-vpconflictq-zmm{opmask}_mem,11.5,None,"(9.5,0.0,0.0,0.5,0.5,0.0,11.5,0.0,0.0)"
-vpconflictq-zmm_mem,11.5,None,"(9.5,0.0,0.0,0.5,0.5,0.0,11.5,0.0,0.0)"
-vpconflictq-xmm{opmask}_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpconflictq-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpconflictq-xmm{opmask}_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpconflictq-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpconflictq-xmm{opmask}_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpconflictq-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpconflictq-ymm{opmask}_ymm,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)"
-vpconflictq-ymm_ymm,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)"
-vpconflictq-ymm{opmask}_mem,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)"
-vpconflictq-ymm_mem,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)"
-vpconflictq-ymm{opmask}_mem,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)"
-vpconflictq-ymm_mem,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)"
-vorpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vorpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpconflictd-zmm{opmask}_zmm,20.5,None,"(14.5,0.0,0.0,0.0,0.0,0.0,20.5,0.0,0.0)"
-vpconflictd-zmm_zmm,20.5,None,"(14.5,0.0,0.0,0.0,0.0,0.0,20.5,0.0,0.0)"
-vpconflictd-zmm{opmask}_mem,20.5,None,"(14.5,0.0,0.0,0.5,0.5,0.0,20.5,0.0,0.0)"
-vpconflictd-zmm_mem,20.5,None,"(14.5,0.0,0.0,0.5,0.5,0.0,20.5,0.0,0.0)"
-vpconflictd-zmm{opmask}_mem,20.5,None,"(14.5,0.0,0.0,0.5,0.5,0.0,20.5,0.0,0.0)"
-vpconflictd-zmm_mem,20.5,None,"(14.5,0.0,0.0,0.5,0.5,0.0,20.5,0.0,0.0)"
-vpconflictd-xmm{opmask}_xmm,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)"
-vpconflictd-xmm_xmm,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)"
-vpconflictd-xmm{opmask}_mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)"
-vpconflictd-xmm_mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)"
-vpconflictd-xmm{opmask}_mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)"
-vpconflictd-xmm_mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)"
-vpconflictd-ymm{opmask}_ymm,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.0,0.0,0.0,10.666666666666666,0.0,0.0)"
-vpconflictd-ymm_ymm,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.0,0.0,0.0,10.666666666666666,0.0,0.0)"
-vpconflictd-ymm{opmask}_mem,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)"
-vpconflictd-ymm_mem,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)"
-vpconflictd-ymm{opmask}_mem,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)"
-vpconflictd-ymm_mem,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)"
-vpandnq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpandnq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpandnq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandnq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandnq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmaxsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpminsd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2qq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2qq-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2qq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtps2qq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vpminsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminsq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vbroadcasti32x2-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti32x2-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti32x2-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcasti32x2-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcasti32x2-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti32x2-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti32x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcasti32x2-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcasti32x2-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti32x2-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcasti32x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcasti32x2-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpackssdw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackssdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackssdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2udq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtpd2udq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2udq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2udq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2udq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2udq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vfpclassps-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclassps-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclassps-k{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclassps-k_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclassps-k{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclassps-k_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovd2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovd2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovd2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfpclasspd-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclasspd-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclasspd-k{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclasspd-k_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclasspd-k{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfpclasspd-k_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vsqrtsd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vorps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vorps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vorps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmovsxbq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vshuff32x4-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshuff32x4-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshuff32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff32x4-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshuff32x4-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshuff32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vsqrtss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vunpckhpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtss2sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtss2sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmovzxbd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbd-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrad-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrad-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrad-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtusi2ss-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtusi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpmovb2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovb2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovb2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsraw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtusi2sd-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtusi2sd-xmm_xmm_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpshufb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshufb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshufb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vbroadcastf32x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf32x4-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf32x4-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf32x4-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovsldup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovsldup-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovsldup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovsldup-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovsldup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovsldup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpcmpgtb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtb-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbw-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbw-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdivps-zmm{opmask}_zmm_zmm,10,None,"(2.5,10,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vdivps-zmm_zmm_zmm,10,None,"(2.5,10,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vdivps-zmm{opmask}_zmm_mem,10,None,"(2.5,10,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivps-zmm_zmm_mem,10,None,"(2.5,10,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivps-zmm{opmask}_zmm_mem,10,None,"(2.5,10,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivps-zmm_zmm_mem,10,None,"(2.5,10,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivps-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm{opmask}_ymm_ymm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_ymm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm{opmask}_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm{opmask}_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcmpss-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpss-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpss-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpss-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpshuflw-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpshuflw-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfmsub132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcmpsd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpsd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpsd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpsd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsllq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmovzxbq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfmsubadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsllw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsllw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpermi2pd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2pd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2pd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2pd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfmsub231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vshufpd-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufpd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vsubsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtps-zmm{opmask}_zmm,12,None,"(2.5,12,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsqrtps-zmm_zmm,12,None,"(2.5,12,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsqrtps-zmm{opmask}_mem,12,None,"(2.5,12,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtps-zmm_mem,12,None,"(2.5,12,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtps-zmm{opmask}_mem,12,None,"(2.5,12,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtps-zmm_mem,12,None,"(2.5,12,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm{opmask}_ymm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_ymm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm{opmask}_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm{opmask}_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpandd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpandd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpandd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtps2dq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2dq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmovw2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovw2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovw2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermi2ps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2ps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2ps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2ps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpandq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpandq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpandq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpandq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpandq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vsqrtpd-zmm{opmask}_zmm,24,None,"(2.5,24,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsqrtpd-zmm_zmm,24,None,"(2.5,24,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsqrtpd-zmm{opmask}_mem,24,None,"(2.5,24,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtpd-zmm_mem,24,None,"(2.5,24,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtpd-zmm{opmask}_mem,24,None,"(2.5,24,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtpd-zmm_mem,24,None,"(2.5,24,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsqrtpd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vsubss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vshufps-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufps-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfnmadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdbpsadbw-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdbpsadbw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdbpsadbw-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdbpsadbw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdbpsadbw-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdbpsadbw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdbpsadbw-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdbpsadbw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdbpsadbw-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdbpsadbw-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vdbpsadbw-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vdbpsadbw-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vprold-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprold-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprold-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprold-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprold-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprold-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprold-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprold-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vexpandpd-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandpd-zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandpd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandpd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandpd-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandpd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandpd-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandpd-ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandpd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandpd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vfmsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vexpandps-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandps-zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandps-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandps-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandps-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandps-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandps-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandps-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandps-ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vexpandps-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vexpandps-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmuldq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmuldq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmuldq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuldq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmuldq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgatherdps-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vgatherdps-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vgatherdps-xmm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgatherdps-xmm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgatherdps-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vgatherdps-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vpgatherqd-ymm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vpgatherqd-ymm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vpgatherqd-xmm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vpgatherqd-xmm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vpgatherqd-xmm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vpgatherqd-xmm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vgatherdpd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vgatherdpd-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vgatherdpd-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)"
-vgatherdpd-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)"
-vgatherdpd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vgatherdpd-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpunpckhdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtpd2dq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtpd2dq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2dq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2dq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vpgatherqq-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vpgatherqq-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vpgatherqq-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)"
-vpgatherqq-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)"
-vpgatherqq-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vpgatherqq-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtqq2pd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtqq2pd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtqq2pd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf64x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf64x4-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtqq2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtqq2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtqq2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtqq2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtqq2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtqq2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vbroadcastf64x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf64x2-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf64x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf64x2-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmulpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmulpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcompressd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressd-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressd-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovzxbw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxbw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxbw-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttps2udq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2udq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2udq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2udq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcompressq-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressq-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressq-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressq-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressq-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressq-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressq-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressq-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressq-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressq-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpcompressq-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcompressq-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpaddsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmovsqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vgetmantpd-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vgetmantpd-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vgetmantpd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantpd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantpd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantpd-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantpd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantpd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpalignr-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpalignr-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsqd-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqd-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqd-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqd-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqd-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqd-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovsqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovsqb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpaddsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmovwb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovwb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovwb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovwb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovwb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovwb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovwb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovwb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovwb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovwb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovwb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovwb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vgetmantps-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vgetmantps-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vgetmantps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantps-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetmantps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetmantps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmaxpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmaxpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpackuswb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackuswb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackuswb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackuswb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmaxps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmaxps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmaxps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpunpckhqdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpabsw-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsw-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsw-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsq-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsq-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14sd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsub213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vextractf32x4-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf32x4-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf32x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf32x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf32x4-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf32x4-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf32x4-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf32x4-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpabsb-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsb-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsb-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsb-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsb-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsb-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14ss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vextractf32x8-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf32x8-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf32x8-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf32x8-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpcmpuw-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuw-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuw-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuw-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuw-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuw-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuw-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuw-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuw-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuw-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuw-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuw-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsd2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2usil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2usiq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddusw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpaddusb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddusb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vunpckhps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpbroadcastd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpbroadcastd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpbroadcastd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpbroadcastd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpbroadcastd-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpbroadcastd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastd-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vfmadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu8-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu8-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu8-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu8-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu8-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu8-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu8-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu8-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu8-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu8-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu8-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu8-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu8-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqu8-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqu8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu8-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu8-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,1.0,1.0,2.0,1.0,0.0,0.0)"
-vmovdqu8-mem_zmm,2.0,None,"(0.0,0.0,0.0,1.0,1.0,2.0,1.0,0.0,0.0)"
-vshufi32x4-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufi32x4-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufi32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi32x4-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufi32x4-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufi32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovusdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmulhw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulhw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulhw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vxorpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vxorpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vxorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vxorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vxorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vxorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpermilpd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovusdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovusdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovusdw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpbroadcastq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpbroadcastq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpbroadcastq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-zmm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-zmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpbroadcastq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpbroadcastq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpbroadcastq-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpbroadcastq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastq-ymm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaddubsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddubsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddubsw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddubsw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddubsw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddubsw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vxorps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vxorps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vxorps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vxorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vxorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vxorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vxorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaless-xmm{opmask}_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscaless-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscaless-xmm{opmask}_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaless-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandnps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandnps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandnps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandnps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandnps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandnps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovups-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovups-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovups-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovups-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovups-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovups-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpsravq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vinserti32x8-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti32x8-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti32x8-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinserti32x8-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtuqq2pd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtuqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtuqq2pd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtuqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtuqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalesd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscalesd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscalesd-xmm{opmask}_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalesd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovupd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovupd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovupd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovupd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovupd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovupd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpsravd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsravd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvttps2dq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2dq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivsd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vcvtuqq2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtuqq2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtuqq2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtuqq2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtuqq2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtuqq2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtuqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtuqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtuqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtuqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vfnmadd231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexpsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexpsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcmpps-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpps-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpps-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpps-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpps-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpps-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmpps-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmpps-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmppd-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmppd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmppd-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcmppd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vbroadcasti32x8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcasti32x8-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsubpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsubpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandnpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vandnpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandnpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vandnpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandnpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandnpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vandnpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vminss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcasti32x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcasti32x4-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcasti32x4-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcasti32x4-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vfixupimmps-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfixupimmps-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfixupimmps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf32x8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf32x8-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsubps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vsubps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfixupimmpd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfixupimmpd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmpd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmpd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf32x2-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastf32x2-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastf32x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf32x2-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastf32x2-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastf32x2-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastf32x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastf32x2-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpw-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpw-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpw-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpw-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpw-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpw-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpw-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpw-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpw-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpw-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpw-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpw-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpq-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpq-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpq-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vscatterqps-mem{opmask}_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscatterqps-mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscatterqps-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)"
-vscatterqps-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)"
-vscatterqps-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)"
-vscatterqps-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)"
-vpsubusb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpcmpd-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpd-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpd-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpb-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpb-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpb-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpb-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpb-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpb-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpb-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpb-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpb-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpb-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpb-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpb-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsubusw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubusw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubusw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vshufi64x2-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufi64x2-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufi64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi64x2-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufi64x2-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshufi64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshufi64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscaleps-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vrndscaleps-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vrndscaleps-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscaleps-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscaleps-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscaleps-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscaleps-xmm{opmask}_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscaleps-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscaleps-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaleps-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaleps-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaleps-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaleps-ymm{opmask}_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscaleps-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscaleps-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaleps-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaleps-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscaleps-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vgetexpps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vgetexpps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexpps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexpps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexpps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexpps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vfmadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vgetexppd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vgetexppd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vgetexppd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexppd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexppd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexppd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexppd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexppd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalepd-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vrndscalepd-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vrndscalepd-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscalepd-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscalepd-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscalepd-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrndscalepd-xmm{opmask}_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscalepd-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscalepd-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalepd-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalepd-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalepd-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalepd-ymm{opmask}_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscalepd-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrndscalepd-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalepd-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalepd-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrndscalepd-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpabsd-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpaddq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpcmpuq-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpuq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpuq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpexpandd-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandd-zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandd-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandd-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandd-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandd-ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpcmpub-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpub-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpub-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpub-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpub-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpub-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpub-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpub-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpub-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpub-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpub-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpub-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpud-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpud-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpud-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpud-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpud-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpud-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpud-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpud-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpaddd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpaddd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpaddd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpexpandq-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandq-zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandq-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandq-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandq-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandq-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandq-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandq-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandq-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandq-ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)"
-vpexpandq-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpexpandq-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcvttsd2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2usil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2usiq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vshuff64x2-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshuff64x2-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshuff64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff64x2-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshuff64x2-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vshuff64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vshuff64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmb-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmb-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmb-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovq2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovq2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovq2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vprord-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprord-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprord-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprord-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprord-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprord-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprord-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprord-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vcvtpd2qq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2qq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2qq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14pd-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrcp14pd-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrcp14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14pd-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14pd-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14pd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14pd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vaddpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vaddpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14ps-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrcp14ps-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrcp14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14ps-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14ps-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrcp14ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ps-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14ps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcp14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrcp14ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vaddps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vaddps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsraq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsraq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsraq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsraq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vptestmw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmw-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmw-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmw-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmulld-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulld-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmulld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmulld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmulld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmulld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmulld-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulld-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-ymm{opmask}_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmulld-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vptestnmd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmb-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmb-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestnmb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestnmb-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmullq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmullq-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-ymm{opmask}_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmullq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmullq-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmullq-zmm{opmask}_zmm_zmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vpmullq-zmm_zmm_zmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vpmullq-zmm{opmask}_zmm_mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vpmullq-zmm_zmm_mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vpmullq-zmm{opmask}_zmm_mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vpmullq-zmm_zmm_mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vpmullw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmullw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmullw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmullw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmullw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmullw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vextractf64x2-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf64x2-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf64x2-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf64x2-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf64x2-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf64x2-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextractf64x2-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextractf64x2-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcompresspd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompresspd-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompresspd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompresspd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompresspd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompresspd-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompresspd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompresspd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompresspd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompresspd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompresspd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompresspd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpunpcklwd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklwd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklwd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklwd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfnmsub213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcompressps-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompressps-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompressps-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompressps-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompressps-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompressps-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompressps-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompressps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompressps-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompressps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcompressps-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vcompressps-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vinserti64x2-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti64x2-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti64x2-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinserti64x2-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinserti64x2-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti64x2-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti64x2-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinserti64x2-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinserti64x4-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti64x4-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinserti64x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinserti64x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-valignq-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignq-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignq-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignq-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignq-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignq-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignq-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vreducesd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreducesd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreducesd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducesd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-valignd-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignd-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-valignd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-valignd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vreducess-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreducess-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreducess-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreducess-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpermi2w-xmm{opmask}_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpermi2w-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpermi2w-xmm{opmask}_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpermi2w-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpermi2w-ymm{opmask}_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpermi2w-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpermi2w-ymm{opmask}_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpermi2w-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpermi2w-zmm{opmask}_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpermi2w-zmm_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpermi2w-zmm{opmask}_zmm_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-vpermi2w-zmm_zmm_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfmadd213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpackusdw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackusdw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpackusdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpackusdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxud-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxud-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpermi2q-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2q-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2q-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2q-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovdqu16-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu16-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu16-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu16-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu16-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu16-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu16-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu16-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu16-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu16-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu16-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu16-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu16-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqu16-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqu16-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu16-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu16-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu16-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmaxuq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxuq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxuq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxuq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmaxuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmaxuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbd-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2d-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2d-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2d-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermi2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermi2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfmadd213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaxuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxuw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxuw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-zmm{opmask}_zmm_zmm,16,None,"(2.5,16,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vdivpd-zmm_zmm_zmm,16,None,"(2.5,16,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vdivpd-zmm{opmask}_zmm_mem,16,None,"(2.5,16,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivpd-zmm_zmm_mem,16,None,"(2.5,16,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivpd-zmm{opmask}_zmm_mem,16,None,"(2.5,16,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivpd-zmm_zmm_mem,16,None,"(2.5,16,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vdivpd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm{opmask}_ymm_ymm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_ymm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm{opmask}_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm{opmask}_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrlq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrlq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovapd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovapd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovapd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovapd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovapd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovapd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpbroadcastb-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastb-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastb-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfnmadd132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsrld-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrld-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsrld-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsrld-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmovzxwd-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwd-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfnmadd132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu64-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqu64-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqu64-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu64-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqu64-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu64-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu64-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu64-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu64-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu64-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu64-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu64-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu64-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu64-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu64-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu64-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqu64-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqu64-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vfixupimmss-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmss-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscatterqpd-mem{opmask}_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)"
-vscatterqpd-mem_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)"
-vscatterqpd-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)"
-vscatterqpd-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)"
-vscatterqpd-mem{opmask}_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)"
-vscatterqpd-mem_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)"
-vcvtudq2ps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtudq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtudq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtudq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtudq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastsd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastsd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastsd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastsd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastsd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastsd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vmovdqa64-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqa64-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqa64-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqa64-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqa64-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa64-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa64-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa64-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa64-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa64-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa64-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa64-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa64-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa64-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa64-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa64-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa64-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa64-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpcmpeqw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpeqw-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfixupimmsd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfixupimmsd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfixupimmsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttps2uqq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvttps2uqq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvttps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vbroadcastss-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastss-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcastss-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastss-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vbroadcastss-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vcvtudq2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtudq2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtudq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtudq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vminpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vminpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vprorvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vptestmd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfnmsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpbroadcastw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpbroadcastw-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpbroadcastw-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vptestmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtdq2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtdq2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtdq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vprorvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vprorvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vprorvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vminps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vminps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vminps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vminps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsubw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpsubw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsubw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsadbw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpsadbw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtss2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2usil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtss2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtss2usiq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vfmsubadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxorq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpxorq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpxorq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxorq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxorq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxorq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxorq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxorq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vextracti64x4-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti64x4-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti64x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti64x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vinsertf32x8-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf32x8-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf32x8-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinsertf32x8-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vextracti64x2-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti64x2-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti64x2-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti64x2-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti64x2-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti64x2-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti64x2-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti64x2-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vinsertf32x4-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf32x4-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf32x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinsertf32x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vinsertf32x4-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf32x4-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vinsertf32x4-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vinsertf32x4-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpslld-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslld-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpslld-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpslld-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vextracti32x4-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti32x4-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti32x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti32x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti32x4-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti32x4-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti32x4-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti32x4-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpxord-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpxord-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpxord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpxord-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpxord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpermt2ps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2ps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2ps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2ps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vextracti32x8-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti32x8-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vextracti32x8-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vextracti32x8-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpmovzxdq-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxdq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtsi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vrangepd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangepd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangepd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangepd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangepd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrangepd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrangepd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangepd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreduceps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreduceps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreduceps-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vreduceps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vreduceps-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vreduceps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vreduceps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtsd2ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtsd2ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtsd2ss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmovuswb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovuswb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovuswb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovuswb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovuswb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovuswb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovuswb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovuswb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovuswb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovuswb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovuswb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovuswb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpavgb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpavgb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpavgb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrangeps-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangeps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangeps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangeps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrangeps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrangeps-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrangeps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrangeps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmovswb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovswb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovswb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovswb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovswb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovswb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovswb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovswb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovswb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovswb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovswb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovswb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpscatterqq-mem{opmask}_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)"
-vpscatterqq-mem_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)"
-vpscatterqq-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)"
-vpscatterqq-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)"
-vpscatterqq-mem{opmask}_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)"
-vpscatterqq-mem_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)"
-vbroadcasti64x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vbroadcasti64x4-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttss2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2usil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttss2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttss2usiq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmovsxwd-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpscatterqd-mem{opmask}_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpscatterqd-mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpscatterqd-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)"
-vpscatterqd-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)"
-vpscatterqd-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)"
-vpscatterqd-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)"
-vfmsubadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmsubadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmovsxwq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vfnmadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscatterdps-mem{opmask}_zmm,16.0,None,"(1.5,0.0,0.5,8.0,8.0,16.0,1.5,0.5,0.0)"
-vscatterdps-mem_zmm,16.0,None,"(1.5,0.0,0.5,8.0,8.0,16.0,1.5,0.5,0.0)"
-vscatterdps-mem{opmask}_xmm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,1.5,0.5,0.0)"
-vscatterdps-mem_xmm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,1.5,0.5,0.0)"
-vscatterdps-mem{opmask}_ymm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,1.5,0.5,0.0)"
-vscatterdps-mem_ymm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,1.5,0.5,0.0)"
-vcvtpd2uqq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2uqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2uqq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscatterdpd-mem{opmask}_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)"
-vscatterdpd-mem_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)"
-vscatterdpd-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)"
-vscatterdpd-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)"
-vscatterdpd-mem{opmask}_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)"
-vscatterdpd-mem_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)"
-vpsubsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpermt2d-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2d-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2d-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2d-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vrsqrt14pd-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrsqrt14pd-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrsqrt14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14pd-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14pd-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmsub231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14ps-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrsqrt14ps-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vrsqrt14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14ps-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14ps-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vrsqrt14ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vrsqrt14ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpermt2w-xmm{opmask}_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpermt2w-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpermt2w-xmm{opmask}_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpermt2w-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpermt2w-ymm{opmask}_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpermt2w-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)"
-vpermt2w-ymm{opmask}_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpermt2w-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)"
-vpermt2w-zmm{opmask}_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpermt2w-zmm_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)"
-vpermt2w-zmm{opmask}_zmm_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-vpermt2w-zmm_zmm_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)"
-vcvtps2udq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2udq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2udq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2udq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvtps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpermt2q-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2q-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2q-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2q-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vmovntpd-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminuq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminuq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminuq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminuq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpminuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminuw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminuw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminuw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpermps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpminub-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminub-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminub-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminub-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminub-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminub-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vmovntps-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vpminud-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpminud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vunpcklpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermpd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vscalefsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexpss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vgetexpss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vgetexpss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vblendmps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vblendmps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vfmaddsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vscalefss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vscalefss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqa32-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqa32-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vmovdqa32-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqa32-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vmovdqa32-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa32-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa32-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa32-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa32-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa32-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa32-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa32-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa32-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa32-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa32-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa32-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vmovdqa32-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vmovdqa32-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)"
-vblendmpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vblendmpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vblendmpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vblendmpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vblendmpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpunpckhbw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhbw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhbw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2pd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2pd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2pd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpermt2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpermt2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vcvttpd2qq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttpd2qq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttpd2qq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcvttpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvttpd2dq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvttpd2dq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvttpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvttpd2dq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttpd2dq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvttpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vfmadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpscatterdd-mem{opmask}_zmm,16.0,None,"(1.5,0.0,0.5,8.0,8.0,16.0,1.5,0.5,0.0)"
-vpscatterdd-mem_zmm,16.0,None,"(1.5,0.0,0.5,8.0,8.0,16.0,1.5,0.5,0.0)"
-vpscatterdd-mem{opmask}_xmm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,1.5,0.5,0.0)"
-vpscatterdd-mem_xmm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,1.5,0.5,0.0)"
-vpscatterdd-mem{opmask}_ymm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,1.5,0.5,0.0)"
-vpscatterdd-mem_ymm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,1.5,0.5,0.0)"
-vpmaddwd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddwd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaddwd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddwd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddwd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpmaddwd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmaddwd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpscatterdq-mem{opmask}_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)"
-vpscatterdq-mem_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)"
-vpscatterdq-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)"
-vpscatterdq-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)"
-vpscatterdq-mem{opmask}_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)"
-vpscatterdq-mem_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)"
-vfmadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpcmpgtw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpcmpgtw-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpsubsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsubsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsubsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxub-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxub-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxub-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmaxub-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpmaxub-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfmaddsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpgatherdd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vpgatherdd-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vpgatherdd-xmm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherdd-xmm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpgatherdd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vpgatherdd-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vpunpckhwd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhwd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpunpckhwd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpunpckhwd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpord-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpord-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vpord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpord-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpord-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpord-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpord-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vpord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpmovqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpgatherdq-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vpgatherdq-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)"
-vpgatherdq-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)"
-vpgatherdq-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)"
-vpgatherdq-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vpgatherdq-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vfnmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpmovqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)"
-vpmovqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)"
-vpmovqd-ymm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovqd-ymm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovqd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpmovqd-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpmovqd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovqd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovqd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpmovqd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpmovqd-xmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovqd-xmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpmovqd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vpmovqd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)"
-vporq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vporq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)"
-vporq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vporq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vporq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vporq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vporq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vporq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vporq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vporq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vporq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vporq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vporq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vporq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vporq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vporq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vporq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vporq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)"
-vpsllvw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtpd2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtpd2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtpd2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)"
-vcvtpd2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtpd2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vpsllvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vaddsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2ph-ymm{opmask}_zmm_imd,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtps2ph-ymm_zmm_imd,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtps2ph-mem{opmask}_zmm_imd,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5,0.0,0.0)"
-vcvtps2ph-mem_zmm_imd,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5,0.0,0.0)"
-vcvtps2ph-xmm{opmask}_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-xmm_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-mem{opmask}_xmm_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333,0.0,0.0)"
-vcvtps2ph-mem_xmm_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333,0.0,0.0)"
-vcvtps2ph-xmm{opmask}_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-xmm_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)"
-vcvtps2ph-mem{opmask}_ymm_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333,0.0,0.0)"
-vcvtps2ph-mem_ymm_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333,0.0,0.0)"
-vpacksswb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpacksswb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)"
-vpacksswb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vpacksswb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)"
-vaddss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vaddss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vpsllvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)"
-vcvtps2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtps2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)"
-vcvtps2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)"
-vcvtps2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
-vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)"
diff --git a/osaca/data/snb_data.csv b/osaca/data/snb_data.csv
deleted file mode 100644
index a948dde..0000000
--- a/osaca/data/snb_data.csv
+++ /dev/null
@@ -1,3166 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,1.0,3.3333333333333335)"
-sldt-,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-sldt-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-sldtl-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-sldt-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-sldtq-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-lgdt-mem,11.0,None,"(2.0,0.0,2.0,0.0,0.0,1.0,11.0)"
-call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-mov-LBL,22.666666666666668,None,"(14.666666666666666,0.0,7.666666666666667,0.5,0.5,1.0,22.666666666666668)"
-mov-LBL,12.666666666666668,None,"(11.666666666666666,0.0,4.666666666666667,0.0,0.0,0.0,12.666666666666668)"
-jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-wrmsr-,53.0,None,"(32.0,0.0,24.0,0.0,0.0,1.0,53.0)"
-repe scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cmc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cmovbe-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbe-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbel-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbe-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbeq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovbe-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovbe-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovbel-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovbe-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovbeq-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_r8,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpb-mem_r8,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_r32,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpl-mem_r32,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem_r64,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpq-mem_r64,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmpq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmovle-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovle-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovlel-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovle-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovleq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lsl-mem,32.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,32.0)"
-lsl-r32_mem,32.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,32.0)"
-lsl-r64_mem,32.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,32.0)"
-lslq-r64_mem,32.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,32.0)"
-lsl-,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)"
-lsl-r32_r32,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)"
-lsl-r64_r32,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)"
-lahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cbw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpsw-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adcb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adc-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adc-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adcl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adc-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock adcq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-cmpsd-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-out-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-outb-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-outl-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-r16_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-out-r16_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-cmovnle-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnle-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnlel-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnle-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnleq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbb-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbb-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbbl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbb-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbbq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sbb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-sbb-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lodsb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)"
-lodsw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)"
-lodsd-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-std-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-stosd-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xorb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xor-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xor-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xorl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xor-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xorq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-stc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sti-,3.6666666666666665,None,"(0.6666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-str-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,1.0,3.3333333333333335)"
-str-,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-str-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-strl-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-str-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-strq-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-stosb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-rdmsr-,41.5,None,"(21.0,0.0,14.5,0.0,0.0,0.0,41.5)"
-rep lodsb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-idiv-mem,6,None,"(2.3333333333333335,6,2.3333333333333335,0.5,0.5,0.0,2.3333333333333335)"
-idiv-r8,6,None,"(3.0,6,3.0,0.0,0.0,0.0,3.0)"
-idivb-r8,6,None,"(3.0,6,3.0,0.0,0.0,0.0,3.0)"
-idiv-mem,10,None,"(3.1666666666666665,10,2.6666666666666665,0.5,0.5,0.0,3.1666666666666665)"
-idiv-mem,23.166666666666668,None,"(18.166666666666664,21,14.666666666666668,0.5,0.5,0.0,23.166666666666668)"
-idiv-r32,10,None,"(2.833333333333333,10,2.833333333333333,0.0,0.0,0.0,3.333333333333333)"
-idivl-r32,10,None,"(2.833333333333333,10,2.833333333333333,0.0,0.0,0.0,3.333333333333333)"
-idiv-r64,23.333333333333332,None,"(18.333333333333336,21,15.333333333333332,0.0,0.0,0.0,23.333333333333332)"
-idivq-r64,23.333333333333332,None,"(18.333333333333336,21,15.333333333333332,0.0,0.0,0.0,23.333333333333332)"
-repne cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shrd-mem_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrd-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrdl-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrd-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrdq-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shrd-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrd-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrdl-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrd-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrdq-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shrd-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shrdb-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shrd-mem_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shrd-mem_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shrd-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shrdb-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shrd-r32_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shrd-r64_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-movsd-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsw-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-mov-r64_r8,4.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,4.0)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bts-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btsl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bts-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btsq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btr-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btrl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btr-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btrq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sgdt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,2.0,2.3333333333333335)"
-loop-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btc-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btcl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btc-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btcq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-wbinvd-,397375.0,None,"(237582.0,0.0,0.0,0.0,0.0,184337.0,397375.0)"
-jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-mul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-mul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-push-r16,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pushw-r16,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-push-r16,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-pushw-r16,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cli-,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-cld-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-clc-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lldt-mem,8.0,None,"(0.0,0.0,3.0,1.5,1.5,1.0,8.0)"
-lldt-,6.666666666666667,None,"(0.6666666666666666,0.0,3.6666666666666665,1.0,1.0,1.0,6.666666666666667)"
-ret-imd,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-ret-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btc-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btcl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btc-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btcq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cmpxchg-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchgb-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchg-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgb-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchg-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchgl-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchg-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchgq-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cmpxchg-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgl-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchg-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgq-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-verr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)"
-verr-,8.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,8.0)"
-rep stosb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-cwd-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-scasw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-scasd-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rdpmc-,13.666666666666666,None,"(13.666666666666666,0.0,7.666666666666666,0.0,0.0,0.0,13.666666666666666)"
-lock cmpxchg-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchgb-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchg-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchgl-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchg-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock cmpxchgq-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-cmovnp-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnp-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnpl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnp-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnpq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-ret far-,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-enter-imd_imd,16.0,None,"(10.0,0.0,0.0,0.0,0.0,2.0,16.0)"
-repne scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-leave-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-lock xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lidt-mem,11.0,None,"(2.0,0.0,2.0,0.0,0.0,1.0,11.0)"
-xlat-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)"
-lock xchg-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lock xchgb-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgb-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r8_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgb-r8_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-lock xchg-mem,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)"
-lock xchg-mem_r32,2.5,None,"(1.0,0.0,1.5,1.0,1.0,1.0,2.5)"
-lock xchgl-mem_r32,2.5,None,"(1.0,0.0,1.5,1.0,1.0,1.0,2.5)"
-lock xchg-mem_r64,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)"
-lock xchgq-mem_r64,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)"
-xchg-mem,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)"
-xchg-mem_r32,2.5,None,"(1.0,0.0,1.5,1.0,1.0,1.0,2.5)"
-xchgl-mem_r32,2.5,None,"(1.0,0.0,1.5,1.0,1.0,1.0,2.5)"
-xchg-mem_r64,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)"
-xchgq-mem_r64,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)"
-xchg-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-smsw-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,0.5,0.5,1.0,3.3333333333333335)"
-smsw-,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-smsw-r32,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-smswl-r32,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-smsw-r64,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-smswq-r64,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-andb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-and-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-and-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-andl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-and-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-andq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-mov-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-mov-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-mov-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-mov-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cpuid-,38.0,None,"(10.0,0.0,0.0,0.0,0.0,0.0,38.0)"
-rdtsc-,9.0,None,"(6.5,0.0,5.5,0.0,0.0,0.0,9.0)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sidt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,2.0,1.3333333333333333)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbb-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbb-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbbl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbb-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-lock sbbq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.3333333333333333,None,"(0.8333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-imul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r32,1.3333333333333333,None,"(0.8333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-imul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,3.6666666666666665)"
-rcr-r8_imd,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)"
-rcrb-r8_imd,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)"
-rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcrl-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcrq-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcrb-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcr-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcr-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcrl-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcr-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcrq-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcr-mem_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,3.6666666666666665)"
-rcrb-mem_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,3.6666666666666665)"
-rcr-r8_r8,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)"
-rcrb-r8_r8,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)"
-rcr-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcrb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcrb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcrb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcr-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcrb-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-r32_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcr-r64_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)"
-rcl-mem_imd,4.333333333333334,None,"(4.333333333333334,0.0,1.3333333333333333,1.0,1.0,1.0,3.3333333333333335)"
-rcl-r8_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,4.166666666666666)"
-rclb-r8_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,4.166666666666666)"
-rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-imd,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-rcl-r32_imd,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-rcl-r64_imd,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-rclq-r64_imd,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rclb-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcl-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcl-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rclq-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rcl-mem_r8,4.333333333333334,None,"(4.333333333333334,0.0,1.3333333333333333,1.0,1.0,1.0,3.3333333333333335)"
-rclb-mem_r8,4.333333333333334,None,"(4.333333333333334,0.0,1.3333333333333333,1.0,1.0,1.0,3.3333333333333335)"
-rcl-r8_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-rclb-r8_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-rcl-mem_r8,2.833333333333333,None,"(2.833333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.833333333333333)"
-rclb-mem_r8,2.833333333333333,None,"(2.833333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.833333333333333)"
-rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)"
-rcl-r8,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-rclb-r8,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-rcl-r32_r8,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-rcl-r64_r8,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-div-mem,6,None,"(2.3333333333333335,6,2.3333333333333335,0.5,0.5,0.0,2.3333333333333335)"
-div-r8,6,None,"(2.6666666666666665,6,2.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-divb-r8,6,None,"(2.6666666666666665,6,2.6666666666666665,0.0,0.0,0.0,3.6666666666666665)"
-div-mem,10,None,"(2.833333333333333,10,2.833333333333333,0.5,0.5,0.0,4.333333333333333)"
-div-mem,21,None,"(10.0,21,7.0,0.5,0.5,0.0,14.0)"
-div-r32,10,None,"(2.833333333333333,10,2.833333333333333,0.0,0.0,0.0,4.333333333333333)"
-divl-r32,10,None,"(2.833333333333333,10,2.833333333333333,0.0,0.0,0.0,4.333333333333333)"
-div-r64,21,None,"(10.0,21,8.0,0.0,0.0,0.0,14.0)"
-divq-r64,21,None,"(10.0,21,8.0,0.0,0.0,0.0,14.0)"
-stosw-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-rep movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-cmovnz-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnz-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnzl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnz-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnzq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovns-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnsl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovns-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnsq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovns-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovno-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnol-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovno-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnoq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovno-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnl-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnlq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovnb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovo-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovol-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovo-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovoq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovo-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bt-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bt-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-btq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-jrcxz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-shld-mem_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shld-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shldl-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shld-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shldq-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)"
-shld-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shld-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shldl-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shld-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shldq-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-shld-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shldb-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shld-mem_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shld-mem_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-shld-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shldb-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shld-r32_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-shld-r64_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)"
-invlpg-mem,18.333333333333332,None,"(11.333333333333334,0.0,10.333333333333334,2.0,2.0,4.0,18.333333333333332)"
-sahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmovz-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovz-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovzl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovz-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovzq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovp-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovpl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovp-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovpq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovs-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovsl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovs-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovsq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovs-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovl-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovlq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-cmovb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lmsw-mem,10.333333333333334,None,"(3.3333333333333335,0.0,5.333333333333333,1.0,1.0,1.0,10.333333333333334)"
-lmsw-,9.333333333333334,None,"(4.333333333333333,0.0,2.333333333333333,0.5,0.5,1.0,9.333333333333334)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock bts-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btsl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock bts-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btsq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-orb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-or-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-or-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-orl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-or-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-orq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-repe cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-clts-,5.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,5.0)"
-movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movzx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-verw-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)"
-verw-,8.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,8.0)"
-jmp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-ror-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)"
-ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmovnbe-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbe-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbel-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbe-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbeq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-cmovnbe-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovnbe-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovnbel-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovnbe-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-cmovnbeq-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-sub-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-sub-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-subl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-sub-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-subq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmpxchg8b-mem,4.666666666666667,None,"(4.666666666666667,0.0,1.6666666666666667,1.0,1.0,1.0,4.666666666666667)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btr-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btrl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btr-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-lock btrq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-addb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-add-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-add-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-addl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-add-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-addq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcb-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adcb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adc-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcb-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adc-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adcl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adc-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adcq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-adc-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adcb-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adc-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adc-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adcl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adc-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adcq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)"
-adc-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-adcb-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lock cmpxchg8b-mem,6.833333333333333,None,"(6.833333333333333,0.0,4.333333333333333,1.0,1.0,1.0,4.833333333333334)"
-cwde-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lea-mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-lea-r32_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-leal-r32_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-lea-r64_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-leaq-r64_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-bswap-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-bswapl-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-bswap-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-bswapq-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-jmp far-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-divps-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-divps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fxsave64-mem,38.0,None,"(14.166666666666666,0.0,14.666666666666666,20.0,20.0,38.0,28.166666666666668)"
-andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-cvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ldmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-divss-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-sqrtss-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-sqrtss-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtsi2ss-xmm_r32,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtsi2ss-xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-mulss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mulss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,43.333333333333336,None,"(16.833333333333332,0.0,13.833333333333334,19.5,19.5,0.0,43.333333333333336)"
-fxsave-mem,38.0,None,"(14.166666666666666,0.0,14.666666666666666,20.0,20.0,38.0,28.166666666666668)"
-sqrtps-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-sqrtps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movaps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mulps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mulps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movups-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-fxrstor-mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,2.0)"
-stmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-comiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-punpckhdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-divpd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)"
-divpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-pcmpgtw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpgtb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpgtd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-packuswb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-packuswb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-maskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.5,2.0,2.0,2.0,2.0)"
-andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pslldq-xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-psadbw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-packssdw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-packssdw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmullw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmullw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divsd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)"
-divsd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpeqb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpeqd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpcklqdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklqdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpcklwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movq2dq-xmm_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-psubb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-paddd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psrldq-xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpckhqdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhqdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pslld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pslld-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-sqrtsd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)"
-sqrtsd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psllw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-psllq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psllq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckldq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-mulsd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mulsd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)"
-sqrtpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmulhw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pminsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pshufd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-cvtss2sd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-cvtss2sd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psrlq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psrlw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psrlw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psrld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psrld-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-lfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movapd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-mulpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-mulpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-punpckhbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movupd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmuludq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmaddwd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpckhwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvtpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvtpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-mfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pshuflw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshuflw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pminub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pinsrw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrw-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psubsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pavgw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pavgw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-psubsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pavgb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pavgb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psraw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psraw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-comisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psrad-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-packsswb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-packsswb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpcklbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-ucomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-cvttpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pshufhw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufhw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fchs-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomi-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fldl2t-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fldl2e-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcmovnu-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fcomip-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fcmovnb-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fcmovne-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcmovbe-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcompp-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fxam-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-ffree-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fninit-,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fnop-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)"
-fldpi-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fnstsw-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fnstsw-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-fwait-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fcmovnbe-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fincstp-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fst-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fabs-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fcmovu-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fcmove-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fldcw-mem,2.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,2.0)"
-fcmovb-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)"
-fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivp-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0)"
-fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0)"
-fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0)"
-fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0)"
-fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fldln2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fxch-fpu,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)"
-fld-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)"
-fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)"
-fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fucomi-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fdecstp-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fldlg2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fldz-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fucompp-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fld1-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fucomip-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-fnstcw-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-punpckhdq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhdq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-pcmpgtw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpgtb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpgtd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpgtd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-packuswb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-packuswb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psadbw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-packssdw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-packssdw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpeqb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpeqd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpcklwd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklwd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pxor-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-psubb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-paddb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckldq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pandn-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pminsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pshufw-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufw-mmx_mmx_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-paddsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-emms-,18.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,18.0)"
-punpckhbw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhbw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pand-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pmaxub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-punpckhwd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpckhwd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pinsrw-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrw-mmx_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-psubsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pavgw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pavgw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psubsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psubsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pavgb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pavgb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-maskmovq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-packsswb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpcklbw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-punpcklbw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-repe scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-lodsq-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-cdqe-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep lodsq-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-repne cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-pushfq-,1.0,None,"(0.5,0.0,1.0,0.5,0.5,1.0,0.5)"
-rep movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsxd-r64_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep stosq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-swapgs-,1.8333333333333333,None,"(0.3333333333333333,0.0,1.8333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-repne scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-popfq-,2.6666666666666665,None,"(0.6666666666666666,0.0,1.6666666666666665,0.5,0.5,0.0,2.6666666666666665)"
-stosq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)"
-cmpxchg16b-mem,8.333333333333332,None,"(8.333333333333332,0.0,3.333333333333333,1.0,1.0,1.0,7.333333333333333)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-repe cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)"
-lock cmpxchg16b-mem,9.0,None,"(9.0,0.0,6.0,1.0,1.0,1.0,7.0)"
-bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovzxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovsxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-roundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-roundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-roundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-roundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pblendw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pblendw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-mpsadbw-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-mpsadbw-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmovsxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmovsxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmulld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-packusdw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-packusdw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmaxsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-blendpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-blendpd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmovzxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-rex.w pcmpestri-xmm_mem_imd,13.333333333333334,None,"(11.333333333333334,0.0,6.333333333333333,0.5,0.5,0.0,13.333333333333334)"
-rex.w pcmpestri-xmm_xmm_imd,19.0,None,"(14.0,0.0,0.0,0.0,0.0,0.0,19.0)"
-pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-pcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-rex.w pcmpestrm-xmm_mem_imd,13.333333333333334,None,"(11.333333333333334,0.0,6.333333333333333,0.5,0.5,0.0,13.333333333333334)"
-rex.w pcmpestrm-xmm_xmm_imd,19.0,None,"(14.0,0.0,0.0,0.0,0.0,0.0,19.0)"
-pmuldq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmuldq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmovzxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovsxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovsxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovsxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovsxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-dpps-xmm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)"
-dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)"
-pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pextrd-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmaxud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmaxud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-blendps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-blendps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pminud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pminud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pinsrq-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrq-xmm_r64_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-pinsrd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrd-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-pinsrb-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pinsrb-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-blendvps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-blendvps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-blendvpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-blendvpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-roundss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-roundss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-roundsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-roundsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pmovzxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pblendvb-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-pblendvb-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-pmovzxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pmovzxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-phsubd-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubd-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phsubd-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubd-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmulhrsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phsubw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-psignw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-psignb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-psignb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-phaddsw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddsw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phaddsw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddsw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-pmaddubsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-phsubsw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubsw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phsubsw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phsubsw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-pabsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-phaddd-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddd-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phaddd-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddd-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-palignr-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-palignr-mmx_mmx_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-palignr-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-palignr-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pshufb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pshufb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pshufb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-pabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-pabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-phaddw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-phaddw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-phaddw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)"
-lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rdtscp-,10.0,None,"(5.5,0.0,7.5,0.0,0.0,0.0,10.0)"
-aesdec-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesdec-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-aeskeygenassist-xmm_xmm_imd,7.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.0,0.0,0.0,7.833333333333333)"
-aeskeygenassist-xmm_mem_imd,6.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.5,0.5,0.0,6.833333333333333)"
-aesenclast-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesenclast-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-aesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-aesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)"
-aesdeclast-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesdeclast-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-aesenc-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesenc-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-prefetchwt1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-clflush-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,1.0)"
-pause-,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhuw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmulhuw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vpmuludq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmuludq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpslldq-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmulhrsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmulhrsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vhaddpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhaddpd-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhaddpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhaddpd-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vpunpcklbw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpcklbw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpmovzxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpavgw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpavgw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpavgb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpavgb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmaxsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmulss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vandpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpmaxsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vandps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vandps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmulsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrldq-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpshufhw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshufhw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaxss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vmaxsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpminsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vstmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-vpminsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpminsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpackssdw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpackssdw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpinsrb-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpinsrb-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-vpmaxub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vaddsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vsqrtsd-xmm_xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)"
-vsqrtsd-xmm_xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vsqrtss-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-vsqrtss-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vcvtss2sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpblendvb-xmm_xmm_mem_xmm,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vpblendvb-xmm_xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vzeroall-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-vcomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsrad-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsrad-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrad-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovsxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshufd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshufd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsraw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsraw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsraw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpshufb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshufb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovdqa-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovdqa-ymm_ymm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vmovdqa-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vdivpd-xmm_xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)"
-vdivpd-xmm_xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-vdivpd-ymm_ymm_mem,42,None,"(2.5,42,0.0,0.5,0.5,0.0,0.5)"
-vdivpd-ymm_ymm_ymm,42,None,"(2.5,42,0.0,0.0,0.0,0.0,0.5)"
-vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovdqu-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovdqu-ymm_ymm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovdqu-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vdivps-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-vdivps-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-vdivps-ymm_ymm_mem,28,None,"(2.5,28,0.0,0.5,0.5,0.0,0.5)"
-vdivps-ymm_ymm_ymm,28,None,"(2.5,28,0.0,0.0,0.0,0.0,0.5)"
-vcmpss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmpss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpshuflw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpshuflw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vldmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)"
-vpslld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpslld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpslld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vcmpsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmpsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsllq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsllq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsllq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vblendvpd-xmm_xmm_mem_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vblendvpd-xmm_xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vblendvpd-ymm_ymm_mem_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vblendvpd-ymm_ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpsllw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsllw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsllw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vphaddw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphaddw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vsubsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vsqrtps-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-vsqrtps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-vsqrtps-ymm_mem,28,None,"(2.5,28,0.0,0.5,0.5,0.0,0.5)"
-vsqrtps-ymm_ymm,28,None,"(2.5,28,0.0,0.0,0.0,0.0,0.5)"
-vcvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vphaddd-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphaddd-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vsqrtpd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)"
-vsqrtpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-vsqrtpd-ymm_mem,42,None,"(2.5,42,0.0,0.5,0.5,0.0,0.5)"
-vsqrtpd-ymm_ymm,42,None,"(2.5,42,0.0,0.0,0.0,0.0,0.5)"
-vsubss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmuldq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmuldq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vdpps-xmm_xmm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)"
-vdpps-xmm_xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)"
-vdpps-ymm_ymm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)"
-vdpps-ymm_ymm_ymm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)"
-vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vpunpckhdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vmulpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmulpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmulpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmovzxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmovzxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmovzxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaskmovpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmaskmovpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmaskmovpd-mem_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0)"
-vmaskmovpd-mem_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,2.0,0.0)"
-vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpalignr-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpalignr-xmm_xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaskmovps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmaskmovps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmaskmovps-mem_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0)"
-vmaskmovps-mem_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,2.0,0.0)"
-vpaddsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaxpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vmaxpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpackuswb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpackuswb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmaxps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vmaxps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vmaxps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpunpckhqdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhqdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsignw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsignw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsignb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsignb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpaddusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpunpcklwd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpcklwd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpaddusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsignd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsignd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmulhw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmulhw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vxorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vxorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vxorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vroundsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vroundss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpmaddubsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmaddubsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vxorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vxorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vxorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vxorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vhsubpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhsubpd-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhsubpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhsubpd-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovups-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovups-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovups-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vhsubps-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhsubps-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhsubps-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhsubps-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhaddps-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhaddps-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vhaddps-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)"
-vhaddps-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovupd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovupd-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovupd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vcvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvttps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vdivss-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)"
-vdivss-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-vdivsd-xmm_xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)"
-vdivsd-xmm_xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovntdq-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vcmpps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmpps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcmpps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmpps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcmppd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmppd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcmppd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcmppd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vminss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vphaddsw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphaddsw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vminsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsubusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vblendvps-xmm_xmm_mem_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vblendvps-xmm_xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vblendvps-ymm_ymm_mem_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vblendvps-ymm_ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmpsadbw-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vmpsadbw-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vpsubusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-rex.w vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-rex.w vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-vpcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-rex.w vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)"
-rex.w vpcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)"
-vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vzeroupper-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vandnps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandnps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vandnps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandnps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpaddq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpaddw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpaddb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vandnpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandnpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vandnpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vandnpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpaddd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpaddd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vblendpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vblendpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vblendps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vblendps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vblendps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vblendps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrsqrtps-ymm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vrsqrtps-ymm_ymm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vphsubw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphsubw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vpextrq-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)"
-vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vphsubd-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphsubd-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpblendw-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpblendw-xmm_xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)"
-vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-vaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpmullw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmullw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vucomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpmovsxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpackusdw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpackusdw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmaxud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpinsrd-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpinsrd-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-vpinsrq-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpinsrq-xmm_xmm_r64_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-vpinsrw-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpinsrw-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)"
-vpmaxuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrlw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsrlw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrlw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpsrlq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsrlq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrlq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovapd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovapd-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovapd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vpunpcklqdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpcklqdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsrld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsrld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovaps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vmovaps-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmovaps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vminpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vminpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtdq2ps-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtdq2ps-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpunpckldq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckldq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vcvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtdq2pd-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtdq2pd-ymm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vminps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vminps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vminps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsubb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsubd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vbroadcastf128-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vpsubq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsubw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsadbw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpsadbw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vroundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vroundpd-ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vroundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vroundps-ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vroundps-ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpsubsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpsubsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpsubsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtsi2ss-xmm_xmm_r32,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vpclmulqdq-xmm_xmm_xmm_imd,6.833333333333334,None,"(5.333333333333334,0.0,5.833333333333333,0.0,0.0,0.0,6.833333333333334)"
-vpclmulqdq-xmm_xmm_mem_imd,6.833333333333334,None,"(4.833333333333334,0.0,5.333333333333333,0.5,0.5,0.0,6.833333333333334)"
-vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vrcpps-ymm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5)"
-vrcpps-ymm_ymm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpmovsxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpmovsxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovsxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vmaskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.5,2.0,2.0,2.0,2.0)"
-vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovntpd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vpminuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpminub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)"
-vmovntps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)"
-vpminud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpminud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)"
-vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vpunpckhbw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhbw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvttpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmaddwd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpmaddwd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vpcmpgtq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-vpabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vpmovzxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhwd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpunpckhwd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vphsubsw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)"
-vphsubsw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)"
-vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)"
-vcvtpd2ps-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-vaddsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vpacksswb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)"
-vpacksswb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)"
-vaddss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vaddss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-vcvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vcvtps2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)"
-vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-vaesdec-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-vaesdec-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-vaesdeclast-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-vaesdeclast-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-vaesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-vaesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)"
-vaesenc-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-vaesenc-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-vaesenclast-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-vaesenclast-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)"
-vaeskeygenassist-xmm_xmm_imd,7.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.0,0.0,0.0,7.833333333333333)"
-vaeskeygenassist-xmm_mem_imd,6.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.5,0.5,0.0,6.833333333333333)"
-vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
-vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)"
diff --git a/osaca/data/tx2.yml b/osaca/data/tx2.yml
new file mode 100644
index 0000000..2f9cb55
--- /dev/null
+++ b/osaca/data/tx2.yml
@@ -0,0 +1,698 @@
+osaca_version: 0.3.2
+micro_architecture: Thunder X2
+arch_code: tx2
+isa: AArch64
+ROB_size: 180
+retired_uOps_per_cycle: 4
+scheduler_size: 60
+hidden_loads: false
+load_latency: {w: 4.0, x: 4.0, b: 4.0, h: 4.0, s: 4.0, d: 4.0, q: 4.0, v: 4.0}
+load_throughput:
+- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: false, post-indexed: true, port_pressure:    [1, '34']}
+- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: false, post-indexed: false, port_pressure:   [1, '34']}
+- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: true, post-indexed: true, port_pressure:     [1, '34']}
+- {base: x, index: ~, offset: ~, scale: 1, pre-indexed: true, post-indexed: false, port_pressure:    [1, '34']}
+- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: false, post-indexed: true, port_pressure:    [1, '34']}
+- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: false, post-indexed: false, port_pressure:   [1, '34']}
+- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: true, post-indexed: true, port_pressure:     [1, '34']}
+- {base: x, index: ~, offset: ~, scale: 8, pre-indexed: true, post-indexed: false, port_pressure:    [1, '34']}
+- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: false, post-indexed: true, port_pressure:  [1, '34']}
+- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: false, post-indexed: false, port_pressure: [1, '34']}
+- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: true, post-indexed: true, port_pressure:   [1, '34']}
+- {base: x, index: ~, offset: imd, scale: 1, pre-indexed: true, post-indexed: false, port_pressure:  [1, '34']}
+- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: false, post-indexed: true, port_pressure:  [1, '34']}
+- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: false, post-indexed: false, port_pressure: [1, '34']}
+- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: true, post-indexed: true, port_pressure:   [1, '34']}
+- {base: x, index: ~, offset: imd, scale: 8, pre-indexed: true, post-indexed: false, port_pressure:  [1, '34']}
+- {base: x, index: x, offset: ~, scale: 1, pre-indexed: false, post-indexed: true, port_pressure:    [1, '34']}
+- {base: x, index: x, offset: ~, scale: 1, pre-indexed: false, post-indexed: false, port_pressure:   [1, '34']}
+- {base: x, index: x, offset: ~, scale: 1, pre-indexed: true, post-indexed: true, port_pressure:     [1, '34']}
+- {base: x, index: x, offset: ~, scale: 1, pre-indexed: true, post-indexed: false, port_pressure:    [1, '34']}
+- {base: x, index: x, offset: ~, scale: 8, pre-indexed: false, post-indexed: true, port_pressure:    [1, '34']}
+- {base: x, index: x, offset: ~, scale: 8, pre-indexed: false, post-indexed: false, port_pressure:   [1, '34']}
+- {base: x, index: x, offset: ~, scale: 8, pre-indexed: true, post-indexed: true, port_pressure:     [1, '34']}
+- {base: x, index: x, offset: ~, scale: 8, pre-indexed: true, post-indexed: false, port_pressure:    [1, '34']}
+- {base: x, index: x, offset: imd, scale: 1, pre-indexed: false, post-indexed: true, port_pressure:  [1, '34']}
+- {base: x, index: x, offset: imd, scale: 1, pre-indexed: false, post-indexed: false, port_pressure: [1, '34']}
+- {base: x, index: x, offset: imd, scale: 1, pre-indexed: true, post-indexed: true, port_pressure:   [1, '34']}
+- {base: x, index: x, offset: imd, scale: 1, pre-indexed: true, post-indexed: false, port_pressure:  [1, '34']}
+- {base: x, index: x, offset: imd, scale: 8, pre-indexed: false, post-indexed: true, port_pressure:  [1, '34']}
+- {base: x, index: x, offset: imd, scale: 8, pre-indexed: false, post-indexed: false, port_pressure: [1, '34']}
+- {base: x, index: x, offset: imd, scale: 8, pre-indexed: true, post-indexed: true, port_pressure:   [1, '34']}
+- {base: x, index: x, offset: imd, scale: 8, pre-indexed: true, post-indexed: false, port_pressure:  [1, '34']}
+ports: ['0', 0DV, '1', 1DV, '2', '3', '4', '5']
+port_model_scheme: |
+  ┌-----------------------------------------------------------┐
+  |                  60 entry unified scheduler               |
+  └-----------------------------------------------------------┘
+    0 |       1 |       2 |        3 |      4 |       5 |
+      ▼         ▼         ▼          ▼        ▼         ▼
+   ┌------┐  ┌------┐  ┌------┐  ┌------┐  ┌------┐  ┌------┐
+   | ALU  |  | ALU  |  | ALU/ |  |  LD  |  |  LD  |  |  ST  |
+   └------┘  └------┘  |  BR  |  └------┘  └------┘  └------┘
+   ┌------┐  ┌------┐  └------┘  ┌------┐  ┌------┐
+   |  FP/ |  |  FP/ |            | AGU  |  | AGU  |
+   | NEON |  | NEON |            └------┘  └------┘
+   └------┘  └------┘
+             ┌------┐
+             | INT  |
+             | MUL/ |
+             |  DIV |
+             └------┘
+             ┌------┐
+             |CRYPTO|
+             └------┘
+instruction_forms:
+- name: add
+  operands:
+  - class: register
+    prefix: x
+  - class: register
+    prefix: x
+  - class: register
+    prefix: x
+  throughput: 0.33333333
+  latency: 1.0  # 	1*p012
+  port_pressure: [[1, '012']]
+- name: add
+  operands:
+  - class: register
+    prefix: x
+  - class: register
+    prefix: x
+  - class: immediate
+    imd: int
+  throughput: 0.33333333
+  latency: 1.0  # 	1*p012
+  port_pressure: [[1, '012']]
+- name: adds
+  operands:
+  - class: register
+    prefix: x
+  - class: register
+    prefix: x
+  - class: immediate
+    imd: int
+  throughput: 0.33333333
+  latency: 1.0  # 	1*p012
+  port_pressure: [[1, '012']]
+- name: b.ne
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: b.gt
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: bne
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: cmp
+  operands:
+  - class: register
+    prefix: w
+  - class: immediate
+    imd: int
+  throughput: 0.33333333
+  latency: 1.0  # 	1*p012
+  port_pressure: [[1, '012']]
+- name: cmp
+  operands:
+  - class: register
+    prefix: x
+  - class: register
+    prefix: x
+  throughput: 0.33333333
+  latency: 1.0  # 	1*p012
+  port_pressure: [[1, '012']]
+- name: fadd
+  operands:
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fadd
+  operands:
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fadd
+  operands:
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fdiv
+  operands:
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  throughput: 8.5
+  latency: 16.0  # 	1*p01+17*p0DV1DV
+  port_pressure: [[1, '01'], [17.0, [0DV, 1DV]]]
+- name: fdiv
+  operands:
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  throughput: 12.0
+  latency: 23.0  # 	1*p01+24*p0DV1DV
+  port_pressure: [[1, '01'], [24.0, [0DV, 1DV]]]
+- name: fmla
+  operands:
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fmla
+  operands:
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fmov
+  operands:
+  - {class: register, prefix: s}
+  - {class: immediate, imd: double}
+  latency: ~  # 	1*p01
+  port_pressure: [[1, '01']]
+  throughput: 0.5
+- name: fmul
+  operands:
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fmul
+  operands:
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fmul
+  operands:
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fsub
+  operands:
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  - class: register
+    prefix: v
+    shape: s
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: fsub
+  operands:
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  - class: register
+    prefix: v
+    shape: d
+  throughput: 0.5
+  latency: 6.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: ldp
+  operands:
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 1.0
+  latency: ~  # 	2*p34
+  port_pressure: [[2.0, '34']]
+- name: ldp
+  operands:
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: true
+  throughput: 1.0
+  latency: ~  # 	2*p34
+  port_pressure: [[2.0, '34']]
+- name: ldp
+  operands:
+  - class: register
+    prefix: q
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 1.0
+  latency: ~  # 	2*p34
+  port_pressure: [[2.0, '34']]
+- name: ldp
+  operands:
+  - class: register
+    prefix: q
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: true
+  throughput: 1.0
+  latency: ~  # 	2*p34
+  port_pressure: [[2.0, '34']]
+- name: ldp
+  operands:
+  - class: register
+    prefix: q
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 1.0
+  latency: ~  # 	2*p34
+  port_pressure: [[2.0, '34']]
+- name: ldp
+  operands:
+  - class: register
+    prefix: q
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    pre-indexed: true
+    post-indexed: false
+  throughput: 1.0
+  latency: ~  # 	2*p34
+  port_pressure: [[2.0, '34']]
+- name: ldp
+  operands:
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: true
+  throughput: 1.0
+  latency: ~  # 	2*p34
+  port_pressure: [[2.0, '34']]
+- name: ldr
+  operands:
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    post-indexed: false
+    pre-indexed: false
+  throughput: 0.5
+  latency: 4.0  # 	1*p34
+  port_pressure: [[1.0, '34']]
+- name: ldr
+  operands:
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    post-indexed: false
+    pre-indexed: false
+  throughput: 0.5
+  latency: 4.0  # 	1*p34
+  port_pressure: [[1.0, '34']]
+- name: ldr
+  operands:
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: ~
+    index: x
+    scale: 8
+    post-indexed: false
+    pre-indexed: false
+  throughput: 0.5
+  latency: 4.0  # 	1*p34
+  port_pressure: [[1.0, '34']]
+- name: ldr
+  operands:
+  - class: register
+    prefix: x
+  - class: register
+    prefix: x
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: ldr
+  operands:
+  - class: register
+    prefix: q
+  - class: register
+    prefix: q
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: ldr
+  operands:
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: mov
+  operands:
+  - class: register
+    prefix: x
+  - class: register
+    prefix: x
+  throughput: 0.5
+  latency: 1.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: mov
+  operands:
+  - class: register
+    prefix: v
+    shape: b
+  - class: register
+    prefix: v
+    shape: b
+  throughput: 0.5
+  latency: 5.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: prfm
+  operands:
+  - class: prfop
+    type: pld
+    target: l1
+    policy: keep
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: ~
+  latency: ~
+  port_pressure: []
+- name: stp
+  operands:
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 2.0
+  latency: ~  # 	4*p34
+  port_pressure: [[4.0, '34']]
+- name: stp
+  operands:
+  - class: register
+    prefix: d
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 2.0
+  latency: ~  # 	4*p34
+  port_pressure: [[4.0, '34']]
+- name: stp
+  operands:
+  - class: register
+    prefix: q
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: true
+  throughput: 2.0
+  latency: ~  # 	2*p34+2*p5
+  port_pressure: [[2.0, '34'], [2.0, '5']]
+- name: stp
+  operands:
+  - class: register
+    prefix: q
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 2.0
+  latency: ~  # 	2*p34+2*p5
+  port_pressure: [[2.0, '34'], [2.0, '5']]
+- name: stp
+  operands:
+  - class: register
+    prefix: q
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 2.0
+  latency: ~  # 	2*p34+2*p5
+  port_pressure: [[2.0, '34'], [2.0, '5']]
+- name: str
+  operands:
+  - class: register
+    prefix: x
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 1.0
+  latency: 4.0  # 	1*p34+1*p5
+  port_pressure: [[1.0, '34'], [1.0, '5']]
+- name: str
+  operands:
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: imd
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 1.0
+  latency: 4.0  # 	1*p34+1*p5
+  port_pressure: [[1.0, '34'], [1.0, '5']]
+- name: str
+  operands:
+  - class: register
+    prefix: d
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: true
+  throughput: 1.0
+  latency: 4.0  # 	1*p34+1*p5
+  port_pressure: [[1.0, '34'], [1.0, '5']]
+- name: str
+  operands:
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: ~
+    index: x
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 1.0
+  latency: 4.0  # 	1*p34+1*p5
+  port_pressure: [[1.0, '34'], [1.0, '5']]
+- name: str
+  operands:
+  - class: register
+    prefix: q
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: true
+  throughput: 1.0
+  latency: 4.0  # 	1*p34+1*p5
+  port_pressure: [[1.0, '34'], [1.0, '5']]
+- name: str
+  operands:
+  - class: register
+    prefix: x
+  - class: memory
+    base: x
+    offset: ~
+    index: ~
+    scale: 1
+    pre-indexed: false
+    post-indexed: true
+  throughput: 1.0
+  latency: 4.0  # 	1*p34+1*p5
+  port_pressure: [[1.0, '34'], [1.0, '5']]
+- name: str
+  operands:
+  - class: register
+    prefix: x
+  - class: memory
+    base: x
+    offset: ~
+    index: x
+    scale: 1
+    pre-indexed: false
+    post-indexed: false
+  throughput: 1.0
+  latency: 4.0  # 	1*p34+1*p5
+  port_pressure: [[1.0, '34'], [1.0, '5']]
diff --git a/osaca/data/wsm_data.csv b/osaca/data/wsm_data.csv
deleted file mode 100644
index 09cbecc..0000000
--- a/osaca/data/wsm_data.csv
+++ /dev/null
@@ -1,2446 +0,0 @@
-instr,TP,LT,ports
-sldt-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-sldt-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sldt-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sldtl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sldt-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-sldtq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-lgdt-mem,6.0,None,"(3.0,0.0,6.0,5.0,1.0,1.0,0.0)"
-call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-call-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-callq-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-call-LBL,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-mov-LBL,20.666666666666668,None,"(13.666666666666666,0.0,7.666666666666666,0.0,1.0,1.0,20.666666666666668)"
-mov-LBL,12.166666666666668,None,"(12.166666666666668,0.0,4.666666666666667,0.0,0.0,0.0,12.166666666666668)"
-jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-wrmsr-,42.5,None,"(42.5,0.0,27.0,6.0,1.0,1.0,18.5)"
-repe scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cmc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-xadd-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xadd-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xaddq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cmovbe-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbe-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbe-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbeq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbe-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbe-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbe-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbeq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmovle-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovle-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovlel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovle-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovleq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lsl-mem,15.333333333333334,None,"(15.333333333333334,0.0,14.333333333333334,5.0,0.0,0.0,1.3333333333333333)"
-lsl-r32_mem,15.333333333333334,None,"(15.333333333333334,0.0,14.333333333333334,5.0,0.0,0.0,1.3333333333333333)"
-lsl-r64_mem,15.333333333333334,None,"(15.333333333333334,0.0,14.333333333333334,5.0,0.0,0.0,1.3333333333333333)"
-lslq-r64_mem,15.333333333333334,None,"(15.333333333333334,0.0,14.333333333333334,5.0,0.0,0.0,1.3333333333333333)"
-lsl-,4.0,None,"(3.666666666666667,0.0,2.666666666666667,4.0,0.0,0.0,3.666666666666667)"
-lsl-r32_r32,4.0,None,"(3.666666666666667,0.0,2.666666666666667,4.0,0.0,0.0,3.666666666666667)"
-lsl-r64_r32,4.0,None,"(3.666666666666667,0.0,2.666666666666667,4.0,0.0,0.0,3.666666666666667)"
-lahf-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cbw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-not-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-not-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-notq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nopl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nopq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-nop-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-inc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-inc-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-incq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpsw-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adcb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adcl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adc-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock adcq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-cmpsd-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-setb-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setl-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-seto-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bsr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-setp-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-out-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-outb-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-outl-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-r16_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-out-r16_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)"
-cmovnle-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnle-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnlel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnle-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnleq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbbl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbbq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-sbb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbb-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-sbb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-lodsb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-lodsw-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-lodsd-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-std-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-stosd-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-xor-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xorb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xor-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xor-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xorl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xor-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xorq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sar-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-stc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sti-,5.333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,5.333333333333333)"
-str-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-stosb-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rdmsr-,26.5,None,"(24.5,0.0,14.0,1.0,0.0,0.0,26.5)"
-rep lodsb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-idiv-mem,6,None,"(1.6666666666666665,6,2.6666666666666665,1.0,0.0,0.0,0.6666666666666666)"
-idiv-r8,6,None,"(1.6666666666666665,6,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)"
-idivb-r8,6,None,"(1.6666666666666665,6,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)"
-idiv-mem,12,None,"(2.1666666666666665,12,2.6666666666666665,1.0,0.0,0.0,1.1666666666666665)"
-idiv-mem,26,None,"(22.5,26,10.0,1.0,0.0,0.0,18.5)"
-idiv-r32,12,None,"(2.5,12,3.0,0.0,0.0,0.0,1.5)"
-idivl-r32,12,None,"(2.5,12,3.0,0.0,0.0,0.0,1.5)"
-idiv-r64,26,None,"(22.333333333333332,26,10.333333333333332,0.0,0.0,0.0,19.333333333333332)"
-idivq-r64,26,None,"(22.333333333333332,26,10.333333333333332,0.0,0.0,0.0,19.333333333333332)"
-repne cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-sets-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shr-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shrd-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrdl-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrdq-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrdl-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrdq-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrdb-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-mem_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-mem_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shrd-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrdb-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-r32_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shrd-r64_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsd-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsx-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movsw-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-shl-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-mov-r64_r8,2.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,2.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bts-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btsl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bts-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btsq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btr-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btrl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btr-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btrq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-sgdt-mem,2.0,None,"(1.1666666666666665,0.0,1.6666666666666665,2.0,2.0,2.0,1.1666666666666665)"
-loop-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btc-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btcl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btc-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btcq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-wbinvd-,65571.0,None,"(32627.0,0.0,33007.0,0.0,65571.0,65568.0,65561.0)"
-jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-mul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-mul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-mul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-mulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-push-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pushq-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-push-imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-push-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pushw-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-push-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pushw-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-setno-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnl-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cli-,4.5,None,"(0.5,0.0,1.0,0.0,0.0,0.0,4.5)"
-cld-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-setnb-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-clc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setnz-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setns-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnp-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lldt-mem,6.666666666666667,None,"(1.6666666666666667,0.0,1.6666666666666667,4.0,1.0,1.0,6.666666666666667)"
-lldt-,5.666666666666667,None,"(1.6666666666666667,0.0,1.6666666666666667,3.0,1.0,1.0,5.666666666666667)"
-ret-imd,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-ret-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btc-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btc-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btcl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btc-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btcq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-setnbe-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnbe-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnbeb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmpxchg-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchgb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchg-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgb-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchg-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchgl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchg-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchgq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-cmpxchg-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgl-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchg-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-cmpxchgq-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)"
-verr-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-verr-,5.0,None,"(2.0,0.0,5.0,5.0,0.0,0.0,0.0)"
-rep stosb-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cwd-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-testq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-test-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-scasw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-scasd-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-rdpmc-,12.166666666666666,None,"(8.166666666666666,0.0,4.666666666666666,0.0,0.0,0.0,12.166666666666666)"
-lock cmpxchg-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchgb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchg-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchgl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchg-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock cmpxchgq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-cmovnp-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnp-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnpl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnp-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnpq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-ret far-,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-enter-imd_imd,7.0,None,"(7.0,0.0,7.0,2.0,6.0,6.0,0.0)"
-repne scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-leave-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-lock xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lock xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-lidt-mem,6.0,None,"(4.0,0.0,4.0,6.0,1.0,1.0,0.0)"
-xlat-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-lock xchg-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchgb-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchgb-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-lock xchg-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchg-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchgl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchg-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-lock xchgq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchgl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchgq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-xchg-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-smsw-mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.0,1.0,1.0,1.6666666666666665)"
-smsw-,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-smsw-r32,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-smswl-r32,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-smsw-r64,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-smswq-r64,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-and-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-andb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-and-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-and-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-andl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-and-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-andq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-mov-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-mov-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-mov-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-mov-,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r32,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movl-r32,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-cpuid-,17.333333333333332,None,"(9.833333333333334,0.0,17.333333333333332,0.0,2.0,2.0,12.833333333333334)"
-rdtsc-,9.833333333333334,None,"(9.833333333333334,0.0,5.333333333333334,0.0,0.0,0.0,5.833333333333334)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sidt-mem,2.0,None,"(0.6666666666666666,0.0,1.6666666666666665,2.0,2.0,2.0,0.6666666666666666)"
-cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbbl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbb-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-lock sbbq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rcr-mem_imd,4.0,None,"(3.0,0.0,4.0,1.0,1.0,1.0,2.0)"
-rcr-r8_imd,3.5,None,"(3.5,0.0,3.0,0.0,0.0,0.0,2.5)"
-rcrb-r8_imd,3.5,None,"(3.5,0.0,3.0,0.0,0.0,0.0,2.5)"
-rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcr-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcrl-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcr-r64_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcrq-r64_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcrb-r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcr-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcr-r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcrl-r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcr-r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcrq-r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcr-mem_r8,4.0,None,"(3.0,0.0,4.0,1.0,1.0,1.0,2.0)"
-rcrb-mem_r8,4.0,None,"(3.0,0.0,4.0,1.0,1.0,1.0,2.0)"
-rcr-r8_r8,3.5,None,"(3.5,0.0,3.0,0.0,0.0,0.0,2.5)"
-rcrb-r8_r8,3.5,None,"(3.5,0.0,3.0,0.0,0.0,0.0,2.5)"
-rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcr-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcrb-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcr-r32_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcr-r64_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)"
-rcl-mem_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,2.1666666666666665)"
-rcl-r8_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,2.1666666666666665)"
-rclb-r8_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,2.1666666666666665)"
-rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-imd,2.6666666666666665,None,"(2.1666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)"
-rcl-r32_imd,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)"
-rcl-r64_imd,2.6666666666666665,None,"(2.1666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)"
-rclq-r64_imd,2.6666666666666665,None,"(2.1666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rclb-r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)"
-rcl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcl-r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcl-r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rclq-r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-rcl-mem_r8,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,2.1666666666666665)"
-rclb-mem_r8,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,2.1666666666666665)"
-rcl-r8_r8,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,2.1666666666666665)"
-rclb-r8_r8,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,2.1666666666666665)"
-rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)"
-rcl-r8,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)"
-rclb-r8,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)"
-rcl-r32_r8,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)"
-rcl-r64_r8,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)"
-div-mem,6,None,"(1.0,6,2.0,1.0,0.0,0.0,0.0)"
-div-r8,6,None,"(1.3333333333333333,6,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)"
-divb-r8,6,None,"(1.3333333333333333,6,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)"
-div-mem,12,None,"(2.333333333333333,12,2.3333333333333335,1.0,0.0,0.0,1.3333333333333333)"
-div-mem,26,None,"(12.0,26,8.0,1.0,0.0,0.0,11.0)"
-div-r32,12,None,"(2.1666666666666665,12,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)"
-divl-r32,12,None,"(2.1666666666666665,12,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)"
-div-r64,26,None,"(12.0,26,8.0,0.0,0.0,0.0,12.0)"
-divq-r64,26,None,"(12.0,26,8.0,0.0,0.0,0.0,12.0)"
-stosw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-cmovnz-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnz-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnzl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnz-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnzq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovns-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnsl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovns-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnsq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovns-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovns-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovno-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnol-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovno-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnoq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovno-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovno-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnl-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnlq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnb-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnb-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovo-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovol-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovo-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovoq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovo-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovo-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bt-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bt-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-btq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-pop-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-popq-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-jrcxz-LBL,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-shld-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shldl-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shldq-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shldl-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shldq-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shldb-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-mem_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-mem_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-shld-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shldb-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-r32_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shld-r64_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-invlpg-mem,17.0,None,"(13.0,0.0,10.0,1.0,3.0,3.0,17.0)"
-sahf-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmovz-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovz-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovzl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovz-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovzq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovp-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovpl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovp-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovpq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovs-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovsl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovs-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovsq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovs-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovs-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovl-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovlq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovb-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovb-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovbq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-lmsw-mem,8.333333333333334,None,"(5.333333333333333,0.0,5.333333333333333,2.0,1.0,1.0,8.333333333333334)"
-lmsw-,7.666666666666667,None,"(5.666666666666667,0.0,2.666666666666667,0.0,1.0,1.0,7.666666666666667)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock bts-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock bts-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btsl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock bts-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btsq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-or-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-orb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-or-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-or-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-orl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-or-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-orq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-repe cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-clts-,2.333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.333333333333333)"
-movzx-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movzx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movzxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rol-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rolb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rol-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-verw-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-verw-,5.0,None,"(3.0,0.0,5.0,4.0,0.0,0.0,0.0)"
-jmp-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-ror-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-rorb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ror-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setle-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmovnbe-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbe-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbe-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbeq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-cmovnbe-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbe-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbe-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-cmovnbeq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-sub-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-sub-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-sub-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-subl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-sub-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-subq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-neg-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-neg-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-negq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setnle-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmpxchg8b-mem,5.833333333333333,None,"(5.833333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.833333333333333)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)"
-lock btr-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btr-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btrl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btr-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-lock btrq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-add-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-addb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-add-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-add-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-addl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-add-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-addq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adcb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcb-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adcl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adcq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)"
-adc-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adcb-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adc-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adc-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adc-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-adc-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-lock cmpxchg8b-mem,6.833333333333334,None,"(6.833333333333334,0.0,2.3333333333333335,1.0,1.0,1.0,2.8333333333333335)"
-cwde-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bsf-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lea-mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lea-r32_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-leal-r32_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lea-r64_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-leaq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-setz-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-dec-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-dec-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-decq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-setbe-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-setbe-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-setbeb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-bswap-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bswapl-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bswap-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-bswapq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-jmp far-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-divps-xmm_mem,14,None,"(1.0,14,0.0,1.0,0.0,0.0,0.0)"
-divps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fxsave64-mem,38.0,None,"(14.333333333333334,0.0,15.333333333333334,5.0,38.0,38.0,19.333333333333332)"
-andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-prefetcht2-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-prefetcht1-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-prefetcht0-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-cvttss2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttss2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttss2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttss2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttss2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttss2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ldmxcsr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-divss-xmm_mem,14,None,"(1.0,14,0.0,1.0,0.0,0.0,0.0)"
-divss-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)"
-rcpss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-rcpss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-sqrtss-xmm_mem,18,None,"(1.0,18,0.0,1.0,0.0,0.0,0.0)"
-sqrtss-xmm_xmm,18,None,"(1.0,18,0.0,0.0,0.0,0.0,0.0)"
-subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movss-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsi2ss-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-sfence-,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-rsqrtss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-rsqrtss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-mulss-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mulss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fxrstor64-mem,42.0,None,"(26.0,0.0,16.0,42.0,0.0,0.0,25.0)"
-fxsave-mem,38.0,None,"(14.333333333333334,0.0,15.333333333333334,5.0,38.0,38.0,19.333333333333332)"
-sqrtps-xmm_mem,18,None,"(1.0,18,0.0,1.0,0.0,0.0,0.0)"
-sqrtps-xmm_xmm,18,None,"(1.0,18,0.0,0.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rsqrtps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-rsqrtps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movaps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movaps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mulps-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mulps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtss2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtss2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtss2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtss2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtss2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movups-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movups-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-fxrstor-mem,42.0,None,"(26.0,0.0,16.0,42.0,0.0,0.0,25.0)"
-stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-prefetchnta-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-comiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-comiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rcpps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-rcpps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-ucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-punpckhdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-divpd-xmm_mem,21,None,"(1.0,21,0.0,1.0,0.0,0.0,0.0)"
-divpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-movsd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pcmpgtw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpgtb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpgtd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-packuswb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-packuswb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-maskmovdqu-xmm_xmm,2.333333333333333,None,"(2.333333333333333,0.0,0.3333333333333333,2.0,2.0,2.0,1.3333333333333333)"
-andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pslldq-xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-psadbw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psadbw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddusw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddusb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-packssdw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-packssdw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmullw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmullw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-divsd-xmm_mem,21,None,"(1.0,21,0.0,1.0,0.0,0.0,0.0)"
-divsd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpeqb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpeqd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpcklqdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklqdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpcklwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pxor-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movq2dq-xmm_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqu-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-psubb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubusw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaxsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-paddd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psrldq-xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpckhqdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhqdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmulhuw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhuw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttsd2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttsd2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttsd2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttsd2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvttsd2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-por-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pslld-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pslld-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-pslld-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-sqrtsd-xmm_mem,32,None,"(1.0,32,0.0,1.0,0.0,0.0,0.0)"
-sqrtsd-xmm_xmm,32,None,"(1.0,32,0.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psllw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllq-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psllq-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-psubusb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckldq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-mulsd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mulsd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-pandn-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-sqrtpd-xmm_mem,32,None,"(1.0,32,0.0,1.0,0.0,0.0,0.0)"
-sqrtpd-xmm_xmm,32,None,"(1.0,32,0.0,0.0,0.0,0.0,0.0)"
-andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmulhw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movq-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-xmm_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movq-r64_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pminsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-pshufd-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-cvtss2sd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-cvtss2sd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlq-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psrlq-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-psrlw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psrlw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-psrld-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrld-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psrld-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-lfence-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-cvtsd2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsd2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsd2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtsd2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsd2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtsd2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movd-xmm_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movd-r32_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movapd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movapd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-mulpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-mulpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-movdq2q-mmx_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-psubq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-punpckhbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movupd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movupd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pmuludq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmuludq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmuludq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmuludq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmaddwd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmaddwd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pand-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmaxub-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpckhwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-cvtpd2pi-mmx_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-cvtpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-mfence-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pshuflw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshuflw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pminub-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrw-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movdqa-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-psubsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pavgw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-psubsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pavgb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psraw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psraw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psraw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-comisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-comisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-psrad-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-packsswb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-packsswb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpcklbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-ucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-cvttpd2pi-mmx_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)"
-cvttpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)"
-pshufhw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufhw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-ficomp-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomi-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fldl2t-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsub-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fldl2e-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fcmovnu-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcomip-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcmovnb-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmovne-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcmovbe-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmul-mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcompp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fcomp-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fisubr-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fisub-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fsubr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fadd-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fidiv-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fcom-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fxam-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-ffree-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fimul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fstp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fiadd-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fnop-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-ficom-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-fldpi-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fnstsw-mem,2.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,2.0)"
-fnstsw-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-fwait-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-fcmovnbe-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fincstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fst-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fidivr-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmovu-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fcmove-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldcw-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)"
-fcmovb-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fdivp-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)"
-fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdivr-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)"
-fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)"
-fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fdiv-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)"
-fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)"
-fldln2-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fxch-fpu,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fld-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fucomi-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fdecstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fldlg2-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-fldz-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-fucompp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fld1-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fucomip-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-fnstcw-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)"
-punpckhdq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhdq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-pcmpgtw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpgtb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpgtd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpgtd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-packuswb-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-packuswb-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psubd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psadbw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psadbw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddusw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddusw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddusb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddusb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-packssdw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-packssdw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmullw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmullw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pcmpeqw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpeqb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpeqd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpcklwd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklwd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pxor-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-psubb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubusw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubusw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaxsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-paddb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmulhuw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhuw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-por-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pslld-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pslld-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pslld-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psllw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psllq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psllq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psubusb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubusb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)"
-punpckldq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckldq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pandn-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pmulhw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-movq-mmx_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movq-mmx_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movq-r64_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pminsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pshufw-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufw-mmx_mmx_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psrlq-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psrlq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrlw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psrlw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrld-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psrld-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-paddsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-paddsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movd-mmx_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movd-mmx_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)"
-movd-r32_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-emms-,5.666666666666666,None,"(5.666666666666666,0.0,2.6666666666666665,0.0,0.0,0.0,2.6666666666666665)"
-punpckhbw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhbw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaddwd-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmaddwd-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pextrw-r32_mmx_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pand-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-pmaxub-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxub-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-punpckhwd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpckhwd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pminub-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminub-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrw-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrw-mmx_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pavgw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pavgw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psubsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psubsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pavgb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pavgb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-maskmovq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)"
-psraw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psraw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psraw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-psrad-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-psrad-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-packsswb-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-packsswb-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-punpcklbw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-punpcklbw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-repe scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-lodsq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-cdqe-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep lodsq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)"
-repne cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-pushfq-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-rep movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)"
-movsxd-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxdq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsxd-r64_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-rep stosq-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-swapgs-,1.6666666666666665,None,"(1.6666666666666665,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)"
-scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-repne scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)"
-popfq-,2.666666666666667,None,"(1.6666666666666667,0.0,2.666666666666667,1.0,0.0,0.0,2.666666666666667)"
-stosq-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-cmpxchg16b-mem,9.666666666666666,None,"(9.666666666666666,0.0,3.6666666666666665,1.0,1.0,1.0,4.666666666666666)"
-cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-repe cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)"
-lock cmpxchg16b-mem,9.5,None,"(9.5,0.0,4.0,1.0,1.0,1.0,4.5)"
-bndmov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndmov-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndmov-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcn-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcn-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcnq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcu-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcu-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcuq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndstx-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcl-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndcl-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndclq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndldx-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-bndmk-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)"
-popcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmovzxbq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxbq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovzxbd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxbd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovsxwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-roundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-roundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-roundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-roundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pblendw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pblendw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-mpsadbw-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-mpsadbw-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-phminposuw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-phminposuw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pcmpistrm-xmm_mem_imd,2.6666666666666665,None,"(0.6666666666666666,0.0,2.6666666666666665,1.0,0.0,0.0,0.6666666666666666)"
-pcmpistrm-xmm_xmm_imd,2.6666666666666665,None,"(0.6666666666666666,0.0,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)"
-insertps-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)"
-insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmovsxdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-movntdqa-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-pmovsxbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmulld-xmm_mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)"
-pmulld-xmm_xmm,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)"
-pcmpeqq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pminsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-packusdw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-packusdw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)"
-extractps-r32_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmaxsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaxsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-blendpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-blendpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-ptest-xmm_mem,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.8333333333333333)"
-ptest-xmm_xmm,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pmovzxbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pcmpestri-xmm_mem_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-pcmpestri-xmm_xmm_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-rex.w pcmpestri-xmm_mem_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-rex.w pcmpestri-xmm_xmm_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-pcmpestrm-xmm_mem_imd,4.333333333333333,None,"(3.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-pcmpestrm-xmm_xmm_imd,4.666666666666667,None,"(2.666666666666667,0.0,4.666666666666667,0.0,0.0,0.0,1.6666666666666667)"
-rex.w pcmpestrm-xmm_mem_imd,4.333333333333333,None,"(3.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-rex.w pcmpestrm-xmm_xmm_imd,4.666666666666667,None,"(2.666666666666667,0.0,4.666666666666667,0.0,0.0,0.0,1.6666666666666667)"
-pmuldq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmuldq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmovzxdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pminsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovsxbd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxbd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovsxwq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxwq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmovsxbq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovsxbq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,1.0)"
-dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)"
-dpps-xmm_mem_imd,2.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,1.0,0.0,0.0,1.3333333333333333)"
-dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)"
-pcmpistri-xmm_mem_imd,2.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,1.0,0.0,0.0,0.3333333333333333)"
-pcmpistri-xmm_xmm_imd,2.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)"
-pextrd-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-pextrd-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pmaxuw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pmaxud-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-blendps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-blendps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pextrb-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-pextrb-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pminuw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pminud-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrq-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrq-xmm_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrd-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrd-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pinsrb-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pinsrb-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-blendvps-xmm_mem,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)"
-blendvps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-blendvpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)"
-blendvpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)"
-pextrw-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-roundss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-roundss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-roundsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-roundsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pextrq-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)"
-pextrq-r64_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)"
-pmovzxwq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxwq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pblendvb-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-pblendvb-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-pmovzxwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pmovzxwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-phsubd-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubd-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phsubd-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubd-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-pmulhrsw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhrsw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmulhrsw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-phsubw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phsubw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-psignw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-psignb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-phaddsw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddsw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phaddsw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddsw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-pmaddubsw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmaddubsw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-pmaddubsw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-phsubsw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubsw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phsubsw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phsubsw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-pabsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-phaddd-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddd-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phaddd-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddd-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-palignr-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-palignr-mmx_mmx_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-palignr-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-palignr-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pshufb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pshufb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pshufb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-pabsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)"
-pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)"
-phaddw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-phaddw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)"
-phaddw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)"
-addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)"
-hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)"
-hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)"
-haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-movshdup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)"
-haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)"
-movsldup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)"
-fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)"
-lddqu-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movddup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-tzcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-rdtscp-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,2.0)"
-aesdec-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-aesdec-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-aeskeygenassist-xmm_xmm_imd,2.3333333333333335,None,"(2.3333333333333335,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)"
-aeskeygenassist-xmm_mem_imd,2.3333333333333335,None,"(2.3333333333333335,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
-aesenclast-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-aesenclast-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-aesdeclast-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-aesdeclast-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-aesenc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)"
-aesenc-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)"
-prefetchwt1-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)"
-lzcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)"
-lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)"
-clflush-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,1.0,1.0,0.3333333333333333)"
-pause-,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,1.3333333333333333)"
diff --git a/osaca/data/zen1.yml b/osaca/data/zen1.yml
new file mode 100644
index 0000000..c9028e3
--- /dev/null
+++ b/osaca/data/zen1.yml
@@ -0,0 +1,539 @@
+osaca_version: 0.3.2
+micro_architecture: AMD Zen (family 17h)
+arch_code: ZEN1
+isa: x86
+load_latency: {gpr: 4.0, xmm: 4.0, ymm: 4.0}
+load_throughput_multiplier: {gpr: 1.0, xmm: 1.0, ymm: 2.0}
+load_throughput:
+- {base: gpr, index: ~, offset: ~, scale: 1, port_pressure:     [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: ~, offset: ~, scale: 8, port_pressure:     [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: ~, offset: imd, scale: 1, port_pressure:   [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: ~, offset: imd, scale: 8, port_pressure:   [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: gpr, offset: ~, scale: 1, port_pressure:   [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: gpr, offset: ~, scale: 8, port_pressure:   [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: gpr, offset: imd, scale: 1, port_pressure: [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: gpr, offset: imd, scale: 8, port_pressure: [[1, '89'], [1, ['8D','9D']]]}
+hidden_loads: false
+ports: ['0', '1', '2', '3', 3DV, '4', '5', '6', '7', '8', '9', 8D, 9D, ST]
+port_model_scheme: |
+  ┌--------------------------------------┐  ┌-----------------------------------------------┐
+  |       96 entries OoO scheduler       |  |           84 entries OoO scheduler            |
+  └--------------------------------------┘  └-----------------------------------------------┘
+     0 |        1 |       2 |       3 |        4 |     5 |     6 |     7 |      8 |     9 |
+       ▼         ▼         ▼         ▼          ▼       ▼       ▼       ▼        ▼       ▼
+   ┌-------┐ ┌-------┐ ┌-------┐ ┌-------┐  ┌------┐ ┌-----┐ ┌-----┐ ┌------┐ ┌-----┐ ┌-----┐
+   |SSE ALU| |SSE ALU| |SSE ALU| |SSE ALU|  | ALU  | | ALU | | ALU | | ALU  | | AGU | | AGU |
+   └-------┘ └-------┘ └-------┘ └-------┘  └------┘ └-----┘ └-----┘ └------┘ └-----┘ └-----┘
+   ┌-------┐ ┌-------┐ ┌-------┐ ┌-------┐  ┌------┐ ┌-----┐ ┌-----┐ ┌------┐    |       |
+   |SSE MUL| |SSE MUL| |SSE ADD| |SSE ADD|  |BRANCH| | MUL | | MUL | |BRANCH|    ▼       ▼
+   └-------┘ └-------┘ └-------┘ └-------┘  └------┘ └-----┘ └-----┘ └------┘ ┌-------------┐ 
+   ┌-------┐ ┌-------┐ ┌-------┐ ┌-------┐                                    |    LOAD     |
+   |SSE FMA| |SSE FMA| |  SSE  | |SSE DIV|                                    └-------------┘
+   └-------┘ └-------┘ |  SHUF | └-------┘                                    ┌-------------┐ 
+             ┌-------┐ └-------┘                                              |    LOAD     |
+             |  SSE  |                                                        └-------------┘
+             |  SHUF |                                                        ┌-------------┐
+             └-------┘                                                        |    STORE    |
+                                                                              └-------------┘
+instruction_forms:
+- name: add
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: add
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: addl
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: addq
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: cmpl
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: ~  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: cmpq
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: ~  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: incq
+  operands:
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567     
+  port_pressure: [[1, '4567']]
+- name: ja
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: ~
+  port_pressure: []
+- name: jb
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: ~
+  port_pressure: []
+- name: jne
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: ~
+  port_pressure: []
+- name: leaq
+  operands:
+  - class: memory
+    base: gpr
+    offset: imd
+    index: ~
+    scale: 1
+  - class: register
+    name: gpr
+  throughput: 0.5
+  latency: ~  # 	1*p89
+  port_pressure: [[1, '89']]
+- name: movl
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: mulsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: mulss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 3.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: rcpss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: ~     #1.0
+  latency: 5.0
+  port_pressure: []
+- name: sqrtsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: ~     #8.0
+  latency: 23.0
+  port_pressure: []
+- name: sqrtss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: ~     #5.0
+  latency: 17.0
+  port_pressure: []
+- name: subq
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: subq
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: vaddpd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 3.0  # 	2*p23
+  port_pressure: [[2, '23']]
+- name: vaddsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 3.0  # 	1*p23
+  port_pressure: [[1, '23']]
+- name: vaddss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 3.0  # 	1*p23
+  port_pressure: [[1, '23']]
+- name: vdivsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 4.0
+  latency: 13.0  # 	1*p3+4*p3DV
+  port_pressure: [[1, '3'], [4.0, [3DV]]]
+- name: vdivss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 3.0
+  latency: 10.0
+  port_pressure: [[1, '3'], [3.0, [3DV]]]
+- name: vfmadd213pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	2*p01
+  port_pressure: [[2, '01']]
+- name: vfmadd231pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	2*p01
+  port_pressure: [[2, '01']]
+- name: vfmadd132pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	2*p01
+  port_pressure: [[2, '01']]
+- name: vmulsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 3.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulpd
+  operands:
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01+1*p89+1*p8D9D
+  port_pressure: [[1, '01'], [1, '89'], [1, [8D, 9D]]]
+- name: vmulpd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulpd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	2*p01
+  port_pressure: [[2, '01']]
+- name: vmovapd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovapd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovaps
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovaps
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovsd
+  operands:
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p89+1*p8D9D
+  port_pressure: [[1, '89'], [1, [8D, 9D]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: ~
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: ~
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
diff --git a/osaca/data/zen_data.csv b/osaca/data/zen_data.csv
deleted file mode 100644
index ef7fdbe..0000000
--- a/osaca/data/zen_data.csv
+++ /dev/null
@@ -1,138 +0,0 @@
-instr,TP,LT,ports
-jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jmpq-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-add-r32_imd,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-add-r64_imd,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-addl-r32_imd,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-addq-r64_imd,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-addl-mem_imd,1.0,7.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
-addq-mem_imd,1.0,7.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
-add-mem_r32,1.0,7.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
-add-mem_r64,1.0,7.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
-addl-mem_r32,1.0,7.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
-addq-mem_r64,1.0,7.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 1.0, 1.0)"
-cmp-mem_r32,0.5,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0.5, 0.5)"
-cmpl-mem_r32,0.5,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0.5, 0.5)"
-cmp-r32_mem,0.5,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0.5, 0.5)"
-cmpl-r32_mem,0.5,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0.5, 0.5)"
-cmp-r32_r32,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-cmpl-r32_r32,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-cmp-r64_imd,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-cmp-r64_r64,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-cmpq-r64_imd,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-cmpq-r64_r64,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-inc-r64,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-incq-r64,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-incl-r32,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-mov-mem_r64,1.0,4.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-mov-r64_mem,0.5,3.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-mov-r32_mem,0.5,3.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-movq-mem_r64,1.0,4.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-movq-r64_mem,0.5,3.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-movl-r32_mem,0.5,3.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-movslq-r64_r32,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-sub-r32_imd,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-vaddpd-ymm_ymm_mem,1.0,3.0,"(0, 0, 1.0, 1.0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vaddsd-xmm_xmm_mem,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vaddsd-xmm_xmm_xmm,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0, 0)"
-vaddss-xmm_xmm_xmm,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0, 0)"
-vcvtsi2ss-xmm_xmm_r32,1.0,4.0,"(1.0, 1.0, 1.0, 1.0, 0, 0, 0, 0, 0, 0, 0)"
-vcvtss2si-r32_xmm,1.0,7.0,"(1.0, 1.0, 1.0, 1.0, 0, 0, 0, 0, 0, 0, 0)"
-cvtsi2ss-xmm_r32,1.0,8.0,"(1.0, 1.0, 1.0, 1.0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd213pd-ymm_ymm_ymm,1.0,5.0,"(1.0, 1.0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd213pd-xmm_xmm_xmm,0.5,5.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd213ps-ymm_ymm_ymm,1.0,5.0,"(1.0, 1.0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd213ps-xmm_xmm_xmm,0.5,5.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd213sd-xmm_xmm_xmm,0.5,5.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd213ss-xmm_xmm_xmm,0.5,5.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd132sd-xmm_xmm_mem,0.5,5.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vfmadd132pd-xmm_xmm_mem,0.5,5.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vfmadd132pd-ymm_ymm_mem,1.0,5.0,"(1.0, 1.0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-vinsertf128-ymm_ymm_imd,0.6666666666666667,1.0,"(-1,)"
-vmovsd-mem_xmm,1.0,8.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-vmovsd-xmm_mem,0.5,-1.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vmulpd-ymm_ymm_ymm,1.0,4.0,"(1.0, 1.0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vmulsd-xmm_xmm_mem,0.5,4.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vmulsd-xmm_xmm_xmm,0.5,4.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vmulss-xmm_xmm_xmm,0.5,3.0,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vsubpd-ymm_ymm_mem,1.0,3.0,"(0, 0, 1.0, 1.0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-vsubsd-xmm_xmm_mem,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vsubsd-xmm_xmm_xmm,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0, 0)"
-vsubss-xmm_xmm_xmm,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0, 0)"
-vmovaps-xmm_mem,0.5,3.0,"(0.25, 0.25, 0.25, 0.25, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vmovaps-mem_xmm,1.0,5.0,"(0.25, 0.25, 0.25, 0.25, 0, 0, 0, 0, 0, 1.0, 1.0)"
-vmovapd-ymm_mem,1.0,-1.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-vmovapd-mem_ymm,2.0,-1.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 2.0, 2.0)"
-movq-r64_xmm,1.0,-1.0,"(0, 0, 1.0, 0, 0, 0, 0, 0, 0, 0, 0)"
-#prefetcht0-mem,0.5,-1.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-#prefetchw-mem,0.5,-1.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-cmpl-r32_imd,0.25,1.0,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0, 0)"
-vaddpd-xmm_xmm_xmm,0.5,3,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0)"
-vaddpd-ymm_ymm_ymm,1,3,"(0, 0, 1.0, 1.0, 0, 0, 0, 0, 0, 0, 0)"
-vcvtdq2pd-xmm_xmm,1,7,"(0.5, 0.5, 0, 1.0, 0, 0, 0, 0, 0, 0, 0)"
-vcvtdq2pd-ymm_xmm,2,7,"(1.0, 1.0, 0, 2.0, 0, 0, 0, 0, 0, 0, 0)"
-vcvtsi2sd-xmm_xmm_r32,1,4,"(0, 0, 1.0, 1.0, 0, 0, 0, 0, 0, 0, 0)"
-vextracti128-xmm_ymm_imd,0.3333333333333333,1,"(0.33, 0.33, 0, 0.33, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd132pd-xmm_xmm_xmm,0.5,5,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd132pd-ymm_ymm_ymm,1,5,"(1.0, 1.0, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vfmadd132sd-xmm_xmm_xmm,0.5,5,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vmulpd-xmm_xmm_xmm,0.5,4,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vpaddd-xmm_xmm_xmm,0.3333333333333333,1,"(0.33, 0.33, 0, 0.33, 0, 0, 0, 0, 0, 0, 0)"
-vpaddd-ymm_ymm_ymm,0.6666666666666667,1,"(0.66, 0.66, 0, 0.66, 0, 0, 0, 0, 0, 0, 0)"
-vpshufd-xmm_xmm_imd,0.5,1,"(0, 0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0)"
-vxorpd-xmm_xmm_xmm,0.25,1,"(0.25, 0.25, 0.25, 0.25, 0, 0, 0, 0, 0, 0, 0)"
-vxorps-xmm_xmm_xmm,0.25,1,"(0.25, 0.25, 0.25, 0.25, 0, 0, 0, 0, 0, 0, 0)"
-vdivpd-xmm_xmm_xmm,4,8,"(0, 0, 0, 1.0, 4.0, 0, 0, 0, 0, 0, 0)"
-vdivsd-xmm_xmm_xmm,4,8,"(0, 0, 0, 1.0, 4.0, 0, 0, 0, 0, 0, 0)"
-vmovups-mem_xmm,0.5,8,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vmovups-xmm_mem,1,8,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vaddpd-xmm_xmm_mem,0.5,3.0,"(0, 0, 0.5, 0.5, 0, 0, 0, 0, 0, 0.5, 0.5)"
-vmulpd-xmm_xmm_mem,0.5,4,"(0.5, 0.5, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vmulpd-ymm_ymm_mem,1,4,"(1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0)"
-vinsertf128-ymm_ymm_mem_imd,1,5,"(0.33, 0.33, 0, 0.33, 0, 0, 0, 0, 0, 0, 0)"
-vmovupd-xmm_mem,0.5,-1.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-vmovupd-mem_xmm,1,1,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 2.0, 2.0)"
-vmovupd-ymm_mem,3.0,-1.0,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-vmovupd-mem_ymm,2,2,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 2.0, 2.0)"
-movupd-xmm_mem,0.5,-1,"(0, 0, 0, 0, 0, 0, 0, 0, 0, 1.0, 1.0)"
-pushq-r64,0.5,-1,"(-1,)"
-cmpq-r64_mem,0.5,-1,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0.5, 0.5)"
-movq-r64_r64,0.2,-1,"(-1,)"
-subq-r64_r64,0.25,1,"(-1,)"
-cmpq-mem_r64,0.5,-1,"(0, 0, 0, 0, 0, 0.25, 0.25, 0.25, 0.25, 0.5, 0.5)"
diff --git a/osaca/db_interface.py b/osaca/db_interface.py
new file mode 100755
index 0000000..3acd17d
--- /dev/null
+++ b/osaca/db_interface.py
@@ -0,0 +1,406 @@
+#!/usr/bin/env python3
+
+import math
+import os
+import warnings
+
+import ruamel.yaml
+
+from osaca.semantics import MachineModel
+
+
+def sanity_check(arch: str, verbose=False):
+    # load arch machine model
+    arch_mm = MachineModel(arch=arch)
+    data = arch_mm['instruction_forms']
+    # load isa machine model
+    isa = arch_mm.get_ISA()
+    isa_mm = MachineModel(arch='isa/{}'.format(isa))
+    num_of_instr = len(data)
+
+    # check arch DB entries
+    (
+        missing_throughput,
+        missing_latency,
+        missing_port_pressure,
+        wrong_port,
+        suspicious_instructions,
+        duplicate_instr_arch,
+    ) = _check_sanity_arch_db(arch_mm, isa_mm)
+    # check ISA DB entries
+    duplicate_instr_isa, only_in_isa = _check_sanity_isa_db(arch_mm, isa_mm)
+
+    _print_sanity_report(
+        num_of_instr,
+        missing_throughput,
+        missing_latency,
+        missing_port_pressure,
+        wrong_port,
+        suspicious_instructions,
+        duplicate_instr_arch,
+        duplicate_instr_isa,
+        only_in_isa,
+        verbose=verbose,
+    )
+
+
+def import_benchmark_output(arch, bench_type, filepath):
+    supported_bench_outputs = ['ibench', 'asmbench']
+    assert os.path.exists(filepath)
+    if bench_type not in supported_bench_outputs:
+        raise ValueError('Benchmark type is not supported.')
+    with open(filepath, 'r') as f:
+        input_data = f.readlines()
+    db_entries = None
+    if bench_type == 'ibench':
+        db_entries = _get_ibench_output(input_data)
+    elif bench_type == 'asmbench':
+        raise NotImplementedError
+    # write entries to DB
+    mm = MachineModel(arch)
+    for entry in db_entries:
+        mm.set_instruction_entry(entry)
+    with open(filepath, 'w') as f:
+        mm.dump(f)
+
+##################
+# HELPERS IBENCH #
+##################
+
+
+def _get_ibench_output(input_data):
+    db_entries = {}
+    for line in input_data:
+        if 'Using frequency' in line or len(line) == 0:
+            continue
+        instruction = line.split(':')[0]
+        key = '-'.join(instruction.split('-')[:2])
+        if key in db_entries:
+            # add only TP/LT value
+            entry = db_entries[key]
+        else:
+            mnemonic = instruction.split('-')[0]
+            operands = instruction.split('-')[1].split('_')
+            operands = [_create_db_operand(op) for op in operands]
+            entry = {
+                'name': mnemonic,
+                'operands': operands,
+                'throughput': None,
+                'latency': None,
+                'port_pressure': None,
+            }
+        if 'TP' in instruction:
+            entry['throughput'] = _validate_measurement(float(line.split()[1]), True)
+            if not entry['throughput']:
+                warnings.warn(
+                    'Your THROUGHPUT measurement for {} looks suspicious'.format(key)
+                    + ' and was not added. Please inspect your benchmark.'
+                )
+        elif 'LT' in instruction:
+            entry['latency'] = _validate_measurement(float(line.split()[1]), False)
+            if not entry['latency']:
+                warnings.warn(
+                    'Your LATENCY measurement for {} looks suspicious'.format(key)
+                    + ' and was not added. Please inspect your benchmark.'
+                )
+        db_entries[key] = entry
+    return db_entries
+
+
+def _validate_measurement(self, measurement, is_tp):
+    if not is_tp:
+        if (
+            math.floor(measurement) * 1.05 >= measurement
+            or math.ceil(measurement) * 0.95 <= measurement
+        ):
+            # Value is probably correct, so round it to the estimated value
+            return float(round(measurement))
+        # Check reciprocal only if it is a throughput value
+    else:
+        reciprocals = [1 / x for x in range(1, 11)]
+        for reci in reciprocals:
+            if reci * 0.95 <= measurement <= reci * 1.05:
+                # Value is probably correct, so round it to the estimated value
+                return round(reci, 5)
+    # No value close to an integer or its reciprocal found, we assume the
+    # measurement is incorrect
+    return None
+
+
+def _create_db_operand(self, operand):
+    if self.isa == 'aarch64':
+        return self._create_db_operand_aarch64(operand)
+    elif self.isa == 'x86':
+        return self._create_db_operand_x86(operand)
+
+
+def _create_db_operand_aarch64(self, operand):
+    if operand == 'i':
+        return {'class': 'immediate', 'imd': 'int'}
+    elif operand in 'wxbhsdq':
+        return {'class': 'register', 'prefix': operand}
+    elif operand.startswith('v'):
+        return {'class': 'register', 'prefix': 'v', 'shape': operand[1:2]}
+    elif operand.startswith('m'):
+        return {
+            'class': 'memory',
+            'base': 'gpr' if 'b' in operand else None,
+            'offset': 'imd' if 'o' in operand else None,
+            'index': 'gpr' if 'i' in operand else None,
+            'scale': 8 if 's' in operand else 1,
+            'pre-indexed': True if 'r' in operand else False,
+            'post-indexed': True if 'p' in operand else False,
+        }
+    else:
+        raise ValueError('Parameter {} is not a valid operand code'.format(operand))
+
+
+def _create_db_operand_x86(self, operand):
+    if operand == 'r':
+        return {'class': 'register', 'name': 'gpr'}
+    elif operand in 'xyz':
+        return {'class': 'register', 'name': operand + 'mm'}
+    elif operand == 'i':
+        return {'class': 'immediate', 'imd': 'int'}
+    elif operand.startswith('m'):
+        return {
+            'class': 'memory',
+            'base': 'gpr' if 'b' in operand else None,
+            'offset': 'imd' if 'o' in operand else None,
+            'index': 'gpr' if 'i' in operand else None,
+            'scale': 8 if 's' in operand else 1,
+        }
+    else:
+        raise ValueError('Parameter {} is not a valid operand code'.format(operand))
+
+
+########################
+# HELPERS SANITY CHECK #
+########################
+
+
+def _check_sanity_arch_db(arch_mm, isa_mm):
+    suspicious_prefixes_x86 = ['vfm', 'fm']
+    suspicious_prefixes_arm = ['fml', 'ldp', 'stp', 'str']
+    if arch_mm.get_ISA().lower() == 'aarch64':
+        suspicious_prefixes = suspicious_prefixes_arm
+    if arch_mm.get_ISA().lower() == 'x86':
+        suspicious_prefixes = suspicious_prefixes_x86
+
+    # returned lists
+    missing_throughput = []
+    missing_latency = []
+    missing_port_pressure = []
+    wrong_port = []
+    suspicious_instructions = []
+    duplicate_instr_arch = []
+
+    for instr_form in arch_mm['instruction_forms']:
+        # check value in DB entry
+        if instr_form['throughput'] is None:
+            missing_throughput.append(instr_form)
+        if instr_form['latency'] is None:
+            missing_latency.append(instr_form)
+        if instr_form['port_pressure'] is None:
+            missing_port_pressure.append(instr_form)
+        else:
+            if _check_for_wrong_port(arch_mm['ports'], instr_form):
+                wrong_port.append(instr_form)
+        # check entry against ISA DB
+        for prefix in suspicious_prefixes:
+            if instr_form['name'].startswith(prefix):
+                # check if instruction in ISA DB
+                if isa_mm.get_instruction(instr_form['name'], instr_form['operands']) is None:
+                    # if not, mark them as suspicious and print it on the screen
+                    suspicious_instructions.append(instr_form)
+        # check for duplicates in DB
+        if arch_mm._check_for_duplicate(instr_form['name'], instr_form['operands']):
+            duplicate_instr_arch.append(instr_form)
+    # every entry exists twice --> uniquify
+    tmp_list = []
+    for i in range(0, len(duplicate_instr_arch)):
+        tmp = duplicate_instr_arch.pop()
+        if tmp not in duplicate_instr_arch:
+            tmp_list.append(tmp)
+    duplicate_instr_arch = tmp_list
+    return (
+        missing_throughput,
+        missing_latency,
+        missing_port_pressure,
+        wrong_port,
+        suspicious_instructions,
+        duplicate_instr_arch,
+    )
+
+
+def _check_for_wrong_port(port_list, instr_form):
+    for cycles, ports in instr_form['port_pressure']:
+        for p in ports:
+            if p not in port_list:
+                return False
+    return True
+
+
+def _check_sanity_isa_db(arch_mm, isa_mm):
+    # returned lists
+    duplicate_instr_isa = []
+    only_in_isa = []
+
+    for instr_form in isa_mm['instruction_forms']:
+        # check if instr is missing in arch DB
+        if arch_mm.get_instruction(instr_form['name'], instr_form['operands']) is None:
+            only_in_isa.append(instr_form)
+        # check for duplicates
+        if isa_mm._check_for_duplicate(instr_form['name'], instr_form['operands']):
+            duplicate_instr_isa.append(instr_form)
+    # every entry exists twice --> uniquify
+    tmp_list = []
+    for i in range(0, len(duplicate_instr_isa)):
+        tmp = duplicate_instr_isa.pop()
+        if tmp not in duplicate_instr_isa:
+            tmp_list.append(tmp)
+    duplicate_instr_isa = tmp_list
+
+    return duplicate_instr_isa, only_in_isa
+
+
+def _print_sanity_report(
+    total, m_tp, m_l, m_pp, wrong_pp, suspic_instr, dup_arch, dup_isa, only_isa, verbose=False
+):
+    # non-verbose summary
+    print('SUMMARY\n----------------------')
+    print(
+        '{}% ({}/{}) of instruction forms have no throughput value.'.format(
+            round(100 * len(m_tp) / total), len(m_tp), total
+        )
+    )
+    print(
+        '{}% ({}/{}) of instruction forms have no latency value.'.format(
+            round(100 * len(m_l) / total), len(m_l), total
+        )
+    )
+    print(
+        '{}% ({}/{}) of instruction forms have no port pressure assignment.'.format(
+            round(100 * len(m_pp) / total), len(m_pp), total
+        )
+    )
+    print(
+        '{}% ({}/{}) of instruction forms have an invalid port identifier.'.format(
+            round(100 * len(wrong_pp) / total), len(wrong_pp), total
+        )
+    )
+    print(
+        '{}% ({}/{}) of instruction forms might miss an ISA DB entry.'.format(
+            round(100 * len(suspic_instr) / total), len(suspic_instr), total
+        )
+    )
+    print('{} duplicate instruction forms in uarch DB.'.format(len(dup_arch)))
+    print('{} duplicate instruction forms in ISA DB.'.format(len(dup_isa)))
+    print(
+        '{} instruction forms in ISA DB are not referenced by instruction '.format(len(only_isa))
+        + 'forms in uarch DB.'
+    )
+    print('----------------------\n')
+    # verbose version
+    if verbose:
+        _print_sanity_report_verbose(
+            total, m_tp, m_l, m_pp, wrong_pp, suspic_instr, dup_arch, dup_isa, only_isa
+        )
+
+
+def _print_sanity_report_verbose(
+    total, m_tp, m_l, m_pp, wrong_pp, suspic_instr, dup_arch, dup_isa, only_isa
+):
+    BRIGHT_CYAN = '\033[1;36;1m'
+    BRIGHT_BLUE = '\033[1;34;1m'
+    BRIGHT_RED = '\033[1;31;1m'
+    BRIGHT_MAGENTA = '\033[1;35;1m'
+    BRIGHT_YELLOW = '\033[1;33;1m'
+    CYAN = '\033[36m'
+    YELLOW = '\033[33m'
+    WHITE = '\033[0m'
+
+    print('Instruction forms without throughput value:\n' if len(m_tp) != 0 else '', end='')
+    for instr_form in m_tp:
+        print('{}{}{}'.format(BRIGHT_BLUE, _get_full_instruction_name(instr_form), WHITE))
+    print('Instruction forms without latency value:\n' if len(m_l) != 0 else '', end='')
+    for instr_form in m_l:
+        print('{}{}{}'.format(BRIGHT_RED, _get_full_instruction_name(instr_form), WHITE))
+    print(
+        'Instruction forms without port pressure assignment:\n' if len(m_pp) != 0 else '', end=''
+    )
+    for instr_form in m_pp:
+        print('{}{}{}'.format(BRIGHT_MAGENTA, _get_full_instruction_name(instr_form), WHITE))
+    print(
+        'Instruction forms with invalid port identifiers in port pressure:\n'
+        if len(wrong_pp) != 0
+        else '',
+        end='',
+    )
+    for instr_form in wrong_pp:
+        print('{}{}{}'.format(BRIGHT_MAGENTA, _get_full_instruction_name(instr_form), WHITE))
+    print(
+        'Instruction forms which might miss an ISA DB entry:\n' if len(suspic_instr) != 0 else '',
+        end='',
+    )
+    for instr_form in suspic_instr:
+        print('{}{}{}'.format(BRIGHT_CYAN, _get_full_instruction_name(instr_form), WHITE))
+    print('Duplicate instruction forms in uarch DB:\n' if len(dup_arch) != 0 else '', end='')
+    for instr_form in dup_arch:
+        print('{}{}{}'.format(YELLOW, _get_full_instruction_name(instr_form), WHITE))
+    print('Duplicate instruction forms in ISA DB:\n' if len(dup_isa) != 0 else '', end='')
+    for instr_form in dup_isa:
+        print('{}{}{}'.format(BRIGHT_YELLOW, _get_full_instruction_name(instr_form), WHITE))
+    print(
+        'Instruction forms existing in ISA DB but not in uarch DB:\n'
+        if len(only_isa) != 0
+        else '',
+        end='',
+    )
+    for instr_form in only_isa:
+        print('{}{}{}'.format(CYAN, _get_full_instruction_name(instr_form), WHITE))
+
+
+###################
+# GENERIC HELPERS #
+###################
+
+
+def _get_full_instruction_name(instruction_form):
+    operands = []
+    for op in instruction_form['operands']:
+        op_attrs = [
+            y + ':' + str(op[y])
+            for y in list(filter(lambda x: True if x != 'class' else False, op))
+        ]
+        operands.append('{}({})'.format(op['class'], ','.join(op_attrs)))
+    return '{}  {}'.format(instruction_form['name'], ','.join(operands))
+
+
+def __represent_none(self, data):
+    return self.represent_scalar(u'tag:yaml.org,2002:null', u'~')
+
+
+def _create_yaml_object():
+    yaml_obj = ruamel.yaml.YAML()
+    yaml_obj.representer.add_representer(type(None), __represent_none)
+    return yaml_obj
+
+
+def __dump_data_to_yaml(filepath, data):
+    # first add 'normal' meta data in the right order (no ordered dict yet)
+    meta_data = dict(data)
+    del meta_data['instruction_forms']
+    del meta_data['port_model_scheme']
+    with open(filepath, 'w') as f:
+        ruamel.yaml.dump(meta_data, f, allow_unicode=True)
+    with open(filepath, 'a') as f:
+        # now add port model scheme in |-scheme for better readability
+        ruamel.yaml.dump(
+            {'port_model_scheme': data['port_model_scheme']},
+            f,
+            allow_unicode=True,
+            default_style='|',
+        )
+        # finally, add instruction forms
+        ruamel.yaml.dump({'instruction_forms': data['instruction_forms']}, f, allow_unicode=True)
diff --git a/osaca/eu_sched.py b/osaca/eu_sched.py
deleted file mode 100755
index 2e9ab90..0000000
--- a/osaca/eu_sched.py
+++ /dev/null
@@ -1,447 +0,0 @@
-#!/usr/bin/env python3
-
-import sys
-import os
-import math
-import ast
-from operator import add
-import pandas as pd
-
-from osaca.param import Register, MemAddr
-#from param import Register, MemAddr
-
-
-class Scheduler(object):
-    arch_dict = {
-        # Intel
-        'NHM': 5, 'WSM': 5,  # Nehalem, Westmere
-        'SNB': 6, 'IVB': 6,  # Sandy Bridge, Ivy Bridge
-        'HSW': 8, 'BDW': 8,  # Haswell, Broadwell
-        'SKL': 8, 'SKX': 8,  # Skylake(-X)
-        'KBL': 8, 'CFL': 8,  # Kaby Lake, Coffee Lake
-        # AMD
-        'ZEN': 10,  # Zen/Ryzen/EPYC
-    }
-    arch_pipeline_ports = {
-        'NHM': ['0DV'], 'WSM': ['0DV'],
-        'SNB': ['0DV'], 'IVB': ['0DV'],
-        'HSW': ['0DV'], 'BDW': ['0DV'],
-        'SKL': ['0DV'], 'SKX': ['0DV'],
-        'KBL': ['0DV'], 'CFL': ['0DV'],
-        'ZEN': ['3DV'],}
-    # content of most inner list in instrList: instr, operand(s), instr form
-    df = None  # type: DataFrame
-    # for parallel ld/st in archs with 1 st/cy and >1 ld/cy, able to do 1 st and 1 ld in 1cy
-    ld_ports = None  # type: list<int>
-    # enable flag for parallel ld/st
-    en_par_ldst = False  # type: boolean
-
-    def __init__(self, arch, instruction_list):
-        arch = arch.upper()
-        try:
-            self.ports = self.arch_dict[arch]
-        except KeyError:
-            print('Architecture not supported for EU scheduling.', file=sys.stderr)
-            sys.exit(1)
-        # check for parallel ld/st in a cycle
-        if arch == 'ZEN':
-            self.en_par_ldst = True
-            self.ld_ports = [9, 10]
-        # check for DV port
-        self.pipeline_ports = self.arch_pipeline_ports.get(arch, [])
-        self.instrList = instruction_list
-        # curr_dir = os.path.realpath(__file__)[:-11]
-        osaca_dir = os.path.expanduser('~/.osaca/')
-        self.df = pd.read_csv(osaca_dir + 'data/' + arch.lower() + '_data.csv', quotechar='"',
-                              converters={'ports': ast.literal_eval})
-
-    def new_schedule(self, machine_readable=False):
-        """
-        Schedule Instruction Form list and calculate port bindings.
-
-        Parameters
-        ----------
-        machine_readable : bool
-            Boolean for indicating if the return value should be human readable (if False) or 
-            machine readable (if True)
-
-        Returns
-        -------
-        (str, [float, ...]) or ([[float, ...], ...], [float, ...])
-            A tuple containing the output of the schedule as string (if machine_readable is not
-            given or False) or as list of lists (if machine_readable is True) and the port bindings
-            as list of float.
-        """
-        sched = self.get_head()
-        # Initialize ports
-        # Add DV port, if it is existing
-        occ_ports = [[0] * (self.ports + len(self.pipeline_ports)) for x in range(len(self.instrList))]
-        port_bndgs = [0] * (self.ports + len(self.pipeline_ports))
-        # Store instruction counter for parallel ld/st
-        par_ldst = 0
-        # Count the number of store instr if we schedule for an architecture with par ld/st
-        if self.en_par_ldst:
-            for i, instrForm in enumerate(self.instrList):
-                if (isinstance(instrForm[1], MemAddr) and len(instrForm) > 3
-                        and not instrForm[0].startswith('cmp')):
-                    # print('({}, {}) is st --> par_ldst = {}'.format(i, instrForm[0], par_ldst + 1))
-                    par_ldst += 1
-        # Check if there's a port occupation stored in the CSV, otherwise leave the
-        # occ_port list item empty
-        for i, instrForm in enumerate(self.instrList):
-            search_string = instrForm[0] + self.get_operand_suffix(instrForm)
-            try:
-                entry = self.df.loc[lambda df, sStr=search_string: df.instr == sStr]
-                tup = entry.ports.values[0]
-                if len(tup) == 1 and tup[0] == -1:
-                    raise IndexError()
-            except IndexError:
-                # Instruction form not in CSV
-                if instrForm[0][:3] == 'nop':
-                    sched += self.format_port_occupation_line(occ_ports[i], '* ' + instrForm[-1])
-                elif instrForm[0] == 'DIRECTIVE':
-                    sched += self.format_port_occupation_line(occ_ports[i], '* ' + instrForm[-1])
-                else:
-                    sched += self.format_port_occupation_line(occ_ports[i], 'X ' + instrForm[-1])
-                continue
-            occ_ports[i] = list(tup)
-            # Check if it's a ld including instr 
-            p_flg = ''
-            if self.en_par_ldst:
-                # Check for ld
-                # FIXME remove special load handling from here and place in machine model
-                if (isinstance(instrForm[-2], MemAddr) or
-                        (len(instrForm) > 4 and isinstance(instrForm[2], MemAddr))):
-                    if par_ldst > 0:
-                        par_ldst -= 1
-                        p_flg = 'P '
-                        for port in self.ld_ports:
-                            occ_ports[i][port] = 0.0  # '(' + str(occ_ports[i][port]) + ')'
-            # Write schedule line
-            if len(p_flg) > 0:
-                sched += self.format_port_occupation_line(occ_ports[i], p_flg + instrForm[-1])
-                for port in self.ld_ports:
-                    occ_ports[i][port] = 0
-            else:
-                sched += self.format_port_occupation_line(occ_ports[i], instrForm[-1])
-            # Add throughput to total port binding
-            port_bndgs = list(map(add, port_bndgs, occ_ports[i]))
-        if machine_readable:
-            list(map(self.append, occ_ports, self.instrList))
-            return occ_ports, port_bndgs
-        return sched, port_bndgs
-
-    def schedule(self):
-        """
-        Schedule Instruction Form list and calculate port bindings.
-
-        Returns
-        -------
-        (str, [int, ...])
-            A tuple containing the graphic output of the schedule as string and
-            the port bindings as list of ints.
-        """
-        wTP = False
-        sched = self.get_head()
-        # Initialize ports
-        port_bndgs = [0] * self.ports
-        # Check if there's a port occupation stored in the CSV, otherwise leave the
-        # occ_port list item empty
-        for i, instrForm in enumerate(self.instrList):
-            try:
-                search_string = instrForm[0] + '-' + self.get_operand_suffix(instrForm)
-                entry = self.df.loc[lambda df, sStr=search_string: df.instr == sStr]
-                tup = entry.ports.values[0]
-                if len(tup) == 1 and tup[0][0] == -1:
-                    raise IndexError()
-            except IndexError:
-                # Instruction form not in CSV
-                if instrForm[0][:3] == 'nop':
-                    sched += self.format_port_occupation_line(occ_ports[i], '* ' + instrForm[-1])
-                else:
-                    sched += self.format_port_occupation_line(occ_ports[i], 'X ' + instrForm[-1])
-                continue
-            if wTP:
-                # Get the occurance of each port from the occupation list
-                port_occurances = self.get_port_occurances(tup)
-                # Get 'occurance groups'
-                occurance_groups = self.get_occurance_groups(port_occurances)
-                # Calculate port dependent throughput
-                tp_ges = entry.TP.values[0] * len(occurance_groups[0])
-                for occGroup in occurance_groups:
-                    for port in occGroup:
-                        occ_ports[i][port] = tp_ges / len(occGroup)
-            else:
-                variations = len(tup)
-                t_all = self.flatten(tup)
-                if entry.TP.values[0] == 0:
-                    t_all = ()
-                if variations == 1:
-                    for j in tup[0]:
-                        occ_ports[i][j] = entry.TP.values[0]
-                else:
-                    for j in range(0, self.ports):
-                        occ_ports[i][j] = t_all.count(j) / variations
-            # Write schedule line
-            sched += self.format_port_occupation_line(occ_ports[i], instrForm[-1])
-            # Add throughput to total port binding
-            port_bndgs = list(map(add, port_bndgs, occ_ports[i]))
-        return sched, port_bndgs
-
-    def flatten(self, l):
-        if len(l) == 0:
-            return l
-        if isinstance(l[0], type(l)):
-            return self.flatten(l[0]) + self.flatten(l[1:])
-        return l[:1] + self.flatten(l[1:])
-
-    def append(self, l, e):
-        if(isinstance(l, list)):
-            l.append(e)
-    
-    def schedule_fcfs(self):
-        """
-        Schedule Instruction Form list for a single run with latencies.
-
-        Returns
-        -------
-        (str, int)
-            A tuple containing the graphic output as string and the total throughput time as int.
-        """
-        sched = self.get_head()
-        total = 0
-        # Initialize ports
-        occ_ports = [0] * self.ports
-        for instrForm in self.instrList:
-            try:
-                search_string = instrForm[0] + '-' + self.get_operand_suffix(instrForm)
-                entry = self.df.loc[lambda df, sStr=search_string: df.instr == sStr]
-                tup = entry.ports.values[0]
-                if len(tup) == 1 and tup[0][0] == -1:
-                    raise IndexError()
-            except IndexError:
-                # Instruction form not in CSV
-                sched += self.format_port_occupation_line([0] * self.ports, '* ' + instrForm[-1])
-                continue
-            found = False
-            while not found:
-                for portOcc in tup:
-                    # Test if chosen instruction form port occupation suits the current CPU port
-                    # occupation
-                    if self.test_ports_fcfs(occ_ports, portOcc):
-                        # Current port occupation fits for chosen port occupation of instruction!
-                        found = True
-                        good = [entry.LT.values[0] if (j in portOcc) else 0 for j in
-                                range(0, self.ports)]
-                        sched += self.format_port_occupation_line(good, instrForm[-1])
-                        # Add new occupation
-                        occ_ports = [occ_ports[j] + good[j] for j in range(0, self.ports)]
-                        break
-                # Step
-                occ_ports = [j - 1 if (j > 0) else 0 for j in occ_ports]
-                if entry.LT.values[0] != 0:
-                    total += 1
-        total += max(occ_ports)
-        return sched, total
-
-    def get_occurance_groups(self, port_occurances):
-        """
-        Group ports in groups by the number of their occurrence and sorts groups by cardinality.
-
-        Parameters
-        ----------
-        port_occurances : [int, ...]
-            List with the length of ports containing the number of occurances
-            of each port
-
-        Returns
-        -------
-        [[int, ...], ...]
-            List of lists with all occurance groups sorted by cardinality
-            (smallest group first)
-        """
-        groups = [[] for x in range(len(set(port_occurances))-1)]
-        for i, groupInd in enumerate(range(min(list(filter(lambda x: x > 0, port_occurances))),
-                                           max(port_occurances) + 1)):
-            for p, occurs in enumerate(port_occurances):
-                if groupInd == occurs:
-                    groups[i].append(p)
-        # Sort groups by cardinality
-        groups.sort(key=len)
-        return groups
-
-    def get_port_occurances(self, tups):
-        """
-        Return the number of each port occurrence for the possible port occupations.
-
-        Parameters
-        ----------
-        tups : ((int, ...), ...)
-            Tuple of tuples of possible port occupations
-
-        Returns
-        -------
-        [int, ...]
-            List in the length of the number of ports for the current architecture,
-            containing the amount of occurances for each port
-        """
-        ports = [0] * self.ports
-        for tup in tups:
-            for elem in tup:
-                ports[elem] += 1
-        return ports
-
-    def test_ports_fcfs(self, occ_ports, needed_ports):
-        """
-        Test if current configuration of ports is possible and returns boolean.
-
-        Parameters
-        ----------
-        occ_ports : [int]
-            Tuple to inspect for current port occupation
-        needed_ports : (int)
-            Tuple with needed port(s) for particular instruction form
-
-        Returns
-        -------
-        bool
-            True    if needed ports can get scheduled on current port occupation
-            False   if not
-        """
-        for port in needed_ports:
-            if occ_ports[port] != 0:
-                return False
-        return True
-
-    def get_report_info(self):
-        """
-        Create Report information including all needed annotations.
-
-        Returns
-        -------
-        str
-            String containing the report information
-        """
-        analysis = 'Throughput Analysis Report\n' + ('-' * 26) + '\n'
-        annotations = (
-            'P - Load operation can be hidden behind a past or future store instruction\n'
-            'X - No information for this instruction in data file\n'
-            '* - Not bound to a port, therefore ignored\n\n')
-        return analysis + annotations
-
-    def get_head(self):
-        """
-        Create right heading for CPU architecture.
-
-        Returns
-        -------
-        str
-            String containing the header
-        """
-        port_names = self.get_port_naming()
-
-        port_line = ''.join('|{:^6}'.format(pn) for pn in port_names) + '|\n'
-        horiz_line = '-' * (len(port_line) - 1) + '\n'
-        port_anno = ' ' * ((len(port_line) - 25) // 2) + 'Ports Pressure in cycles\n'
-
-        return port_anno + port_line + horiz_line
-
-    def format_port_occupation_line(self, occ_ports, instr_name):
-        """
-        Create line with port occupation for output.
-
-        Parameters
-        ----------
-        occ_ports : (int, ...)
-            Integer tuple containing needed ports
-        instr_name : str
-            Name of instruction form for output
-
-        Returns
-        -------
-        str
-            String for output containing port scheduling for instr_name
-        """
-        line = ''
-        for cycles in occ_ports:
-            if cycles == 0:
-                line += '|' + ' ' * 6
-            elif cycles >= 10:
-                line += '|{:^6.1f}'.format(cycles)
-            else:
-                line += '|{:^6.2f}'.format(cycles)
-        line += '| ' + instr_name + '\n'
-        return line
-
-    def get_port_naming(self):
-        """
-        Return list of port names
-
-        :return: list of strings
-        """
-        return sorted([str(i) for i in range(self.ports)] + self.pipeline_ports)
-
-    def get_port_binding(self, port_bndg):
-        """
-        Create port binding out of scheduling result.
-
-        Parameters
-        ----------
-        port_bndg : [int, ...]
-            Integer list containing port bindings
-
-        Returns
-        -------
-        str
-            String containing the port binding graphical output
-        """
-        col_widths = self.get_column_widths(port_bndg)
-        header = 'Port Binding in Cycles Per Iteration:\n'
-        horiz_line = '-' * 10 + '-' * (sum(col_widths) + len(col_widths)) + '\n'
-        port_line = '|  Port  |'
-        for i, port_name in enumerate(self.get_port_naming()):
-            port_line += port_name.center(col_widths[i]) + '|'
-        port_line += '\n'
-        cyc_line = '| Cycles |'
-        for i in range(len(port_bndg)):
-            cyc_line += '{}|'.format(str(round(port_bndg[i], 2)).center(col_widths[i]))
-        cyc_line += '\n'
-        binding = header + horiz_line + port_line + horiz_line + cyc_line + horiz_line
-        return binding
-
-    def get_column_widths(self, port_bndg):
-        return [max(len(str(round(x, 2))), len(name)) + 2
-                for x, name in zip(port_bndg, self.get_port_naming())]
-
-    def get_operand_suffix(self, instr_form):
-        """
-        Create operand suffix out of list of Parameters.
-
-        Parameters
-        ----------
-        instr_form : [str, Parameter, ..., Parameter, str]
-            Instruction Form data structure
-
-        Returns
-        -------
-        str
-            Operand suffix for searching in data file
-        """
-        op_ext = []
-        operands = ''
-        if len(instr_form) > 2:
-            operands = '-'
-        for i in range(1, len(instr_form) - 1):
-            if isinstance(instr_form[i], Register) and instr_form[i].reg_type == 'GPR':
-                optmp = 'r' + str(instr_form[i].size)
-            elif isinstance(instr_form[i], MemAddr):
-                optmp = 'mem'
-            else:
-                optmp = str(instr_form[i]).lower()
-            op_ext.append(optmp)
-        operands += '_'.join(op_ext)
-        return operands
-
-
-if __name__ == '__main__':
-    print('Nothing to do.')
diff --git a/osaca/frontend.py b/osaca/frontend.py
new file mode 100755
index 0000000..6d37757
--- /dev/null
+++ b/osaca/frontend.py
@@ -0,0 +1,193 @@
+#!/usr/bin/env python3
+
+import os
+import re
+from datetime import datetime as dt
+
+from ruamel import yaml
+
+from osaca import utils
+from osaca.semantics import INSTR_FLAGS, KernelDG, SemanticsAppender
+
+
+class Frontend(object):
+    def __init__(self, filename='', arch=None, path_to_yaml=None):
+        self._filename = filename
+        if not arch and not path_to_yaml:
+            raise ValueError('Either arch or path_to_yaml required.')
+        if arch and path_to_yaml:
+            raise ValueError('Only one of arch and path_to_yaml is allowed.')
+        self._arch = arch
+        if arch:
+            self._arch = arch.lower()
+            with open(utils.find_file(self._arch + '.yml'), 'r') as f:
+                self._data = yaml.load(f, Loader=yaml.Loader)
+        elif path_to_yaml:
+            with open(path_to_yaml, 'r') as f:
+                self._data = yaml.load(f, Loader=yaml.Loader)
+
+    def _is_comment(self, instruction_form):
+        return instruction_form['comment'] is not None and instruction_form['instruction'] is None
+
+    def print_throughput_analysis(self, kernel, show_lineno=False, show_cmnts=True):
+        lineno_filler = '     ' if show_lineno else ''
+        port_len = self._get_max_port_len(kernel)
+        separator = '-' * sum([x + 3 for x in port_len]) + '-'
+        separator += '--' + len(str(kernel[-1]['line_number'])) * '-' if show_lineno else ''
+        col_sep = '|'
+        sep_list = self._get_separator_list(col_sep)
+        headline = 'Port pressure in cycles'
+        headline_str = '{{:^{}}}'.format(len(separator))
+
+        print('\n\nThroughput Analysis Report\n' + '--------------------------')
+        print(headline_str.format(headline))
+        print(lineno_filler + self._get_port_number_line(port_len))
+        print(separator)
+        for instruction_form in kernel:
+            line = '{:4d} {} {} {}'.format(
+                instruction_form['line_number'],
+                self._get_port_pressure(instruction_form['port_pressure'], port_len, sep_list),
+                self._get_flag_symbols(instruction_form['flags'])
+                if instruction_form['instruction'] is not None
+                else ' ',
+                instruction_form['line'].strip(),
+            )
+            line = line if show_lineno else col_sep + col_sep.join(line.split(col_sep)[1:])
+            if show_cmnts is False and self._is_comment(instruction_form):
+                continue
+            print(line)
+        print()
+        tp_sum = SemanticsAppender.get_throughput_sum(kernel)
+        print(lineno_filler + self._get_port_pressure(tp_sum, port_len, ' '))
+
+    def _get_separator_list(self, separator, separator_2=' '):
+        separator_list = []
+        for i in range(len(self._data['ports']) - 1):
+            match_1 = re.search(r'\d+', self._data['ports'][i])
+            match_2 = re.search(r'\d+', self._data['ports'][i + 1])
+            if match_1 is not None and match_2 is not None and match_1.group() == match_2.group():
+                separator_list.append(separator_2)
+            else:
+                separator_list.append(separator)
+        separator_list.append(separator)
+        return separator_list
+
+    def _get_flag_symbols(self, flag_obj):
+        string_result = ''
+        string_result += '*' if INSTR_FLAGS.NOT_BOUND in flag_obj else ''
+        string_result += 'X' if INSTR_FLAGS.TP_UNKWN in flag_obj else ''
+        string_result += 'P' if INSTR_FLAGS.HIDDEN_LD in flag_obj else ''
+        # TODO add other flags
+        string_result += ' ' if len(string_result) == 0 else ''
+        return string_result
+
+    def _get_port_pressure(self, ports, port_len, separator='|'):
+        if not isinstance(separator, list):
+            separator = [separator for x in ports]
+        string_result = '{} '.format(separator[-1])
+        for i in range(len(ports)):
+            if float(ports[i]) == 0.0:
+                string_result += port_len[i] * ' ' + ' {} '.format(separator[i])
+                continue
+            left_len = len(str(float(ports[i])).split('.')[0])
+            substr = '{:' + str(left_len) + '.' + str(max(port_len[i] - left_len - 1, 0)) + 'f}'
+            string_result += substr.format(ports[i]) + ' {} '.format(separator[i])
+        return string_result[:-1]
+
+    def _get_max_port_len(self, kernel):
+        port_len = [4 for x in self._data['ports']]
+        for instruction_form in kernel:
+            for i, port in enumerate(instruction_form['port_pressure']):
+                if len('{:.2f}'.format(port)) > port_len[i]:
+                    port_len[i] = len('{:.2f}'.format(port))
+        return port_len
+
+    def _get_port_number_line(self, port_len, separator='|'):
+        string_result = separator
+        separator_list = self._get_separator_list(separator, '-')
+        for i, length in enumerate(port_len):
+            substr = '{:^' + str(length + 2) + 's}'
+            string_result += substr.format(self._data['ports'][i]) + separator_list[i]
+        return string_result
+
+    def print_latency_analysis(self, cp_kernel, separator='|'):
+        print('\n\nLatency Analysis Report\n' + '-----------------------')
+        for instruction_form in cp_kernel:
+            print(
+                '{:4d} {} {:4.1f} {}{}{} {}'.format(
+                    instruction_form['line_number'],
+                    separator,
+                    instruction_form['latency_cp'],
+                    separator,
+                    'X' if INSTR_FLAGS.LT_UNKWN in instruction_form['flags'] else ' ',
+                    separator,
+                    instruction_form['line'],
+                )
+            )
+        print(
+            '\n{:4} {} {:4.1f}'.format(
+                ' ' * max([len(str(instr_form['line_number'])) for instr_form in cp_kernel]),
+                ' ' * len(separator),
+                sum([instr_form['latency_cp'] for instr_form in cp_kernel]),
+            )
+        )
+
+    def print_loopcarried_dependencies(self, dep_dict, separator='|'):
+        print(
+            '\n\nLoop-Carried Dependencies Analysis Report\n'
+            + '-----------------------------------------'
+        )
+        # TODO find a way to overcome padding for different tab-lengths
+        for dep in dep_dict:
+            print(
+                '{:4d} {} {:4.1f} {} {:36}{} {}'.format(
+                    dep,
+                    separator,
+                    sum(
+                        [
+                            instr_form['latency_lcd']
+                            for instr_form in dep_dict[dep]['dependencies']
+                        ]
+                    ),
+                    separator,
+                    dep_dict[dep]['root']['line'],
+                    separator,
+                    [node['line_number'] for node in dep_dict[dep]['dependencies']],
+                )
+            )
+
+    def _print_header_report(self):
+        version = 'v0.3'
+        adjust = 20
+        header = ''
+        header += 'Open Source Architecture Code Analyzer (OSACA) - {}\n'.format(version)
+        header += 'Analyzed file:'.ljust(adjust) + '{}\n'.format(self._filename)
+        header += 'Architecture:'.ljust(adjust) + '{}\n'.format(self._arch)
+        header += 'Timestamp:'.ljust(adjust) + '{}\n'.format(
+            dt.utcnow().strftime('%Y-%m-%d %H:%M:%S')
+        )
+        print(header)
+
+    def _print_symbol_map(self):
+        symbol_dict = {
+            INSTR_FLAGS.NOT_BOUND: 'Instruction micro-ops not bound to a port',
+            INSTR_FLAGS.TP_UNKWN: 'No throughput/latency information for this instruction in '
+            + 'data file',
+            INSTR_FLAGS.HIDDEN_LD: 'Throughput of LOAD operation can be hidden behind a past '
+            + 'or future STORE instruction',
+        }
+        symbol_map = ''
+        for flag in sorted(symbol_dict.keys()):
+            symbol_map += ' {} - {}\n'.format(self._get_flag_symbols([flag]), symbol_dict[flag])
+
+        print(symbol_map, end='')
+
+    def _print_port_binding_summary(self):
+        raise NotImplementedError
+
+    def print_full_analysis(self, kernel, kernel_dg: KernelDG, verbose=False):
+        self._print_header_report()
+        self._print_symbol_map()
+        self.print_throughput_analysis(kernel, show_lineno=True)
+        self.print_latency_analysis(kernel_dg.get_critical_path())
+        self.print_loopcarried_dependencies(kernel_dg.get_loopcarried_dependencies())
diff --git a/osaca/get_instr.py b/osaca/get_instr.py
deleted file mode 100755
index ecf4b1d..0000000
--- a/osaca/get_instr.py
+++ /dev/null
@@ -1,240 +0,0 @@
-#!/usr/bin/env python3
-import os
-import re
-import argparse
-
-from osaca.testcase import Testcase
-from osaca.param import Register, MemAddr, Parameter
-#from testcase import Testcase
-#from param import Register, MemAddr, Parameter
-
-
-class InstrExtractor(object):
-    filepaths = []
-    # Variables for checking lines
-    numSeps = 0
-    sem = 0
-    db = {}
-    sorted_db = []
-    lncnt = 1
-    cntChar = ''
-    first = True
-    # Constant variables
-    MARKER = r'//STARTLOOP'
-    ASM_LINE = re.compile(r'\s[0-9a-f]+[:]')
-
-    def __init__(self, filepath):
-        self.filepaths = filepath
-
-    def check_all(self):
-        for i in range(0, len(self.filepaths)):
-            self.extract_instr(self.filepaths[i])
-
-    def is_elffile(self, filepath):
-        if os.path.isfile(filepath):
-            with open(filepath) as f:
-                src = f.read()
-            if 'format elf64' in src:
-                return True
-            return False
-
-    def extract_instr(self, asm_file):
-        # Check if parameter is in the correct file format
-        if not self.is_elffile(asm_file):
-            print('Invalid argument')
-            return
-        # Open file
-        f = open(asm_file, 'r')
-        # Analyse code line by line and check the instructions
-        self.lncnt = 1
-        for line in f:
-            self.check_line(line)
-            self.lncnt += 1
-        f.close()
-
-    def check_line(self, line):
-        # Check if MARKER is in line and count the number of whitespaces if so
-        if self.MARKER in line:
-            # But first, check if high level code ist indented with whitespaces or tabs
-            if self.first:
-                self.set_counter_char(line)
-                self.first = False
-            self.numSeps = (re.split(self.MARKER, line)[0]).count(self.cntChar)
-            self.sem = 2
-        elif self.sem > 0:
-            # We're in the marked code snipped
-            # Check if the line is ASM code and - if not - check if we're still in the loop
-            match = re.search(self.ASM_LINE, line)
-            if match:
-                # Further analysis of instructions
-                # Check if there are commetns in line
-                if r'//' in line:
-                    return
-                self.check_instr(''.join(re.split(r'\t', line)[-1:]))
-            elif (re.split(r'\S', line)[0]).count(self.cntChar) <= self.numSeps:
-                # Not in the loop anymore - or yet - so we decrement the semaphore
-                self.sem = self.sem - 1
-
-    # Check if seperator is either tabulator or whitespace
-    def set_counter_char(self, line):
-        num_spaces = (re.split(self.MARKER, line)[0]).count(' ')
-        num_tabs = (re.split(self.MARKER, line)[0]).count('\t')
-        if num_spaces != 0 and num_tabs == 0:
-            self.cntChar = ' '
-        elif num_spaces == 0 and num_tabs != 0:
-            self.cntChar = '\t'
-        else:
-            err_msg = 'Indentation of code is only supported for whitespaces and tabs.'
-            raise NotImplementedError(err_msg)
-
-    def check_instr(self, instr):
-        # Check for strange clang padding bytes
-        while instr.startswith('data32'):
-            instr = instr[7:]
-        # Seperate mnemonic and operands
-        mnemonic = instr.split()[0]
-        params = ''.join(instr.split()[1:])
-        # Check if line is not only a byte
-        empty_byte = re.compile(r'[0-9a-f]{2}')
-        if re.match(empty_byte, mnemonic) and len(mnemonic) == 2:
-            return
-        # Check if there's one or more operand and store all in a list
-        param_list = self.flatten(self.separate_params(params))
-        op_list = list(param_list)
-        # Check operands and seperate them by IMMEDIATE (IMD), REGISTER (REG), MEMORY (MEM) or
-        # LABEL (LBL)
-        for i in range(len(param_list)):
-            op = param_list[i]
-            if len(op) <= 0:
-                op = Parameter('NONE')
-            elif op[0] == '$':
-                op = Parameter('IMD')
-            elif op[0] == '%' and '(' not in op:
-                j = len(op)
-                opmask = False
-                if '{' in op:
-                    j = op.index('{')
-                    opmask = True
-                op = Register(op[1:j], opmask)
-            elif '<' in op:
-                op = Parameter('LBL')
-            else:
-                op = MemAddr(op)
-            param_list[i] = str(op) if (type(op) is not Register) else str(op) + str(op.size)
-            op_list[i] = op
-        # Join mnemonic and operand(s) to an instruction form
-        if len(mnemonic) > 7:
-            tabs = '\t'
-        else:
-            tabs = '\t\t'
-        instr_form = mnemonic + tabs + ('  '.join(param_list))
-        # Check in data file for instruction form and increment the counter
-        if instr_form in self.db:
-            self.db[instr_form] = self.db[instr_form] + 1
-        else:
-            self.db[instr_form] = 1
-            # Create testcase for instruction form, since it is the first appearance of it
-            # Only create benchmark if no label (LBL) is part of the operands
-            do_bench = True
-            for par in op_list:
-                if str(par) == 'LBL' or str(par) == '':
-                    do_bench = False
-            if do_bench:
-                # Create testcase with reversed param list, due to the fact its intel syntax!
-                tc = Testcase(mnemonic, list(reversed(op_list)), '64')
-                tc.write_testcase()
-
-    def separate_params(self, params):
-        param_list = [params]
-        if ',' in params:
-            if ')' in params:
-                if params.index(')') < len(params) - 1 and params[params.index(')') + 1] == ',':
-                    i = params.index(')') + 1
-                elif params.index('(') < params.index(','):
-                    return param_list
-                else:
-                    i = params.index(',')
-            else:
-                i = params.index(',')
-            param_list = [params[:i], self.separate_params(params[i + 1:])]
-        elif '#' in params:
-            i = params.index('#')
-            param_list = [params[:i]]
-        return param_list
-
-    def sort_db(self):
-        self.sorted_db = sorted(self.db.items(), key=lambda x: x[1], reverse=True)
-
-    def print_sorted_db(self):
-        self.sort_db()
-        total = 0
-        print('Number of\tmnemonic')
-        print('calls\n')
-        for i in range(len(self.sorted_db)):
-            print(str(self.sorted_db[i][1]) + '\t\t' + self.sorted_db[i][0])
-            total += self.sorted_db[i][1]
-        print('\nCumulated number of instructions: ' + str(total))
-
-    def save_db(self):
-        file = open('.cnt_asm_ops.db', 'w')
-        for i in self.db.items():
-            file.write(i[0] + '\t' + str(i[1]) + '\n')
-        file.close()
-
-    def load_db(self):
-        try:
-            file = open('.cnt_asm_ops.db', 'r')
-        except FileNotFoundError:
-            print('no data file found in current directory')
-            return
-        for line in file:
-            mnemonic = line.split('\t')[0]
-            # Join mnemonic and operand(s) to an instruction form
-            if len(mnemonic) > 7:
-                tabs = '\t'
-                params = line.split('\t')[1]
-                num_calls = line.split('\t')[2][:-1]
-            else:
-                tabs = '\t\t'
-                params = line.split('\t')[2]
-                num_calls = line.split('\t')[3][:-1]
-            instr_form = mnemonic + tabs + params
-            self.db[instr_form] = int(num_calls)
-        file.close()
-
-    def flatten(self, l):
-        if not l:
-            return l
-        if isinstance(l[0], list):
-            return self.flatten(l[0]) + self.flatten(l[1:])
-        return l[:1] + self.flatten(l[1:])
-
-
-def main():
-    # Parse args
-    parser = argparse.ArgumentParser(description='Returns a list of all instruction forms in the '
-                                                 'given files sorted by their number of '
-                                                 'occurrences.')
-    parser.add_argument('-V', '--version', action='version', version='%(prog)s 0.2')
-    parser.add_argument('filepath', nargs='+', help='path to objdump(s)')
-    parser.add_argument('-l', '--load', dest='load', action='store_true',
-                        help='load data file before checking new files')
-    parser.add_argument('-s', '--store', dest='store', action='store_true',
-                        help='store data file before checking new files')
-
-    # Create object and store arguments as attribute
-    inp = parser.parse_args()
-    ie = InstrExtractor(inp.filepath)
-
-    # Do work
-    if inp.load:
-        ie.load_db()
-    ie.check_all()
-    ie.print_sorted_db()
-    if inp.store:
-        ie.save_db()
-
-
-# ---------main method----------
-if __name__ == '__main__':
-    main()
diff --git a/osaca/osaca.py b/osaca/osaca.py
index 1ae615d..22e2a3f 100755
--- a/osaca/osaca.py
+++ b/osaca/osaca.py
@@ -1,775 +1,29 @@
 #!/usr/bin/env python3
 
 import argparse
-import collections
-import filecmp
-import sys
-import os
 import io
+import os
 import re
-import subprocess
-from datetime import datetime
-from pprint import pprint
-
-import pandas as pd
-import numpy as np
-
-from osaca.param import Register, MemAddr, Parameter
-from osaca.eu_sched import Scheduler
-from osaca.testcase import Testcase
-
-#from param import Register, MemAddr, Parameter
-#from eu_sched import Scheduler
-#from testcase import Testcase
-
-
-DATA_DIR = os.path.expanduser('~') + '/.osaca/'
-MODULE_DATA_DIR = os.path.join((os.path.split(__file__)[0]), 'data')
-
-# Matches every variation of the IACA start marker
-IACA_START_MARKER = re.compile(r'\s*movl?[ \t]+\$(?:111|0x6f)[ \t]*,[ \t]*%ebx.*\n\s*'
-                               r'(?:\.byte[ \t]+100.*((,[ \t]*103.*((,[ \t]*144)|'
-                               r'(\n\s*\.byte[ \t]+144)))|'
-                               r'(\n\s*\.byte[ \t]+103.*((,[ \t]*144)|'
-                               r'(\n\s*\.byte[ \t]+144))))|(?:fs addr32 )?nop)')
-# Matches every variation of the IACA end marker
-IACA_END_MARKER = re.compile(r'\s*movl?[ \t]+\$(?:222|0x1f3)[ \t]*,[ \t]*%ebx.*\n\s*'
-                             r'(?:\.byte[ \t]+100.*((,[ \t]*103.*((,[ \t]*144)|'
-                             r'(\n\s*\.byte[ \t]+144)))|'
-                             r'(\n\s*\.byte[ \t]+103.*((,[ \t]*144)|'
-                             r'(\n\s*\.byte[ \t]+144))))|(?:fs addr32 )?nop)')
-
-
-def flatten(l):
-    """
-    Flatten a nested list of strings.
-
-    Parameters
-    ----------
-    l : [[...[str]]]
-        Nested list of strings
-
-    Returns
-    -------
-    [str]
-        List of strings
-    """
-    if not l:
-        return l
-    if isinstance(l[0], list):
-        return flatten(l[0]) + flatten(l[1:])
-    return l[:1] + flatten(l[1:])
-
-
-def get_assembly_from_binary(bin_path):
-    """
-    Disassemble binary with llvm-objdump and transform into a canonical from.
-
-    Replace jump and call target offsets with labels.
-    
-    :param bin_path: path to binary file to disassemble
-
-    :return assembly string
-    """
-    asm_lines = subprocess.run(
-        ['objdump', '-d', '--no-show-raw-insn', bin_path],
-        stdout=subprocess.PIPE,
-        stderr=subprocess.PIPE).stdout.decode('utf-8').split('\n')
-
-    asm = []
-
-    # Separate label, offsets and instructions
-    # Store offset with each label (thus iterate in reverse)
-    label_offsets = {}
-    for l in reversed(asm_lines):
-        m = re.match(r'^(?:(?P<label>[0-9a-zA-Z_\.]+):|'
-                     r'\s*(?P<offset>[0-9a-fA-F]+):(?:\s*(?P<instr>.*)))$', l)
-        if m:
-            d = m.groupdict()
-            if d['offset'] is not None:
-                d['offset'] = int(d['offset'], base=16)
-                last_offset = d['offset']
-            else:
-                label_offsets[d['label']] = last_offset
-
-            # insert at front to preserve order
-            asm.insert(0, d)
-
-    # Find all jump locations and replace with labels
-    new_labels = {}
-    for a in asm:
-        if a['instr'] is not None:
-            m = re.search(r'[\-]?[0-9a-fA-F]+ <(?P<label>[0-9a-zA-Z_\.]+)'
-                          r'(?:\+(?P<offset>0x[0-9a-fA-F]+))?>',
-                          a['instr'])
-            if m and m.group('label') in label_offsets:
-                target = label_offsets[m.group('label')]
-                label_name = m.group('label')
-                if m.group('offset') is not None:
-                    # Need to create new label at target + offset
-                    target += int(m.group('offset'), base=16)
-                    label_name += '_'+str(m.group('offset'))
-                    new_labels[label_name] = target
-
-                # replace reference with new name
-                a['instr'] = (a['instr'][:m.start()] +
-                              '{}'.format(label_name) +
-                              a['instr'][m.end():])
-
-    # Find instruction at target and insert label before
-    for label, target in new_labels.items():
-        for i, a in enumerate(asm):
-            if target == a['offset']:
-                break
-        asm.insert(i, {'label': label, 'offset': None, 'instr': None})
-
-    # Remove trailing suffixes (lqwb) from instructions
-    # FIXME this falsely removed b from jb and potentially others as well
-    for a in asm:
-        if a['instr'] is not None:
-            m = re.match(r'^(?P<instr>[^j][a-z0-9]+)[lqwb](?P<tail>\s+.+|$)', a['instr'])
-            if m:
-                a['instr'] = m.group('instr') + m.group('tail')
-
-    # Return instructions and labels in canonical assembly
-    assembly = ''
-    for a in asm:
-        if a['label'] is not None:
-            assembly += a['label'] + ':\n'
-        elif a['instr'] is not None:
-            assembly += a['instr'] + '\n'
-
-    # Replace all hexadecimals with decimals
-    m = True
-    while m:
-        m = re.search(r'0x[0-9a-fA-F]+', assembly)
-        if m:
-            assembly = assembly[:m.start()] + str(int(m.group(0), base=16)) + assembly[m.end():]
-
-    # Remove trailing ",1)" from offsets
-    assembly.replace(',1)', ')')
-
-    return assembly
-
-
-def create_sequences(end=101):
-    """
-    Create list of integers from 1 to end and list of their reciprocals.
-
-    Parameters
-    ----------
-    end : int
-        End value for list of integers (default 101)
-
-    Returns
-    -------
-    [int]
-        cyc_list of integers
-    [float]
-        reci_list of floats
-    """
-    cyc_list = []
-    reci_list = []
-    for i in range(1, end):
-        cyc_list.append(i)
-        reci_list.append(1 / i)
-    return cyc_list, reci_list
-
-
-def validate_val(clk_cyc, instr, is_tp, cyc_list, reci_list):
-    """
-    Validate given clock cycle clk_cyc and return rounded value in case of
-    success.
-
-    A succeeded validation means the clock cycle clk_cyc is only 5% higher or
-    lower than an integer value from cyc_list or - if clk_cyc is a throughput
-    value - 5% higher or lower than a reciprocal from the reci_list.
-
-    Parameters
-    ----------
-    clk_cyc : float
-        Clock cycle to validate
-    instr : str
-        Instruction for warning output
-    is_tp : bool
-        True if a throughput value is to check, False for a latency value
-    cyc_list : [int]
-        Cycle list for validating
-    reci_list : [float]
-        Reciprocal cycle list for validating
-
-    Returns
-    -------
-    float
-        Clock cycle, either rounded to an integer or its reciprocal or the
-        given clk_cyc parameter
-    """
-    column = 'LT'
-    if is_tp:
-        column = 'TP'
-    for i in range(0, len(cyc_list)):
-        if cyc_list[i] * 1.05 > float(clk_cyc) > cyc_list[i] * 0.95:
-            # Value is probably correct, so round it to the estimated value
-            return cyc_list[i]
-        # Check reciprocal only if it is a throughput value
-        elif is_tp and reci_list[i] * 1.05 > float(clk_cyc) > reci_list[i] * 0.95:
-            # Value is probably correct, so round it to the estimated value
-            return reci_list[i]
-    # No value close to an integer or its reciprocal found, we assume the
-    # measurement is incorrect
-    raise ValueError('Your measurement for {} ({}) is probably wrong. '
-                     'Please inspect your benchmark!'.format(instr, column))
-    return clk_cyc
-
-
-def include_ibench(arch, ibench_output):
-    """
-    Read ibench output and include it in the architecture specific csv file.
-    """
-    df = read_csv(arch)
-    # Create sequence of numbers and their reciprocals for validate the measurements
-    cyc_list, reci_list = create_sequences()
-
-    new_data = []
-    added_vals = 0
-    with open(ibench_output) as f:
-        source = f.readlines()
-    for line in source:
-        if 'Using frequency' in line or len(line) == 0:
-            continue
-        column = 'LT'
-        instr = line.split()[0][:-1]
-        if 'TP' in line:
-            # We found a command with a throughput value. Get instruction and the number of
-            # clock cycles and remove the '-TP' suffix.
-            column = 'TP'
-            instr = instr[:-3]
-        # Otherwise it is a latency value. Nothing to do.
-        clk_cyc = float(line.split()[1])
-        clk_cyc = validate_val(clk_cyc, instr, True if (column == 'TP') else False,
-                               cyc_list, reci_list)
-        val = -2
-        new = False
-        try:
-            entry = df.loc[lambda df, inst=instr: df.instr == inst, column]
-            val = entry.values[0]
-            # If val is -1 (= not filled with a valid value) add it immediately
-            if val == -1:
-                df.set_value(entry.index[0], column, clk_cyc)
-                added_vals += 1
-                continue
-        except IndexError:
-            # Instruction not in database yet --> add it
-            new = True
-            # First check if LT or TP value has already been added before
-            for i, item in enumerate(new_data):
-                if instr in item:
-                    if column == 'TP':
-                        new_data[i][1] = clk_cyc
-                    elif column == 'LT':
-                        new_data[i][2] = clk_cyc
-                    new = False
-                    break
-            if new and column == 'TP':
-                new_data.append([instr, clk_cyc, '-1', (-1,)])
-            elif new and column == 'LT':
-                new_data.append([instr, '-1', clk_cyc, (-1,)])
-            new = True
-            added_vals += 1
-        if not new and abs((val / np.float64(clk_cyc)) - 1) > 0.05:
-            raise ValueError(
-                "Different measurement for {} ({}): {}(old) vs. {}(new)\n"
-                "Please check for correctness "
-                "(no changes were made).".format(instr, column, val, clk_cyc))
-    # Now merge the DataFrames and write new csv file
-    df = df.append(pd.DataFrame(new_data, columns=['instr', 'TP', 'LT', 'ports']),
-                   ignore_index=True)
-    write_csv(arch, df)
-    return added_vals
-
-
-def extract_marked_section(assembly):
-    """
-    Return the assembly section marked with IACA markers.
-
-    Raise ValueError if none or only one marker was found.
-    """
-    m_start = re.search(IACA_START_MARKER, assembly)
-    m_end = re.search(IACA_END_MARKER, assembly)
-
-    if not m_start or not m_end:
-        raise ValueError("Could not find start and end markers.")
-
-    return assembly[m_start.end():m_end.start()]
-
-
-def strip_assembly(assembly):
-    """
-    Remove comments and unnecessary whitespaces from assembly.
-
-    :param assembly: assembly string
-    :return: assembly string without comments nor any unnecessary whitespaces
-    """
-    asm_lines = assembly.split('\n')
-
-    for i, line in enumerate(asm_lines):
-        # find and remove comment
-        c = line.find('#')
-        if c != -1:
-            line = line[:c]
-        # strip leading and trailing whitespaces
-        asm_lines[i] = line.strip()
-    # remove blank lines
-    asm_lines = [l for l in asm_lines if l]
-    return '\n'.join(asm_lines)
-
-
-# TODO replacement for instr_forms entries in OSACA
-# class InstructionForm:
-#     def __init__(self, mnemonic, parameters, line=None):
-#         self.mnemonic = mnemonic
-#         self.parameters = parameters
-#         self.line = line
-#
-#     @classmethod
-#     def from_assembly(cls, line):
-#         # Skip clang padding bytes
-#         while line.startswith('data32 '):
-#             line = line[7:]
-#
-#         line_split = line.split()
-#         mnemonic = line_split[0]
-#         if len(line_split) > 1:
-#             parameters = line_split[1:]
-#         else:
-#             parameters = None
-#
-#         return cls(mnemonic, parameters, line)
-#
-#     def __str__(self):
-#         return line
-#
-#     def __repr__(self):
-#         return '{}({!r}, {!r}, {!r})'.format(
-#             self.__class__.__name__, self.mnemonic, self.parameters, self.line)
-
-
-class OSACA(object):
-    """
-    A single OSACA analysis.
-    """
-    srcCode = None
-    tp_list = False
-    # Variables for checking lines
-    numSeps = 0
-    indentChar = ''
-    sem = 0
-
-    # Variables for creating output
-    longestInstr = 30
-    machine_readable = False
-
-    VALID_ARCHS = Scheduler.arch_dict
-
-    def __init__(self, arch, assembly, extract_with_markers=True):
-        """
-        Create and run analysis on assembly for architecture.
-
-        :param arch: architecture abbreviation
-        :param assembly: assembly code as string
-        :param extract_with_markers: if True, use markers to isolate relavent section
-        """
-        # Check architecture
-        if arch not in self.VALID_ARCHS:
-            raise ValueError("Invalid architecture ({!r}), must be one of {}.".format(
-                arch, self.VALID_ARCHS))
-        self.arch = arch
-        if extract_with_markers:
-            assembly = extract_marked_section(assembly)
-        self.assembly = strip_assembly(assembly).split('\n')
-
-        self.instr_forms = []
-        # Check if data files are already in usr dir, otherwise create them
-        if not os.path.isdir(os.path.join(DATA_DIR, 'data')):
-            #print('Copying files in user directory...', file=self.file_output, end='')
-            os.makedirs(os.path.join(DATA_DIR, 'data'))
-            subprocess.call(['cp', '-r',
-                             MODULE_DATA_DIR,
-                             DATA_DIR])
-            #print(' Done!', file=self.file_output)
-        else:
-            # Compare and warn if files in DATA_DIR are different
-            dircmp = filecmp.dircmp(os.path.join(DATA_DIR, 'data'), MODULE_DATA_DIR)
-            if dircmp.left_list != dircmp.same_files:
-                print("WARNING: data in {0} differs from {1}. Check or delete {1}.".format(
-                    MODULE_DATA_DIR,
-                    DATA_DIR
-                ), file=sys.stderr)
-
-        # Check for database for the chosen architecture
-        self.df = read_csv(arch)
-
-        # Run analysis and populate instr_forms
-        self.inspect()
-
-        # Create schedule
-        self.schedule = Scheduler(self.arch, self.instr_forms)
-
-    def inspect(self):
-        """
-        Run analysis.
-        """
-        for line in self.assembly:
-            # TODO potential replacement for instr_forms entries in OSACA
-            # InstructionForm.from_assembly(line)
-
-            # Ignore labels
-            if re.match(r'^[a-zA-Z0-9\_\.]+:$', line):
-                continue
-            # Ignore .loc
-            if re.match(r'^\.loc\s+', line):
-                continue
-            self.check_instr(line)
-
-    def check_instr(self, instr):
-        """
-        Inspect instruction for its parameters and add it to the instruction forms
-        pool instr_form.
-
-        Parameters
-        ----------
-        instr : str
-            Instruction as string
-        """
-        # Check for strange clang padding bytes
-        while instr.startswith('data32'):
-            instr = instr[7:]
-        # Separate mnemonic and operands
-        mnemonic = instr.split()[0]
-        params = instr.split()[1:]
-        # Check if line is not only a byte
-        empty_byte = re.compile(r'[0-9a-f]{2}')
-        if re.match(empty_byte, mnemonic) and len(mnemonic) == 2:
-            return
-        # Check if there's one or more operands and store all in a list
-        param_list = flatten(self._separate_params(params))
-        param_list_types = list(param_list)
-        # Check if line contains a directive and if so, add as a workaround with
-        # marker in mnemonic
-        directive = re.compile(r'^\.[a-zA-Z0-9]+$')
-        if re.match(directive, mnemonic):
-            instr = instr.rstrip()
-            instr_form = ['DIRECTIVE'] + list() + [instr]
-            self.instr_forms.append(instr_form)
-            return
-        # Check operands and separate them by IMMEDIATE (IMD), REGISTER (REG),
-        # MEMORY (MEM) or LABEL(LBL)
-        for i, op in enumerate(param_list):
-            if len(op) <= 0:
-                op = Parameter('NONE')
-            elif op[0] == '$':
-                op = Parameter('IMD')
-            elif op[0] == '%' and '(' not in op:
-                j = len(op)
-                opmask = False
-                if '{' in op:
-                    j = op.index('{')
-                    opmask = True
-                op = Register(op[1:j].strip(" ,"), opmask)
-            elif '<' in op or re.match(r'^([a-zA-Z\._]+[a-zA-Z0-9_\.]*)+$', op):
-                op = Parameter('LBL')
-            else:
-                op = MemAddr(op)
-            param_list[i] = str(op)
-            param_list_types[i] = op
-        # Add to list
-        instr = instr.rstrip()
-        if len(instr) > self.longestInstr:
-            self.longestInstr = len(instr)
-        instr_form = [mnemonic] + list(reversed(param_list_types)) + [instr]
-        self.instr_forms.append(instr_form)
-        # If flag is set, create testcase for instruction form
-        # Do this in reversed param list order, du to the fact it's intel syntax
-        # Only create benchmark if no label (LBL) is part of the operands
-        if 'LBL' in param_list or '' in param_list:
-            return
-        tc = Testcase(mnemonic, list(reversed(param_list_types)), '32')
-        # Only write a testcase if it not already exists or already in data file
-        writeTP, writeLT = tc.is_in_dir()
-        inDB = len(self.df.loc[lambda df: df.instr == tc.get_entryname()])
-        if inDB == 0:
-            tc.write_testcase(not writeTP, not writeLT)
-
-    def _separate_params(self, params):
-        """
-        Delete comments, separates parameters and return them as a list.
-
-        Parameters
-        ----------
-        params : str
-            Splitted line after mnemonic
-
-        Returns
-        -------
-        [[...[str]]]
-            Nested list of strings. The number of nest levels depend on the
-            number of parametes given.
-        """
-        param_list = [params]
-        if ',' in params:
-            if ')' in params:
-                if params.index(')') < len(params) - 1 and params[params.index(')') + 1] == ',':
-                    i = params.index(')') + 1
-                elif params.index('(') < params.index(','):
-                    return param_list
-                else:
-                    i = params.index(',')
-            else:
-                i = params.index(',')
-            param_list = [params[:i], self._separate_params(params[i + 1:])]
-        elif '#' in params:
-            i = params.index('#')
-            param_list = [params[:i]]
-        return param_list
-
-    def create_output(self, tp_list=False, pr_sched=True, machine_readable=False):
-        """
-        Creates output of analysed file including a time stamp.
-
-        Used to interface with Kerncraft.
-
-        Parameters
-        ----------
-        tp_list : bool
-            Boolean for indicating the need for the throughput list as output
-            (default False)
-        pr_sched : bool
-            Boolean for indicating the need for predicting a scheduling
-            (default True)
-
-        Returns
-        -------
-        str
-            OSACA output
-        """
-        # Check the output alignment depending on the longest instruction
-        if self.longestInstr > 70:
-            self.longestInstr = 70
-        horiz_line = self.create_horiz_sep()
-        # Write general information about the benchmark
-        output = '--{}\n| Architecture:\t\t{}\n|\n'.format(
-            horiz_line, self.arch)
-        if tp_list:
-            output += self.create_tp_list(horiz_line)
-        if pr_sched:
-            output += '\n\n'
-            sched_output, port_binding = self.schedule.new_schedule(machine_readable)
-            # if machine_readable, we're already done here
-            if machine_readable:
-                return sched_output
-            binding = self.schedule.get_port_binding(port_binding)
-            output += self.schedule.get_report_info() + '\n' + binding + '\n\n' + sched_output
-            block_tp = round(max(port_binding), 2)
-            output += 'Total number of estimated throughput: {}\n'.format(block_tp)
-
-        return output
-
-    def get_port_occupation_cycles(self):
-        """
-        Build dict with port names and cycles they are occupied during one block execution
-
-        Used to interface with Kerncraft.
-
-        :return: dictionary of ports and cycles
-        """
-        sched_output, port_binding = self.schedule.new_schedule()
-        return collections.OrderedDict([
-            (port_name, port_binding[i])
-            for i, port_name in enumerate(self.schedule.get_port_naming())])
-
-    def get_unmatched_instruction_ratio(self):
-        """
-        Calculate ratio of unmatched vs total instructions
-
-        :return: float
-        """
-        sched_output, port_binding = self.schedule.new_schedule()
-        return sched_output.count('| X ') / len(self.instr_forms)
-
-    def get_total_throughput(self):
-        """
-        Return total cycles estimated per block execution. Including (potential) penalties.
-
-        Used to interface with Kerncraft.
-
-        :return: float of cycles
-        """
-        return max(self.get_port_occupation_cycles().values())
-
-    def create_horiz_sep(self):
-        """
-        Calculate and return horizontal separator line.
-
-        Returns
-        -------
-        str
-            Horizontal separator line
-        """
-        return '-' * (self.longestInstr + 8)
-
-    def create_tp_list(self, horiz_line):
-        """
-        Create list of instruction forms with the proper throughput value.
-
-        Parameter
-        ---------
-        horiz_line : str
-            Calculated horizontal line for nice alignement
-
-        Returns
-        -------
-        str
-            Throughput list output for printing
-        """
-        warning = False
-        ws = ' ' * (len(horiz_line) - 23)
-
-        output = '\n| INSTRUCTION{}CLOCK CYCLES\n| {}\n|\n'.format(ws, horiz_line)
-        # Check for the throughput data in CSV
-        for elem in self.instr_forms:
-            op_ext = []
-            for i in range(1, len(elem) - 1):
-                if isinstance(elem[i], Register) and elem[i].reg_type == 'GPR':
-                    optmp = 'r' + str(elem[i].size)
-                elif isinstance(elem[i], MemAddr):
-                    optmp = 'mem'
-                else:
-                    optmp = str(elem[i]).lower()
-                op_ext.append(optmp)
-            operands = '_'.join(op_ext)
-            # Now look up the value in the dataframe
-            # Check if there is a stored throughput value in database
-            import warnings
-            warnings.filterwarnings("ignore", 'This pattern has match groups')
-            series = self.df['instr'].str.contains(elem[0] + '-' + operands)
-            if True in series.values:
-                # It's a match!
-                not_found = False
-                try:
-                    tp = self.df[self.df.instr == elem[0] + '-' + operands].TP.values[0]
-                except IndexError:
-                    # Something went wrong
-                    #print('Error while fetching data from data file', file=self.file_output)
-                    continue
-            # Did not found the exact instruction form.
-            # Try to find the instruction form for register operands only
-            else:
-                op_ext_regs = []
-                for operand in op_ext:
-                    try:
-                        # regTmp = Register(operand)
-                        # Create Register only to see if it is one
-                        Register(operand)
-                        op_ext_regs.append(True)
-                    except KeyError:
-                        op_ext_regs.append(False)
-                if True not in op_ext_regs:
-                    # No register in whole instr form. How can I find out what regsize we need?
-                    #print('Feature not included yet: ', end='', file=self.file_output)
-                    #print(elem[0] + ' for ' + operands, file=self.file_output)
-                    tp = 0
-                    warning = True
-                    num_whitespaces = self.longestInstr - len(elem[-1])
-                    ws = ' ' * num_whitespaces + '|  '
-                    n_f = ' ' * (5 - len(str(tp))) + '*'
-                    data = '| ' + elem[-1] + ws + str(tp) + n_f + '\n'
-                    output += data
-                    continue
-                if op_ext_regs[0] is False:
-                    # Instruction stores result in memory. Check for storing in register instead.
-                    if len(op_ext) > 1:
-                        if op_ext_regs[1] is True:
-                            op_ext[0] = op_ext[1]
-                        elif len(op_ext) > 2:
-                            if op_ext_regs[2] is True:
-                                op_ext[0] = op_ext[2]
-                if len(op_ext_regs) == 2 and op_ext_regs[1] is False:
-                    # Instruction loads value from memory and has only two operands. Check for
-                    # loading from register instead
-                    if op_ext_regs[0] is True:
-                        op_ext[1] = op_ext[0]
-                if len(op_ext_regs) == 3 and op_ext_regs[2] is False:
-                    # Instruction loads value from memory and has three operands. Check for loading
-                    # from register instead
-                    op_ext[2] = op_ext[0]
-                operands = '_'.join(op_ext)
-                # Check for register equivalent instruction
-                series = self.df['instr'].str.contains(elem[0] + '-' + operands)
-                if True in series.values:
-                    # It's a match!
-                    not_found = False
-                    try:
-                        tp = self.df[self.df.instr == elem[0] + '-' + operands].TP.values[0]
-                    except IndexError:
-                        # Something went wrong
-                        #print('Error while fetching data from data file', file=self.file_output)
-                        continue
-                # Did not found the register instruction form. Set warning and go on with
-                # throughput 0
-                else:
-                    tp = 0
-                    not_found = True
-                    warning = True
-            # Check the alignement again
-            num_whitespaces = self.longestInstr - len(elem[-1])
-            ws = ' ' * num_whitespaces + '|  '
-            n_f = ''
-            if not_found:
-                n_f = ' ' * (5 - len(str(tp))) + '*'
-            data = '| ' + elem[-1] + ws + '{:3.2f}'.format(tp) + n_f + '\n'
-            output += data
-        # Finally end the list of  throughput values
-        output += '| ' + horiz_line + '\n'
-        if warning:
-            output += ('\n\n* There was no throughput value found  for the specific instruction '
-                       'form.\n  Please create a testcase via the create_testcase-method or add a '
-                       'value manually.')
-        return output
-
-    def generate_text_output(self):
-        """Generate and return an output string showing the analysis results."""
-        output = self.create_output(self.tp_list, True, self.machine_readable)
-        return output
-
-
-def read_csv(arch):
-    """
-    Read architecture dependent CSV from data directory.
-
-    Returns
-    -------
-    DataFrame
-        CSV as DataFrame object
-    """
-    # curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1])
-    return pd.read_csv(DATA_DIR + 'data/' + arch.lower() + '_data.csv')
-
-
-def write_csv(arch, df):
-    """
-    Write architecture DataFrame as CSV into data directory.
-    """
-    # curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1])
-    csv = df.to_csv(index=False)
-    with open(DATA_DIR + 'data/' + arch.lower() + '_data.csv', 'w') as f:
-        f.write(csv)
+import sys
+from subprocess import call
+
+from osaca.db_interface import sanity_check, import_benchmark_output
+from osaca.frontend import Frontend
+from osaca.parser import BaseParser, ParserAArch64v81, ParserX86ATT
+from osaca.semantics import (KernelDG, MachineModel, SemanticsAppender,
+                             reduce_to_section)
+
+MODULE_DATA_DIR = os.path.join(
+    os.path.dirname(os.path.split(os.path.abspath(__file__))[0]), 'osaca/data/'
+)
+LOCAL_OSACA_DIR = os.path.join(os.path.expanduser('~') + '/.osaca/')
+DATA_DIR = os.path.join(LOCAL_OSACA_DIR, 'data/')
 
 
 # Stolen from pip
 def __read(*names, **kwargs):
     with io.open(
-            os.path.join(os.path.dirname(__file__), *names),
-            encoding=kwargs.get("encoding", "utf8")
+        os.path.join(os.path.dirname(__file__), *names), encoding=kwargs.get("encoding", "utf8")
     ) as fp:
         return fp.read()
 
@@ -783,71 +37,195 @@ def __find_version(*file_paths):
     raise RuntimeError('Unable to find version string.')
 
 
-def main():
-    # Parse args
-    parser = argparse.ArgumentParser(description='Analyzes a marked innermost loop snippet'
-                                                 'for a given architecture type and prints out the '
-                                                 'estimated average throughput.')
-    parser.add_argument('-V', '--version', action='version',
-                        version='%(prog)s ' + __find_version('__init__.py'))
-    parser.add_argument('--arch', type=str, required=True,
-                        help='define architecture (SNB, IVB, HSW, BDW, SKL, ZEN)')
-    parser.add_argument('--binary', '-b', action='store_true',
-                        help='binary file must be disassembled first')
-    parser.add_argument('--tp-list', action='store_true',
-                        help='print an additional list of all throughput values for the kernel')
-    parser.add_argument('-i', '--include-ibench', action='store_true',
-                       help='includes the given values in form of the output of ibench in the'
-                            'data file')
-    parser.add_argument('--insert-marker', '-m', action='store_true',
-                       help='try to find blocks probably corresponding to loops in assembly and'
-                            'insert IACA marker')
-    parser.add_argument('-l', '--list-output', dest='machine_readable', action='store_true',
-                        help='returns output as machine readable list of lists')
-    parser.add_argument('filepath', type=str, help='path to object (Binary, ASM, CSV)')
+def get_version():
+    return __find_version('__init__.py')
 
-    # Store args in global variables
-    args = parser.parse_args()
 
-    # --include-ibench acts stand alone, ignoring everything else
-    if args.include_ibench:
-        added_values = include_ibench(args.arch, args.filepath)
-        print("Sucessfully adde {} value(s)".format(added_values))
-        return
+def create_parser():
+    """Return argparse parser."""
+    # Create parser
+    parser = argparse.ArgumentParser(
+        description='Analyzes a marked innermost loop snippet for a given architecture type.',
+        epilog='For help, examples, documentation and bug reports go to:\nhttps://github.com'
+        '/RRZE-HPC/OSACA/ | License: AGPLv3',
+    )
 
-    if args.binary:
-        # Read disassembled binary
-        assembly = get_assembly_from_binary(args.filepath)
+    # Add arguments
+    parser.add_argument(
+        '-V', '--version', action='version', version='%(prog)s ' + __find_version('__init__.py')
+    )
+    parser.add_argument(
+        '--arch',
+        type=str,
+        help='Define architecture (SNB, IVB, HSW, BDW, SKX, CSX, ZEN1, TX2).',
+    )
+    parser.add_argument(
+        '--db-check',
+        dest='check_db',
+        action='store_true',
+        help='Run a sanity check on the by "--arch" specified database. The output depends '
+        'on the verbosity level.',
+    )
+    parser.add_argument(
+        '--import',
+        metavar='MICROBENCH',
+        dest='import_data',
+        type=str,
+        default=argparse.SUPPRESS,
+        help='Import a given microbenchmark output file into the corresponding architecture '
+        'instruction database. Define the type of microbenchmark either as "ibench", '
+        '"asmbench" or "uopsinfo".',
+    )
+    parser.add_argument(
+        '--insert-marker',
+        dest='insert_marker',
+        action='store_true',
+        help='Try to find assembly block containing the loop to analyse and insert byte '
+        'marker by using Kerncraft.',
+    )
+    parser.add_argument(
+        '--export-graph',
+        metavar='EXPORT_PATH',
+        dest='dotpath',
+        default=None,
+        type=str,
+        help='Output path for .dot file export. If "." is given, the file will be stored as '
+        '"./osaca_dg.dot"',
+    )
+    parser.add_argument(
+        '--verbose', '-v', action='count', default=0, help='Increases verbosity level.'
+    )
+    parser.add_argument(
+        'file', type=argparse.FileType('r'), help='Path to object (ASM or instruction file).'
+    )
+
+    return parser
+
+
+def check_arguments(args, parser):
+    """Check arguments passed by user that are not checked by argparse itself."""
+    supported_archs = ['SNB', 'IVB', 'HSW', 'BDW', 'SKX', 'CSX', 'ZEN1', 'TX2']
+    supported_import_files = ['ibench', 'asmbench', 'uopsinfo']
+
+    if 'arch' in args and args.arch.upper() not in supported_archs:
+        parser.error(
+            'Microarchitecture not supported. Please see --help for all valid architecture codes.'
+        )
+    if 'import_data' in args and args.import_data not in supported_import_files:
+        parser.error(
+            'Microbenchmark not supported for data import. Please see --help for all valid '
+            'microbenchmark codes.'
+        )
+
+
+def check_user_dir():
+    # Check if data files are already in usr dir, otherwise create them
+    if not os.path.isdir(DATA_DIR):
+        os.makedirs(DATA_DIR)
+    for f in os.listdir(MODULE_DATA_DIR):
+        if f.endswith('yml') and not os.path.exists(os.path.join(DATA_DIR, f)):
+            call(['cp', '-r', os.path.join(MODULE_DATA_DIR, f), DATA_DIR])
+
+
+def import_data(benchmark_type, arch, filepath):
+    if benchmark_type.lower() == 'ibench':
+        import_benchmark_output(arch, 'ibench', filepath)
     else:
-        # read assembly directly
-        with open(args.filepath) as f:
-            assembly = f.read()
-    
+        raise NotImplementedError('This benchmark input variant is not implemented yet.')
+
+
+def insert_byte_marker(args):
+    if MachineModel.get_isa_for_arch(args.arch) != 'x86':
+        print('Marker insertion for non-x86 is not yet supported by Kerncraft.', file=sys.stderr)
+        sys.exit(1)
+    try:
+        from kerncraft import iaca
+    except ImportError:
+        print(
+            "Module kerncraft not installed. Use 'pip install --user "
+            "kerncraft' for installation.\nFor more information see "
+            "https://github.com/RRZE-HPC/kerncraft",
+            file=sys.stderr,
+        )
+        sys.exit(1)
+
+    assembly = args.file.read()
+    unmarked_assembly = io.StringIO(assembly)
+    marked_assembly = io.StringIO()
+    iaca.iaca_instrumentation(
+        input_file=unmarked_assembly,
+        output_file=marked_assembly,
+        block_selection='manual',
+        pointer_increment='auto_with_manual_fallback',
+    )
+
+    marked_assembly.seek(0)
+    assembly = marked_assembly.read()
+    with open(args.file.name, 'w') as f:
+        f.write(assembly)
+
+
+def inspect(args):
+    arch = args.arch
+    isa = MachineModel.get_isa_for_arch(arch)
+    verbose = args.verbose
+
+    # Read file
+    code = args.file.read()
+    # Parse file
+    parser = get_asm_parser(arch)
+    parsed_code = parser.parse_file(code)
+
+    # Reduce to marked kernel and add semantics
+    kernel = reduce_to_section(parsed_code, isa)
+    machine_model = MachineModel(arch=arch)
+    semantics = SemanticsAppender(machine_model)
+    semantics.add_semantics(kernel)
+
+    # Create DiGrahps
+    kernel_graph = KernelDG(kernel, parser, machine_model)
+    if args.dotpath is not None:
+        kernel_graph.export_graph(args.dotpath if args.dotpath != '.' else None)
+    # Print analysis
+    frontend = Frontend(args.file.name, arch=arch)
+    frontend.print_full_analysis(kernel, kernel_graph, verbose=verbose)
+
+
+def run(args, output_file=sys.stdout):
+    if args.check_db:
+        # Sanity check on DB
+        verbose = True if args.verbose > 0 else False
+        sanity_check(args.arch, verbose=verbose)
+    if 'import_data' in args:
+        # Import microbench output file into DB
+        import_data(args.import_data, args.arch, args.file)
     if args.insert_marker:
-        if args.binary:
-            raise NotImplementedError("Marker insertion is unsupported for binary input files.")
-        # Insert markers using kerncraft
-        try:
-            from kerncraft import iaca
-        except ImportError:
-            print("Module kerncraft not installed. Use 'pip install --user "
-                  "kerncraft' for installation.\nFor more information see "
-                  "https://github.com/RRZE-HPC/kerncraft", file=sys.stderr)
-            sys.exit(1)
-        # Change due to newer kerncraft version (hopefully temporary)
-        # iaca.iaca_instrumentation(input_file=filepath, output_file=filepath,
-        #                          block_selection='manual', pointer_increment=1)
-        # TODO use io.StringIO here
-        unmarked_assembly = io.StringIO(assembly)
-        marked_assembly = io.StringIO()
-        iaca.iaca_instrumentation(input_file=unmarked_assembly, output_file=marked_assembly,
-                                  block_selection='manual', pointer_increment=1)
+        # Try to add IACA marker
+        insert_byte_marker(args)
+    else:
+        # Analyze kernel
+        inspect(args)
 
-        marked_assembly.seek(0)
-        assembly = marked_assembly.read()
 
-    osaca = OSACA(args.arch, assembly)
-    print(osaca.generate_text_output())
+# ---------------------------------------------------
+def get_asm_parser(arch) -> BaseParser:
+    isa = MachineModel.get_isa_for_arch(arch)
+    if isa == 'x86':
+        return ParserX86ATT()
+    elif isa == 'aarch64':
+        return ParserAArch64v81()
+
+
+# ---------------------------------------------------
+
+
+def main():
+    """Initialize and run command line interface."""
+    parser = create_parser()
+    args = parser.parse_args()
+    check_arguments(args, parser)
+    check_user_dir()
+    run(args)
 
 
 if __name__ == '__main__':
diff --git a/osaca/param.py b/osaca/param.py
deleted file mode 100755
index 871ef2f..0000000
--- a/osaca/param.py
+++ /dev/null
@@ -1,142 +0,0 @@
-#!/usr/bin/env python3
-import re
-
-
-class Parameter(object):
-    type_list = ['REG', 'MEM', 'IMD', 'LBL', 'NONE']
-
-    def __init__(self, ptype):
-        self.ptype = ptype.upper()
-        if self.ptype not in self.type_list:
-            raise NameError('Type not supported: '+ptype)
-
-    def __str__(self):
-        """Return string representation."""
-        if self.ptype == 'NONE':
-            return ''
-        else:
-            return self.ptype
-
-
-class MemAddr(Parameter):
-    segment_regs = ['CS', 'DS', 'SS', 'ES', 'FS', 'GS']
-    scales = [1, 2, 4, 8]
-
-    def __init__(self, name):
-        super().__init__("MEM")
-        name = name.strip(', \t')
-        self.offset = None
-        self.base = None
-        self.index = None
-        self.scale = None
-        
-        m = re.match(r'((?P<offset_hex>[x0-9a-fA-F]*)|(?P<offset_dec>\-?[0-9]*))'
-                     r'\((?P<base>[^,\)]+)(?:,\s*(?P<index>[^,\)]+)(?:,\s*'
-                     r'(?P<scale>[^,\)]+))?)?\)', name)
-
-        if not m:
-            raise ValueError('Type not supported: {!r}'.format(name))
-
-        self.offset = m.group('offset_dec') or m.group('offset_hex') or None
-        self.base = m.group('base') or None
-        self.index = m.group('index') or None
-        self.scale = m.group('scale') or None
-
-
-    def __str__(self):
-        """returns string representation"""
-        mem_format = 'MEM('
-        if self.offset:
-            mem_format += 'offset'
-        if self.base and not self.index:
-            mem_format += '(base)'
-        elif self.base and self.index and self.scale:
-            mem_format += '(base, index, scale)'
-        mem_format += ')'
-        return mem_format
-
-
-class Register(Parameter):
-    sizes = {
-        # General Purpose Registers
-        'AH': (8, 'GPR'), 'AL': (8, 'GPR'), 'BH': (8, 'GPR'), 'BL': (8, 'GPR'), 'CH': (8, 'GPR'),
-        'CL': (8, 'GPR'), 'DH': (8, 'GPR'), 'DL': (8, 'GPR'), 'BPL': (8, 'GPR'), 'SIL': (8, 'GPR'),
-        'DIL': (8, 'GPR'), 'SPL': (8, 'GPR'), 'R8L': (8, 'GPR'), 'R9L': (8, 'GPR'),
-        'R10L': (8, 'GPR'), 'R11L': (8, 'GPR'), 'R12L': (8, 'GPR'), 'R13L': (8, 'GPR'),
-        'R14L': (8, 'GPR'), 'R15L': (8, 'GPR'), 'R8B': (8, 'GPR'), 'R9B': (8, 'GPR'),
-        'R10B': (8, 'GPR'), 'R11B': (8, 'GPR'), 'R12B': (8, 'GPR'), 'R13B': (8, 'GPR'),
-        'R14B': (8, 'GPR'), 'R15B': (8, 'GPR'), 'AX': (16, 'GPR'), 'BC': (16, 'GPR'),
-        'CX': (16, 'GPR'), 'DX': (16, 'GPR'), 'BP': (16, 'GPR'), 'SI': (16, 'GPR'),
-        'DI': (16, 'GPR'), 'SP': (16, 'GPR'), 'R8W': (16, 'GPR'), 'R9W': (16, 'GPR'),
-        'R10W': (16, 'GPR'), 'R11W': (16, 'GPR'), 'R12W': (16, 'GPR'), 'R13W': (16, 'GPR'),
-        'R14W': (16, 'GPR'), 'R15W': (16, 'GPR'), 'EAX': (32, 'GPR'), 'EBX': (32, 'GPR'),
-        'ECX': (32, 'GPR'), 'EDX': (32, 'GPR'), 'EBP': (32, 'GPR'), 'ESI': (32, 'GPR'),
-        'EDI': (32, 'GPR'), 'ESP': (32, 'GPR'), 'R8D': (32, 'GPR'), 'R9D': (32, 'GPR'),
-        'R10D': (32, 'GPR'), 'R11D': (32, 'GPR'), 'R12D': (32, 'GPR'), 'R13D': (32, 'GPR'),
-        'R14D': (32, 'GPR'), 'R15D': (32, 'GPR'), 'RAX': (64, 'GPR'), 'RBX': (64, 'GPR'),
-        'RCX': (64, 'GPR'), 'RDX': (64, 'GPR'), 'RBP': (64, 'GPR'), 'RSI': (64, 'GPR'),
-        'RDI': (64, 'GPR'), 'RSP': (64, 'GPR'), 'R8': (64, 'GPR'), 'R9': (64, 'GPR'),
-        'R10': (64, 'GPR'), 'R11': (64, 'GPR'), 'R12': (64, 'GPR'), 'R13': (64, 'GPR'),
-        'R14': (64, 'GPR'), 'R15': (64, 'GPR'), 'CS': (16, 'GPR'), 'DS': (16, 'GPR'),
-        'SS': (16, 'GPR'), 'ES': (16, 'GPR'), 'FS': (16, 'GPR'), 'GS': (16, 'GPR'),
-        'EFLAGS': (32, 'GPR'), 'RFLAGS': (64, 'GPR'), 'EIP': (32, 'GPR'), 'RIP': (64, 'GPR'),
-        # FPU Registers
-        'ST0': (80, 'FPU'), 'ST1': (80, 'FPU'), 'ST2': (80, 'FPU'), 'ST3': (80, 'FPU'),
-        'ST4': (80, 'FPU'), 'ST5': (80, 'FPU'), 'ST6': (80, 'FPU'), 'ST7': (80, 'FPU'),
-        # MMX Registers
-        'MM0': (64, 'MMX'), 'MM1': (64, 'MMX'), 'MM2': (64, 'MMX'), 'MM3': (64, 'MMX'),
-        'MM4': (64, 'MMX'), 'MM5': (64, 'MMX'), 'MM6': (64, 'MMX'), 'MM7': (64, 'MMX'),
-        # XMM Registers
-        'XMM0': (128, 'XMM'), 'XMM1': (128, 'XMM'), 'XMM2': (128, 'XMM'), 'XMM3': (128, 'XMM'),
-        'XMM4': (128, 'XMM'), 'XMM5': (128, 'XMM'), 'XMM6': (128, 'XMM'), 'XMM7': (128, 'XMM'),
-        'XMM8': (128, 'XMM'), 'XMM9': (128, 'XMM'), 'XMM10': (128, 'XMM'), 'XMM11': (128, 'XMM'),
-        'XMM12': (128, 'XMM'), 'XMM13': (128, 'XMM'), 'XMM14': (128, 'XMM'), 'XMM15': (128, 'XMM'),
-        'XMM16': (128, 'XMM'), 'XMM17': (128, 'XMM'), 'XMM18': (128, 'XMM'), 'XMM19': (128, 'XMM'),
-        'XMM20': (128, 'XMM'), 'XMM21': (128, 'XMM'), 'XMM22': (128, 'XMM'), 'XMM23': (128, 'XMM'),
-        'XMM24': (128, 'XMM'), 'XMM25': (128, 'XMM'), 'XMM26': (128, 'XMM'), 'XMM27': (128, 'XMM'),
-        'XMM28': (128, 'XMM'), 'XMM29': (128, 'XMM'), 'XMM30': (128, 'XMM'), 'XMM31': (128, 'XMM'),
-        # YMM Registers
-        'YMM0': (256, 'YMM'), 'YMM1': (256, 'YMM'), 'YMM2': (256, 'YMM'), 'YMM3': (256, 'YMM'),
-        'YMM4': (256, 'YMM'), 'YMM5': (256, 'YMM'), 'YMM6': (256, 'YMM'), 'YMM7': (256, 'YMM'),
-        'YMM8': (256, 'YMM'), 'YMM9': (256, 'YMM'), 'YMM10': (256, 'YMM'), 'YMM11': (256, 'YMM'),
-        'YMM12': (256, 'YMM'), 'YMM13': (256, 'YMM'), 'YMM14': (256, 'YMM'), 'YMM15': (256, 'YMM'),
-        'YMM16': (256, 'YMM'), 'YMM17': (256, 'YMM'), 'YMM18': (256, 'YMM'), 'YMM19': (256, 'YMM'),
-        'YMM20': (256, 'YMM'), 'YMM21': (256, 'YMM'), 'YMM22': (256, 'YMM'), 'YMM23': (256, 'YMM'),
-        'YMM24': (256, 'YMM'), 'YMM25': (256, 'YMM'), 'YMM26': (256, 'YMM'), 'YMM27': (256, 'YMM'),
-        'YMM28': (256, 'YMM'), 'YMM29': (256, 'YMM'), 'YMM30': (256, 'YMM'), 'YMM31': (256, 'YMM'),
-        # ZMM Registers
-        'ZMM0': (512, 'ZMM'), 'ZMM1': (512, 'ZMM'), 'ZMM2': (512, 'ZMM'), 'ZMM3': (512, 'ZMM'),
-        'ZMM4': (512, 'ZMM'), 'ZMM5': (512, 'ZMM'), 'ZMM6': (512, 'ZMM'), 'ZMM7': (512, 'ZMM'),
-        'ZMM8': (512, 'ZMM'), 'ZMM9': (512, 'ZMM'), 'ZMM10': (512, 'ZMM'), 'ZMM11': (512, 'ZMM'),
-        'ZMM12': (512, 'ZMM'), 'ZMM13': (512, 'ZMM'), 'ZMM14': (512, 'ZMM'), 'ZMM15': (512, 'ZMM'),
-        'ZMM16': (512, 'ZMM'), 'ZMM17': (512, 'ZMM'), 'ZMM18': (512, 'ZMM'), 'ZMM19': (512, 'ZMM'),
-        'ZMM20': (512, 'ZMM'), 'ZMM21': (512, 'ZMM'), 'ZMM22': (512, 'ZMM'), 'ZMM23': (512, 'ZMM'),
-        'ZMM24': (512, 'ZMM'), 'ZMM25': (512, 'ZMM'), 'ZMM26': (512, 'ZMM'), 'ZMM27': (512, 'ZMM'),
-        'ZMM28': (512, 'ZMM'), 'ZMM29': (512, 'ZMM'), 'ZMM30': (512, 'ZMM'), 'ZMM31': (512, 'ZMM'),
-        # Opmask Register
-        'K0': (64, 'K'), 'K1': (64, 'K'), 'K2': (64, 'K'), 'K3': (64, 'K'), 'K4': (64, 'K'),
-        'K5': (64, 'K'), 'K6': (64, 'K'), 'K7': (64, 'K'),
-        # Bounds Registers
-        'BND0': (128, 'BND'), 'BND1': (128, 'BND'), 'BND2': (128, 'BND'), 'BND3': (128, 'BND'),
-        # Registers in gerneral
-        'R16': (16, 'GPR'), 'R32': (32, 'GPR'), 'R64': (64, 'GPR'), 'FPU': (80, 'FPU'),
-        'MMX': (64, 'MMX'), 'XMM': (128, 'XMM'), 'YMM': (256, 'YMM'), 'ZMM': (512, 'ZMM'),
-        'K': (64, 'K'), 'BND': (128, 'BND')
-    }
-
-    def __init__(self, name, mask=False):
-        super().__init__("REG")
-        self.name = name.upper()
-        self.mask = mask
-        if self.name in self.sizes:
-            self.size = self.sizes[self.name][0]
-            self.reg_type = self.sizes[self.name][1]
-        else:
-            raise NameError('Register name not in dictionary: {}'.format(self.name))
-
-    def __str__(self):
-        """Return string representation."""
-        opmask = ''
-        if self.mask:
-            opmask = '{opmask}'
-        return self.reg_type + opmask
diff --git a/osaca/parser/__init__.py b/osaca/parser/__init__.py
new file mode 100644
index 0000000..cce0143
--- /dev/null
+++ b/osaca/parser/__init__.py
@@ -0,0 +1,19 @@
+"""
+Collection of parsers supported by OSACA.
+
+Only the parser below will be exported, so please add new parsers to __all__.
+"""
+from .attr_dict import AttrDict
+from .base_parser import BaseParser
+from .parser_x86att import ParserX86ATT
+from .parser_AArch64v81 import ParserAArch64v81
+
+__all__ = ['AttrDict', 'BaseParser', 'ParserX86ATT', 'ParserAArch64v81', 'get_parser']
+
+def get_parser(isa):
+    if isa.lower() == 'x86':
+        return ParserX86ATT()
+    elif isa.lower() == 'aarch64':
+        return ParserAArch64v81()
+    else:
+        raise ValueError("Unknown ISA {!r}.".format(isa))
diff --git a/osaca/parser/attr_dict.py b/osaca/parser/attr_dict.py
new file mode 100755
index 0000000..0e04197
--- /dev/null
+++ b/osaca/parser/attr_dict.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python3
+
+
+class AttrDict(dict):
+    def __init__(self, *args, **kwargs):
+        super(AttrDict, self).__init__(*args, **kwargs)
+        self.__dict__ = self
+
+    @staticmethod
+    def convert_dict(dictionary):
+        if isinstance(dictionary, type(list())):
+            return [AttrDict.convert_dict(x) for x in dictionary]
+        if isinstance(dictionary, type(dict())):
+            for key in list(dictionary.keys()):
+                entry = dictionary[key]
+                if isinstance(entry, type(dict())) or isinstance(
+                    entry, type(AttrDict())
+                ):
+                    dictionary[key] = AttrDict.convert_dict(dictionary[key])
+                if isinstance(entry, type(list())):
+                    dictionary[key] = [AttrDict.convert_dict(x) for x in entry]
+            return AttrDict(dictionary)
+        return dictionary
diff --git a/osaca/parser/base_parser.py b/osaca/parser/base_parser.py
new file mode 100755
index 0000000..4aa423e
--- /dev/null
+++ b/osaca/parser/base_parser.py
@@ -0,0 +1,74 @@
+#!/usr/bin/env python3
+
+
+class BaseParser(object):
+    # Identifiers for operand types
+    COMMENT_ID = 'comment'
+    DIRECTIVE_ID = 'directive'
+    IMMEDIATE_ID = 'immediate'
+    LABEL_ID = 'label'
+    MEMORY_ID = 'memory'
+    REGISTER_ID = 'register'
+    INSTRUCTION_ID = 'instruction'
+    OPERANDS_ID = 'operands'
+
+    def __init__(self):
+        self.construct_parser()
+
+    def parse_file(self, file_content, start_line=0):
+        '''
+        Parse assembly file. This includes *not* extracting of the marked kernel and
+        the parsing of the instruction forms.
+
+        :param str file_content: assembly code
+        :param int start_line: offset, if first line in file_content is meant to be not 1
+        :return: list of instruction forms
+        '''
+        # Create instruction form list
+        asm_instructions = []
+        lines = file_content.split('\n')
+        for i, line in enumerate(lines):
+            if line.strip() == '':
+                continue
+            asm_instructions.append(self.parse_line(line, i + 1 + start_line))
+        return asm_instructions
+
+    def parse_line(self, line, line_number=None):
+        # Done in derived classes
+        raise NotImplementedError
+
+    def parse_instruction(self, instruction):
+        # Done in derived classes
+        raise NotImplementedError
+
+    def parse_register(self, register_string):
+        raise NotImplementedError
+
+    def is_gpr(self, register):
+        raise NotImplementedError
+
+    def is_vector_register(self, register):
+        raise NotImplementedError
+
+    def get_reg_type(self, register):
+        raise NotImplementedError
+
+    def construct_parser(self):
+        return
+        # raise NotImplementedError
+
+    ##################
+    # Helper functions
+    ##################
+
+    def process_operand(self, operand):
+        raise NotImplementedError
+
+    def get_full_reg_name(self, register):
+        raise NotImplementedError
+
+    def normalize_imd(self, imd):
+        raise NotImplementedError
+
+    def is_reg_dependend_of(self, reg_a, reg_b):
+        raise NotImplementedError
diff --git a/osaca/parser/parser_AArch64v81.py b/osaca/parser/parser_AArch64v81.py
new file mode 100755
index 0000000..8aa4585
--- /dev/null
+++ b/osaca/parser/parser_AArch64v81.py
@@ -0,0 +1,421 @@
+#!/usr/bin/env python3
+
+
+import pyparsing as pp
+
+from osaca.parser import AttrDict, BaseParser
+
+
+class ParserAArch64v81(BaseParser):
+    def __init__(self):
+        super().__init__()
+
+    def construct_parser(self):
+        # Comment
+        symbol_comment = '//'
+        self.comment = pp.Literal(symbol_comment) + pp.Group(
+            pp.ZeroOrMore(pp.Word(pp.printables))
+        ).setResultsName(self.COMMENT_ID)
+        # Define ARM assembly identifier
+        relocation = pp.Combine(pp.Literal(':') + pp.Word(pp.alphanums + '_') + pp.Literal(':'))
+        first = pp.Word(pp.alphas + '_.', exact=1)
+        rest = pp.Word(pp.alphanums + '_.')
+        identifier = pp.Group(
+            pp.Optional(relocation).setResultsName('relocation')
+            + pp.Combine(first + pp.Optional(rest)).setResultsName('name')
+        ).setResultsName('identifier')
+        # Label
+        self.label = pp.Group(
+            identifier.setResultsName('name') + pp.Literal(':') + pp.Optional(self.comment)
+        ).setResultsName(self.LABEL_ID)
+        # Directive
+        decimal_number = pp.Combine(
+            pp.Optional(pp.Literal('-')) + pp.Word(pp.nums)
+        ).setResultsName('value')
+        hex_number = pp.Combine(pp.Literal('0x') + pp.Word(pp.hexnums)).setResultsName('value')
+        directive_option = pp.Combine(
+            pp.Word(pp.alphas + '#@.%', exact=1)
+            + pp.Optional(pp.Word(pp.printables + ' ', excludeChars=','))
+        )
+        directive_parameter = (
+            pp.quotedString | directive_option | identifier | hex_number | decimal_number
+        )
+        commaSeparatedList = pp.delimitedList(pp.Optional(directive_parameter), delim=',')
+        self.directive = pp.Group(
+            pp.Literal('.')
+            + pp.Word(pp.alphanums + '_').setResultsName('name')
+            + commaSeparatedList.setResultsName('parameters')
+            + pp.Optional(self.comment)
+        ).setResultsName(self.DIRECTIVE_ID)
+
+        ##############################
+        # Instructions
+        # Mnemonic
+        # (?P<instr>[a-zA-Z][a-zA-Z0-9]*)(?P<setflg>S?)(P?<CC>.[a-zA-Z]{2})
+        mnemonic = pp.Word(pp.alphanums + '.').setResultsName('mnemonic')
+        # Immediate:
+        # int: ^-?[0-9]+ | hex: ^0x[0-9a-fA-F]+ | fp: ^[0-9]{1}.[0-9]+[eE]{1}[\+-]{1}[0-9]+[fF]?
+        symbol_immediate = '#'
+        mantissa = pp.Combine(
+            pp.Optional(pp.Literal('-')) + pp.Word(pp.nums) + pp.Literal('.') + pp.Word(pp.nums)
+        ).setResultsName('mantissa')
+        exponent = (
+            pp.CaselessLiteral('e')
+            + pp.Word('+-').setResultsName('e_sign')
+            + pp.Word(pp.nums).setResultsName('exponent')
+        )
+        float_ = pp.Group(
+            mantissa + pp.Optional(exponent) + pp.CaselessLiteral('f')
+        ).setResultsName('float')
+        double_ = pp.Group(mantissa + pp.Optional(exponent)).setResultsName('double')
+        immediate = pp.Group(
+            pp.Optional(pp.Literal(symbol_immediate))
+            + (hex_number ^ decimal_number ^ float_ ^ double_)
+            | (pp.Optional(pp.Literal(symbol_immediate)) + identifier)
+        ).setResultsName(self.IMMEDIATE_ID)
+        shift_op = (
+            pp.CaselessLiteral('lsl')
+            ^ pp.CaselessLiteral('lsr')
+            ^ pp.CaselessLiteral('asr')
+            ^ pp.CaselessLiteral('ror')
+            ^ pp.CaselessLiteral('sxtw')
+            ^ pp.CaselessLiteral('uxtw')
+        )
+        arith_immediate = pp.Group(
+            immediate.setResultsName('base_immediate')
+            + pp.Suppress(pp.Literal(','))
+            + shift_op.setResultsName('shift_op')
+            + immediate.setResultsName('shift')
+        ).setResultsName(self.IMMEDIATE_ID)
+        # Register:
+        # scalar: [XWBHSDQ][0-9]{1,2}  |   vector: V[0-9]{1,2}\.[12468]{1,2}[BHSD]()?
+        # define SP and ZR register aliases as regex, due to pyparsing does not support
+        # proper lookahead
+        alias_r31_sp = pp.Regex('(?P<prefix>[a-zA-Z])?(?P<name>(sp|SP))')
+        alias_r31_zr = pp.Regex('(?P<prefix>[a-zA-Z])?(?P<name>(zr|ZR))')
+        scalar = pp.Word(pp.alphas, exact=1).setResultsName('prefix') + pp.Word(
+            pp.nums
+        ).setResultsName('name')
+        index = pp.Literal('[') + pp.Word(pp.nums).setResultsName('index') + pp.Literal(']')
+        vector = (
+            pp.CaselessLiteral('v').setResultsName('prefix')
+            + pp.Word(pp.nums).setResultsName('name')
+            + pp.Literal('.')
+            + pp.Optional(pp.Word('12468')).setResultsName('lanes')
+            + pp.Word(pp.alphas, exact=1).setResultsName('shape')
+            + pp.Optional(index)
+        )
+        self.list_element = vector ^ scalar
+        register_list = (
+            pp.Literal('{')
+            + (
+                pp.delimitedList(pp.Combine(self.list_element), delim=',').setResultsName('list')
+                ^ pp.delimitedList(pp.Combine(self.list_element), delim='-').setResultsName(
+                    'range'
+                )
+            )
+            + pp.Literal('}')
+            + pp.Optional(index)
+        )
+        register = pp.Group(
+            (alias_r31_sp | alias_r31_zr | vector | scalar | register_list)
+            + pp.Optional(
+                pp.Suppress(pp.Literal(','))
+                + shift_op.setResultsName('shift_op')
+                + immediate.setResultsName('shift')
+            )
+        ).setResultsName(self.REGISTER_ID)
+        # Memory
+        register_index = register.setResultsName('index') + pp.Optional(
+            pp.Literal(',') + pp.Word(pp.alphas) + immediate.setResultsName('scale')
+        )
+        memory = pp.Group(
+            pp.Literal('[')
+            + pp.Optional(register.setResultsName('base'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(register_index ^ immediate.setResultsName('offset'))
+            + pp.Literal(']')
+            + pp.Optional(
+                pp.Literal('!').setResultsName('pre_indexed')
+                | (pp.Suppress(pp.Literal(',')) + immediate.setResultsName('post_indexed'))
+            )
+        ).setResultsName(self.MEMORY_ID)
+        prefetch_op = pp.Group(
+            pp.Group(pp.CaselessLiteral('PLD') ^ pp.CaselessLiteral('PST')).setResultsName('type')
+            + pp.Group(
+                pp.CaselessLiteral('L1') ^ pp.CaselessLiteral('L2') ^ pp.CaselessLiteral('L3')
+            ).setResultsName('target')
+            + pp.Group(pp.CaselessLiteral('KEEP') ^ pp.CaselessLiteral('STRM')).setResultsName(
+                'policy'
+            )
+        ).setResultsName('prfop')
+        # Combine to instruction form
+        operand_first = pp.Group(
+            register ^ (prefetch_op | immediate) ^ memory ^ arith_immediate ^ identifier
+        )
+        operand_rest = pp.Group((register ^ immediate ^ memory ^ arith_immediate) | identifier)
+        self.instruction_parser = (
+            mnemonic
+            + pp.Optional(operand_first.setResultsName('operand1'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(operand_rest.setResultsName('operand2'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(operand_rest.setResultsName('operand3'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(operand_rest.setResultsName('operand4'))
+            + pp.Optional(self.comment)
+        )
+
+    def parse_line(self, line, line_number=None):
+        """
+        Parse line and return instruction form.
+
+        :param str line: line of assembly code
+        :param int line_id: default None, identifier of instruction form
+        :return: parsed instruction form
+        """
+        instruction_form = AttrDict(
+            {
+                self.INSTRUCTION_ID: None,
+                self.OPERANDS_ID: None,
+                self.DIRECTIVE_ID: None,
+                self.COMMENT_ID: None,
+                self.LABEL_ID: None,
+                'line': line.strip(),
+                'line_number': line_number,
+            }
+        )
+        result = None
+
+        # 1. Parse comment
+        try:
+            result = self.process_operand(self.comment.parseString(line, parseAll=True).asDict())
+            result = AttrDict.convert_dict(result)
+            instruction_form[self.COMMENT_ID] = ' '.join(result[self.COMMENT_ID])
+        except pp.ParseException:
+            pass
+
+        # 2. Parse label
+        if result is None:
+            try:
+                result = self.process_operand(self.label.parseString(line, parseAll=True).asDict())
+                result = AttrDict.convert_dict(result)
+                instruction_form[self.LABEL_ID] = result[self.LABEL_ID].name
+                if self.COMMENT_ID in result[self.LABEL_ID]:
+                    instruction_form[self.COMMENT_ID] = ' '.join(
+                        result[self.LABEL_ID][self.COMMENT_ID]
+                    )
+            except pp.ParseException:
+                pass
+
+        # 3. Parse directive
+        if result is None:
+            try:
+                result = self.process_operand(
+                    self.directive.parseString(line, parseAll=True).asDict()
+                )
+                result = AttrDict.convert_dict(result)
+                instruction_form[self.DIRECTIVE_ID] = AttrDict(
+                    {
+                        'name': result[self.DIRECTIVE_ID].name,
+                        'parameters': result[self.DIRECTIVE_ID].parameters,
+                    }
+                )
+                if self.COMMENT_ID in result[self.DIRECTIVE_ID]:
+                    instruction_form[self.COMMENT_ID] = ' '.join(
+                        result[self.DIRECTIVE_ID][self.COMMENT_ID]
+                    )
+            except pp.ParseException:
+                pass
+
+        # 4. Parse instruction
+        if result is None:
+            try:
+                result = self.parse_instruction(line)
+            except (pp.ParseException, KeyError):
+                print(
+                    '\n\n*-*-*-*-*-*-*-*-*-*-\n{}: {}\n*-*-*-*-*-*-*-*-*-*-\n\n'.format(
+                        line_number, line
+                    )
+                )
+            instruction_form[self.INSTRUCTION_ID] = result[self.INSTRUCTION_ID]
+            instruction_form[self.OPERANDS_ID] = result[self.OPERANDS_ID]
+            instruction_form[self.COMMENT_ID] = result[self.COMMENT_ID]
+
+        return instruction_form
+
+    def parse_instruction(self, instruction):
+        result = self.instruction_parser.parseString(instruction, parseAll=True).asDict()
+        result = AttrDict.convert_dict(result)
+        operands = []
+        # Add operands to list
+        # Check first operand
+        if 'operand1' in result:
+            operands.append(self.process_operand(result['operand1']))
+        # Check second operand
+        if 'operand2' in result:
+            operands.append(self.process_operand(result['operand2']))
+        # Check third operand
+        if 'operand3' in result:
+            operands.append(self.process_operand(result['operand3']))
+        # Check fourth operand
+        if 'operand4' in result:
+            operands.append(self.process_operand(result['operand4']))
+
+        return_dict = AttrDict(
+            {
+                self.INSTRUCTION_ID: result.mnemonic,
+                self.OPERANDS_ID: operands,
+                self.COMMENT_ID: ' '.join(result[self.COMMENT_ID])
+                if self.COMMENT_ID in result
+                else None,
+            }
+        )
+        return return_dict
+
+    def process_operand(self, operand):
+        # structure memory addresses
+        if self.MEMORY_ID in operand:
+            return self.substitute_memory_address(operand[self.MEMORY_ID])
+        # structure register lists
+        if self.REGISTER_ID in operand and (
+            'list' in operand[self.REGISTER_ID] or 'range' in operand[self.REGISTER_ID]
+        ):
+            # TODO: discuss if ranges should be converted to lists
+            return self.substitute_register_list(operand[self.REGISTER_ID])
+        if self.REGISTER_ID in operand and operand[self.REGISTER_ID]['name'] == 'sp':
+            return self.substitute_sp_register(operand[self.REGISTER_ID])
+        # add value attribute to floating point immediates without exponent
+        if self.IMMEDIATE_ID in operand:
+            return self.substitute_immediate(operand[self.IMMEDIATE_ID])
+        if self.LABEL_ID in operand:
+            return self.substitute_label(operand[self.LABEL_ID])
+        return operand
+
+    def substitute_memory_address(self, memory_address):
+        # Remove unnecessarily created dictionary entries during parsing
+        offset = None if 'offset' not in memory_address else memory_address['offset']
+        base = None if 'base' not in memory_address else memory_address['base']
+        index = None if 'index' not in memory_address else memory_address['index']
+        scale = 1
+        if base is not None and 'name' in base and base['name'] == 'sp':
+            base['prefix'] = 'x'
+        if index is not None and 'name' in index and index['name'] == 'sp':
+            index['prefix'] = 'x'
+        valid_shift_ops = ['lsl', 'uxtw', 'sxtw']
+        if 'index' in memory_address:
+            if 'shift' in memory_address['index']:
+                if memory_address['index']['shift_op'].lower() in valid_shift_ops:
+                    scale = 2 ** int(memory_address['index']['shift']['value'])
+        new_dict = AttrDict({'offset': offset, 'base': base, 'index': index, 'scale': scale})
+        if 'pre_indexed' in memory_address:
+            new_dict['pre_indexed'] = True
+        if 'post_indexed' in memory_address:
+            new_dict['post_indexed'] = memory_address['post_indexed']
+        return AttrDict({self.MEMORY_ID: new_dict})
+
+    def substitute_sp_register(self, register):
+        reg = register
+        reg['prefix'] = 'x'
+        return AttrDict({self.REGISTER_ID: reg})
+
+    def substitute_register_list(self, register_list):
+        # Remove unnecessarily created dictionary entries during parsing
+        vlist = []
+        dict_name = ''
+        if 'list' in register_list:
+            dict_name = 'list'
+        if 'range' in register_list:
+            dict_name = 'range'
+        for v in register_list[dict_name]:
+            vlist.append(
+                AttrDict.convert_dict(self.list_element.parseString(v, parseAll=True).asDict())
+            )
+        index = None if 'index' not in register_list else register_list['index']
+        new_dict = AttrDict({dict_name: vlist, 'index': index})
+        return AttrDict({self.REGISTER_ID: new_dict})
+
+    def substitute_immediate(self, immediate):
+        dict_name = ''
+        if 'identifier' in immediate:
+            # actually an identifier, change declaration
+            return immediate
+        if 'value' in immediate:
+            # normal integer value, nothing to do
+            return AttrDict({self.IMMEDIATE_ID: immediate})
+        if 'base_immediate' in immediate:
+            # arithmetic immediate, nothing to do
+            return AttrDict({self.IMMEDIATE_ID: immediate})
+        if 'float' in immediate:
+            dict_name = 'float'
+        if 'double' in immediate:
+            dict_name = 'double'
+        if 'exponent' in immediate[dict_name]:
+            # nothing to do
+            return AttrDict({self.IMMEDIATE_ID: immediate})
+        else:
+            # change 'mantissa' key to 'value'
+            return AttrDict(
+                {self.IMMEDIATE_ID: AttrDict({'value': immediate[dict_name]['mantissa']})}
+            )
+
+    def substitute_label(self, label):
+        # remove duplicated 'name' level due to identifier
+        label['name'] = label['name']['name']
+        return AttrDict({self.LABEL_ID: label})
+
+    def get_full_reg_name(self, register):
+        if 'lanes' in register:
+            return (
+                register['prefix']
+                + str(register['name'])
+                + '.'
+                + str(register['lanes'])
+                + register['shape']
+            )
+        return register['prefix'] + str(register['name'])
+
+    def normalize_imd(self, imd):
+        if 'value' in imd:
+            if imd['value'].lower().startswith('0x'):
+                # hex, return decimal
+                return int(imd['value'], 16)
+            return int(imd['value'], 10)
+        elif 'float' in imd:
+            return self.ieee_to_int(imd['float'])
+        elif 'double' in imd:
+            return self.ieee_to_int(imd['double'])
+        # identifier
+        return imd
+
+    def ieee_to_int(self, ieee_val):
+        exponent = int(ieee_val['exponent'], 10)
+        if ieee_val['e_sign'] == '-':
+            exponent *= -1
+        return float(ieee_val['mantissa']) * (10 ** exponent)
+
+    def parse_register(self, register_string):
+        raise NotImplementedError
+
+    def is_gpr(self, register):
+        if register['prefix'] in 'wx':
+            return True
+        return False
+
+    def is_vector_register(self, register):
+        if register['prefix'] in 'bhsdqv':
+            return True
+        return False
+
+    def is_reg_dependend_of(self, reg_a, reg_b):
+        prefixes_gpr = 'wx'
+        prefixes_vec = 'bhsdqv'
+        if reg_a['name'] == reg_b['name']:
+            if reg_a['prefix'].lower() in prefixes_gpr and reg_b['prefix'].lower() in prefixes_gpr:
+                return True
+            if reg_a['prefix'].lower() in prefixes_vec and reg_b['prefix'].lower() in prefixes_vec:
+                return True
+        return False
+
+    def get_reg_type(self, register):
+        return register['prefix']
diff --git a/osaca/parser/parser_x86att.py b/osaca/parser/parser_x86att.py
new file mode 100755
index 0000000..15c0da1
--- /dev/null
+++ b/osaca/parser/parser_x86att.py
@@ -0,0 +1,328 @@
+#!/usr/bin/env python3
+
+import pyparsing as pp
+
+from osaca.parser import AttrDict, BaseParser
+
+
+class ParserX86ATT(BaseParser):
+    def __init__(self):
+        super().__init__()
+
+    def construct_parser(self):
+        decimal_number = pp.Combine(
+            pp.Optional(pp.Literal('-')) + pp.Word(pp.nums)
+        ).setResultsName('value')
+        hex_number = pp.Combine(pp.Literal('0x') + pp.Word(pp.hexnums)).setResultsName('value')
+        # Comment
+        symbol_comment = '#'
+        self.comment = pp.Literal(symbol_comment) + pp.Group(
+            pp.ZeroOrMore(pp.Word(pp.printables))
+        ).setResultsName(self.COMMENT_ID)
+        # Define x86 assembly identifier
+        id_offset = pp.Word(pp.nums) + pp.Suppress(pp.Literal('+'))
+        first = pp.Word(pp.alphas + '_.', exact=1)
+        rest = pp.Word(pp.alphanums + '$_.')
+        identifier = pp.Group(
+            pp.Optional(id_offset).setResultsName('offset')
+            + pp.Combine(first + pp.Optional(rest)).setResultsName('name')
+        ).setResultsName('identifier')
+        # Label
+        self.label = pp.Group(
+            identifier.setResultsName('name') + pp.Literal(':') + pp.Optional(self.comment)
+        ).setResultsName(self.LABEL_ID)
+        # Register: pp.Regex('^%[0-9a-zA-Z]+,?')
+        self.register = pp.Group(
+            pp.Literal('%')
+            + pp.Word(pp.alphanums).setResultsName('name')
+            + pp.Optional(
+                pp.Literal('{')
+                + pp.Literal('%')
+                + pp.Word(pp.alphanums).setResultsName('mask')
+                + pp.Literal('}')
+            )
+        ).setResultsName(self.REGISTER_ID)
+        # Immediate: pp.Regex('^\$(-?[0-9]+)|(0x[0-9a-fA-F]+),?')
+        symbol_immediate = '$'
+        immediate = pp.Group(
+            pp.Literal(symbol_immediate) + (hex_number | decimal_number | identifier)
+        ).setResultsName(self.IMMEDIATE_ID)
+        # Memory: offset(base, index, scale)
+        offset = pp.Group(identifier | hex_number | decimal_number).setResultsName(
+            self.IMMEDIATE_ID
+        )
+        scale = pp.Word('1248', exact=1)
+        memory = pp.Group(
+            pp.Optional(offset.setResultsName('offset'))
+            + pp.Literal('(')
+            + pp.Optional(self.register.setResultsName('base'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(self.register.setResultsName('index'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(scale.setResultsName('scale'))
+            + pp.Literal(')')
+        ).setResultsName(self.MEMORY_ID)
+
+        # Directive
+        directive_option = pp.Combine(
+            pp.Word('#@.', exact=1) + pp.Word(pp.printables, excludeChars=',')
+        )
+        directive_parameter = (pp.quotedString | directive_option | identifier | hex_number |
+                               decimal_number | self.register
+        )
+        commaSeparatedList = pp.delimitedList(pp.Optional(directive_parameter), delim=',')
+        self.directive = pp.Group(
+            pp.Literal('.')
+            + pp.Word(pp.alphanums + '_').setResultsName('name')
+            + commaSeparatedList.setResultsName('parameters')
+            + pp.Optional(self.comment)
+        ).setResultsName(self.DIRECTIVE_ID)
+
+        # Instructions
+        # Mnemonic
+        mnemonic = pp.ZeroOrMore(pp.Literal('data16') | pp.Literal('data32')) + pp.Word(
+            pp.alphanums
+        ).setResultsName('mnemonic')
+        # Combine to instruction form
+        operand_first = pp.Group(self.register ^ immediate ^ memory ^ identifier)
+        operand_rest = pp.Group(self.register ^ immediate ^ memory)
+        self.instruction_parser = (
+            mnemonic
+            + pp.Optional(operand_first.setResultsName('operand1'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(operand_rest.setResultsName('operand2'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(operand_rest.setResultsName('operand3'))
+            + pp.Optional(pp.Suppress(pp.Literal(',')))
+            + pp.Optional(operand_rest.setResultsName('operand4'))
+            + pp.Optional(self.comment)
+        )
+
+    def parse_register(self, register_string):
+        try:
+            return self.process_operand(
+                self.register.parseString(register_string, parseAll=True).asDict()
+            )
+        except pp.ParseException:
+            return None
+
+    def parse_line(self, line, line_number=None):
+        """
+        Parse line and return instruction form.
+
+        :param str line: line of assembly code
+        :param int line_id: default None, identifier of instruction form
+        :return: parsed instruction form
+        """
+        instruction_form = AttrDict(
+            {
+                self.INSTRUCTION_ID: None,
+                self.OPERANDS_ID: None,
+                self.DIRECTIVE_ID: None,
+                self.COMMENT_ID: None,
+                self.LABEL_ID: None,
+                'line': line.strip(),
+                'line_number': line_number,
+            }
+        )
+        result = None
+
+        # 1. Parse comment
+        try:
+            result = self.process_operand(self.comment.parseString(line, parseAll=True).asDict())
+            result = AttrDict.convert_dict(result)
+            instruction_form[self.COMMENT_ID] = ' '.join(result[self.COMMENT_ID])
+        except pp.ParseException:
+            pass
+
+        # 2. Parse label
+        if result is None:
+            try:
+                result = self.process_operand(self.label.parseString(line, parseAll=True).asDict())
+                result = AttrDict.convert_dict(result)
+                instruction_form[self.LABEL_ID] = result[self.LABEL_ID]['name']
+                if self.COMMENT_ID in result[self.LABEL_ID]:
+                    instruction_form[self.COMMENT_ID] = ' '.join(
+                        result[self.LABEL_ID][self.COMMENT_ID]
+                    )
+            except pp.ParseException:
+                pass
+
+        # 3. Parse directive
+        if result is None:
+            try:
+                result = self.process_operand(
+                    self.directive.parseString(line, parseAll=True).asDict()
+                )
+                result = AttrDict.convert_dict(result)
+                instruction_form[self.DIRECTIVE_ID] = AttrDict(
+                    {
+                        'name': result[self.DIRECTIVE_ID]['name'],
+                        'parameters': result[self.DIRECTIVE_ID]['parameters'],
+                    }
+                )
+                if self.COMMENT_ID in result[self.DIRECTIVE_ID]:
+                    instruction_form[self.COMMENT_ID] = ' '.join(
+                        result[self.DIRECTIVE_ID][self.COMMENT_ID]
+                    )
+            except pp.ParseException:
+                pass
+
+        # 4. Parse instruction
+        if result is None:
+            try:
+                result = self.parse_instruction(line)
+            except pp.ParseException as e:
+                raise ValueError('Could not parse instruction on line {}: {!r}'.format(
+                    line_number, line))
+            instruction_form[self.INSTRUCTION_ID] = result[self.INSTRUCTION_ID]
+            instruction_form[self.OPERANDS_ID] = result[self.OPERANDS_ID]
+            instruction_form[self.COMMENT_ID] = result[self.COMMENT_ID]
+
+        return instruction_form
+
+    def parse_instruction(self, instruction):
+        result = self.instruction_parser.parseString(instruction, parseAll=True).asDict()
+        result = AttrDict.convert_dict(result)
+        operands = []
+        # Add operands to list
+        # Check first operand
+        if 'operand1' in result:
+            operands.append(self.process_operand(result['operand1']))
+        # Check second operand
+        if 'operand2' in result:
+            operands.append(self.process_operand(result['operand2']))
+        # Check third operand
+        if 'operand3' in result:
+            operands.append(self.process_operand(result['operand3']))
+        # Check fourth operand
+        if 'operand4' in result:
+            operands.append(self.process_operand(result['operand4']))
+        return_dict = AttrDict(
+            {
+                self.INSTRUCTION_ID: result['mnemonic'],
+                self.OPERANDS_ID: operands,
+                self.COMMENT_ID:
+                    ' '.join(result[self.COMMENT_ID]) if self.COMMENT_ID in result else None,
+            }
+        )
+        return return_dict
+
+    def process_operand(self, operand):
+        # For the moment, only used to structure memory addresses
+        if self.MEMORY_ID in operand:
+            return self.substitute_memory_address(operand[self.MEMORY_ID])
+        if self.IMMEDIATE_ID in operand:
+            return self.substitue_immediate(operand[self.IMMEDIATE_ID])
+        if self.LABEL_ID in operand:
+            return self.substitute_label(operand[self.LABEL_ID])
+        return operand
+
+    def substitute_memory_address(self, memory_address):
+        # Remove unecessarily created dictionary entries during memory address parsing
+        offset = None if 'offset' not in memory_address else memory_address['offset']
+        base = None if 'base' not in memory_address else memory_address['base']
+        index = None if 'index' not in memory_address else memory_address['index']
+        scale = 1 if 'scale' not in memory_address else int(memory_address['scale'])
+        new_dict = AttrDict({'offset': offset, 'base': base, 'index': index, 'scale': scale})
+        return AttrDict({self.MEMORY_ID: new_dict})
+
+    def substitute_label(self, label):
+        # remove duplicated 'name' level due to identifier
+        label['name'] = label['name']['name']
+        return AttrDict({self.LABEL_ID: label})
+
+    def substitue_immediate(self, immediate):
+        if 'identifier' in immediate:
+            # actually an identifier, change declaration
+            return immediate
+        # otherwise nothing to do
+        return AttrDict({self.IMMEDIATE_ID: immediate})
+
+    def get_full_reg_name(self, register):
+        # nothing to do
+        return register['name']
+
+    def normalize_imd(self, imd):
+        if 'value' in imd:
+            if imd['value'].lower().startswith('0x'):
+                # hex, return decimal
+                return int(imd['value'], 16)
+            return int(imd['value'], 10)
+        # identifier
+        return imd
+
+    def is_reg_dependend_of(self, reg_a, reg_b):
+        # Check if they are the same registers
+        if reg_a.name == reg_b.name:
+            return True
+        # Check vector registers first
+        if self.is_vector_register(reg_a):
+            if self.is_vector_register(reg_b):
+                if reg_a.name[1:] == reg_b.name[1:]:
+                    # Registers in the same vector space
+                    return True
+            return False
+        # Check basic GPRs
+        a_dep = ['RAX', 'EAX', 'AX', 'AH', 'AL']
+        b_dep = ['RBX', 'EBX', 'BX', 'BH', 'BL']
+        c_dep = ['RCX', 'ECX', 'CX', 'CH', 'CL']
+        d_dep = ['RDX', 'EDX', 'DX', 'DH', 'DL']
+        sp_dep = ['RSP', 'ESP', 'SP', 'SPL']
+        src_dep = ['RSI', 'ESI', 'SI', 'SIL']
+        dst_dep = ['RDI', 'EDI', 'DI', 'DIL']
+        basic_gprs = [a_dep, b_dep, c_dep, d_dep, sp_dep, src_dep, dst_dep]
+        if self.is_basic_gpr(reg_a):
+            if self.is_basic_gpr(reg_b):
+                for dep_group in basic_gprs:
+                    if reg_a['name'].upper() in dep_group:
+                        if reg_b['name'].upper() in dep_group:
+                            return True
+            return False
+        # Check other GPRs
+        gpr_parser = (
+            pp.CaselessLiteral('R')
+            + pp.Word(pp.nums).setResultsName('id')
+            + pp.Optional(pp.Word('dwbDWB', exact=1))
+        )
+        try:
+            id_a = gpr_parser.parseString(reg_a['name'], parseAll=True).asDict()['id']
+            id_b = gpr_parser.parseString(reg_b['name'], parseAll=True).asDict()['id']
+            if id_a == id_b:
+                return True
+        except pp.ParseException:
+            return False
+        # No dependencies
+        return False
+
+    def is_basic_gpr(self, register):
+        if any(char.isdigit() for char in register['name']):
+            return False
+        return True
+
+    def is_gpr(self, register):
+        gpr_parser = (
+            pp.CaselessLiteral('R')
+            + pp.Word(pp.nums).setResultsName('id')
+            + pp.Optional(pp.Word('dwbDWB', exact=1))
+        )
+        if self.is_basic_gpr(register):
+            return True
+        else:
+            try:
+                gpr_parser.parseString(register['name'], parseAll=True)
+                return True
+            except pp.ParseException:
+                return False
+
+    def is_vector_register(self, register):
+        if len(register['name']) > 2 and register['name'][1:3].lower() == 'mm':
+            return True
+        return False
+
+    def get_reg_type(self, register):
+        if self.is_gpr(register):
+            return 'gpr'
+        elif self.is_vector_register(register):
+            return register['name'][:3].lower()
+        raise ValueError
diff --git a/osaca/semantics/__init__.py b/osaca/semantics/__init__.py
new file mode 100644
index 0000000..167cef1
--- /dev/null
+++ b/osaca/semantics/__init__.py
@@ -0,0 +1,11 @@
+"""
+Tools for semantic analysis of parser result.
+
+Only the classes below will be exported, so please add new semantic tools to __all__.
+"""
+from .hw_model import MachineModel
+from .kernel_dg import KernelDG
+from .marker_utils import reduce_to_section
+from .semantics_appender import SemanticsAppender, INSTR_FLAGS
+
+__all__ = ['MachineModel', 'KernelDG', 'reduce_to_section', 'SemanticsAppender', 'INSTR_FLAGS']
diff --git a/osaca/semantics/hw_model.py b/osaca/semantics/hw_model.py
new file mode 100755
index 0000000..60f5dc7
--- /dev/null
+++ b/osaca/semantics/hw_model.py
@@ -0,0 +1,404 @@
+#!/usr/bin/env python3
+
+import re
+from copy import deepcopy
+from itertools import product
+
+import ruamel.yaml
+from ruamel.yaml.compat import StringIO
+
+from osaca import __version__, utils
+from osaca.parser import ParserX86ATT
+
+
+class MachineModel(object):
+    def __init__(self, arch=None, path_to_yaml=None, isa=None):
+        if not arch and not path_to_yaml:
+            if not isa:
+                raise ValueError('One of arch, path_to_yaml and isa must be specified')
+            self._data = {
+                'osaca_version': str(__version__),
+                'micro_architecture': None,
+                'arch_code': None,
+                'isa': isa,
+                'ROB_size': None,
+                'retired_uOps_per_cycle': None,
+                'scheduler_size': None,
+                'hidden_loads': None,
+                'load_latency': {},
+                'load_throughput': [
+                    {'base': b, 'index': i, 'offset': o, 'scale': s, 'port_pressure': []}
+                    for b, i, o, s in product(['gpr'], ['gpr', None], ['imd', None], [1, 8])
+                ],
+                'ports': [],
+                'port_model_scheme': None,
+                'instruction_forms': [],
+            }
+        else:
+            if arch and path_to_yaml:
+                raise ValueError('Only one of arch and path_to_yaml is allowed.')
+            self._path = path_to_yaml
+            self._arch = arch
+            yaml = self._create_yaml_object()
+            if arch:
+                self._arch = arch.lower()
+                with open(utils.find_file(self._arch + '.yml'), 'r') as f:
+                    self._data = yaml.load(f)
+            elif path_to_yaml:
+                with open(self._path, 'r') as f:
+                    self._data = yaml.load(f)
+
+    def __getitem__(self, key):
+        """Return configuration entry."""
+        return self._data[key]
+
+    def __contains__(self, key):
+        """Return true if configuration key is present."""
+        return key in self._data
+
+    ######################################################
+
+    def get_instruction(self, name, operands):
+        """Find and return instruction data from name and operands."""
+        if name is None:
+            return None
+        try:
+            return next(
+                instruction_form
+                for instruction_form in self._data['instruction_forms']
+                if instruction_form['name'].upper() == name.upper()
+                and self._match_operands(instruction_form['operands'], operands)
+            )
+        except StopIteration:
+            return None
+        except TypeError as e:
+            print('\nname: {}\noperands: {}'.format(name, operands))
+            raise TypeError from e
+
+    def average_port_pressure(self, port_pressure):
+        """Construct average port pressure list from instruction data."""
+        port_list = self._data['ports']
+        average_pressure = [0.0] * len(port_list)
+        for cycles, ports in port_pressure:
+            for p in ports:
+                average_pressure[port_list.index(p)] += cycles / len(ports)
+        return average_pressure
+
+    def set_instruction(
+        self, name, operands=None, latency=None, port_pressure=None, throughput=None, uops=None
+    ):
+        """Import instruction form information."""
+        # If it already exists. Overwrite information.
+        instr_data = self.get_instruction(name, operands)
+        if instr_data is None:
+            instr_data = {}
+            self._data['instruction_forms'].append(instr_data)
+
+        instr_data['name'] = name
+        instr_data['operands'] = operands
+        instr_data['latency'] = latency
+        instr_data['port_pressure'] = port_pressure
+        instr_data['throughput'] = throughput
+        instr_data['uops'] = uops
+
+    def set_instruction_entry(self, entry):
+        self.set_instruction(
+            entry['name'],
+            entry['operands'] if 'operands' in entry else None,
+            entry['latency'] if 'latency' in entry else None,
+            entry['port_pressure'] if 'port_pressure' in entry else None,
+            entry['throughput'] if 'throughput' in entry else None,
+            entry['uops'] if 'uops' in entry else None,
+        )
+
+    def add_port(self, port):
+        if port not in self._data['ports']:
+            self._data['ports'].append(port)
+
+    def get_ISA(self):
+        return self._data['isa'].lower()
+
+    def get_arch(self):
+        return self._data['arch_code'].lower()
+
+    def get_ports(self):
+        return self._data['ports']
+
+    def has_hidden_loads(self):
+        if 'hidden_loads' in self._data:
+            return self._data['hidden_loads']
+        return False
+
+    def get_load_latency(self, reg_type):
+        return self._data['load_latency'][reg_type]
+
+    def get_load_throughput(self, memory):
+        ld_tp = [m for m in self._data['load_throughput'] if self._match_mem_entries(memory, m)]
+        if len(ld_tp) > 0:
+            return ld_tp[0]['port_pressure']
+        return None
+
+    def _match_mem_entries(self, mem, i_mem):
+        if self._data['isa'].lower() == 'aarch64':
+            return self._is_AArch64_mem_type(i_mem, mem)
+        if self._data['isa'].lower() == 'x86':
+            return self._is_x86_mem_type(i_mem, mem)
+
+    def get_data_ports(self):
+        data_port = re.compile(r'^[0-9]+D$')
+        data_ports = [x for x in filter(data_port.match, self._data['ports'])]
+        return data_ports
+
+    @staticmethod
+    def get_full_instruction_name(instruction_form):
+        operands = []
+        for op in instruction_form['operands']:
+            op_attrs = [
+                y + ':' + str(op[y])
+                for y in list(filter(lambda x: True if x != 'class' else False, op))
+            ]
+            operands.append('{}({})'.format(op['class'], ','.join(op_attrs)))
+        return '{}  {}'.format(instruction_form['name'], ','.join(operands))
+
+    @staticmethod
+    def get_isa_for_arch(arch):
+        arch_dict = {
+            'tx2': 'aarch64',
+            'zen1': 'x86',
+            'snb': 'x86',
+            'ivb': 'x86',
+            'hsw': 'x86',
+            'bdw': 'x86',
+            'skl': 'x86',
+            'skx': 'x86',
+            'csx': 'x86',
+            'wsm': 'x86',
+            'nhm': 'x86',
+            'kbl': 'x86',
+            'cnl': 'x86',
+            'cfl': 'x86',
+            'zen+': 'x86',
+        }
+        arch = arch.lower()
+        if arch in arch_dict:
+            return arch_dict[arch].lower()
+        else:
+            raise ValueError("Unknown architecture {!r}.".format(arch))
+
+    def dump(self, stream=None):
+        # Replace instruction form's port_pressure with styled version for RoundtripDumper
+        formatted_instruction_forms = deepcopy(self._data['instruction_forms'])
+        for instruction_form in formatted_instruction_forms:
+            cs = ruamel.yaml.comments.CommentedSeq(instruction_form['port_pressure'])
+            cs.fa.set_flow_style()
+            instruction_form['port_pressure'] = cs
+
+        # Create YAML object
+        yaml = self._create_yaml_object()
+        if not stream:
+            # Create stream object to output string
+            stream = StringIO()
+            yaml.dump({k: v for k, v in self._data.items() if k != 'instruction_forms'}, stream)
+            yaml.dump({'instruction_forms': formatted_instruction_forms}, stream)
+            return stream.getvalue()
+        else:
+            # Write in given stream
+            yaml.dump({k: v for k, v in self._data.items() if k != 'instruction_forms'}, stream)
+            yaml.dump({'instruction_forms': formatted_instruction_forms}, stream)
+
+    ######################################################
+
+    def _check_for_duplicate(self, name, operands):
+        matches = [
+            instruction_form
+            for instruction_form in self._data['instruction_forms']
+            if instruction_form['name'].lower() == name.lower()
+            and self._match_operands(instruction_form['operands'], operands)
+        ]
+        if len(matches) > 1:
+            return True
+        return False
+
+    def _match_operands(self, i_operands, operands):
+        if isinstance(operands, dict):
+            operands = operands['operand_list']
+        operands_ok = True
+        if len(operands) != len(i_operands):
+            return False
+        for idx, operand in enumerate(operands):
+            i_operand = i_operands[idx]
+            operands_ok = operands_ok and self._check_operands(i_operand, operand)
+        if operands_ok:
+            return True
+        else:
+            return False
+
+    def _check_operands(self, i_operands, operands):
+        if self._data['isa'].lower() == 'aarch64':
+            return self._check_AArch64_operands(i_operands, operands)
+        if self._data['isa'].lower() == 'x86':
+            return self._check_x86_operands(i_operands, operands)
+
+    def _check_AArch64_operands(self, i_operand, operand):
+        if 'class' in operand:
+            # compare two DB entries
+            return self._compare_db_entries(i_operand, operand)
+        # register
+        if 'register' in operand:
+            if i_operand['class'] != 'register':
+                return False
+            return self._is_AArch64_reg_type(i_operand, operand['register'])
+        # memory
+        if 'memory' in operand:
+            if i_operand['class'] != 'memory':
+                return False
+            return self._is_AArch64_mem_type(i_operand, operand['memory'])
+        # immediate
+        if 'value' in operand or ('immediate' in operand and 'value' in operand['immediate']):
+            return i_operand['class'] == 'immediate' and i_operand['imd'] == 'int'
+        if 'float' in operand or ('immediate' in operand and 'float' in operand['immediate']):
+            return i_operand['class'] == 'immediate' and i_operand['imd'] == 'float'
+        if 'double' in operand or ('immediate' in operand and 'double' in operand['immediate']):
+            return i_operand['class'] == 'immediate' and i_operand['imd'] == 'double'
+        if 'identifier' in operand or (
+            'immediate' in operand and 'identifier' in operand['immediate']
+        ):
+            return i_operand['class'] == 'identifier'
+        # prefetch option
+        if 'prfop' in operand:
+            return i_operand['class'] == 'prfop'
+        # no match
+        return False
+
+    def _check_x86_operands(self, i_operand, operand):
+        if 'class' in operand:
+            # compare two DB entries
+            return self._compare_db_entries(i_operand, operand)
+        # register
+        if 'register' in operand:
+            if i_operand['class'] != 'register':
+                return False
+            return self._is_x86_reg_type(i_operand['name'], operand['register'])
+        # memory
+        if 'memory' in operand:
+            if i_operand['class'] != 'memory':
+                return False
+            return self._is_x86_mem_type(i_operand, operand['memory'])
+        # immediate
+        if 'immediate' in operand or 'value' in operand:
+            return i_operand['class'] == 'immediate' and i_operand['imd'] == 'int'
+        # identifier (e.g., labels)
+        if 'identifier' in operand:
+            return i_operand['class'] == 'identifier'
+
+    def _compare_db_entries(self, operand_1, operand_2):
+        operand_attributes = list(
+            filter(lambda x: True if x != 'source' and x != 'destination' else False, operand_1)
+        )
+        for key in operand_attributes:
+            try:
+                if operand_1[key] != operand_2[key]:
+                    return False
+            except KeyError:
+                return False
+        return True
+
+    def _is_AArch64_reg_type(self, i_reg, reg):
+        if reg['prefix'] != i_reg['prefix']:
+            return False
+        if 'shape' in reg:
+            if 'shape' in i_reg and reg['shape'] == i_reg['shape']:
+                return True
+            return False
+        return True
+
+    def _is_x86_reg_type(self, i_reg_name, reg):
+        # differentiate between vector registers (xmm, ymm, zmm) and others (gpr)
+        parser_x86 = ParserX86ATT()
+        if parser_x86.is_vector_register(reg):
+            if reg['name'][0:3] == i_reg_name:
+                return True
+        else:
+            if i_reg_name == 'gpr':
+                return True
+        return False
+
+    def _is_AArch64_mem_type(self, i_mem, mem):
+        if (
+            # check base
+            mem['base']['prefix'] == i_mem['base']
+            # check offset
+            and (
+                mem['offset'] == i_mem['offset']
+                or (
+                    mem['offset'] is not None
+                    and 'identifier' in mem['offset']
+                    and i_mem['offset'] == 'identifier'
+                )
+                or (
+                    mem['offset'] is not None
+                    and 'value' in mem['offset']
+                    and i_mem['offset'] == 'imd'
+                )
+            )
+            # check index
+            and (
+                mem['index'] == i_mem['index']
+                or (
+                    mem['index'] is not None
+                    and 'prefix' in mem['index']
+                    and mem['index']['prefix'] == i_mem['index']
+                )
+            )
+            and (mem['scale'] == i_mem['scale'] or (mem['scale'] != 1 and i_mem['scale'] != 1))
+            and (('pre_indexed' in mem) == (i_mem['pre-indexed']))
+            and (('post_indexed' in mem) == (i_mem['post-indexed']))
+        ):
+            return True
+        return False
+
+    def _is_x86_mem_type(self, i_mem, mem):
+        if (
+            # check base
+            self._is_x86_reg_type(i_mem['base'], mem['base'])
+            # check offset
+            and (
+                mem['offset'] == i_mem['offset']
+                or (
+                    mem['offset'] is not None
+                    and 'identifier' in mem['offset']
+                    and i_mem['offset'] == 'identifier'
+                )
+                or (
+                    mem['offset'] is not None
+                    and 'value' in mem['offset']
+                    and (
+                        i_mem['offset'] == 'imd'
+                        or (i_mem['offset'] is None and mem['offset']['value'] == '0')
+                    )
+                )
+            )
+            # check index
+            and (
+                mem['index'] == i_mem['index']
+                or (
+                    mem['index'] is not None
+                    and 'name' in mem['index']
+                    and self._is_x86_reg_type(i_mem['index'], mem['index'])
+                )
+            )
+            and (mem['scale'] == i_mem['scale'] or (mem['scale'] != 1 and i_mem['scale'] != 1))
+        ):
+            return True
+        return False
+
+    def _create_yaml_object(self):
+        yaml_obj = ruamel.yaml.YAML()
+        yaml_obj.representer.add_representer(type(None), self.__represent_none)
+        yaml_obj.default_flow_style = None
+        yaml_obj.width = 120
+        yaml_obj.representer.ignore_aliases = lambda *args: True
+        return yaml_obj
+
+    def __represent_none(self, yaml_obj, data):
+        return yaml_obj.represent_scalar(u'tag:yaml.org,2002:null', u'~')
diff --git a/osaca/semantics/kernel_dg.py b/osaca/semantics/kernel_dg.py
new file mode 100755
index 0000000..1047e86
--- /dev/null
+++ b/osaca/semantics/kernel_dg.py
@@ -0,0 +1,335 @@
+#!/usr/bin/env python3
+
+import copy
+from itertools import chain, product
+
+import networkx as nx
+
+from osaca.parser import AttrDict
+from osaca.semantics import MachineModel
+
+
+class KernelDG(nx.DiGraph):
+    def __init__(self, parsed_kernel, parser, hw_model: MachineModel):
+        self.kernel = parsed_kernel
+        self.parser = parser
+        self.model = hw_model
+        self.dg = self.create_DG(self.kernel)
+        self.loopcarried_deps = self.check_for_loopcarried_dep(self.kernel)
+
+    def create_DG(self, kernel):
+        # 1. go through kernel instruction forms and add them as node attribute
+        # 2. find edges (to dependend further instruction)
+        # 3. get LT value and set as edge weight
+        dg = nx.DiGraph()
+        for i, instruction_form in enumerate(kernel):
+            dg.add_node(instruction_form['line_number'])
+            dg.nodes[instruction_form['line_number']]['instruction_form'] = instruction_form
+            # add load as separate node if existent
+            # TODO use INSTR_FLAGS here
+            if (
+                'performs_load' in instruction_form['flags']
+                and 'is_load_instruction' not in instruction_form['flags']
+            ):
+                # add new node
+                dg.add_node(instruction_form['line_number'] + 0.1)
+                dg.nodes[instruction_form['line_number'] + 0.1][
+                    'instruction_form'
+                ] = instruction_form
+                # and set LD latency as edge weight
+                dg.add_edge(
+                    instruction_form['line_number'] + 0.1,
+                    instruction_form['line_number'],
+                    latency=instruction_form['latency'] - instruction_form['latency_wo_load'],
+                )
+            for dep in self.find_depending(instruction_form, kernel[i + 1:]):
+                edge_weight = (
+                    instruction_form['latency']
+                    if 'latency_wo_load' not in instruction_form
+                    else instruction_form['latency_wo_load']
+                )
+                dg.add_edge(
+                    instruction_form['line_number'], dep['line_number'], latency=edge_weight
+                )
+                dg.nodes[dep['line_number']]['instruction_form'] = dep
+        return dg
+
+    def check_for_loopcarried_dep(self, kernel):
+        multiplier = len(kernel) + 1
+        # increase line number for second kernel loop
+        kernel_length = len(kernel)
+        first_line_no = kernel[0].line_number
+        kernel_copy = [AttrDict.convert_dict(d) for d in copy.deepcopy(kernel)]
+        tmp_kernel = kernel + kernel_copy
+        for i, instruction_form in enumerate(tmp_kernel[kernel_length:]):
+            tmp_kernel[i + kernel_length].line_number = instruction_form.line_number * multiplier
+        # get dependency graph
+        dg = self.create_DG(tmp_kernel)
+
+        # build cyclic loop-carried dependencies
+        loopcarried_deps = [
+            (node, list(nx.algorithms.simple_paths.all_simple_paths(dg, node, node * multiplier)))
+            for node in dg.nodes
+            if node < first_line_no * multiplier and node == int(node)
+        ]
+        # filter others and create graph
+        loopcarried_deps = list(
+            chain.from_iterable(
+                [list(product([dep_chain[0]], dep_chain[1])) for dep_chain in loopcarried_deps]
+            )
+        )
+        # adjust line numbers, filter duplicates
+        # and add reference to kernel again
+        loopcarried_deps_dict = {}
+        tmp_list = []
+        for i, dep in enumerate(loopcarried_deps):
+            nodes = [int(n / multiplier) for n in dep[1] if n >= first_line_no * multiplier]
+            loopcarried_deps[i] = (dep[0], nodes)
+        for dep in loopcarried_deps:
+            is_subset = False
+            for other_dep in [x for x in loopcarried_deps if x[0] != dep[0]]:
+                if set(dep[1]).issubset(set(other_dep[1])) and dep[0] in other_dep[1]:
+                    is_subset = True
+            if not is_subset:
+                tmp_list.append(dep)
+        loopcarried_deps = tmp_list
+        for dep in loopcarried_deps:
+            nodes = []
+            for n in dep[1]:
+                self._get_node_by_lineno(int(n))['latency_lcd'] = 0
+            for n in dep[1]:
+                node = self._get_node_by_lineno(int(n))
+                if int(n) != n and int(n) in dep[1]:
+                    node['latency_lcd'] += node['latency'] - node['latency_wo_load']
+                else:
+                    node['latency_lcd'] += node['latency_wo_load']
+                nodes.append(node)
+            loopcarried_deps_dict[dep[0]] = {
+                'root': self._get_node_by_lineno(dep[0]),
+                'dependencies': nodes,
+            }
+
+        return loopcarried_deps_dict
+
+    def _get_node_by_lineno(self, lineno):
+        return [instr for instr in self.kernel if instr.line_number == lineno][0]
+
+    def get_critical_path(self):
+        if nx.algorithms.dag.is_directed_acyclic_graph(self.dg):
+            longest_path = nx.algorithms.dag.dag_longest_path(self.dg, weight='latency')
+            for line_number in longest_path:
+                self._get_node_by_lineno(int(line_number))['latency_cp'] = 0
+            # add LD latency to instruction
+            for line_number in longest_path:
+                node = self._get_node_by_lineno(int(line_number))
+                if line_number != int(line_number) and int(line_number) in longest_path:
+                    node['latency_cp'] += self.dg.edges[(line_number, int(line_number))]['latency']
+                elif (
+                    line_number == int(line_number)
+                    and 'mem_dep' in node
+                    and self.dg.has_edge(node['mem_dep']['line_number'], line_number)
+                ):
+                    node['latency_cp'] += node['latency']
+                else:
+                    node['latency_cp'] += (
+                        node['latency']
+                        if 'latency_wo_load' not in node
+                        else node['latency_wo_load']
+                    )
+            return [x for x in self.kernel if x['line_number'] in longest_path]
+        else:
+            # split to DAG
+            raise NotImplementedError('Kernel is cyclic.')
+
+    def get_loopcarried_dependencies(self):
+        if nx.algorithms.dag.is_directed_acyclic_graph(self.dg):
+            return self.loopcarried_deps
+        else:
+            # split to DAG
+            raise NotImplementedError('Kernel is cyclic.')
+
+    def find_depending(self, instruction_form, kernel, include_write=False):
+        if instruction_form.operands is None:
+            return
+        for dst in instruction_form.operands.destination + instruction_form.operands.src_dst:
+            if 'register' in dst:
+                # Check for read of register until overwrite
+                for instr_form in kernel:
+                    if self.is_read(dst.register, instr_form):
+                        yield instr_form
+                        if self.is_written(dst.register, instr_form):
+                            # operand in src_dst list
+                            if include_write:
+                                yield instr_form
+                            break
+                    elif self.is_written(dst.register, instr_form):
+                        if include_write:
+                            yield instr_form
+                        break
+            elif 'memory' in dst:
+                # Check if base register is altered during memory access
+                if 'pre_indexed' in dst.memory or 'post_indexed' in dst.memory:
+                    # Check for read of base register until overwrite
+                    for instr_form in kernel:
+                        if self.is_read(dst.memory.base, instr_form):
+                            instr_form['mem_dep'] = instruction_form
+                            yield instr_form
+                            if self.is_written(dst.memory.base, instr_form):
+                                # operand in src_dst list
+                                if include_write:
+                                    instr_form['mem_dep'] = instruction_form
+                                    yield instr_form
+                                break
+                        elif self.is_written(dst.memory.base, instr_form):
+                            if include_write:
+                                instr_form['mem_dep'] = instruction_form
+                                yield instr_form
+                            break
+
+    def get_dependent_instruction_forms(self, instr_form=None, line_number=None):
+        """
+        Returns iterator
+        """
+        if not instr_form and not line_number:
+            raise ValueError('Either instruction form or line_number required.')
+        line_number = line_number if line_number else instr_form['line_number']
+        if self.dg.has_node(line_number):
+            return self.dg.successors(line_number)
+        return iter([])
+
+    def is_read(self, register, instruction_form):
+        is_read = False
+        if instruction_form.operands is None:
+            return is_read
+        for src in instruction_form.operands.source + instruction_form.operands.src_dst:
+            if 'register' in src:
+                is_read = self.parser.is_reg_dependend_of(register, src.register) or is_read
+            if 'memory' in src:
+                if src.memory.base is not None:
+                    is_read = self.parser.is_reg_dependend_of(register, src.memory.base) or is_read
+                if src.memory.index is not None:
+                    is_read = (
+                        self.parser.is_reg_dependend_of(register, src.memory.index) or is_read
+                    )
+        # Check also if read in destination memory address
+        for dst in instruction_form.operands.destination + instruction_form.operands.src_dst:
+            if 'memory' in dst:
+                if dst.memory.base is not None:
+                    is_read = self.parser.is_reg_dependend_of(register, dst.memory.base) or is_read
+                if dst.memory.index is not None:
+                    is_read = (
+                        self.parser.is_reg_dependend_of(register, dst.memory.index) or is_read
+                    )
+        return is_read
+
+    def is_written(self, register, instruction_form):
+        is_written = False
+        if instruction_form.operands is None:
+            return is_written
+        for dst in instruction_form.operands.destination + instruction_form.operands.src_dst:
+            if 'register' in dst:
+                is_written = self.parser.is_reg_dependend_of(register, dst.register) or is_written
+            if 'memory' in dst:
+                if 'pre_indexed' in dst.memory or 'post_indexed' in dst.memory:
+                    is_written = (
+                        self.parser.is_reg_dependend_of(register, dst.memory.base) or is_written
+                    )
+        # Check also for possible pre- or post-indexing in memory addresses
+        for src in instruction_form.operands.source + instruction_form.operands.src_dst:
+            if 'memory' in src:
+                if 'pre_indexed' in src.memory or 'post_indexed' in src.memory:
+                    is_written = (
+                        self.parser.is_reg_dependend_of(register, src.memory.base) or is_written
+                    )
+        return is_written
+
+    def export_graph(self, filepath=None):
+        graph = copy.deepcopy(self.dg)
+        cp = self.get_critical_path()
+        cp_line_numbers = [x['line_number'] for x in cp]
+        lcd = self.get_loopcarried_dependencies()
+        lcd_line_numbers = {}
+        for dep in lcd:
+            lcd_line_numbers[dep] = [x['line_number'] for x in lcd[dep]['dependencies']]
+        # add color scheme
+        graph.graph['node'] = {'colorscheme': 'accent8'}
+        graph.graph['edge'] = {'colorscheme': 'accent8'}
+
+        # create LCD edges
+        for dep in lcd_line_numbers:
+            min_line_number = min(lcd_line_numbers[dep])
+            max_line_number = max(lcd_line_numbers[dep])
+            graph.add_edge(max_line_number, min_line_number)
+            graph.edges[max_line_number, min_line_number]['latency'] = [
+                x for x in lcd[dep]['dependencies'] if x['line_number'] == max_line_number
+            ][0]['latency_lcd']
+
+        # add label to edges
+        for e in graph.edges:
+            graph.edges[e]['label'] = graph.edges[e]['latency']
+
+        # add CP values to graph
+        for n in cp:
+            graph.nodes[n['line_number']]['instruction_form']['latency_cp'] = n['latency_cp']
+
+        # color CP and LCD
+        for n in graph.nodes:
+            if n in cp_line_numbers:
+                # graph.nodes[n]['color'] = 1
+                graph.nodes[n]['style'] = 'bold'
+                graph.nodes[n]['penwidth'] = 4
+            for col, dep in enumerate(lcd):
+                if n in lcd_line_numbers[dep]:
+                    if 'style' not in graph.nodes[n]:
+                        graph.nodes[n]['style'] = 'filled'
+                    else:
+                        graph.nodes[n]['style'] += ',filled'
+                    graph.nodes[n]['fillcolor'] = 2 + col
+
+        # color edges
+        for e in graph.edges:
+            if (
+                graph.nodes[e[0]]['instruction_form']['line_number'] in cp_line_numbers
+                and graph.nodes[e[1]]['instruction_form']['line_number'] in cp_line_numbers
+                and e[0] < e[1]
+            ):
+                bold_edge = True
+                for i in range(e[0] + 1, e[1]):
+                    if i in cp_line_numbers:
+                        bold_edge = False
+                if bold_edge:
+                    graph.edges[e]['style'] = 'bold'
+                    graph.edges[e]['penwidth'] = 3
+            for dep in lcd_line_numbers:
+                if (
+                    graph.nodes[e[0]]['instruction_form']['line_number'] in lcd_line_numbers[dep]
+                    and graph.nodes[e[1]]['instruction_form']['line_number']
+                    in lcd_line_numbers[dep]
+                ):
+                    graph.edges[e]['color'] = graph.nodes[e[1]]['fillcolor']
+
+        # rename node from [idx] to [idx mnemonic] and add shape
+        mapping = {}
+        for n in graph.nodes:
+            if int(n) != n:
+                mapping[n] = '{}: LOAD'.format(int(n))
+                graph.nodes[n]['fontname'] = 'italic'
+                graph.nodes[n]['fontsize'] = 11.0
+            else:
+                node = graph.nodes[n]['instruction_form']
+                if node['instruction'] is not None:
+                    mapping[n] = '{}: {}'.format(n, node['instruction'])
+                else:
+                    label = 'label' if node['label'] else None
+                    label = 'directive' if node['directive'] else label
+                    label = 'comment' if node['comment'] and label is None else label
+                    mapping[n] = '{}: {}'.format(n, label)
+                    graph.nodes[n]['fontname'] = 'italic'
+                    graph.nodes[n]['fontsize'] = 11.0
+                graph.nodes[n]['shape'] = 'rectangle'
+
+        nx.relabel.relabel_nodes(graph, mapping, copy=False)
+        if filepath:
+            nx.drawing.nx_agraph.write_dot(graph, filepath)
+        else:
+            nx.drawing.nx_agraph.write_dot(graph, 'osaca_dg.dot')
diff --git a/osaca/semantics/marker_utils.py b/osaca/semantics/marker_utils.py
new file mode 100755
index 0000000..986a356
--- /dev/null
+++ b/osaca/semantics/marker_utils.py
@@ -0,0 +1,85 @@
+#!/usr/bin/env python3
+
+from osaca.parser import ParserAArch64v81, ParserX86ATT
+
+
+def reduce_to_section(kernel, isa):
+    isa = isa.lower()
+    if isa == 'x86':
+        start, end = find_marked_kernel_x86ATT(kernel)
+    elif isa == 'aarch64':
+        start, end = find_marked_kernel_AArch64(kernel)
+    else:
+        raise ValueError('ISA not supported.')
+    if start == -1:
+        raise LookupError('Could not find START MARKER. Make sure it is inserted!')
+    if end == -1:
+        raise LookupError('Could not find END MARKER. Make sure it is inserted!')
+    return kernel[start:end]
+
+
+def find_marked_kernel_AArch64(lines):
+    nop_bytes = ['213', '3', '32', '31']
+    return find_marked_kernel(
+        lines, ParserAArch64v81(), ['mov'], 'x1', [111, 222], nop_bytes, reverse=True
+    )
+
+
+def find_marked_kernel_x86ATT(lines):
+    nop_bytes = ['100', '103', '144']
+    return find_marked_kernel(lines, ParserX86ATT(), ['mov', 'movl'], 'ebx', [111, 222], nop_bytes)
+
+
+def find_marked_kernel(lines, parser, mov_instr, mov_reg, mov_vals, nop_bytes, reverse=False):
+    index_start = -1
+    index_end = -1
+    for i, line in enumerate(lines):
+        try:
+            if line.instruction in mov_instr and lines[i + 1].directive is not None:
+                source = line.operands[0 if not reverse else 1]
+                destination = line.operands[1 if not reverse else 0]
+                # instruction pair matches, check for operands
+                if (
+                    'immediate' in source
+                    and parser.normalize_imd(source.immediate) == mov_vals[0]
+                    and 'register' in destination
+                    and parser.get_full_reg_name(destination.register) == mov_reg
+                ):
+                    # operands of first instruction match start, check for second one
+                    match, line_count = match_bytes(lines, i + 1, nop_bytes)
+                    if match:
+                        # return first line after the marker
+                        index_start = i + 1 + line_count
+                elif (
+                    'immediate' in source
+                    and parser.normalize_imd(source.immediate) == mov_vals[1]
+                    and 'register' in destination
+                    and parser.get_full_reg_name(destination.register) == mov_reg
+                ):
+                    # operand of first instruction match end, check for second one
+                    match, line_count = match_bytes(lines, i + 1, nop_bytes)
+                    if match:
+                        # return line of the marker
+                        index_end = i
+        except TypeError:
+            print(i, line)
+        if index_start != -1 and index_end != -1:
+            break
+    return index_start, index_end
+
+
+def match_bytes(lines, index, byte_list):
+    # either all bytes are in one line or in separate ones
+    extracted_bytes = []
+    line_count = 0
+    while (
+        index < len(lines)
+        and lines[index].directive is not None
+        and lines[index].directive.name == 'byte'
+    ):
+        line_count += 1
+        extracted_bytes += lines[index].directive.parameters
+        index += 1
+    if extracted_bytes[0:len(byte_list)] == byte_list:
+        return True, line_count
+    return False, -1
diff --git a/osaca/semantics/semantics_appender.py b/osaca/semantics/semantics_appender.py
new file mode 100755
index 0000000..0c92272
--- /dev/null
+++ b/osaca/semantics/semantics_appender.py
@@ -0,0 +1,348 @@
+#!/usr/bin/env python3
+
+import warnings
+from functools import reduce
+
+from osaca import utils
+from osaca.parser import AttrDict, ParserAArch64v81, ParserX86ATT
+from osaca.semantics import MachineModel
+
+
+class INSTR_FLAGS:
+    """
+    Flags used for unknown or special instructions
+    """
+
+    LD = 'is_load_instruction'
+    TP_UNKWN = 'tp_unknown'
+    LT_UNKWN = 'lt_unknown'
+    NOT_BOUND = 'not_bound'
+    HIDDEN_LD = 'hidden_load'
+    HAS_LD = 'performs_load'
+    HAS_ST = 'performs_store'
+
+
+class SemanticsAppender(object):
+    def __init__(self, machine_model: MachineModel, path_to_yaml=None):
+        self._machine_model = machine_model
+        self._isa = machine_model.get_ISA().lower()
+        path = utils.find_file('isa/' + self._isa + '.yml')
+        self._isa_model = MachineModel(path_to_yaml=path)
+        if self._isa == 'x86':
+            self._parser = ParserX86ATT()
+        elif self._isa == 'aarch64':
+            self._parser = ParserAArch64v81()
+
+    # SUMMARY FUNCTION
+    def add_semantics(self, kernel):
+        for instruction_form in kernel:
+            self.assign_src_dst(instruction_form)
+            self.assign_tp_lt(instruction_form)
+        if self._machine_model.has_hidden_loads():
+            self.set_hidden_loads(kernel)
+
+    def set_hidden_loads(self, kernel):
+        loads = [instr for instr in kernel if INSTR_FLAGS.HAS_LD in instr['flags']]
+        stores = [instr for instr in kernel if INSTR_FLAGS.HAS_ST in instr['flags']]
+        # Filter instructions including load and store
+        load_ids = [instr['line_number'] for instr in loads]
+        store_ids = [instr['line_number'] for instr in stores]
+        shared_ldst = list(set(load_ids).intersection(set(store_ids)))
+        loads = [instr for instr in loads if instr['line_number'] not in shared_ldst]
+        stores = [instr for instr in stores if instr['line_number'] not in shared_ldst]
+
+        if len(stores) == 0 or len(loads) == 0:
+            # nothing to do
+            return
+        if len(loads) <= len(stores):
+            # Hide all loads
+            for load in loads:
+                load['flags'] += [INSTR_FLAGS.HIDDEN_LD]
+                load['port_pressure'] = self._nullify_data_ports(load['port_pressure'])
+        else:
+            for store in stores:
+                # Get 'closest' load instruction
+                min_distance_load = min(
+                    [
+                        (
+                            abs(load_instr['line_number'] - store['line_number']),
+                            load_instr['line_number'],
+                        )
+                        for load_instr in loads
+                        if INSTR_FLAGS.HIDDEN_LD not in load_instr['flags']
+                    ]
+                )
+                load = [instr for instr in kernel if instr['line_number'] == min_distance_load[1]][
+                    0
+                ]
+                # Hide load
+                load['flags'] += [INSTR_FLAGS.HIDDEN_LD]
+                load['port_pressure'] = self._nullify_data_ports(load['port_pressure'])
+
+    # get parser result and assign throughput and latency value to instruction form
+    # mark instruction form with semantic flags
+    def assign_tp_lt(self, instruction_form):
+        flags = []
+        port_number = len(self._machine_model['ports'])
+        if instruction_form['instruction'] is None:
+            # No instruction (label, comment, ...) --> ignore
+            throughput = 0.0
+            latency = 0.0
+            latency_wo_load = latency
+            instruction_form['port_pressure'] = [0.0 for i in range(port_number)]
+        else:
+            instruction_data = self._machine_model.get_instruction(
+                instruction_form['instruction'], instruction_form['operands']
+            )
+            if instruction_data:
+                # instruction form in DB
+                throughput = instruction_data['throughput']
+                port_pressure = self._machine_model.average_port_pressure(
+                    instruction_data['port_pressure']
+                )
+                try:
+                    assert isinstance(port_pressure, list)
+                    assert len(port_pressure) == port_number
+                    instruction_form['port_pressure'] = port_pressure
+                    if sum(port_pressure) == 0 and throughput is not None:
+                        # port pressure on all ports 0 --> not bound to a port
+                        flags.append(INSTR_FLAGS.NOT_BOUND)
+                except AssertionError:
+                    warnings.warn(
+                        'Port pressure could not be imported correctly from database. '
+                        + 'Please check entry for:\n {}'.format(instruction_form)
+                    )
+                    instruction_form['port_pressure'] = [0.0 for i in range(port_number)]
+                    flags.append(INSTR_FLAGS.TP_UNKWN)
+                if throughput is None:
+                    # assume 0 cy and mark as unknown
+                    throughput = 0.0
+                    flags.append(INSTR_FLAGS.TP_UNKWN)
+                latency = instruction_data['latency']
+                latency_wo_load = latency
+                if latency is None:
+                    # assume 0 cy and mark as unknown
+                    latency = 0.0
+                    latency_wo_load = latency
+                    flags.append(INSTR_FLAGS.LT_UNKWN)
+                if INSTR_FLAGS.HAS_LD in instruction_form['flags']:
+                    flags.append(INSTR_FLAGS.LD)
+            else:
+                # instruction could not be found in DB
+                assign_unknown = True
+                # check for equivalent register-operands DB entry if LD
+                if INSTR_FLAGS.HAS_LD in instruction_form['flags']:
+                    # --> combine LD and reg form of instruction form
+                    operands = self.substitute_mem_address(instruction_form['operands'])
+                    instruction_data_reg = self._machine_model.get_instruction(
+                        instruction_form['instruction'], operands
+                    )
+                    if instruction_data_reg:
+                        assign_unknown = False
+                        reg_types = [
+                            self._parser.get_reg_type(op['register'])
+                            for op in operands['operand_list']
+                            if 'register' in op
+                        ]
+                        load_port_pressure = self._machine_model.average_port_pressure(
+                            self._machine_model.get_load_throughput(
+                                [
+                                    x['memory']
+                                    for x in instruction_form['operands']['source']
+                                    if 'memory' in x
+                                ][0]
+                            )
+                        )
+                        if 'load_throughput_multiplier' in self._machine_model:
+                            multiplier = self._machine_model['load_throughput_multiplier'][
+                                reg_types[0]
+                            ]
+                            load_port_pressure = [pp * multiplier for pp in load_port_pressure]
+                        throughput = max(
+                            max(load_port_pressure), instruction_data_reg['throughput']
+                        )
+                        latency = (
+                            self._machine_model.get_load_latency(reg_types[0])
+                            + instruction_data_reg['latency']
+                        )
+                        latency_wo_load = instruction_data_reg['latency']
+                        instruction_form['port_pressure'] = [
+                            sum(x)
+                            for x in zip(
+                                load_port_pressure,
+                                self._machine_model.average_port_pressure(
+                                    instruction_data_reg['port_pressure']
+                                ),
+                            )
+                        ]
+                if assign_unknown:
+                    # --> mark as unknown and assume 0 cy for latency/throughput
+                    throughput = 0.0
+                    latency = 0.0
+                    latency_wo_load = latency
+                    instruction_form['port_pressure'] = [0.0 for i in range(port_number)]
+                    flags += [INSTR_FLAGS.TP_UNKWN, INSTR_FLAGS.LT_UNKWN]
+        # flatten flag list
+        flags = list(set(flags))
+        if 'flags' not in instruction_form:
+            instruction_form['flags'] = flags
+        else:
+            instruction_form['flags'] += flags
+        instruction_form['throughput'] = throughput
+        instruction_form['latency'] = latency
+        instruction_form['latency_wo_load'] = latency_wo_load
+        # for later CP and loop-carried dependency analysis
+        instruction_form['latency_cp'] = 0
+        instruction_form['latency_lcd'] = 0
+
+    def substitute_mem_address(self, operands):
+        regs = [op for op in operands['operand_list'] if 'register' in op]
+        if (
+            len(regs) > 1
+            and len(set([self._parser.get_reg_type(x['register']) for x in regs])) != 1
+        ):
+            warnings.warn('Load type could not be identified clearly.')
+        reg_type = self._parser.get_reg_type(regs[0]['register'])
+
+        source = [
+            operand if 'memory' not in operand else self.convert_mem_to_reg(operand, reg_type)
+            for operand in operands['source']
+        ]
+        destination = [
+            operand if 'memory' not in operand else self.convert_mem_to_reg(operand, reg_type)
+            for operand in operands['destination']
+        ]
+        src_dst = [
+            operand if 'memory' not in operand else self.convert_mem_to_reg(operand, reg_type)
+            for operand in operands['destination']
+        ]
+        operand_list = [
+            operand if 'memory' not in operand else self.convert_mem_to_reg(operand, reg_type)
+            for operand in operands['operand_list']
+        ]
+        return {
+            'source': source,
+            'destination': destination,
+            'src_dst': src_dst,
+            'operand_list': operand_list,
+        }
+
+    def convert_mem_to_reg(self, memory, reg_type, reg_id='0'):
+        if self._isa == 'x86':
+            register = {'register': {'name': reg_type + reg_id}}
+        elif self._isa == 'aarch64':
+            register = {'register': {'prefix': reg_type, 'name': reg_id}}
+        return register
+
+    # get ;parser result and assign operands to
+    # - source
+    # - destination
+    # - source/destination
+    def assign_src_dst(self, instruction_form):
+        # if the instruction form doesn't have operands, there's nothing to do
+        if instruction_form['operands'] is None:
+            return
+        # check if instruction form is in ISA yaml, otherwise apply standard operand assignment
+        # (one dest, others source)
+        isa_data = self._isa_model.get_instruction(
+            instruction_form['instruction'], instruction_form['operands']
+        )
+        operands = instruction_form['operands']
+        op_dict = {}
+        if isa_data is None:
+            # no irregular operand structure, apply default
+            op_dict['source'] = self._get_regular_source_operands(instruction_form)
+            op_dict['destination'] = self._get_regular_destination_operands(instruction_form)
+            op_dict['src_dst'] = []
+        else:
+            # load src/dst structure from isa_data
+            op_dict['source'] = []
+            op_dict['destination'] = []
+            op_dict['src_dst'] = []
+            for i, op in enumerate(isa_data['operands']):
+                if op['source'] and op['destination']:
+                    op_dict['src_dst'].append(operands[i])
+                    continue
+                if op['source']:
+                    op_dict['source'].append(operands[i])
+                    continue
+                if op['destination']:
+                    op_dict['destination'].append(operands[i])
+                    continue
+        # store operand list in dict and reassign operand key/value pair
+        op_dict['operand_list'] = operands
+        instruction_form['operands'] = AttrDict.convert_dict(op_dict)
+        # assign LD/ST flags
+        instruction_form['flags'] = (
+            instruction_form['flags'] if 'flags' in instruction_form else []
+        )
+        if self._has_load(instruction_form):
+            instruction_form['flags'] += [INSTR_FLAGS.HAS_LD]
+        if self._has_store(instruction_form):
+            instruction_form['flags'] += [INSTR_FLAGS.HAS_ST]
+
+    def _nullify_data_ports(self, port_pressure):
+        data_ports = self._machine_model.get_data_ports()
+        for port in data_ports:
+            index = self._machine_model.get_ports().index(port)
+            port_pressure[index] = 0.0
+        return port_pressure
+
+    def _has_load(self, instruction_form):
+        for operand in (
+            instruction_form['operands']['source'] + instruction_form['operands']['src_dst']
+        ):
+            if 'memory' in operand:
+                return True
+        return False
+
+    def _has_store(self, instruction_form):
+        for operand in (
+            instruction_form['operands']['destination'] + instruction_form['operands']['src_dst']
+        ):
+            if 'memory' in operand:
+                return True
+        return False
+
+    def _get_regular_source_operands(self, instruction_form):
+        if self._isa == 'x86':
+            return self._get_regular_source_x86ATT(instruction_form)
+        if self._isa == 'aarch64':
+            return self._get_regular_source_AArch64(instruction_form)
+
+    def _get_regular_destination_operands(self, instruction_form):
+        if self._isa == 'x86':
+            return self._get_regular_destination_x86ATT(instruction_form)
+        if self._isa == 'aarch64':
+            return self._get_regular_destination_AArch64(instruction_form)
+
+    def _get_regular_source_x86ATT(self, instruction_form):
+        # return all but last operand
+        sources = [
+            op for op in instruction_form['operands'][0 : len(instruction_form['operands']) - 1]
+        ]
+        return sources
+
+    def _get_regular_source_AArch64(self, instruction_form):
+        # return all but first operand
+        sources = [
+            op for op in instruction_form['operands'][1 : len(instruction_form['operands'])]
+        ]
+        return sources
+
+    def _get_regular_destination_x86ATT(self, instruction_form):
+        # return last operand
+        return instruction_form['operands'][-1:]
+
+    def _get_regular_destination_AArch64(self, instruction_form):
+        # return first operand
+        return instruction_form['operands'][:1]
+
+    @staticmethod
+    def get_throughput_sum(kernel):
+        tp_sum = reduce(
+            (lambda x, y: [sum(z) for z in zip(x, y)]),
+            [instr['port_pressure'] for instr in kernel],
+        )
+        tp_sum = [round(x, 2) for x in tp_sum]
+        return tp_sum
diff --git a/osaca/testcase.py b/osaca/testcase.py
deleted file mode 100755
index 06395e4..0000000
--- a/osaca/testcase.py
+++ /dev/null
@@ -1,410 +0,0 @@
-#!/usr/bin/env python3
-
-import os
-from subprocess import call
-from math import ceil
-
-from osaca.param import Register, MemAddr, Parameter
-#from param import Register, MemAddr, Parameter
-
-
-class Testcase(object):
-    # ------------------Constant variables--------------------------
-    # Lookup tables for regs
-    gprs64 = ['rax', 'rbx', 'rcx', 'rdx', 'r9', 'r10', 'r11', 'r12', 'r13', 'r14', 'r15']
-    gprs32 = ['eax', 'ebx', 'ecx', 'edx', 'r9d', 'r10d', 'r11d', 'r12d', 'r13d', 'r14d', 'r15d']
-    gprs16 = ['ax', 'bx', 'cx', 'dx', 'r9w', 'r10w', 'r11w', 'r12w', 'r13w', 'r14w', 'r15w']
-    gprs8 = ['al', 'bl', 'cl', 'dl', 'r9l', 'r10l', 'r11l', 'r12l', 'r13l', 'r14l', 'r15l']
-    fpus = ['st0', 'st1', 'st2', 'st3', 'st4', 'st5', 'st6', 'st7']
-    mmxs = ['mm0', 'mm1', 'mm2', 'mm3', 'mm4', 'mm5', 'mm6', 'mm7']
-    ks = ['k0', 'k1', 'k2', 'k3', 'k4', 'k5', 'k6', 'k7']
-    bnds = ['bnd0', 'bnd1', 'bnd2', 'bnd3', 'bnd4', 'bnd5', 'bnd6', 'bnd7']
-    xmms = ['xmm0', 'xmm1', 'xmm2', 'xmm3', 'xmm4', 'xmm5', 'xmm6', 'xmm7', 'xmm8', 'xmm9',
-            'xmm10', 'xmm11', 'xmm12', 'xmm13', 'xmm14', 'xmm15']
-    ymms = ['ymm0', 'ymm1', 'ymm2', 'ymm3', 'ymm4', 'ymm5', 'ymm6', 'ymm7', 'ymm8', 'ymm9',
-            'ymm10', 'ymm11', 'ymm12', 'ymm13', 'ymm14', 'ymm15']
-    zmms = ['zmm0', 'zmm1', 'zmm2', 'zmm3', 'zmm4', 'zmm5', 'zmm6', 'zmm7', 'zmm8', 'zmm9',
-            'zmm10', 'zmm11', 'zmm12', 'zmm13', 'zmm14', 'zmm15']
-    # Lookup table for memory
-    mems = ['[rip+PI]', '[rip+PI]', '[rip+PI]', '[rip+PI]', '[rip+PI]', '[rip+PI]', '[rip+PI]',
-            '[rip+PI]']
-    # Lookup table for immediates
-    imds = ['1', '2', '13', '22', '8', '78', '159', '222', '3', '9', '5', '55', '173', '317',
-            '254', '255']
-    # TODO Differentiate between AVX512 (with additional xmm16-31) and the rest
-    #       ...
-    #       ...
-    # end TODO
-
-    ops = {'gpr64': gprs64, 'gpr32': gprs32, 'gpr16': gprs16, 'gpr8': gprs8, 'fpu': fpus,
-           'mmx': mmxs, 'k': ks, 'bnd': bnds, 'xmm': xmms, 'ymm': ymms, 'zmm': zmms, 'mem': mems,
-           'imd': imds}
-
-    # Create Single Precision 1.0
-    sp1 = ('\t\t# create SP 1.0\n'
-           '\t\tvpcmpeqw xmm0, xmm0, xmm0\n'
-           '\t\tvpslld xmm0, xmm0, 25\t\t\t# logical left shift: 11111110..0 (25=32-(8-1))\n'
-           '\t\tvpsrld xmm0, xmm0, 2\t\t\t# logical right shift: 1 bit for sign; leading '
-           'mantissa bit is zero\n'
-           '\t\t# copy SP 1.0\n')
-    # Create Double Precision 1.0
-    dp1 = ('\t\t# create DP 1.0\n'
-           '\t\tvpcmpeqw xmm0, xmm0, xmm0\t\t# all ones\n'
-           '\t\tvpsllq xmm0, xmm0, 54\t\t\t# logical left shift: 11111110..0 (54=64-(10-1))\n'
-           '\t\tvpsrlq xmm0, xmm0, 2\t\t\t# logical right shift: 1 bit for sign; leading '
-           'mantissa bit is zero\n')
-    # Create epilogue
-    done = ('done:\n'
-            '\t\tmov\trsp, rbp\n'
-            '\t\tpop\trbp\n'
-            '\t\tret\n'
-            '.size latency, .-latency')
-    # ----------------------------------------------------------------
-
-    # Constructor
-    def __init__(self, _mnemonic, _param_list, _num_instr='32'):
-        self.instr = _mnemonic.lower()
-        self.param_list = _param_list
-        # num_instr must be an even number
-        self.num_instr = str(ceil(int(_num_instr)/2)*2)
-        # Check for the number of operands and initialise the GPRs if necessary
-        self.op_a, self.op_b, self.op_c, self.gprPush, self.gprPop, self.zeroGPR, self.copy = \
-            self.__define_operands()
-        self.num_operands = len(self.param_list)
-
-        # Create asm header
-        self.def_instr, self.ninstr, self.init, self.expand = self.__define_header()
-        # Create latency and throughput loop
-        self.loop_lat = self.__define_loop_lat()
-        self.loop_thrpt = self.__define_loop_thrpt()
-        # Create extension for testcase name
-        sep0 = '-' if (self.num_operands > 0) else ''
-        sep1 = '_' if (self.num_operands > 1) else ''
-        sep2 = '_' if (self.num_operands > 2) else ''
-        self.extension = (sep0 + (self.op_a if ('gpr' not in self.op_a) else 'r' + self.op_a[3:])
-                          + sep1 + (self.op_b if ('gpr' not in self.op_b) else 'r' + self.op_b[3:])
-                          + sep2 + (self.op_c if ('gpr' not in self.op_c) else 'r' + self.op_c[3:]))
-
-    def write_testcase(self, tp=True, lt=True):
-        """
-        Write testcase for class attributes in a file.
-
-        Parameters
-        ----------
-        tp : bool
-            Controls if throughput testcase should be written
-            (default True)
-
-        lt : bool
-            Controls if latency testcase should be written
-            (default True)
-        """
-        osaca_dir = os.path.expanduser('~') + '/.osaca/'
-        if lt:
-            # Write latency file
-            call(['mkdir', '-p', osaca_dir + 'benchmarks'])
-            f = open(osaca_dir + 'benchmarks/'+self.instr+self.extension+'.S', 'w')
-            data = (self.def_instr + self.ninstr + self.init + self.dp1 + self.expand + self.gprPush
-                    + self.zeroGPR + self.copy + self.loop_lat + self.gprPop + self.done)
-            f.write(data)
-            f.close()
-        if tp:
-            # Write throughput file
-            call(['mkdir', '-p', osaca_dir + 'benchmarks'])
-            f = open(osaca_dir + 'benchmarks/' + self.instr + self.extension
-                     + '-TP.S', 'w')
-            data = (self.def_instr + self.ninstr + self.init + self.dp1 + self.expand + self.gprPush
-                    + self.zeroGPR + self.copy + self.loop_thrpt + self.gprPop + self.done)
-            f.write(data)
-            f.close()
-
-    # Check operands
-    def __define_operands(self):
-        """
-        Check for the number of operands and initialise the GPRs if necessary.
-
-        Returns
-        -------
-        (str, str, str, str, str, str)
-            String tuple containing types of operands and if needed push/pop operations, the
-            initialisation of general purpose regs and the copy if registers.
-        """
-        operands = self.param_list
-        op_a, op_b, op_c = ('', '', '')
-        gpr_push, gpr_pop, zero_gpr = ('', '', '')
-        if len(operands) > 0:
-            if isinstance(operands[0], Register):
-                op_a = operands[0].reg_type.lower()
-            elif isinstance(operands[0], MemAddr):
-                op_a = 'mem'
-            elif isinstance(operands[0], Parameter) and str(operands[0]) == 'IMD':
-                op_a = 'imd'
-            if op_a == 'gpr':
-                gpr_push, gpr_pop, zero_gpr = self.__initialise_gprs()
-                op_a += str(operands[0].size)
-        if len(operands) > 1:
-            if isinstance(operands[1], Register):
-                op_b = operands[1].reg_type.lower()
-            elif isinstance(operands[1], MemAddr):
-                op_b = 'mem'
-            elif isinstance(operands[1], Parameter) and str(operands[1]) == 'IMD':
-                op_b = 'imd'
-            if op_b == 'gpr':
-                op_b += str(operands[1].size)
-                if 'gpr' not in op_a:
-                    gpr_push, gpr_pop, zero_gpr = self.__initialise_gprs()
-        if len(operands) == 3:
-            if isinstance(operands[2], Register):
-                op_c = operands[2].reg_type.lower()
-            elif isinstance(operands[2], MemAddr):
-                op_c = 'mem'
-            elif isinstance(operands[2], Parameter) and str(operands[2]) == 'IMD':
-                op_c = 'imd'
-            if op_c == 'gpr':
-                op_c += str(operands[2].size)
-                if ('gpr' not in op_a) and ('gpr' not in op_b):
-                    gpr_push, gpr_pop, zero_gpr = self.__initialise_gprs()
-        if len(operands) == 1 and isinstance(operands[0], Register):
-            copy = self.__copy_regs(operands[0])
-        elif len(operands) > 1 and isinstance(operands[1], Register):
-            copy = self.__copy_regs(operands[1])
-        elif len(operands) > 2 and isinstance(operands[2], Register):
-            copy = self.__copy_regs(operands[1])
-        else:
-            copy = ''
-        return op_a, op_b, op_c, gpr_push, gpr_pop, zero_gpr, copy
-
-    def __initialise_gprs(self):
-        """
-        Initialize eleven general purpose registers and set them to zero.
-
-        Returns
-        -------
-        (str, str, str)
-            String tuple for push, pop and initalisation operations
-        """
-
-        gpr_push = ''
-        gpr_pop = ''
-        zero_gpr = ''
-        for reg in self.gprs64:
-            gpr_push += '\t\tpush    {}\n'.format(reg)
-        for reg in reversed(self.gprs64):
-            gpr_pop += '\t\tpop     {}\n'.format(reg)
-        for reg in self.gprs64:
-            zero_gpr += '\t\txor     {}, {}\n'.format(reg, reg)
-        return gpr_push, gpr_pop, zero_gpr
-
-
-    # Copy created values in specific register
-    def __copy_regs(self, reg):
-        """
-        Copy created values in specific register.
-
-        Parameters
-        ----------
-        reg : Register
-            Register for copying the value
-
-        Returns
-        -------
-        str
-            String containing the copy instructions
-        """
-        copy = '\t\t# copy DP 1.0\n'
-        # Different handling for GPR, MMX and SSE/AVX registers
-        if reg.reg_type == 'GPR':
-            copy += '\t\tvmovq {}, xmm0\n'.format(self.ops['gpr64'][0])
-            copy += '\t\tvmovq {}, xmm0\n'.format(self.ops['gpr64'][1])
-            copy += '\t\t# Create DP 2.0\n'
-            copy += '\t\tadd {}, {}\n'.format(self.ops['gpr64'][1], self.ops['gpr64'][0])
-            copy += '\t\t# Create DP 0.5\n'
-            copy += '\t\tdiv {}\n'.format(self.ops['gpr64'][0])
-            copy += '\t\tmovq {}, {}\n'.format(self.ops['gpr64'][2], self.ops['gpr64'][0])
-            copy += '\t\tvmovq {}, xmm0\n'.format(self.ops['gpr64'][0])
-        elif reg.reg_type == 'MMX':
-            copy += '\t\tvmovq {}, xmm0\n'.format(self.ops['mmx'][0])
-            copy += '\t\tvmovq {}, xmm0\n'.format(self.ops['mmx'][1])
-            copy += '\t\tvmovq {}, xmm0\n'.format(self.ops['gpr64'][0])
-            copy += '\t\t# Create DP 2.0\n'
-            copy += '\t\tadd {}, {}\n'.format(self.ops['mmx'][1], self.ops['mmx'][0])
-            copy += '\t\t# Create DP 0.5\n'
-            copy += '\t\tdiv {}\n'.format(self.ops['gpr64'][0])
-            copy += '\t\tmovq {}, {}\n'.format(self.ops['mmx'][2], self.ops['gpr64'][0])
-        elif reg.reg_type == 'XMM' or reg.reg_type == 'YMM' or reg.reg_type == 'ZMM':
-            key = reg.reg_type.lower()
-            copy += '\t\tvmovaps {}, {}\n'.format(self.ops[key][0], self.ops[key][0])
-            copy += '\t\tvmovaps {}, {}\n'.format(self.ops[key][1], self.ops[key][0])
-            copy += '\t\t# Create DP 2.0\n'
-            copy += '\t\tvaddpd {}, {}, {}\n'.format(self.ops[key][1], self.ops[key][1],
-                                                     self.ops[key][1])
-            copy += '\t\t# Create DP 0.5\n'
-            copy += '\t\tvdivpd {}, {}, {}\n'.format(self.ops[key][2], self.ops[key][0],
-                                                     self.ops[key][1])
-        else:
-            copy = ''
-        return copy
-
-    def __define_header(self):
-        """
-        Define header.
-
-        Returns
-        -------
-        (str, str, str, str)
-            String tuple containing the header, value initalisations and extensions
-        """
-        def_instr = '#define INSTR '+self.instr+'\n'
-        ninstr = '#define NINST '+self.num_instr+'\n'
-        pi = ('PI:\n'
-              '.long  0xf01b866e, 0x400921f9, 0xf01b866e, 0x400921f9, '   # 128 bit
-              '0xf01b866e, 0x400921f9, 0xf01b866e, 0x400921f9, '          # 256 bit
-              '0xf01b866e, 0x400921f9, 0xf01b866e, 0x400921f9, '          # 384 bit
-              '0xf01b866e, 0x400921f9, 0xf01b866e, 0x400921f9\n')         # 512 bit
-        init = ('#define N edi\n'
-                '#define i r8d\n\n\n'
-                '.intel_syntax noprefix\n'
-                '.globl ninst\n'
-                '.data\n'
-                'ninst:\n'
-                '.long NINST\n'
-                '.align 32\n'
-                + pi +
-                '.text\n'
-                '.globl latency\n'
-                '.type latency, @function\n'
-                '.align 32\n'
-                'latency:\n'
-                '\t\tpush      rbp\n'
-                '\t\tmov       rbp, rsp\n'
-                '\t\txor       i, i\n'
-                '\t\ttest      N, N\n'
-                '\t\tjle       done\n')
-        # Expand to AVX(512) if necessary
-        expand = ''
-        if self.op_a == 'ymm' or self.op_b == 'ymm' or self.op_c == 'ymm':
-            expand = ('\t\t# expand from SSE to AVX\n'
-                      '\t\tvinsertf128 ymm0, ymm0, xmm0, 0x1\n')
-        if self.op_a == 'zmm' or self.op_b == 'zmm' or self.op_c == 'zmm':
-            expand = ('\t\t# expand from SSE to AVX\n'
-                      '\t\tvinsertf128 ymm0, ymm0, xmm0, 0x1\n'
-                      '\t\t# expand from AVX to AVX512\n'
-                      '\t\tvinsert64x4 zmm0, zmm0, ymm0, 0x1\n')
-        return def_instr, ninstr, init, expand
-
-    def __define_loop_lat(self):
-        """
-        Create latency loop.
-
-        Returns
-        -------
-        str
-            Latency loop as string
-        """
-        loop_lat = ('loop:\n'
-                    '\t\tinc      i\n')
-        if self.num_operands == 0:
-            for i in range(0, int(self.num_instr)):
-                loop_lat += '\t\tINSTR\n'
-        if self.num_operands == 1:
-            for i in range(0, int(self.num_instr)):
-                loop_lat += '\t\tINSTR    {}\n'.format(self.ops[self.op_a][0])
-        elif self.num_operands == 2 and self.op_a == self.op_b:
-            for i in range(0, int(self.num_instr), 2):
-                loop_lat += '\t\tINSTR    {}, {}\n'.format(self.ops[self.op_a][0],
-                                                           self.ops[self.op_b][1])
-                loop_lat += '\t\tINSTR    {}, {}\n'.format(self.ops[self.op_b][1],
-                                                           self.ops[self.op_b][0])
-        elif self.num_operands == 2 and self.op_a != self.op_b:
-            for i in range(0, int(self.num_instr), 2):
-                loop_lat += '\t\tINSTR    {}, {}\n'.format(self.ops[self.op_a][0],
-                                                           self.ops[self.op_b][0])
-                loop_lat += '\t\tINSTR    {}, {}\n'.format(self.ops[self.op_a][0],
-                                                           self.ops[self.op_b][0])
-        elif self.num_operands == 3 and self.op_a == self.op_b:
-            for i in range(0, int(self.num_instr), 2):
-                loop_lat += '\t\tINSTR    {}, {}, {}\n'.format(self.ops[self.op_a][0],
-                                                               self.ops[self.op_b][1],
-                                                               self.ops[self.op_c][0])
-                loop_lat += '\t\tINSTR    {}, {}, {}\n'.format(self.ops[self.op_a][1],
-                                                               self.ops[self.op_b][0],
-                                                               self.ops[self.op_c][0])
-        elif self.num_operands == 3 and self.op_a == self.op_c:
-            for i in range(0, int(self.num_instr), 2):
-                loop_lat += '\t\tINSTR    {}, {}, {}\n'.format(self.ops[self.op_a][0],
-                                                               self.ops[self.op_b][0],
-                                                               self.ops[self.op_c][0])
-                loop_lat += '\t\tINSTR    {}, {}, {}\n'.format(self.ops[self.op_a][1],
-                                                               self.ops[self.op_b][0],
-                                                               self.ops[self.op_c][0])
-        loop_lat += ('\t\tcmp      i, N\n'
-                     '\t\tjl       loop\n')
-        return loop_lat
-
-    def __define_loop_thrpt(self):
-        """
-        Create throughput loop.
-
-        Returns
-        -------
-        str
-            Throughput loop as string
-        """
-        loop_thrpt = ('loop:\n'
-                      '\t\tinc      i\n')
-        ext = ''
-        ext1 = False
-        ext2 = False
-        if self.num_operands == 2:
-            ext1 = True
-        if self.num_operands == 3:
-            ext1 = True
-            ext2 = True
-        for i in range(0, int(self.num_instr)):
-            if self.num_operands == 0:
-                loop_thrpt += '\t\tINSTR\n'
-                continue
-            if ext1:
-                ext = ', {}'.format(self.ops[self.op_b][i % 3])
-            if ext2:
-                ext += ', {}'.format(self.ops[self.op_c][i % 3])
-            reg_num = (i % (len(self.ops[self.op_a]) - 3)) + 3
-            loop_thrpt += '\t\tINSTR    {}{}\n'.format(self.ops[self.op_a][reg_num], ext)
-        loop_thrpt += ('\t\tcmp      i, N\n'
-                       '\t\tjl       loop\n')
-        return loop_thrpt
-
-    def is_in_dir(self):
-        """
-        Check if testcases with the same name already exist in testcase
-        directory.
-
-        Returns
-        -------
-        (bool, bool)
-            True    if file is in directory
-            False   if file is not in directory
-            While the first value stands for the throughput testcase
-            and the second value stands for the latency testcase
-        """
-        tp = False
-        lt = False
-        name = self.instr+self.extension
-        for root, dirs, files in os.walk(os.path.dirname(__file__)+'/benchmarks'):
-            if (name + '-tp.S') in files:
-                tp = True
-            if name+'.S' in files:
-                lt = True
-        return tp, lt
-
-    def get_entryname(self):
-        """
-        Return the name of the entry the instruction form would be the data file
-
-        Returns
-        -------
-        str
-            The composited string out of instruction mnemonic and operands
-        """
-        name = self.instr+self.extension
-        return name
diff --git a/osaca/utils.py b/osaca/utils.py
new file mode 100644
index 0000000..054be1d
--- /dev/null
+++ b/osaca/utils.py
@@ -0,0 +1,13 @@
+#!/usr/bin/env python3
+import os.path
+
+
+def find_file(name):
+    """Check for existence of name in user or package data folders and return path."""
+    search_paths = [os.path.expanduser('~/.osaca/data'),
+                    os.path.join(os.path.dirname(__file__), 'data')]
+    for dir in search_paths:
+        path = os.path.join(dir, name)
+        if os.path.exists(path):
+            return path
+    raise FileNotFoundError("Could not find {!r} in {!r}.".format(name, search_paths))
\ No newline at end of file
diff --git a/setup.cfg b/setup.cfg
index 8aff741..94bff39 100644
--- a/setup.cfg
+++ b/setup.cfg
@@ -1,5 +1,5 @@
 [pep8]
-max-line-length=100
+max-line-length=99
 
 [metadata]
 license-file=LICENSE
diff --git a/setup.py b/setup.py
index ad796aa..285c28e 100755
--- a/setup.py
+++ b/setup.py
@@ -75,6 +75,7 @@ setup(
         # that you indicate wheter you support Python2, Python 3 or both.
         'Programming Language :: Python :: 3',
         'Programming Language :: Python :: 3.5',
+        'Programming Language :: Python :: 3.6',
     ],
 
     # What doesd your project relate to?
@@ -89,9 +90,10 @@ setup(
     # requirements files see:
     # https://packaging.python.org/en/latest/requirements.html
     install_requires=[
-        'numpy',
-        'pandas',
         'kerncraft',
+        'networkx',
+        'pyparsing',
+        'pygraphviz',
     ],
     python_requires='>=3.5',
 
diff --git a/tests/all_tests.py b/tests/all_tests.py
index 7666878..c4b711f 100755
--- a/tests/all_tests.py
+++ b/tests/all_tests.py
@@ -1,14 +1,19 @@
-#!/usr//bin/env python
+#!/usr/bin/env python3
 
 import sys
-
 import unittest
 
-
 sys.path[0:0] = ['.', '..']
 suite = unittest.TestLoader().loadTestsFromNames(
     [
-        'test_osaca'
+        'test_base_parser',
+        'test_parser_x86att',
+        'test_parser_AArch64v81',
+        'test_marker_utils',
+        'test_semantics',
+        'test_frontend',
+        'test_db_interface',
+        'test_kerncraftAPI',
     ]
 )
 
diff --git a/tests/test_base_parser.py b/tests/test_base_parser.py
new file mode 100755
index 0000000..1ef8cea
--- /dev/null
+++ b/tests/test_base_parser.py
@@ -0,0 +1,76 @@
+#!/usr/bin/env python3
+"""
+Unit tests for base assembly parser
+"""
+
+import os
+import unittest
+
+from osaca.parser import AttrDict, BaseParser
+
+
+class TestBaseParser(unittest.TestCase):
+    @classmethod
+    def setUpClass(self):
+        try:
+            self.parser = BaseParser()
+        except NotImplementedError:
+            pass
+        with open(self._find_file('triad-x86-iaca.s')) as f:
+            self.triad_code = f.read()
+
+    ##################
+    # Test
+    ##################
+
+    def test_parse_file(self):
+        with self.assertRaises(NotImplementedError):
+            self.parser.parse_file(self.triad_code)
+
+    def test_parse_line(self):
+        line_instruction = '\t\tlea       2(%rax,%rax), %ecx #12.9'
+        with self.assertRaises(NotImplementedError):
+            self.parser.parse_line(line_instruction)
+
+    def test_parse_instruction(self):
+        instr1 = '\t\tvcvtsi2ss %edx, %xmm2, %xmm2\t\t\t#12.27'
+        with self.assertRaises(NotImplementedError):
+            self.parser.parse_instruction(instr1)
+
+    def test_register_funcs(self):
+        reg_a1 = AttrDict({'name': 'rax'})
+        reg_a2 = AttrDict({'name': 'eax'})
+        register_string = 'v1.2d'
+        with self.assertRaises(NotImplementedError):
+            self.parser.is_reg_dependend_of(reg_a1, reg_a2)
+        with self.assertRaises(NotImplementedError):
+            self.parser.parse_register(register_string)
+        with self.assertRaises(NotImplementedError):
+            self.parser.is_gpr(reg_a1)
+        with self.assertRaises(NotImplementedError):
+            self.parser.is_vector_register(reg_a1)
+        with self.assertRaises(NotImplementedError):
+            self.parser.process_operand(reg_a1)
+        with self.assertRaises(NotImplementedError):
+            self.parser.get_full_reg_name(reg_a1)
+
+    def test_normalize_imd(self):
+        imd_hex_1 = {'value': '0x4f'}
+        with self.assertRaises(NotImplementedError):
+            self.parser.normalize_imd(imd_hex_1)
+
+    ##################
+    # Helper functions
+    ##################
+
+    @staticmethod
+    def _find_file(name):
+        testdir = os.path.dirname(__file__)
+        name = os.path.join(testdir, 'test_files', name)
+        assert os.path.exists(name)
+        return name
+
+
+if __name__ == '__main__':
+    suite = unittest.TestLoader().loadTestsFromTestCase(TestBaseParser)
+    unittest.TextTestRunner(verbosity=2).run(suite)
diff --git a/tests/test_db_interface.py b/tests/test_db_interface.py
new file mode 100755
index 0000000..f6d0808
--- /dev/null
+++ b/tests/test_db_interface.py
@@ -0,0 +1,86 @@
+#!/usr/bin/env python3
+"""
+Unit tests for DB interface
+"""
+
+import unittest
+
+from osaca.db_interface import sanity_check
+from osaca.semantics import MachineModel
+
+
+class TestDBInterface(unittest.TestCase):
+    @classmethod
+    def setUpClass(self):
+        sample_entry = {
+            'name': 'DoItRightAndDoItFast',
+            'operands': [
+                {'class': 'memory', 'offset': 'imd', 'base': 'gpr', 'index': 'gpr', 'scale': 8},
+                {'class': 'register', 'name': 'xmm'},
+            ],
+            'throughput': 1.25,
+            'latency': 125,
+            'uops': 6,
+        }
+        self.entry_csx = sample_entry.copy()
+        self.entry_tx2 = sample_entry.copy()
+        self.entry_zen1 = sample_entry.copy()
+
+        # self.entry_csx['port_pressure'] = [1.25, 0, 1.25, 0.5, 0.5, 0.5, 0.5, 0, 1.25, 1.25, 0]
+        self.entry_csx['port_pressure'] = [[5, '0156'], [1, '23'], [1, ['2D', '3D']]]
+        # self.entry_tx2['port_pressure'] = [2.5, 2.5, 0, 0, 0.5, 0.5]
+        self.entry_tx2['port_pressure'] = [[5, '01'], [1, '45']]
+        del self.entry_tx2['operands'][1]['name']
+        self.entry_tx2['operands'][1]['prefix'] = 'x'
+        # self.entry_zen1['port_pressure'] = [1, 1, 1, 1, 0, 1, 0, 0, 0, 0.5, 1, 0.5, 1]
+        self.entry_zen1['port_pressure'] = [[4, '0123'], [1, '4'], [1, '89'], [2, ['8D', '9D']]]
+
+    ###########
+    # Tests
+    ###########
+
+    def test_add_single_entry(self):
+        mm_csx = MachineModel('csx')
+        mm_tx2 = MachineModel('tx2')
+        mm_zen1 = MachineModel('zen1')
+        num_entries_csx = len(mm_csx['instruction_forms'])
+        num_entries_tx2 = len(mm_tx2['instruction_forms'])
+        num_entries_zen1 = len(mm_zen1['instruction_forms'])
+
+        mm_csx.set_instruction_entry(self.entry_csx)
+        mm_tx2.set_instruction_entry(self.entry_tx2)
+        mm_zen1.set_instruction_entry({'name': 'empty_operation'})
+
+        num_entries_csx = len(mm_csx['instruction_forms']) - num_entries_csx
+        num_entries_tx2 = len(mm_tx2['instruction_forms']) - num_entries_tx2
+        num_entries_zen1 = len(mm_zen1['instruction_forms']) - num_entries_zen1
+
+        self.assertEqual(num_entries_csx, 1)
+        self.assertEqual(num_entries_tx2, 1)
+        self.assertEqual(num_entries_zen1, 1)
+
+    def test_invalid_add(self):
+        entry = {}
+        with self.assertRaises(KeyError):
+            MachineModel('csx').set_instruction_entry(entry)
+        with self.assertRaises(TypeError):
+            MachineModel('csx').set_instruction()
+
+    def test_sanity_check(self):
+        # non-verbose
+        sanity_check('csx', verbose=False)
+        sanity_check('tx2', verbose=False)
+        sanity_check('zen1', verbose=False)
+        # verbose
+        sanity_check('csx', verbose=True)
+        sanity_check('tx2', verbose=True)
+        sanity_check('zen1', verbose=True)
+
+    ##################
+    # Helper functions
+    ##################
+
+
+if __name__ == '__main__':
+    suite = unittest.TestLoader().loadTestsFromTestCase(TestDBInterface)
+    unittest.TextTestRunner(verbosity=2).run(suite)
diff --git a/tests/test_files/hidden_load_machine_model.yml b/tests/test_files/hidden_load_machine_model.yml
new file mode 100644
index 0000000..637b67e
--- /dev/null
+++ b/tests/test_files/hidden_load_machine_model.yml
@@ -0,0 +1,539 @@
+osaca_version: 0.3.1
+micro_architecture: AMD Zen (family 17h)
+arch_code: ZEN1
+isa: x86
+load_latency: {gpr: 4.0, xmm: 4.0, ymm: 4.0}
+load_throughput_multiplier: {gpr: 1.0, xmm: 1.0, ymm: 2.0}
+load_throughput:
+- {base: gpr, index: ~, offset: ~, scale: 1, port_pressure:     [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: ~, offset: ~, scale: 8, port_pressure:     [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: ~, offset: imd, scale: 1, port_pressure:   [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: ~, offset: imd, scale: 8, port_pressure:   [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: gpr, offset: ~, scale: 1, port_pressure:   [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: gpr, offset: ~, scale: 8, port_pressure:   [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: gpr, offset: imd, scale: 1, port_pressure: [[1, '89'], [1, ['8D','9D']]]}
+- {base: gpr, index: gpr, offset: imd, scale: 8, port_pressure: [[1, '89'], [1, ['8D','9D']]]}
+hidden_loads: true
+ports: ['0', '1', '2', '3', 3DV, '4', '5', '6', '7', '8', '9', 8D, 9D, ST]
+port_model_scheme: |
+  ┌--------------------------------------┐  ┌-----------------------------------------------┐
+  |       96 entries OoO scheduler       |  |           84 entries OoO scheduler            |
+  └--------------------------------------┘  └-----------------------------------------------┘
+     0 |        1 |       2 |       3 |        4 |     5 |     6 |     7 |      8 |     9 |
+       ▼         ▼         ▼         ▼          ▼       ▼       ▼       ▼        ▼       ▼
+   ┌-------┐ ┌-------┐ ┌-------┐ ┌-------┐  ┌------┐ ┌-----┐ ┌-----┐ ┌------┐ ┌-----┐ ┌-----┐
+   |SSE ALU| |SSE ALU| |SSE ALU| |SSE ALU|  | ALU  | | ALU | | ALU | | ALU  | | AGU | | AGU |
+   └-------┘ └-------┘ └-------┘ └-------┘  └------┘ └-----┘ └-----┘ └------┘ └-----┘ └-----┘
+   ┌-------┐ ┌-------┐ ┌-------┐ ┌-------┐  ┌------┐ ┌-----┐ ┌-----┐ ┌------┐    |       |
+   |SSE MUL| |SSE MUL| |SSE ADD| |SSE ADD|  |BRANCH| | MUL | | MUL | |BRANCH|    ▼       ▼
+   └-------┘ └-------┘ └-------┘ └-------┘  └------┘ └-----┘ └-----┘ └------┘ ┌-------------┐ 
+   ┌-------┐ ┌-------┐ ┌-------┐ ┌-------┐                                    |    LOAD     |
+   |SSE FMA| |SSE FMA| |  SSE  | |SSE DIV|                                    └-------------┘
+   └-------┘ └-------┘ |  SHUF | └-------┘                                    ┌-------------┐ 
+             ┌-------┐ └-------┘                                              |    LOAD     |
+             |  SSE  |                                                        └-------------┘
+             |  SHUF |                                                        ┌-------------┐
+             └-------┘                                                        |    STORE    |
+                                                                              └-------------┘
+instruction_forms:
+- name: add
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: add
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: addl
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: addq
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: cmpl
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: ~  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: cmpq
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: ~  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: incq
+  operands:
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567     
+  port_pressure: [[1, '4567']]
+- name: ja
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: ~
+  port_pressure: []
+- name: jb
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: ~
+  port_pressure: []
+- name: jne
+  operands:
+  - class: identifier
+  throughput: 0.0
+  latency: ~
+  port_pressure: []
+- name: leaq
+  operands:
+  - class: memory
+    base: gpr
+    offset: imd
+    index: ~
+    scale: 1
+  - class: register
+    name: gpr
+  throughput: 0.5
+  latency: ~  # 	1*p89
+  port_pressure: [[1, '89']]
+- name: movl
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: mulsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: mulss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 3.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: rcpss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: ~     #1.0
+  latency: 5.0
+  port_pressure: []
+- name: sqrtsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: ~     #8.0
+  latency: 23.0
+  port_pressure: []
+- name: sqrtss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: ~     #5.0
+  latency: 17.0
+  port_pressure: []
+- name: subq
+  operands:
+  - class: register
+    name: gpr
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: subq
+  operands:
+  - class: immediate
+    imd: int
+  - class: register
+    name: gpr
+  throughput: 0.25
+  latency: 1.0  # 	1*p4567
+  port_pressure: [[1, '4567']]
+- name: vaddpd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 3.0  # 	2*p23
+  port_pressure: [[2, '23']]
+- name: vaddsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 3.0  # 	1*p23
+  port_pressure: [[1, '23']]
+- name: vaddss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 3.0  # 	1*p23
+  port_pressure: [[1, '23']]
+- name: vdivsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 4.0
+  latency: 13.0  # 	1*p3+4*p3DV
+  port_pressure: [[1, '3'], [4.0, [3DV]]]
+- name: vdivss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 3.0
+  latency: 10.0
+  port_pressure: [[1, '3'], [3.0, [3DV]]]
+- name: vfmadd213pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	2*p01
+  port_pressure: [[2, '01']]
+- name: vfmadd231pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	2*p01
+  port_pressure: [[2, '01']]
+- name: vfmadd132pd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	2*p01
+  port_pressure: [[2, '01']]
+- name: vmulsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulss
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 3.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulpd
+  operands:
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01+1*p89+1*p8D9D
+  port_pressure: [[1, '01'], [1, '89'], [1, [8D, 9D]]]
+- name: vmulpd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p01
+  port_pressure: [[1, '01']]
+- name: vmulpd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 1.0
+  latency: 4.0  # 	2*p01
+  port_pressure: [[2, '01']]
+- name: vmovapd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovapd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovapd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovaps
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovaps
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 2.0
+  latency: 3.0  # 	2*p89+2*pST
+  port_pressure: [[2, '89'], [2, [ST]]]
+- name: vmovupd
+  operands:
+  - class: register
+    name: ymm
+  - class: register
+    name: ymm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovsd
+  operands:
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  - class: register
+    name: xmm
+  throughput: 0.5
+  latency: 4.0  # 	1*p89+1*p8D9D
+  port_pressure: [[1, '89'], [1, [8D, 9D]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: register
+    name: xmm
+  throughput: 0.0
+  latency: 0.0
+  port_pressure: []
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: ~
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: ~
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: ~
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
+- name: vmovsd
+  operands:
+  - class: register
+    name: xmm
+  - class: memory
+    base: gpr
+    offset: imd
+    index: gpr
+    scale: 1
+  throughput: 1.0
+  latency: 4.0  # 	1*p89+1*pST
+  port_pressure: [[1, '89'], [1, [ST]]]
diff --git a/tests/test_files/kernel-AArch64.s b/tests/test_files/kernel-AArch64.s
new file mode 100644
index 0000000..3509ee9
--- /dev/null
+++ b/tests/test_files/kernel-AArch64.s
@@ -0,0 +1,27 @@
+// mov x1, #111
+// .byte 213,3,32,31
+.LBB0_32:
+    ldp q4, q5, [x9, #-32]
+    ldp q6, q7, [x9], #64
+    ldp q16, q17, [x11, #-32]!
+    ldp q18, q19, [x11], #64
+    fmul    v4.2d, v4.2d, v16.2d
+    fmul    v5.2d, v5.2d, v17.2d
+    fmul    v6.2d, v6.2d, v18.2d
+    fmul    v7.2d, v7.2d, v19.2d
+    ldp q0, q1, [x8, #-32]
+    ldp q2, q3, [x8], #64
+    fadd    v0.2d, v0.2d, v4.2d
+    fadd    v1.2d, v1.2d, v5.2d
+    stp q0, q1, [x10, #-32]
+    fadd    v2.2d, v2.2d, v6.2d
+    fadd    v3.2d, v3.2d, v7.2d
+    stp q2, q3, [x10]
+    add x10, x10, #64           // =64
+    adds    x12, x12, #1            // =1
+    fmov    s0, -1.0e+0
+    fmov    s1, #2.0e+2f
+    prfm    pldl1keep, [x26, #2112]
+    b.ne    .LBB0_32
+// mov x1, #222
+// .byte 213,3,32,31
diff --git a/tests/test_files/kernel-x86.s b/tests/test_files/kernel-x86.s
new file mode 100644
index 0000000..e582b6e
--- /dev/null
+++ b/tests/test_files/kernel-x86.s
@@ -0,0 +1,13 @@
+#movl    $111,%ebx
+#.byte   100,103,144
+.L10:	
+    vmovapd	(%r15,%rax), %ymm0
+	vmovapd	(%r12,%rax), %ymm3
+	addl	$1, %ecx
+	vfmadd132pd	0(%r13,%rax), %ymm3, %ymm0
+	vmovapd	%ymm0, (%r14,%rax)
+	addq	$32, %rax
+	cmpl	%ecx, %r10d
+	ja	.L10
+#movl    $222,%ebx
+#.byte   100,103,144
diff --git a/tests/test_files/triad-arm-iaca.s b/tests/test_files/triad-arm-iaca.s
new file mode 100644
index 0000000..ff2b692
--- /dev/null
+++ b/tests/test_files/triad-arm-iaca.s
@@ -0,0 +1,645 @@
+	.text
+	.file	"triad.c"
+	.section	.rodata.cst8,"aM",@progbits,8
+	.p2align	3               // -- Begin function triad
+.LCPI0_0:
+	.xword	4596373779694328218     // double 0.20000000000000001
+.LCPI0_1:
+	.xword	4652007308841189376     // double 1000
+.LCPI0_2:
+	.xword	4517329193108106637     // double 9.9999999999999995E-7
+.LCPI0_3:
+	.xword	4629700416936869888     // double 32
+.LCPI0_4:
+	.xword	4562146422526312448     // double 9.765625E-4
+	.text
+	.globl	triad
+	.p2align	6
+	.type	triad,@function
+triad:                                  // @triad
+	.cfi_startproc
+// %bb.0:
+	sub	sp, sp, #224            // =224
+	str	d8, [sp, #112]          // 8-byte Folded Spill
+	stp	x28, x27, [sp, #128]    // 16-byte Folded Spill
+	stp	x26, x25, [sp, #144]    // 16-byte Folded Spill
+	stp	x24, x23, [sp, #160]    // 16-byte Folded Spill
+	stp	x22, x21, [sp, #176]    // 16-byte Folded Spill
+	stp	x20, x19, [sp, #192]    // 16-byte Folded Spill
+	stp	x29, x30, [sp, #208]    // 16-byte Folded Spill
+	add	x29, sp, #208           // =208
+	.cfi_def_cfa w29, 16
+	.cfi_offset w30, -8
+	.cfi_offset w29, -16
+	.cfi_offset w19, -24
+	.cfi_offset w20, -32
+	.cfi_offset w21, -40
+	.cfi_offset w22, -48
+	.cfi_offset w23, -56
+	.cfi_offset w24, -64
+	.cfi_offset w25, -72
+	.cfi_offset w26, -80
+	.cfi_offset w27, -88
+	.cfi_offset w28, -96
+	.cfi_offset b8, -112
+	mov	w19, w0
+	orr	w0, wzr, #0x40
+	sbfiz	x23, x19, #3, #32
+	mov	x1, x23
+	bl	aligned_alloc
+	mov	x20, x0
+	orr	w0, wzr, #0x40
+	mov	x1, x23
+	bl	aligned_alloc
+	str	x0, [sp, #88]           // 8-byte Folded Spill
+	orr	w0, wzr, #0x40
+	mov	x1, x23
+	bl	aligned_alloc
+	mov	x22, x0
+	orr	w0, wzr, #0x40
+	mov	x1, x23
+	bl	aligned_alloc
+	mov	x23, x0
+	cmp	w19, #0                 // =0
+	b.le	.LBB0_3
+// %bb.1:
+	mov	w24, w19
+	cmp	w19, #7                 // =7
+	b.hi	.LBB0_9
+// %bb.2:
+	mov	x8, xzr
+	b	.LBB0_17
+.LBB0_3:
+	adrp	x8, .LCPI0_0
+	orr	w25, wzr, #0x1
+	ldr	d8, [x8, :lo12:.LCPI0_0]
+	.p2align	6
+.LBB0_4:                                // =>This Loop Header: Depth=1
+                                        //     Child Loop BB0_5 Depth 2
+	sub	x0, x29, #88            // =88
+	add	x1, sp, #96             // =96
+	bl	timing
+	mov	w21, w25
+	cbz	w25, .LBB0_8
+	.p2align	6
+.LBB0_5:                                //   Parent Loop BB0_4 Depth=1
+                                        // =>  This Inner Loop Header: Depth=2
+	ldr	d0, [x20]
+	fcmp	d0, #0.0
+	b.le	.LBB0_7
+// %bb.6:                               //   in Loop: Header=BB0_5 Depth=2
+	mov	x0, x20
+	bl	dummy
+.LBB0_7:                                //   in Loop: Header=BB0_5 Depth=2
+	subs	w21, w21, #1            // =1
+	b.ne	.LBB0_5
+.LBB0_8:                                //   in Loop: Header=BB0_4 Depth=1
+	add	x0, sp, #104            // =104
+	add	x1, sp, #96             // =96
+	bl	timing
+	ldr	d0, [sp, #104]
+	ldur	d1, [x29, #-88]
+	fsub	d1, d0, d1
+	lsl	w25, w25, #1
+	fcmp	d1, d8
+	b.mi	.LBB0_4
+	b	.LBB0_38
+.LBB0_9:
+	and	x8, x24, #0xfffffff8
+	sub	x10, x8, #8             // =8
+	lsr	x11, x10, #3
+	add	w9, w11, #1             // =1
+	and	x9, x9, #0x3
+	cmp	x10, #24                // =24
+	b.hs	.LBB0_11
+// %bb.10:
+	orr	w13, wzr, #0x20
+	cbnz	x9, .LBB0_14
+	b	.LBB0_16
+.LBB0_11:
+	mov	x16, #28286
+	movk	x16, #29109, lsl #16
+	ldr	x15, [sp, #88]          // 8-byte Folded Reload
+	movk	x16, #34426, lsl #32
+	movk	x16, #16000, lsl #48
+	dup	v0.2d, x16
+	mvn	x11, x11
+	mov	x10, xzr
+	add	x11, x9, x11
+	add	x12, x23, #128          // =128
+	add	x13, x20, #128          // =128
+	add	x14, x22, #128          // =128
+	add	x15, x15, #128          // =128
+	.p2align	6
+.LBB0_12:                               // =>This Inner Loop Header: Depth=1
+	stp	q0, q0, [x12]
+	stp	q0, q0, [x12, #-128]
+	stp	q0, q0, [x12, #32]
+	stp	q0, q0, [x12, #-96]
+	stp	q0, q0, [x14]
+	add	x10, x10, #32           // =32
+	stp	q0, q0, [x14, #-128]
+	stp	q0, q0, [x14, #32]
+	stp	q0, q0, [x14, #-96]
+	stp	q0, q0, [x15]
+	stp	q0, q0, [x15, #-128]
+	stp	q0, q0, [x15, #32]
+	stp	q0, q0, [x15, #-96]
+	stp	q0, q0, [x13]
+	stp	q0, q0, [x13, #-128]
+	stp	q0, q0, [x13, #32]
+	stp	q0, q0, [x13, #-96]
+	stp	q0, q0, [x12, #64]
+	stp	q0, q0, [x12, #-64]
+	stp	q0, q0, [x12, #96]
+	stp	q0, q0, [x12, #-32]
+	add	x12, x12, #256          // =256
+	stp	q0, q0, [x14, #64]
+	stp	q0, q0, [x14, #-64]
+	stp	q0, q0, [x14, #96]
+	stp	q0, q0, [x14, #-32]
+	add	x14, x14, #256          // =256
+	stp	q0, q0, [x15, #64]
+	stp	q0, q0, [x15, #-64]
+	stp	q0, q0, [x15, #96]
+	stp	q0, q0, [x15, #-32]
+	add	x15, x15, #256          // =256
+	stp	q0, q0, [x13, #64]
+	stp	q0, q0, [x13, #-64]
+	stp	q0, q0, [x13, #96]
+	stp	q0, q0, [x13, #-32]
+	add	x13, x13, #256          // =256
+	adds	x11, x11, #4            // =4
+	b.ne	.LBB0_12
+// %bb.13:
+	lsl	x10, x10, #3
+	orr	x13, x10, #0x20
+	cbz	x9, .LBB0_16
+.LBB0_14:
+	ldr	x14, [sp, #88]          // 8-byte Folded Reload
+	add	x10, x23, x13
+	add	x11, x22, x13
+	add	x12, x20, x13
+	add	x13, x14, x13
+	mov	x14, #28286
+	movk	x14, #29109, lsl #16
+	movk	x14, #34426, lsl #32
+	movk	x14, #16000, lsl #48
+	dup	v0.2d, x14
+	neg	x9, x9
+	.p2align	6
+.LBB0_15:                               // =>This Inner Loop Header: Depth=1
+	stp	q0, q0, [x10]
+	stp	q0, q0, [x11]
+	stp	q0, q0, [x10, #-32]
+	stp	q0, q0, [x13]
+	stp	q0, q0, [x11, #-32]
+	add	x10, x10, #64           // =64
+	stp	q0, q0, [x12]
+	stp	q0, q0, [x13, #-32]
+	add	x11, x11, #64           // =64
+	stp	q0, q0, [x12, #-32]
+	add	x12, x12, #64           // =64
+	add	x13, x13, #64           // =64
+	adds	x9, x9, #1              // =1
+	b.ne	.LBB0_15
+.LBB0_16:
+	cmp	x8, x24
+	b.eq	.LBB0_19
+.LBB0_17:
+	ldr	x10, [sp, #88]          // 8-byte Folded Reload
+	mov	x13, #28286
+	movk	x13, #29109, lsl #16
+	lsl	x12, x8, #3
+	movk	x13, #34426, lsl #32
+	add	x9, x20, x12
+	movk	x13, #16000, lsl #48
+	add	x10, x10, x12
+	add	x11, x22, x12
+	add	x12, x23, x12
+	sub	x8, x24, x8
+	.p2align	6
+.LBB0_18:                               // =>This Inner Loop Header: Depth=1
+	str	x13, [x12], #8
+	str	x13, [x11], #8
+	str	x13, [x10], #8
+	str	x13, [x9], #8
+	subs	x8, x8, #1              // =1
+	b.ne	.LBB0_18
+.LBB0_19:
+	ldr	x10, [sp, #88]          // 8-byte Folded Reload
+	add	x8, x20, #256           // =256
+	and	x26, x24, #0xfffffff8
+	str	x8, [sp, #40]           // 8-byte Folded Spill
+	add	x8, x23, #256           // =256
+	sub	x27, x26, #8            // =8
+	str	x8, [sp, #32]           // 8-byte Folded Spill
+	add	x8, x22, #256           // =256
+	orr	w25, wzr, #0x1
+	str	x8, [sp, #24]           // 8-byte Folded Spill
+	add	x8, x10, #256           // =256
+	str	x8, [sp, #16]           // 8-byte Folded Spill
+	lsr	x8, x27, #3
+	add	w9, w8, #1              // =1
+	mvn	x8, x8
+	and	x28, x9, #0x7
+	add	x8, x28, x8
+	str	x8, [sp, #8]            // 8-byte Folded Spill
+	neg	x8, x28
+	str	x8, [sp, #80]           // 8-byte Folded Spill
+	add	x8, x10, #32            // =32
+	str	x8, [sp, #72]           // 8-byte Folded Spill
+	add	x8, x22, #32            // =32
+	str	x8, [sp, #64]           // 8-byte Folded Spill
+	add	x8, x20, #32            // =32
+	str	x8, [sp, #56]           // 8-byte Folded Spill
+	add	x8, x23, #32            // =32
+	str	x8, [sp, #48]           // 8-byte Folded Spill
+	adrp	x8, .LCPI0_0
+	ldr	d8, [x8, :lo12:.LCPI0_0]
+	.p2align	6
+.LBB0_20:                               // =>This Loop Header: Depth=1
+                                        //     Child Loop BB0_22 Depth 2
+                                        //       Child Loop BB0_29 Depth 3
+                                        //       Child Loop BB0_32 Depth 3
+                                        //       Child Loop BB0_35 Depth 3
+	sub	x0, x29, #88            // =88
+	add	x1, sp, #96             // =96
+	bl	timing
+	cbz	w25, .LBB0_37
+// %bb.21:                              //   in Loop: Header=BB0_20 Depth=1
+	mov	w21, wzr
+	.p2align	6
+.LBB0_22:                               //   Parent Loop BB0_20 Depth=1
+                                        // =>  This Loop Header: Depth=2
+                                        //       Child Loop BB0_29 Depth 3
+                                        //       Child Loop BB0_32 Depth 3
+                                        //       Child Loop BB0_35 Depth 3
+	ldr	d0, [x20]
+	fcmp	d0, #0.0
+	b.le	.LBB0_24
+// %bb.23:                              //   in Loop: Header=BB0_22 Depth=2
+	mov	x0, x20
+	bl	dummy
+.LBB0_24:                               //   in Loop: Header=BB0_22 Depth=2
+	cmp	w19, #7                 // =7
+	b.hi	.LBB0_26
+// %bb.25:                              //   in Loop: Header=BB0_22 Depth=2
+	mov	x12, xzr
+	b	.LBB0_34
+	.p2align	6
+.LBB0_26:                               //   in Loop: Header=BB0_22 Depth=2
+	cmp	x27, #56                // =56
+	b.hs	.LBB0_28
+// %bb.27:                              //   in Loop: Header=BB0_22 Depth=2
+	mov	x8, xzr
+	cbnz	x28, .LBB0_31
+	b	.LBB0_33
+	.p2align	6
+.LBB0_28:                               //   in Loop: Header=BB0_22 Depth=2
+	ldp	x9, x10, [sp, #16]      // 8-byte Folded Reload
+	ldp	x11, x12, [sp, #32]     // 8-byte Folded Reload
+	ldr	x13, [sp, #8]           // 8-byte Folded Reload
+	mov	x8, xzr
+	.p2align	6
+    mov x1, #111                // OSACA START
+    .byte 213,3,32,31           // OSACA START
+.LBB0_29:                               //   Parent Loop BB0_20 Depth=1
+                                        //     Parent Loop BB0_22 Depth=2
+                                        // =>    This Inner Loop Header: Depth=3
+	ldp	q2, q5, [x10, #-256]
+	ldp	q6, q7, [x10, #-224]
+	ldp	q16, q17, [x11, #-256]
+	ldp	q18, q19, [x11, #-224]
+	fmul	v2.2d, v2.2d, v16.2d
+	fmul	v5.2d, v5.2d, v17.2d
+	fmul	v6.2d, v6.2d, v18.2d
+	ldp	q0, q1, [x9, #-256]
+	ldp	q3, q4, [x9, #-224]
+	fmul	v7.2d, v7.2d, v19.2d
+	fadd	v0.2d, v0.2d, v2.2d
+	fadd	v2.2d, v1.2d, v5.2d
+	stp	q0, q2, [x12, #-256]
+	fadd	v1.2d, v3.2d, v6.2d
+	ldp	q6, q17, [x10, #-192]
+	ldp	q18, q19, [x10, #-160]
+	ldp	q20, q21, [x11, #-192]
+	ldp	q22, q23, [x11, #-160]
+	fmul	v6.2d, v6.2d, v20.2d
+	fmul	v17.2d, v17.2d, v21.2d
+	fmul	v18.2d, v18.2d, v22.2d
+	fadd	v3.2d, v4.2d, v7.2d
+	stp	q1, q3, [x12, #-224]
+	ldp	q4, q5, [x9, #-192]
+	ldp	q7, q16, [x9, #-160]
+	fmul	v19.2d, v19.2d, v23.2d
+	fadd	v4.2d, v4.2d, v6.2d
+	fadd	v6.2d, v5.2d, v17.2d
+	stp	q4, q6, [x12, #-192]
+	fadd	v5.2d, v7.2d, v18.2d
+	ldp	q18, q21, [x10, #-128]
+	ldp	q22, q23, [x10, #-96]
+	ldp	q24, q25, [x11, #-128]
+	ldp	q26, q27, [x11, #-96]
+	fmul	v18.2d, v18.2d, v24.2d
+	fmul	v21.2d, v21.2d, v25.2d
+	fmul	v22.2d, v22.2d, v26.2d
+	fadd	v7.2d, v16.2d, v19.2d
+	stp	q5, q7, [x12, #-160]
+	ldp	q16, q17, [x9, #-128]
+	ldp	q19, q20, [x9, #-96]
+	fadd	v16.2d, v16.2d, v18.2d
+	fadd	v18.2d, v17.2d, v21.2d
+	stp	q16, q18, [x12, #-128]
+	fadd	v17.2d, v19.2d, v22.2d
+	ldp	q22, q25, [x10, #-64]
+	ldp	q28, q29, [x11, #-64]
+	fmul	v23.2d, v23.2d, v27.2d
+	ldp	q26, q27, [x10, #-32]
+	fmul	v22.2d, v22.2d, v28.2d
+	fmul	v25.2d, v25.2d, v29.2d
+	ldp	q28, q29, [x11, #-32]
+	fmul	v26.2d, v26.2d, v28.2d
+	fmul	v27.2d, v27.2d, v29.2d
+	fadd	v19.2d, v20.2d, v23.2d
+	stp	q17, q19, [x12, #-96]
+	ldp	q20, q21, [x9, #-64]
+	ldp	q23, q24, [x9, #-32]
+	fadd	v20.2d, v20.2d, v22.2d
+	fadd	v22.2d, v21.2d, v25.2d
+	stp	q20, q22, [x12, #-64]
+	fadd	v21.2d, v23.2d, v26.2d
+	fadd	v23.2d, v24.2d, v27.2d
+	stp	q21, q23, [x12, #-32]
+	ldp	q24, q25, [x10]
+	ldp	q28, q29, [x11]
+	ldp	q26, q27, [x10, #32]
+	fmul	v24.2d, v24.2d, v28.2d
+	fmul	v25.2d, v25.2d, v29.2d
+	ldp	q28, q29, [x11, #32]
+	fmul	v26.2d, v26.2d, v28.2d
+	fmul	v27.2d, v27.2d, v29.2d
+	ldp	q28, q29, [x9]
+	fadd	v24.2d, v28.2d, v24.2d
+	fadd	v25.2d, v29.2d, v25.2d
+	stp	q24, q25, [x12]
+	ldp	q28, q29, [x9, #32]
+	fadd	v26.2d, v28.2d, v26.2d
+	fadd	v27.2d, v29.2d, v27.2d
+	stp	q26, q27, [x12, #32]
+	ldp	q24, q25, [x10, #64]
+	ldp	q28, q29, [x11, #64]
+	ldp	q26, q27, [x10, #96]
+	fmul	v24.2d, v24.2d, v28.2d
+	fmul	v25.2d, v25.2d, v29.2d
+	ldp	q28, q29, [x11, #96]
+	fmul	v26.2d, v26.2d, v28.2d
+	fmul	v27.2d, v27.2d, v29.2d
+	ldp	q28, q29, [x9, #64]
+	fadd	v24.2d, v28.2d, v24.2d
+	fadd	v25.2d, v29.2d, v25.2d
+	stp	q24, q25, [x12, #64]
+	ldp	q28, q29, [x9, #96]
+	fadd	v26.2d, v28.2d, v26.2d
+	fadd	v27.2d, v29.2d, v27.2d
+	stp	q26, q27, [x12, #96]
+	ldp	q24, q25, [x10, #128]
+	ldp	q28, q29, [x11, #128]
+	ldp	q26, q27, [x10, #160]
+	fmul	v24.2d, v24.2d, v28.2d
+	fmul	v25.2d, v25.2d, v29.2d
+	ldp	q28, q29, [x11, #160]
+	fmul	v26.2d, v26.2d, v28.2d
+	fmul	v27.2d, v27.2d, v29.2d
+	ldp	q28, q29, [x9, #128]
+	fadd	v24.2d, v28.2d, v24.2d
+	fadd	v25.2d, v29.2d, v25.2d
+	stp	q24, q25, [x12, #128]
+	ldp	q28, q29, [x9, #160]
+	fadd	v26.2d, v28.2d, v26.2d
+	fadd	v27.2d, v29.2d, v27.2d
+	stp	q26, q27, [x12, #160]
+	ldp	q24, q25, [x10, #192]
+	ldp	q26, q27, [x11, #192]
+	fmul	v24.2d, v24.2d, v26.2d
+	ldp	q26, q28, [x10, #224]
+	fmul	v25.2d, v25.2d, v27.2d
+	ldp	q27, q0, [x11, #224]
+	fmul	v2.2d, v26.2d, v27.2d
+	fmul	v0.2d, v28.2d, v0.2d
+	ldp	q1, q3, [x9, #192]
+	ldp	q4, q5, [x9, #224]
+	fadd	v1.2d, v1.2d, v24.2d
+	fadd	v3.2d, v3.2d, v25.2d
+	stp	q1, q3, [x12, #192]
+	fadd	v2.2d, v4.2d, v2.2d
+	fadd	v0.2d, v5.2d, v0.2d
+	stp	q2, q0, [x12, #224]
+	add	x8, x8, #64             // =64
+	add	x12, x12, #512          // =512
+	add	x11, x11, #512          // =512
+	add	x10, x10, #512          // =512
+	add	x9, x9, #512            // =512
+	adds	x13, x13, #8            // =8
+	b.ne	.LBB0_29
+    mov x1, #222                // OSACA END
+    .byte 213,3,32,31           // OSACA END
+// %bb.30:                              //   in Loop: Header=BB0_22 Depth=2
+	cbz	x28, .LBB0_33
+.LBB0_31:                               //   in Loop: Header=BB0_22 Depth=2
+	lsl	x11, x8, #3
+	ldp	x9, x8, [sp, #64]       // 8-byte Folded Reload
+	ldp	x12, x10, [sp, #48]     // 8-byte Folded Reload
+	add	x8, x8, x11
+	add	x9, x9, x11
+	add	x10, x10, x11
+	add	x11, x12, x11
+	ldr	x12, [sp, #80]          // 8-byte Folded Reload
+	.p2align	6
+.LBB0_32:                               //   Parent Loop BB0_20 Depth=1
+                                        //     Parent Loop BB0_22 Depth=2
+                                        // =>    This Inner Loop Header: Depth=3
+	ldp	q4, q5, [x9, #-32]
+	ldp	q6, q7, [x9], #64
+	ldp	q16, q17, [x11, #-32]
+	ldp	q18, q19, [x11], #64
+	fmul	v4.2d, v4.2d, v16.2d
+	fmul	v5.2d, v5.2d, v17.2d
+	fmul	v6.2d, v6.2d, v18.2d
+	fmul	v7.2d, v7.2d, v19.2d
+	ldp	q0, q1, [x8, #-32]
+	ldp	q2, q3, [x8], #64
+	fadd	v0.2d, v0.2d, v4.2d
+	fadd	v1.2d, v1.2d, v5.2d
+	stp	q0, q1, [x10, #-32]
+	fadd	v2.2d, v2.2d, v6.2d
+	fadd	v3.2d, v3.2d, v7.2d
+	stp	q2, q3, [x10]
+	add	x10, x10, #64           // =64
+	adds	x12, x12, #1            // =1
+	b.ne	.LBB0_32
+.LBB0_33:                               //   in Loop: Header=BB0_22 Depth=2
+	mov	x12, x26
+	cmp	x26, x24
+	b.eq	.LBB0_36
+.LBB0_34:                               //   in Loop: Header=BB0_22 Depth=2
+	ldr	x8, [sp, #88]           // 8-byte Folded Reload
+	lsl	x11, x12, #3
+	sub	x12, x24, x12
+	add	x8, x8, x11
+	add	x9, x22, x11
+	add	x10, x23, x11
+	add	x11, x20, x11
+	.p2align	6
+.LBB0_35:                               //   Parent Loop BB0_20 Depth=1
+                                        //     Parent Loop BB0_22 Depth=2
+                                        // =>    This Inner Loop Header: Depth=3
+	ldr	d0, [x8], #8
+	ldr	d1, [x9], #8
+	ldr	d2, [x10], #8
+	fmul	d1, d1, d2
+	fadd	d0, d0, d1
+	str	d0, [x11], #8
+	subs	x12, x12, #1            // =1
+	b.ne	.LBB0_35
+.LBB0_36:                               //   in Loop: Header=BB0_22 Depth=2
+	add	w21, w21, #1            // =1
+	cmp	w21, w25
+	b.ne	.LBB0_22
+.LBB0_37:                               //   in Loop: Header=BB0_20 Depth=1
+	add	x0, sp, #104            // =104
+	add	x1, sp, #96             // =96
+	bl	timing
+	ldr	d0, [sp, #104]
+	ldur	d1, [x29, #-88]
+	fsub	d1, d0, d1
+	lsl	w25, w25, #1
+	fcmp	d1, d8
+	b.mi	.LBB0_20
+.LBB0_38:
+	scvtf	d4, w19
+	lsr	w1, w25, #1
+	adrp	x8, .LCPI0_1
+	scvtf	d6, w1
+	fadd	d2, d4, d4
+	ldr	d5, [x8, :lo12:.LCPI0_1]
+	adrp	x8, .LCPI0_2
+	fmov	d0, #8.00000000
+	fmul	d2, d2, d6
+	ldr	d3, [x8, :lo12:.LCPI0_2]
+	adrp	x8, .LCPI0_3
+	adrp	x0, .L.str
+	fmul	d2, d2, d3
+	ldr	d3, [x8, :lo12:.LCPI0_3]
+	adrp	x8, .LCPI0_4
+	add	x0, x0, :lo12:.L.str
+	fmul	d3, d6, d3
+	fmul	d0, d4, d0
+	fmul	d3, d3, d4
+	fmul	d4, d4, d6
+	fdiv	d3, d3, d1
+	fdiv	d4, d4, d1
+	fdiv	d4, d4, d5
+	fdiv	d0, d0, d5
+	fdiv	d2, d2, d1
+	ldr	d7, [x8, :lo12:.LCPI0_4]
+	fmul	d3, d3, d7
+	fdiv	d4, d4, d5
+	fmul	d3, d3, d7
+	mov	w2, w19
+	bl	printf
+	mov	x0, x20
+	bl	free
+	ldr	x0, [sp, #88]           // 8-byte Folded Reload
+	bl	free
+	mov	x0, x22
+	bl	free
+	mov	x0, x23
+	bl	free
+	ldp	x29, x30, [sp, #208]    // 16-byte Folded Reload
+	ldp	x20, x19, [sp, #192]    // 16-byte Folded Reload
+	ldp	x22, x21, [sp, #176]    // 16-byte Folded Reload
+	ldp	x24, x23, [sp, #160]    // 16-byte Folded Reload
+	ldp	x26, x25, [sp, #144]    // 16-byte Folded Reload
+	ldp	x28, x27, [sp, #128]    // 16-byte Folded Reload
+	ldr	d8, [sp, #112]          // 8-byte Folded Reload
+	add	sp, sp, #224            // =224
+	ret
+.Lfunc_end0:
+	.size	triad, .Lfunc_end0-triad
+	.cfi_endproc
+                                        // -- End function
+	.globl	main                    // -- Begin function main
+	.p2align	6
+	.type	main,@function
+main:                                   // @main
+	.cfi_startproc
+// %bb.0:
+	stp	x29, x30, [sp, #-16]!   // 16-byte Folded Spill
+	mov	x29, sp
+	.cfi_def_cfa w29, 16
+	.cfi_offset w30, -8
+	.cfi_offset w29, -16
+	adrp	x0, .Lstr
+	add	x0, x0, :lo12:.Lstr
+	bl	puts
+	adrp	x0, .Lstr.3
+	add	x0, x0, :lo12:.Lstr.3
+	bl	puts
+	mov	w0, #190
+	bl	triad
+	mov	w0, #247
+	bl	triad
+	mov	w0, #321
+	bl	triad
+	mov	w0, #417
+	bl	triad
+	mov	w0, #542
+	bl	triad
+	mov	w0, #705
+	bl	triad
+	mov	w0, #917
+	bl	triad
+	mov	w0, #1192
+	bl	triad
+	mov	w0, #1550
+	bl	triad
+	mov	w0, #2015
+	bl	triad
+	mov	w0, #2619
+	bl	triad
+	mov	w0, #3405
+	bl	triad
+	mov	w0, #4427
+	bl	triad
+	mov	w0, #5756
+	bl	triad
+	mov	w0, #7482
+	bl	triad
+	mov	w0, #9727
+	bl	triad
+	mov	w0, wzr
+	ldp	x29, x30, [sp], #16     // 16-byte Folded Reload
+	ret
+.Lfunc_end1:
+	.size	main, .Lfunc_end1-main
+	.cfi_endproc
+	.type	.L.str,@object          // @.str
+	.section	.rodata.str1.1,"aMS",@progbits,1
+.L.str:
+	.asciz	"%12.1f | %9.8f | %9.3f | %7.1f | %7.1f | %7d | %4d \n"
+	.size	.L.str, 53
+	.type	.Lstr,@object           // @str
+	.section	.rodata.str1.16,"aMS",@progbits,1
+	.p2align	4
+.Lstr:
+	.asciz	"TRIAD a[i] = b[i]+c[i]*d[i], 32 byte/it, 2 Flop/it"
+	.size	.Lstr, 51
+	.type	.Lstr.3,@object         // @str.3
+	.p2align	4
+.Lstr.3:
+	.asciz	"Size (KByte) |   runtime  |  MFlop/s  |  MB/s   |  MLUP/s | repeat | size"
+	.size	.Lstr.3, 74
+	.ident	"Arm C/C++/Fortran Compiler version 19.0 (build number 69) (based on LLVM 7.0.2)"
+	.section	".note.GNU-stack","",@progbits
+	.addrsig
diff --git a/tests/test_files/triad-x86-iaca.s b/tests/test_files/triad-x86-iaca.s
new file mode 100644
index 0000000..07afa50
--- /dev/null
+++ b/tests/test_files/triad-x86-iaca.s
@@ -0,0 +1,353 @@
+	.file	"triad.c"
+	.section	.rodata.str1.8,"aMS",@progbits,1
+	.align 8
+.LC9:
+	.string	"%12.1f | %9.8f | %9.3f | %7.1f | %7.1f | %7d | %4d \n"
+	.text
+	.p2align 4,,15
+	.globl	triad
+	.type	triad, @function
+triad:
+.LFB24:
+	.cfi_startproc
+	pushq	%r13
+	.cfi_def_cfa_offset 16
+	.cfi_offset 13, -16
+	movslq	%edi, %rax
+	movl	$64, %edi
+	leaq	16(%rsp), %r13
+	.cfi_def_cfa 13, 0
+	andq	$-32, %rsp
+	pushq	-8(%r13)
+	pushq	%rbp
+	.cfi_escape 0x10,0x6,0x2,0x76,0
+	movq	%rsp, %rbp
+	pushq	%r15
+	.cfi_escape 0x10,0xf,0x2,0x76,0x78
+	leaq	0(,%rax,8), %r15
+	pushq	%r14
+	movq	%r15, %rsi
+	pushq	%r13
+	.cfi_escape 0xf,0x3,0x76,0x68,0x6
+	.cfi_escape 0x10,0xe,0x2,0x76,0x70
+	pushq	%r12
+	pushq	%rbx
+	.cfi_escape 0x10,0xc,0x2,0x76,0x60
+	.cfi_escape 0x10,0x3,0x2,0x76,0x58
+	movq	%rax, %rbx
+	subq	$72, %rsp
+	call	aligned_alloc
+	movq	%r15, %rsi
+	movl	$64, %edi
+	movq	%rax, %r14
+	call	aligned_alloc
+	movq	%r15, %rsi
+	movl	$64, %edi
+	movq	%rax, %r12
+	call	aligned_alloc
+	movq	%r15, %rsi
+	movl	$64, %edi
+	movq	%rax, %r13
+	call	aligned_alloc
+	movq	%rax, %r15
+	leal	-1(%rbx), %eax
+	movl	%eax, -96(%rbp)
+	testl	%ebx, %ebx
+	jle	.L2
+	cmpl	$2, %eax
+	jbe	.L14
+	movl	%ebx, %esi
+	vmovapd	.LC0(%rip), %ymm0
+	xorl	%eax, %eax
+	xorl	%ecx, %ecx
+	shrl	$2, %esi
+	.p2align 4,,10
+	.p2align 3
+.L4:
+	addl	$1, %ecx
+	vmovapd	%ymm0, (%r15,%rax)
+	vmovapd	%ymm0, 0(%r13,%rax)
+	vmovapd	%ymm0, (%r12,%rax)
+	vmovapd	%ymm0, (%r14,%rax)
+	addq	$32, %rax
+	cmpl	%ecx, %esi
+	ja	.L4
+	movl	%ebx, %eax
+	andl	$-4, %eax
+	cmpl	%eax, %ebx
+	je	.L26
+	vzeroupper
+.L3:
+	vmovsd	.LC1(%rip), %xmm0
+	movslq	%eax, %rcx
+	vmovsd	%xmm0, (%r15,%rcx,8)
+	vmovsd	%xmm0, 0(%r13,%rcx,8)
+	vmovsd	%xmm0, (%r12,%rcx,8)
+	vmovsd	%xmm0, (%r14,%rcx,8)
+	leal	1(%rax), %ecx
+	cmpl	%ecx, %ebx
+	jle	.L2
+	movslq	%ecx, %rcx
+	addl	$2, %eax
+	vmovsd	%xmm0, (%r15,%rcx,8)
+	vmovsd	%xmm0, 0(%r13,%rcx,8)
+	vmovsd	%xmm0, (%r12,%rcx,8)
+	vmovsd	%xmm0, (%r14,%rcx,8)
+	cmpl	%eax, %ebx
+	jle	.L2
+	cltq
+	vmovsd	%xmm0, (%r15,%rax,8)
+	vmovsd	%xmm0, 0(%r13,%rax,8)
+	vmovsd	%xmm0, (%r12,%rax,8)
+	vmovsd	%xmm0, (%r14,%rax,8)
+.L2:
+	movl	%ebx, %eax
+	movl	$1, -84(%rbp)
+	movl	%ebx, %r10d
+	andl	$-4, %eax
+	shrl	$2, %r10d
+	movl	%eax, -100(%rbp)
+	.p2align 4,,10
+	.p2align 3
+.L13:
+	leaq	-56(%rbp), %rsi
+	leaq	-72(%rbp), %rdi
+	movl	%r10d, -88(%rbp)
+	call	timing
+	movl	-88(%rbp), %r10d
+	xorl	%r11d, %r11d
+	.p2align 4,,10
+	.p2align 3
+.L12:
+	vmovsd	(%r14), %xmm0
+	vxorpd	%xmm7, %xmm7, %xmm7
+	vucomisd	%xmm7, %xmm0
+	jbe	.L6
+	movq	%r14, %rdi
+	movl	%r11d, -92(%rbp)
+	movl	%r10d, -88(%rbp)
+	vzeroupper
+	call	dummy
+	movl	-92(%rbp), %r11d
+	movl	-88(%rbp), %r10d
+.L6:
+	testl	%ebx, %ebx
+	jle	.L8
+	cmpl	$2, -96(%rbp)
+	jbe	.L15
+	xorl	%eax, %eax
+	xorl	%ecx, %ecx
+	.p2align 4,,10
+	.p2align 3
+        movl      $111, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY
+        .byte     100        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
+        .byte     103        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
+        .byte     144        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
+.L10:
+	vmovapd	(%r15,%rax), %ymm0
+	vmovapd	(%r12,%rax), %ymm3
+	addl	$1, %ecx
+	vfmadd132pd	0(%r13,%rax), %ymm3, %ymm0
+	vmovapd	%ymm0, (%r14,%rax)
+	addq	$32, %rax
+	cmpl	%ecx, %r10d
+	ja	.L10
+        movl      $222, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY
+        .byte     100        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
+        .byte     103        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
+        .byte     144        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
+	movl	-100(%rbp), %eax
+	cmpl	%ebx, %eax
+	je	.L8
+.L9:
+	movslq	%eax, %rcx
+	vmovsd	0(%r13,%rcx,8), %xmm0
+	vmovsd	(%r12,%rcx,8), %xmm5
+	vfmadd132sd	(%r15,%rcx,8), %xmm5, %xmm0
+	vmovsd	%xmm0, (%r14,%rcx,8)
+	leal	1(%rax), %ecx
+	cmpl	%ebx, %ecx
+	jge	.L8
+	movslq	%ecx, %rcx
+	addl	$2, %eax
+	vmovsd	0(%r13,%rcx,8), %xmm0
+	vmovsd	(%r12,%rcx,8), %xmm6
+	vfmadd132sd	(%r15,%rcx,8), %xmm6, %xmm0
+	vmovsd	%xmm0, (%r14,%rcx,8)
+	cmpl	%eax, %ebx
+	jle	.L8
+	cltq
+	vmovsd	(%r15,%rax,8), %xmm0
+	vmovsd	(%r12,%rax,8), %xmm4
+	vfmadd132sd	0(%r13,%rax,8), %xmm4, %xmm0
+	vmovsd	%xmm0, (%r14,%rax,8)
+.L8:
+	addl	$1, %r11d
+	cmpl	-84(%rbp), %r11d
+	jne	.L12
+	leaq	-56(%rbp), %rsi
+	leaq	-64(%rbp), %rdi
+	movl	%r11d, -84(%rbp)
+	movl	%r10d, -88(%rbp)
+	vzeroupper
+	call	timing
+	vmovsd	-64(%rbp), %xmm1
+	vsubsd	-72(%rbp), %xmm1, %xmm1
+	vmovsd	.LC3(%rip), %xmm2
+	movl	-84(%rbp), %r11d
+	movl	-88(%rbp), %r10d
+	vucomisd	%xmm1, %xmm2
+	leal	(%r11,%r11), %eax
+	movl	%eax, -84(%rbp)
+	ja	.L13
+	movl	%eax, %esi
+	vxorpd	%xmm6, %xmm6, %xmm6
+	vxorpd	%xmm0, %xmm0, %xmm0
+	movl	%ebx, %edx
+	sarl	%esi
+	vcvtsi2sd	%ebx, %xmm0, %xmm0
+	movl	$.LC9, %edi
+	movl	$5, %eax
+	vcvtsi2sd	%esi, %xmm6, %xmm6
+	vmulsd	.LC5(%rip), %xmm6, %xmm2
+	vmovsd	.LC4(%rip), %xmm5
+	vmovsd	.LC6(%rip), %xmm7
+	vmulsd	%xmm0, %xmm6, %xmm4
+	vmulsd	%xmm0, %xmm2, %xmm2
+	vdivsd	%xmm1, %xmm4, %xmm4
+	vdivsd	%xmm1, %xmm2, %xmm2
+	vdivsd	%xmm5, %xmm4, %xmm4
+	vmulsd	%xmm7, %xmm2, %xmm3
+	vaddsd	%xmm0, %xmm0, %xmm2
+	vmulsd	.LC8(%rip), %xmm0, %xmm0
+	vmulsd	%xmm6, %xmm2, %xmm2
+	vmulsd	.LC7(%rip), %xmm2, %xmm2
+	vmulsd	%xmm7, %xmm3, %xmm3
+	vdivsd	%xmm5, %xmm0, %xmm0
+	vdivsd	%xmm5, %xmm4, %xmm4
+	vdivsd	%xmm1, %xmm2, %xmm2
+	call	printf
+	movq	%r14, %rdi
+	call	free
+	movq	%r12, %rdi
+	call	free
+	movq	%r13, %rdi
+	call	free
+	addq	$72, %rsp
+	movq	%r15, %rdi
+	popq	%rbx
+	popq	%r12
+	popq	%r13
+	.cfi_remember_state
+	.cfi_def_cfa 13, 0
+	popq	%r14
+	popq	%r15
+	popq	%rbp
+	leaq	-16(%r13), %rsp
+	.cfi_def_cfa 7, 16
+	popq	%r13
+	.cfi_def_cfa_offset 8
+	jmp	free
+	.p2align 4,,10
+	.p2align 3
+.L15:
+	.cfi_restore_state
+	xorl	%eax, %eax
+	jmp	.L9
+.L26:
+	vzeroupper
+	jmp	.L2
+.L14:
+	xorl	%eax, %eax
+	jmp	.L3
+	.cfi_endproc
+.LFE24:
+	.size	triad, .-triad
+	.section	.rodata.str1.8
+	.align 8
+.LC10:
+	.string	"TRIAD a[i] = b[i]+c[i]*d[i], 32 byte/it, 2 Flop/it"
+	.align 8
+.LC11:
+	.string	"Size (KByte) |   runtime  |  MFlop/s  |  MB/s   |  MLUP/s | repeat | size"
+	.section	.text.startup,"ax",@progbits
+	.p2align 4,,15
+	.globl	main
+	.type	main, @function
+main:
+.LFB25:
+	.cfi_startproc
+	pushq	%rbx
+	.cfi_def_cfa_offset 16
+	.cfi_offset 3, -16
+	movl	$.LC10, %edi
+	movl	$20, %ebx
+	call	puts
+	movl	$.LC11, %edi
+	call	puts
+	.p2align 4,,10
+	.p2align 3
+.L28:
+	vxorpd	%xmm1, %xmm1, %xmm1
+	movq	.LC12(%rip), %rax
+	vcvtsi2sd	%ebx, %xmm1, %xmm1
+	addl	$1, %ebx
+	vmovq	%rax, %xmm0
+	call	pow
+	vcvttsd2si	%xmm0, %edi
+	call	triad
+	cmpl	$36, %ebx
+	jne	.L28
+	xorl	%eax, %eax
+	popq	%rbx
+	.cfi_def_cfa_offset 8
+	ret
+	.cfi_endproc
+.LFE25:
+	.size	main, .-main
+	.section	.rodata.cst32,"aM",@progbits,32
+	.align 32
+.LC0:
+	.long	1907715710
+	.long	1048610426
+	.long	1907715710
+	.long	1048610426
+	.long	1907715710
+	.long	1048610426
+	.long	1907715710
+	.long	1048610426
+	.section	.rodata.cst8,"aM",@progbits,8
+	.align 8
+.LC1:
+	.long	1907715710
+	.long	1048610426
+	.align 8
+.LC3:
+	.long	2576980378
+	.long	1070176665
+	.align 8
+.LC4:
+	.long	0
+	.long	1083129856
+	.align 8
+.LC5:
+	.long	0
+	.long	1077936128
+	.align 8
+.LC6:
+	.long	0
+	.long	1062207488
+	.align 8
+.LC7:
+	.long	2696277389
+	.long	1051772663
+	.align 8
+.LC8:
+	.long	0
+	.long	1075838976
+	.align 8
+.LC12:
+	.long	3435973837
+	.long	1073007820
+	.ident	"GCC: (GNU) 7.2.0"
+	.section	.note.GNU-stack,"",@progbits
diff --git a/tests/test_frontend.py b/tests/test_frontend.py
new file mode 100755
index 0000000..7d6dca8
--- /dev/null
+++ b/tests/test_frontend.py
@@ -0,0 +1,94 @@
+#!/usr/bin/env python3
+"""
+Unit tests for OSACA Frontend
+"""
+
+import os
+import unittest
+
+from osaca.frontend import Frontend
+from osaca.parser import ParserAArch64v81, ParserX86ATT
+from osaca.semantics.hw_model import MachineModel
+from osaca.semantics.kernel_dg import KernelDG
+from osaca.semantics.semantics_appender import SemanticsAppender
+
+
+class TestFrontend(unittest.TestCase):
+    MODULE_DATA_DIR = os.path.join(
+        os.path.dirname(os.path.split(os.path.abspath(__file__))[0]), 'osaca/data/'
+    )
+
+    @classmethod
+    def setUpClass(self):
+        # set up parser and kernels
+        self.parser_x86 = ParserX86ATT()
+        self.parser_AArch64 = ParserAArch64v81()
+        with open(self._find_file('kernel-x86.s')) as f:
+            code_x86 = f.read()
+        with open(self._find_file('kernel-AArch64.s')) as f:
+            code_AArch64 = f.read()
+        self.kernel_x86 = self.parser_x86.parse_file(code_x86)
+        self.kernel_AArch64 = self.parser_AArch64.parse_file(code_AArch64)
+
+        # set up machine models
+        self.machine_model_csx = MachineModel(
+            path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'csx.yml')
+        )
+        self.machine_model_tx2 = MachineModel(
+            path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'tx2.yml')
+        )
+        self.semantics_csx = SemanticsAppender(
+            self.machine_model_csx, path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/x86.yml')
+        )
+        self.semantics_tx2 = SemanticsAppender(
+            self.machine_model_tx2,
+            path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/aarch64.yml'),
+        )
+        for i in range(len(self.kernel_x86)):
+            self.semantics_csx.assign_src_dst(self.kernel_x86[i])
+            self.semantics_csx.assign_tp_lt(self.kernel_x86[i])
+        for i in range(len(self.kernel_AArch64)):
+            self.semantics_tx2.assign_src_dst(self.kernel_AArch64[i])
+            self.semantics_tx2.assign_tp_lt(self.kernel_AArch64[i])
+
+    ###########
+    # Tests
+    ###########
+
+    def test_frontend_creation(self):
+        with self.assertRaises(ValueError):
+            Frontend()
+        with self.assertRaises(ValueError):
+            Frontend(arch='csx', path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'csx.yml'))
+        with self.assertRaises(FileNotFoundError):
+            Frontend(path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'THE_MACHINE.yml'))
+        with self.assertRaises(FileNotFoundError):
+            Frontend(arch='THE_MACHINE')
+        Frontend(arch='zen1')
+
+    def test_frontend_x86(self):
+        dg = KernelDG(self.kernel_x86, self.parser_x86, self.machine_model_csx)
+        fe = Frontend(path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'csx.yml'))
+        fe.print_throughput_analysis(self.kernel_x86, show_cmnts=False)
+        fe.print_latency_analysis(dg.get_critical_path())
+
+    def test_frontend_AArch64(self):
+        dg = KernelDG(self.kernel_AArch64, self.parser_AArch64, self.machine_model_tx2)
+        fe = Frontend(path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'tx2.yml'))
+        fe.print_full_analysis(self.kernel_AArch64, dg, verbose=True)
+
+    ##################
+    # Helper functions
+    ##################
+
+    @staticmethod
+    def _find_file(name):
+        testdir = os.path.dirname(__file__)
+        name = os.path.join(testdir, 'test_files', name)
+        assert os.path.exists(name)
+        return name
+
+
+if __name__ == '__main__':
+    suite = unittest.TestLoader().loadTestsFromTestCase(TestFrontend)
+    unittest.TextTestRunner(verbosity=2).run(suite)
diff --git a/tests/test_kerncraftAPI.py b/tests/test_kerncraftAPI.py
new file mode 100755
index 0000000..f30d88c
--- /dev/null
+++ b/tests/test_kerncraftAPI.py
@@ -0,0 +1,90 @@
+#!/usr/bin/env python3
+"""
+Unit tests for OSACA Kerncraft API
+"""
+
+import os
+import unittest
+
+from collections import OrderedDict
+
+from osaca.api import KerncraftAPI
+from osaca.parser import ParserAArch64v81, ParserX86ATT
+
+
+class TestKerncraftAPI(unittest.TestCase):
+    @classmethod
+    def setUpClass(self):
+        # set up parser and kernels
+        self.parser_x86 = ParserX86ATT()
+        self.parser_AArch64 = ParserAArch64v81()
+        with open(self._find_file('triad-x86-iaca.s')) as f:
+            self.code_x86 = f.read()
+        with open(self._find_file('triad-arm-iaca.s')) as f:
+            self.code_AArch64 = f.read()
+
+    ###########
+    # Tests
+    ###########
+
+    def test_kerncraft_API_x86(self):
+        kapi = KerncraftAPI('csx', self.code_x86)
+
+        kapi.create_output()
+        self.assertEqual(kapi.get_unmatched_instruction_ratio(), 0.0)
+        port_occupation = OrderedDict(
+            [
+                ('0', 1.25),
+                ('0DV', 0.0),
+                ('1', 1.25),
+                ('2', 2.0),
+                ('2D', 1.5),
+                ('3', 2.0),
+                ('3D', 1.5),
+                ('4', 1.0),
+                ('5', 0.75),
+                ('6', 0.75),
+                ('7', 0.0),
+            ]
+        )
+        self.assertEqual(kapi.get_port_occupation_cycles(), port_occupation)
+        self.assertEqual(kapi.get_total_throughput(), 2.0)
+        self.assertEqual(kapi.get_latency(), (1.0, 13.0))
+
+    def test_kerncraft_API_AArch64(self):
+        kapi = KerncraftAPI('tx2', self.code_AArch64)
+
+        kapi.create_output()
+        self.assertEqual(kapi.get_unmatched_instruction_ratio(), 0.0)
+        port_occupation = OrderedDict(
+            [
+                ('0', 34.0),
+                ('0DV', 0.0),
+                ('1', 34.0),
+                ('1DV', 0.0),
+                ('2', 2.0),
+                ('3', 64.0),
+                ('4', 64.0),
+                ('5', 32.0),
+            ]
+        )
+        self.assertEqual(kapi.get_port_occupation_cycles(), port_occupation)
+        self.assertEqual(kapi.get_total_throughput(), 64.0)
+        # TODO add missing latency values
+        # self.assertEqual(kapi.get_latency(kernel), 20.0)
+
+    ##################
+    # Helper functions
+    ##################
+
+    @staticmethod
+    def _find_file(name):
+        testdir = os.path.dirname(__file__)
+        name = os.path.join(testdir, 'test_files', name)
+        assert os.path.exists(name)
+        return name
+
+
+if __name__ == '__main__':
+    suite = unittest.TestLoader().loadTestsFromTestCase(TestKerncraftAPI)
+    unittest.TextTestRunner(verbosity=2).run(suite)
diff --git a/tests/test_marker_utils.py b/tests/test_marker_utils.py
new file mode 100755
index 0000000..3d2297c
--- /dev/null
+++ b/tests/test_marker_utils.py
@@ -0,0 +1,308 @@
+#!/usr/bin/env python3
+"""
+Unit tests for IACA/OSACA marker utilities
+"""
+import os
+import unittest
+
+from osaca.semantics import reduce_to_section
+from osaca.parser import ParserAArch64v81, ParserX86ATT
+
+
+class TestMarkerUtils(unittest.TestCase):
+    @classmethod
+    def setUpClass(self):
+        self.parser_AArch = ParserAArch64v81()
+        self.parser_x86 = ParserX86ATT()
+        with open(self._find_file('triad-arm-iaca.s')) as f:
+            triad_code_arm = f.read()
+        with open(self._find_file('triad-x86-iaca.s')) as f:
+            triad_code_x86 = f.read()
+        self.parsed_AArch = self.parser_AArch.parse_file(triad_code_arm)
+        self.parsed_x86 = self.parser_x86.parse_file(triad_code_x86)
+
+    #################
+    # Test
+    #################
+
+    def test_marker_detection_AArch64(self):
+        kernel = reduce_to_section(self.parsed_AArch, 'AArch64')
+        self.assertEquals(len(kernel), 138)
+        self.assertEquals(kernel[0].line_number, 307)
+        self.assertEquals(kernel[-1].line_number, 444)
+
+    def test_marker_detection_x86(self):
+        kernel = reduce_to_section(self.parsed_x86, 'x86')
+        self.assertEquals(len(kernel), 9)
+        self.assertEquals(kernel[0].line_number, 146)
+        self.assertEquals(kernel[-1].line_number, 154)
+
+    def test_marker_matching_AArch64(self):
+        # preparation
+        bytes_1_line = '.byte     213,3,32,31\n'
+        bytes_2_lines_1 = '.byte     213,3,32\n' + '.byte 31\n'
+        bytes_2_lines_2 = '.byte     213,3\n' + '.byte 32,31\n'
+        bytes_2_lines_3 = '.byte     213\n' + '.byte 3,32,31\n'
+        bytes_3_lines_1 = '.byte     213,3\n' + '.byte     32\n' + '.byte     31\n'
+        bytes_3_lines_2 = '.byte     213\n' + '.byte     3,32\n' + '.byte     31\n'
+        bytes_3_lines_3 = '.byte     213\n' + '.byte     3\n' + '.byte     32,31\n'
+        bytes_4_lines = '.byte     213\n' + '.byte     3\n' + '.byte     32\n' + '.byte     31\n'
+        mov_start_1 = 'mov      x1, #111\n'
+        mov_start_2 = 'mov      x1, 111  // should work as well\n'
+        mov_end_1 = 'mov      x1, #222 // preferred way\n'
+        mov_end_2 = 'mov      x1, 222\n'
+        prologue = (
+            'mov x12, xzr\n'
+            + '\tldp x9, x10, [sp, #16]      // 8-byte Folded Reload\n'
+            + '     .p2align    6\n'
+        )
+        kernel = (
+            '.LBB0_28:\n'
+            + 'fmul    v7.2d, v7.2d, v19.2d\n'
+            + 'stp q0, q1, [x10, #-32]\n'
+            + 'b.ne    .LBB0_28\n'
+        )
+        epilogue = '.LBB0_29:   //   Parent Loop BB0_20 Depth=1\n' + 'bl    dummy\n'
+        kernel_length = len(list(filter(None, kernel.split('\n'))))
+
+        bytes_variations = [
+            bytes_1_line,
+            bytes_2_lines_1,
+            bytes_2_lines_2,
+            bytes_2_lines_3,
+            bytes_3_lines_1,
+            bytes_3_lines_2,
+            bytes_3_lines_3,
+            bytes_4_lines,
+        ]
+        mov_start_variations = [mov_start_1, mov_start_2]
+        mov_end_variations = [mov_end_1, mov_end_2]
+        # actual tests
+        for mov_start_var in mov_start_variations:
+            for bytes_var_1 in bytes_variations:
+                for mov_end_var in mov_end_variations:
+                    for bytes_var_2 in bytes_variations:
+                        sample_code = (
+                            prologue
+                            + mov_start_var
+                            + bytes_var_1
+                            + kernel
+                            + mov_end_var
+                            + bytes_var_2
+                            + epilogue
+                        )
+                        with self.subTest(
+                            mov_start=mov_start_var,
+                            bytes_start=bytes_var_1,
+                            mov_end=mov_end_var,
+                            bytes_end=bytes_var_2,
+                        ):
+                            sample_parsed = self.parser_AArch.parse_file(sample_code)
+                            sample_kernel = reduce_to_section(sample_parsed, 'AArch64')
+                            self.assertEquals(len(sample_kernel), kernel_length)
+                            kernel_start = len(
+                                list(
+                                    filter(
+                                        None, (prologue + mov_start_var + bytes_var_1).split('\n')
+                                    )
+                                )
+                            )
+                            parsed_kernel = self.parser_AArch.parse_file(
+                                kernel, start_line=kernel_start
+                            )
+                            self.assertEquals(sample_kernel, parsed_kernel)
+
+    def test_marker_matching_x86(self):
+        # preparation
+        bytes_1_line = '.byte     100,103,144\n'
+        bytes_2_lines_1 = '.byte     100,103\n' + '.byte 144\n'
+        bytes_2_lines_2 = '.byte     100\n' + '.byte 103,144\n'
+        bytes_3_lines = (
+            '.byte     100 # IACA MARKER UTILITY\n'
+            + '.byte     103 # IACA MARKER UTILITY\n'
+            + '.byte     144 # IACA MARKER UTILITY\n'
+        )
+        mov_start_1 = 'movl      $111, %ebx # IACA START\n'
+        mov_start_2 = 'mov      $111, %ebx # IACA START\n'
+        mov_end_1 = 'movl      $222, %ebx # IACA END\n'
+        mov_end_2 = 'mov      $222, %ebx # IACA END\n'
+        prologue = 'movl    -92(%rbp), %r11d\n' + 'movl      $111, %ebx\n'
+        kernel = (
+            'vfmadd132sd (%r15,%rcx,8), %xmm5, %xmm0\n'
+            + 'vmovsd  %xmm0, (%r14,%rcx,8)\n'
+            + 'cmpl    %ebx, %ecx\n'
+            + 'jge .L8\n'
+        )
+        epilogue = '.LE9:\t\t#12.2\n' 'call    dummy\n'
+        kernel_length = len(list(filter(None, kernel.split('\n'))))
+
+        bytes_variations = [bytes_1_line, bytes_2_lines_1, bytes_2_lines_2, bytes_3_lines]
+        mov_start_variations = [mov_start_1, mov_start_2]
+        mov_end_variations = [mov_end_1, mov_end_2]
+        # actual tests
+        for mov_start_var in mov_start_variations:
+            for bytes_var_1 in bytes_variations:
+                for mov_end_var in mov_end_variations:
+                    for bytes_var_2 in bytes_variations:
+                        sample_code = (
+                            prologue
+                            + mov_start_var
+                            + bytes_var_1
+                            + kernel
+                            + mov_end_var
+                            + bytes_var_2
+                            + epilogue
+                        )
+                        with self.subTest(
+                            mov_start=mov_start_var,
+                            bytes_start=bytes_var_1,
+                            mov_end=mov_end_var,
+                            bytes_end=bytes_var_2,
+                        ):
+                            sample_parsed = self.parser_x86.parse_file(sample_code)
+                            sample_kernel = reduce_to_section(sample_parsed, 'x86')
+                            self.assertEquals(len(sample_kernel), kernel_length)
+                            kernel_start = len(
+                                list(
+                                    filter(
+                                        None, (prologue + mov_start_var + bytes_var_1).split('\n')
+                                    )
+                                )
+                            )
+                            parsed_kernel = self.parser_x86.parse_file(
+                                kernel, start_line=kernel_start
+                            )
+                            self.assertEquals(sample_kernel, parsed_kernel)
+
+    def test_marker_special_cases_AArch(self):
+        bytes_line = '.byte     213,3,32,31\n'
+        mov_start = 'mov      x1, #111\n'
+        mov_end = 'mov      x1, #222\n'
+        prologue = 'dup v0.2d, x14\n' + '    neg x9, x9\n' + '    .p2align    6\n'
+        kernel = (
+            '.LBB0_28:\n'
+            + 'fmul    v7.2d, v7.2d, v19.2d\n'
+            + 'stp q0, q1, [x10, #-32]\n'
+            + 'b.ne    .LBB0_28\n'
+        )
+        epilogue = '.LBB0_29:   //   Parent Loop BB0_20 Depth=1\n' + 'bl    dummy\n'
+        kernel_length = len(list(filter(None, kernel.split('\n'))))
+
+        # marker directly at the beginning
+        code_beginning = mov_start + bytes_line + kernel + mov_end + bytes_line + epilogue
+        beginning_parsed = self.parser_AArch.parse_file(code_beginning)
+        test_kernel = reduce_to_section(beginning_parsed, 'AArch64')
+        self.assertEquals(len(test_kernel), kernel_length)
+        kernel_start = len(list(filter(None, (mov_start + bytes_line).split('\n'))))
+        parsed_kernel = self.parser_AArch.parse_file(kernel, start_line=kernel_start)
+        self.assertEquals(test_kernel, parsed_kernel)
+
+        # marker at the end
+        code_end = prologue + mov_start + bytes_line + kernel + mov_end + bytes_line + epilogue
+        end_parsed = self.parser_AArch.parse_file(code_end)
+        test_kernel = reduce_to_section(end_parsed, 'AArch64')
+        self.assertEquals(len(test_kernel), kernel_length)
+        kernel_start = len(list(filter(None, (prologue + mov_start + bytes_line).split('\n'))))
+        parsed_kernel = self.parser_AArch.parse_file(kernel, start_line=kernel_start)
+        self.assertEquals(test_kernel, parsed_kernel)
+
+        # no kernel
+        code_empty = prologue + mov_start + bytes_line + mov_end + bytes_line + epilogue
+        empty_parsed = self.parser_AArch.parse_file(code_empty)
+        test_kernel = reduce_to_section(empty_parsed, 'AArch64')
+        self.assertEquals(len(test_kernel), 0)
+        kernel_start = len(list(filter(None, (prologue + mov_start + bytes_line).split('\n'))))
+        self.assertEquals(test_kernel, [])
+
+        # no start marker
+        code_no_start = prologue + bytes_line + kernel + mov_end + bytes_line + epilogue
+        no_start_parsed = self.parser_AArch.parse_file(code_no_start)
+        with self.assertRaises(LookupError):
+            reduce_to_section(no_start_parsed, 'AArch64')
+
+        # no end marker
+        code_no_end = prologue + mov_start + bytes_line + kernel + mov_end + epilogue
+        no_end_parsed = self.parser_AArch.parse_file(code_no_end)
+        with self.assertRaises(LookupError):
+            reduce_to_section(no_end_parsed, 'AArch64')
+
+        # no marker at all
+        code_no_marker = prologue + kernel + epilogue
+        no_marker_parsed = self.parser_AArch.parse_file(code_no_marker)
+        with self.assertRaises(LookupError):
+            reduce_to_section(no_marker_parsed, 'AArch64')
+
+    def test_marker_special_cases_x86(self):
+        bytes_line = '.byte     100\n.byte     103\n.byte     144\n'
+        mov_start = 'movl     $111, %ebx\n'
+        mov_end = 'movl     $222, %ebx\n'
+        prologue = 'movl    -88(%rbp), %r10d\n' + 'xorl    %r11d, %r11d\n' + '.p2align 4,,10\n'
+        kernel = (
+            '.L3: #L3\n'
+            + 'vmovsd  .LC1(%rip), %xmm0\n'
+            + 'vmovsd  %xmm0, (%r15,%rcx,8)\n'
+            + 'cmpl    %ecx, %ebx\n'
+            + 'jle .L3\n'
+        )
+        epilogue = 'leaq    -56(%rbp), %rsi\n' + 'movl    %r10d, -88(%rbp)\n' + 'call    timing\n'
+        kernel_length = len(list(filter(None, kernel.split('\n'))))
+
+        # marker directly at the beginning
+        code_beginning = mov_start + bytes_line + kernel + mov_end + bytes_line + epilogue
+        beginning_parsed = self.parser_x86.parse_file(code_beginning)
+        test_kernel = reduce_to_section(beginning_parsed, 'x86')
+        self.assertEquals(len(test_kernel), kernel_length)
+        kernel_start = len(list(filter(None, (mov_start + bytes_line).split('\n'))))
+        parsed_kernel = self.parser_x86.parse_file(kernel, start_line=kernel_start)
+        self.assertEquals(test_kernel, parsed_kernel)
+
+        # marker at the end
+        code_end = prologue + mov_start + bytes_line + kernel + mov_end + bytes_line + epilogue
+        end_parsed = self.parser_x86.parse_file(code_end)
+        test_kernel = reduce_to_section(end_parsed, 'x86')
+        self.assertEquals(len(test_kernel), kernel_length)
+        kernel_start = len(list(filter(None, (prologue + mov_start + bytes_line).split('\n'))))
+        parsed_kernel = self.parser_x86.parse_file(kernel, start_line=kernel_start)
+        self.assertEquals(test_kernel, parsed_kernel)
+
+        # no kernel
+        code_empty = prologue + mov_start + bytes_line + mov_end + bytes_line + epilogue
+        empty_parsed = self.parser_x86.parse_file(code_empty)
+        test_kernel = reduce_to_section(empty_parsed, 'x86')
+        self.assertEquals(len(test_kernel), 0)
+        kernel_start = len(list(filter(None, (prologue + mov_start + bytes_line).split('\n'))))
+        self.assertEquals(test_kernel, [])
+
+        # no start marker
+        code_no_start = prologue + bytes_line + kernel + mov_end + bytes_line + epilogue
+        no_start_parsed = self.parser_x86.parse_file(code_no_start)
+        with self.assertRaises(LookupError):
+            reduce_to_section(no_start_parsed, 'x86')
+
+        # no end marker
+        code_no_end = prologue + mov_start + bytes_line + kernel + mov_end + epilogue
+        no_end_parsed = self.parser_x86.parse_file(code_no_end)
+        with self.assertRaises(LookupError):
+            reduce_to_section(no_end_parsed, 'x86')
+
+        # no marker at all
+        code_no_marker = prologue + kernel + epilogue
+        no_marker_parsed = self.parser_x86.parse_file(code_no_marker)
+        with self.assertRaises(LookupError):
+            reduce_to_section(no_marker_parsed, 'x86')
+
+    ##################
+    # Helper functions
+    ##################
+
+    @staticmethod
+    def _find_file(name):
+        testdir = os.path.dirname(__file__)
+        name = os.path.join(testdir, 'test_files', name)
+        assert os.path.exists(name)
+        return name
+
+
+if __name__ == '__main__':
+    suite = unittest.TestLoader().loadTestsFromTestCase(TestMarkerUtils)
+    unittest.TextTestRunner(verbosity=2).run(suite)
diff --git a/tests/test_osaca.py b/tests/test_osaca.py
deleted file mode 100755
index 3040fe0..0000000
--- a/tests/test_osaca.py
+++ /dev/null
@@ -1,69 +0,0 @@
-#!/usr/bin/env python3
-
-import sys
-from io import StringIO
-import os
-
-import unittest
-
-sys.path.insert(0, '..')
-from osaca import osaca
-
-
-class TestOsaca(unittest.TestCase):
-    maxDiff = None
-
-    def setUp(self):
-        self.curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1])
-
-    @unittest.skip("Binary analysis is error prone and currently not working with FSF's objdump")
-    def testIACABinary(self):
-        assembly = osaca.get_assembly_from_binary(self.curr_dir + '/testfiles/taxCalc-ivb-iaca')
-        osa = osaca.OSACA('IVB', assembly)
-        result = osa.generate_text_output()
-        result = result[result.find('Port Binding in Cycles Per Iteration:'):]
-        with open(self.curr_dir + '/test_osaca_iaca.out', encoding='utf-8') as f:
-            assertion = f.read()
-        self.assertEqual(assertion.replace(' ', ''), result.replace(' ', ''))
-
-    # Test ASM file with IACA marker in two lines
-    def testIACAasm1(self):
-        with open(self.curr_dir + '/testfiles/taxCalc-ivb-iaca.S') as f:
-            osa = osaca.OSACA('IVB', f.read())
-        result = osa.generate_text_output()
-        result = result[result.find('Port Binding in Cycles Per Iteration:'):]
-        with open(self.curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f:
-            assertion = f.read()
-        self.assertEqual(assertion.replace(' ', ''), result.replace(' ', ''))
-
-    # Test ASM file with IACA marker in four lines
-    def testIACAasm2(self):
-        with open(self.curr_dir + '/testfiles/taxCalc-ivb-iaca2.S') as f:
-            osa = osaca.OSACA('IVB', f.read())
-        result = osa.generate_text_output()
-        result = result[result.find('Port Binding in Cycles Per Iteration:'):]
-        with open(self.curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f:
-            assertion = f.read()
-        self.assertEqual(assertion.replace(' ', ''), result.replace(' ', ''))
-
-    #@unittest.skip("Skip until required instructions are supported.")
-    def test_asm_API(self):
-        with open(self.curr_dir + '/testfiles/3d-7pt.icc.skx.avx512.iaca_marked.s') as f:
-            osa = osaca.OSACA('SKX', f.read())
-
-        text_output = osa.create_output()
-        print(text_output)
-        # Derived from IACA (and manually considering OSACAs equal distribution to ports)
-        self.assertEqual(dict(osa.get_port_occupation_cycles()),
-                         {'0': 4.0,
-                          '0DV': 0.0,
-                          '1': 3.5,
-                          '2': 3.5,
-                          '3': 3.5,
-                          '4': 1.0,
-                          '5': 4.5,
-                          '6': 3.5,
-                          '7': 0.0})
-        # TODO consider frontend bottleneck -> 6.25 cy
-        self.assertEqual(osa.get_total_throughput(),
-                         4.5)
diff --git a/tests/test_osaca_iaca.out b/tests/test_osaca_iaca.out
deleted file mode 100644
index 9be7960..0000000
--- a/tests/test_osaca_iaca.out
+++ /dev/null
@@ -1,26 +0,0 @@
-Port Binding in Cycles Per Iteration:
--------------------------------------------------
-|  Port  |   0  |   1  |  2  |  3  |  4  |   5  |
--------------------------------------------------
-| Cycles | 3.67 | 5.67 | 1.0 | 1.0 | 2.0 | 3.67 |
--------------------------------------------------
-
-
-          Ports Pressure in cycles          
-|  0   |  1   |  2   |  3   |  4   |  5   |
--------------------------------------------
-| 0.50 | 0.50 |      |      |      |      | lea	1(%rax,%rax),%edx
-|      | 1.00 |      |      |      | 1.00 | vcvtsi2ss	%edx,%xmm2,%xmm2
-| 1.00 |      |      |      |      |      | vmulss	%xmm2,%xmm0,%xmm3
-| 0.50 | 0.50 |      |      |      |      | lea	2(%rax,%rax),%ecx
-|      | 1.00 |      |      |      |      | vaddss	%xmm3,%xmm1,%xmm4
-|      |      |      |      |      | 1.00 | vxorps	%xmm1,%xmm1,%xmm1
-|      | 1.00 |      |      |      | 1.00 | vcvtsi2ss	%ecx,%xmm1,%xmm1
-| 1.00 |      |      |      |      |      | vmulss	%xmm1,%xmm0,%xmm5
-|      |      | 0.50 | 0.50 | 1.00 |      | vmovss	%xmm4,4(%rsp,%rax,8)
-|      | 1.00 |      |      |      |      | vaddss	%xmm5,%xmm4,%xmm1
-|      |      | 0.50 | 0.50 | 1.00 |      | vmovss	%xmm1,8(%rsp,%rax,8)
-| 0.33 | 0.33 |      |      |      | 0.33 | inc	%rax
-| 0.33 | 0.33 |      |      |      | 0.33 | cmp	$499,%rax
-|      |      |      |      |      |      | X jb	main_98
-Total number of estimated throughput: 5.67
diff --git a/tests/test_osaca_iaca_asm.out b/tests/test_osaca_iaca_asm.out
deleted file mode 100644
index c242045..0000000
--- a/tests/test_osaca_iaca_asm.out
+++ /dev/null
@@ -1,26 +0,0 @@
-Port Binding in Cycles Per Iteration:
--------------------------------------------------
-|  Port  |   0  |   1  |  2  |  3  |  4  |   5  |
--------------------------------------------------
-| Cycles | 3.67 | 5.67 | 1.0 | 1.0 | 2.0 | 3.67 |
--------------------------------------------------
-
-
-          Ports Pressure in cycles          
-|  0   |  1   |  2   |  3   |  4   |  5   |
--------------------------------------------
-| 0.50 | 0.50 |      |      |      |      | lea       1(%rax,%rax), %edx
-|      | 1.00 |      |      |      | 1.00 | vcvtsi2ss %edx, %xmm2, %xmm2
-| 1.00 |      |      |      |      |      | vmulss    %xmm2, %xmm0, %xmm3
-| 0.50 | 0.50 |      |      |      |      | lea       2(%rax,%rax), %ecx
-|      | 1.00 |      |      |      |      | vaddss    %xmm3, %xmm1, %xmm4
-|      |      |      |      |      | 1.00 | vxorps    %xmm1, %xmm1, %xmm1
-|      | 1.00 |      |      |      | 1.00 | vcvtsi2ss %ecx, %xmm1, %xmm1
-| 1.00 |      |      |      |      |      | vmulss    %xmm1, %xmm0, %xmm5
-|      |      | 0.50 | 0.50 | 1.00 |      | vmovss    %xmm4, 4(%rsp,%rax,8)
-|      | 1.00 |      |      |      |      | vaddss    %xmm5, %xmm4, %xmm1
-|      |      | 0.50 | 0.50 | 1.00 |      | vmovss    %xmm1, 8(%rsp,%rax,8)
-| 0.33 | 0.33 |      |      |      | 0.33 | incq      %rax
-| 0.33 | 0.33 |      |      |      | 0.33 | cmpq      $499, %rax
-|      |      |      |      |      |      | jb        ..B1.4
-Total number of estimated throughput: 5.67
diff --git a/tests/test_parser_AArch64v81.py b/tests/test_parser_AArch64v81.py
new file mode 100755
index 0000000..9dd03b0
--- /dev/null
+++ b/tests/test_parser_AArch64v81.py
@@ -0,0 +1,413 @@
+#!/usr/bin/env python3
+"""
+Unit tests for ARMv8 AArch64 assembly parser
+"""
+
+import os
+import unittest
+
+from pyparsing import ParseException
+
+from osaca.parser import AttrDict, ParserAArch64v81
+
+
+class TestParserAArch64v81(unittest.TestCase):
+    @classmethod
+    def setUpClass(self):
+        self.parser = ParserAArch64v81()
+        with open(self._find_file('triad-arm-iaca.s')) as f:
+            self.triad_code = f.read()
+
+    ##################
+    # Test
+    ##################
+
+    def test_comment_parser(self):
+        self.assertEqual(self._get_comment(self.parser, '// some comments'), 'some comments')
+        self.assertEqual(
+            self._get_comment(self.parser, '\t\t//AA BB CC \t end \t'), 'AA BB CC end'
+        )
+        self.assertEqual(
+            self._get_comment(self.parser, '\t//// comment //// comment'),
+            '// comment //// comment',
+        )
+
+    def test_label_parser(self):
+        self.assertEqual(self._get_label(self.parser, 'main:').name, 'main')
+        self.assertEqual(self._get_label(self.parser, '..B1.10:').name, '..B1.10')
+        self.assertEqual(self._get_label(self.parser, '.2.3_2_pack.3:').name, '.2.3_2_pack.3')
+        self.assertEqual(self._get_label(self.parser, '.L1:\t\t\t//label1').name, '.L1')
+        self.assertEqual(
+            ' '.join(self._get_label(self.parser, '.L1:\t\t\t//label1').comment), 'label1'
+        )
+        with self.assertRaises(ParseException):
+            self._get_label(self.parser, '\t.cfi_startproc')
+
+    def test_directive_parser(self):
+        self.assertEqual(self._get_directive(self.parser, '\t.text').name, 'text')
+        self.assertEqual(len(self._get_directive(self.parser, '\t.text').parameters), 0)
+        self.assertEqual(self._get_directive(self.parser, '\t.align\t16,0x90').name, 'align')
+        self.assertEqual(len(self._get_directive(self.parser, '\t.align\t16,0x90').parameters), 2)
+        self.assertEqual(
+            self._get_directive(self.parser, '\t.align\t16,0x90').parameters[1], '0x90'
+        )
+        self.assertEqual(
+            self._get_directive(self.parser, '        .byte 100,103,144       //IACA START')[
+                'name'
+            ],
+            'byte',
+        )
+        self.assertEqual(
+            self._get_directive(self.parser, '        .byte 100,103,144       //IACA START')[
+                'parameters'
+            ][2],
+            '144',
+        )
+        self.assertEqual(
+            ' '.join(
+                self._get_directive(self.parser, '        .byte 100,103,144       //IACA START')[
+                    'comment'
+                ]
+            ),
+            'IACA START',
+        )
+
+    def test_parse_instruction(self):
+        instr1 = '\t\tvcvt.F32.S32 w1, w2\t\t\t//12.27'
+        instr2 = 'b.lo        ..B1.4 \t'
+        instr3 = '        mov x2,#0x222          //NOT IACA END'
+        instr4 = 'str x28, [sp, x1, lsl #4] //12.9'
+        instr5 = 'ldr x0, [x0, #:got_lo12:q2c]'
+        instr6 = 'adrp    x0, :got:visited'
+        instr7 = 'fadd    v17.2d, v16.2d, v1.2d'
+
+        parsed_1 = self.parser.parse_instruction(instr1)
+        parsed_2 = self.parser.parse_instruction(instr2)
+        parsed_3 = self.parser.parse_instruction(instr3)
+        parsed_4 = self.parser.parse_instruction(instr4)
+        parsed_5 = self.parser.parse_instruction(instr5)
+        parsed_6 = self.parser.parse_instruction(instr6)
+        parsed_7 = self.parser.parse_instruction(instr7)
+
+        self.assertEqual(parsed_1.instruction, 'vcvt.F32.S32')
+        self.assertEqual(parsed_1.operands[0].register.name, '1')
+        self.assertEqual(parsed_1.operands[0].register.prefix, 'w')
+        self.assertEqual(parsed_1.operands[1].register.name, '2')
+        self.assertEqual(parsed_1.operands[1].register.prefix, 'w')
+        self.assertEqual(parsed_1.comment, '12.27')
+
+        self.assertEqual(parsed_2.instruction, 'b.lo')
+        self.assertEqual(parsed_2.operands[0].identifier.name, '..B1.4')
+        self.assertEqual(len(parsed_2.operands), 1)
+        self.assertIsNone(parsed_2.comment)
+
+        self.assertEqual(parsed_3.instruction, 'mov')
+        self.assertEqual(parsed_3.operands[0].register.name, '2')
+        self.assertEqual(parsed_3.operands[0].register.prefix, 'x')
+        self.assertEqual(parsed_3.operands[1].immediate.value, '0x222')
+        self.assertEqual(parsed_3.comment, 'NOT IACA END')
+
+        self.assertEqual(parsed_4.instruction, 'str')
+        self.assertIsNone(parsed_4.operands[1].memory.offset)
+        self.assertEqual(parsed_4.operands[1].memory.base.name, 'sp')
+        self.assertEqual(parsed_4.operands[1].memory.base.prefix, 'x')
+        self.assertEqual(parsed_4.operands[1].memory.index.name, '1')
+        self.assertEqual(parsed_4.operands[1].memory.index.prefix, 'x')
+        self.assertEqual(parsed_4.operands[1].memory.scale, 16)
+        self.assertEqual(parsed_4.operands[0].register.name, '28')
+        self.assertEqual(parsed_4.operands[0].register.prefix, 'x')
+        self.assertEqual(parsed_4.comment, '12.9')
+
+        self.assertEqual(parsed_5.instruction, 'ldr')
+        self.assertEqual(parsed_5.operands[0].register.name, '0')
+        self.assertEqual(parsed_5.operands[0].register.prefix, 'x')
+        self.assertEqual(parsed_5.operands[1].memory.offset.identifier.name, 'q2c')
+        self.assertEqual(parsed_5.operands[1].memory.offset.identifier.relocation, ':got_lo12:')
+        self.assertEqual(parsed_5.operands[1].memory.base.name, '0')
+        self.assertEqual(parsed_5.operands[1].memory.base.prefix, 'x')
+        self.assertIsNone(parsed_5.operands[1].memory.index)
+        self.assertEqual(parsed_5.operands[1].memory.scale, 1)
+
+        self.assertEqual(parsed_6.instruction, 'adrp')
+        self.assertEqual(parsed_6.operands[0].register.name, '0')
+        self.assertEqual(parsed_6.operands[0].register.prefix, 'x')
+        self.assertEqual(parsed_6.operands[1].identifier.relocation, ':got:')
+        self.assertEqual(parsed_6.operands[1].identifier.name, 'visited')
+
+        self.assertEqual(parsed_7.instruction, 'fadd')
+        self.assertEqual(parsed_7.operands[0].register.name, '17')
+        self.assertEqual(parsed_7.operands[0].register.prefix, 'v')
+        self.assertEqual(parsed_7.operands[0].register.lanes, '2')
+        self.assertEqual(parsed_7.operands[0].register.shape, 'd')
+        self.assertEqual(self.parser.get_full_reg_name(parsed_7.operands[2].register), 'v1.2d')
+
+    def test_parse_line(self):
+        line_comment = '// -- Begin  main'
+        line_label = '.LBB0_1:              // =>This Inner Loop Header: Depth=1'
+        line_directive = '\t.cfi_def_cfa w29, -16'
+        line_instruction = '\tldr s0, [x11, w10, sxtw #2]\t\t// = <<2'
+        line_prefetch = 'prfm    pldl1keep, [x26, #2048] //HPL'
+        line_preindexed = 'stp x29, x30, [sp, #-16]!'
+        line_postindexed = 'ldp q2, q3, [x11], #64'
+
+        instruction_form_1 = {
+            'instruction': None,
+            'operands': None,
+            'directive': None,
+            'comment': '-- Begin main',
+            'label': None,
+            'line': '// -- Begin  main',
+            'line_number': 1,
+        }
+
+        instruction_form_2 = {
+            'instruction': None,
+            'operands': None,
+            'directive': None,
+            'comment': '=>This Inner Loop Header: Depth=1',
+            'label': '.LBB0_1',
+            'line': '.LBB0_1:              // =>This Inner Loop Header: Depth=1',
+            'line_number': 2,
+        }
+        instruction_form_3 = {
+            'instruction': None,
+            'operands': None,
+            'directive': {'name': 'cfi_def_cfa', 'parameters': ['w29', '-16']},
+            'comment': None,
+            'label': None,
+            'line': '.cfi_def_cfa w29, -16',
+            'line_number': 3,
+        }
+        instruction_form_4 = {
+            'instruction': 'ldr',
+            'operands': [
+                {'register': {'prefix': 's', 'name': '0'}},
+                {
+                    'memory': {
+                        'offset': None,
+                        'base': {'prefix': 'x', 'name': '11'},
+                        'index': {
+                            'prefix': 'w',
+                            'name': '10',
+                            'shift_op': 'sxtw',
+                            'shift': {'value': '2'},
+                        },
+                        'scale': 4,
+                    }
+                },
+            ],
+            'directive': None,
+            'comment': '= <<2',
+            'label': None,
+            'line': 'ldr s0, [x11, w10, sxtw #2]\t\t// = <<2',
+            'line_number': 4,
+        }
+        instruction_form_5 = {
+            'instruction': 'prfm',
+            'operands': [
+                {'prfop': {'type': ['PLD'], 'target': ['L1'], 'policy': ['KEEP']}},
+                {
+                    'memory': {
+                        'offset': {'value': '2048'},
+                        'base': {'prefix': 'x', 'name': '26'},
+                        'index': None,
+                        'scale': 1,
+                    }
+                },
+            ],
+            'directive': None,
+            'comment': 'HPL',
+            'label': None,
+            'line': 'prfm    pldl1keep, [x26, #2048] //HPL',
+            'line_number': 5,
+        }
+        instruction_form_6 = {
+            'instruction': 'stp',
+            'operands': [
+                {'register': {'prefix': 'x', 'name': '29'}},
+                {'register': {'prefix': 'x', 'name': '30'}},
+                {
+                    'memory': {
+                        'offset': {'value': '-16'},
+                        'base': {'name': 'sp', 'prefix': 'x'},
+                        'index': None,
+                        'scale': 1,
+                        'pre_indexed': True,
+                    }
+                },
+            ],
+            'directive': None,
+            'comment': None,
+            'label': None,
+            'line': 'stp x29, x30, [sp, #-16]!',
+            'line_number': 6,
+        }
+        instruction_form_7 = {
+            'instruction': 'ldp',
+            'operands': [
+                {'register': {'prefix': 'q', 'name': '2'}},
+                {'register': {'prefix': 'q', 'name': '3'}},
+                {
+                    'memory': {
+                        'offset': None,
+                        'base': {'prefix': 'x', 'name': '11'},
+                        'index': None,
+                        'scale': 1,
+                        'post_indexed': {'value': '64'},
+                    }
+                },
+            ],
+            'directive': None,
+            'comment': None,
+            'label': None,
+            'line': 'ldp q2, q3, [x11], #64',
+            'line_number': 7,
+        }
+        parsed_1 = self.parser.parse_line(line_comment, 1)
+        parsed_2 = self.parser.parse_line(line_label, 2)
+        parsed_3 = self.parser.parse_line(line_directive, 3)
+        parsed_4 = self.parser.parse_line(line_instruction, 4)
+        parsed_5 = self.parser.parse_line(line_prefetch, 5)
+        parsed_6 = self.parser.parse_line(line_preindexed, 6)
+        parsed_7 = self.parser.parse_line(line_postindexed, 7)
+
+        self.assertEqual(parsed_1, instruction_form_1)
+        self.assertEqual(parsed_2, instruction_form_2)
+        self.assertEqual(parsed_3, instruction_form_3)
+        self.assertEqual(parsed_4, instruction_form_4)
+        self.assertEqual(parsed_5, instruction_form_5)
+        self.assertEqual(parsed_6, instruction_form_6)
+        self.assertEqual(parsed_7, instruction_form_7)
+
+    def test_parse_file(self):
+        parsed = self.parser.parse_file(self.triad_code)
+        self.assertEqual(parsed[0].line_number, 1)
+        self.assertEqual(len(parsed), 645)
+
+    def test_normalize_imd(self):
+        imd_decimal_1 = {'value': '79'}
+        imd_hex_1 = {'value': '0x4f'}
+        imd_decimal_2 = {'value': '8'}
+        imd_hex_2 = {'value': '0x8'}
+        imd_float_11 = {'float': {'mantissa': '0.79', 'e_sign': '+', 'exponent': '2'}}
+        imd_float_12 = {'float': {'mantissa': '790.0', 'e_sign': '-', 'exponent': '1'}}
+        imd_double_11 = {'double': {'mantissa': '0.79', 'e_sign': '+', 'exponent': '2'}}
+        imd_double_12 = {'double': {'mantissa': '790.0', 'e_sign': '-', 'exponent': '1'}}
+        identifier = {'identifier': {'name': '..B1.4'}}
+
+        value1 = self.parser.normalize_imd(imd_decimal_1)
+        self.assertEqual(value1, self.parser.normalize_imd(imd_hex_1))
+        self.assertEqual(
+            self.parser.normalize_imd(imd_decimal_2), self.parser.normalize_imd(imd_hex_2)
+        )
+        self.assertEqual(self.parser.normalize_imd(imd_float_11), value1)
+        self.assertEqual(self.parser.normalize_imd(imd_float_12), value1)
+        self.assertEqual(self.parser.normalize_imd(imd_double_11), value1)
+        self.assertEqual(self.parser.normalize_imd(imd_double_12), value1)
+        self.assertEqual(self.parser.normalize_imd(identifier), identifier)
+
+    def test_multiple_regs(self):
+        instr_range = 'PUSH {r5-r7}'
+        reg_range = AttrDict({
+            'register': {
+                'range': [
+                    {'prefix': 'r', 'name': '5'},
+                    {'prefix': 'r', 'name': '7'}
+                ],
+                'index': None
+            }
+        })
+        instr_list = 'POP {r5, r7, r9}'
+        reg_list = AttrDict({
+            'register': {
+                'list': [
+                    {'prefix': 'r', 'name': '5'},
+                    {'prefix': 'r', 'name': '7'},
+                    {'prefix': 'r', 'name': '9'}
+                ],
+                'index': None
+            }
+        })
+        prange = self.parser.parse_line(instr_range)
+        plist = self.parser.parse_line(instr_list)
+
+        self.assertEqual(prange.operands[0], reg_range)
+        self.assertEqual(plist.operands[0], reg_list)
+
+    def test_reg_dependency(self):
+        reg_1_1 = AttrDict({'prefix': 'b', 'name': '1'})
+        reg_1_2 = AttrDict({'prefix': 'h', 'name': '1'})
+        reg_1_3 = AttrDict({'prefix': 's', 'name': '1'})
+        reg_1_4 = AttrDict({'prefix': 'd', 'name': '1'})
+        reg_1_4 = AttrDict({'prefix': 'q', 'name': '1'})
+        reg_2_1 = AttrDict({'prefix': 'w', 'name': '2'})
+        reg_2_2 = AttrDict({'prefix': 'x', 'name': '2'})
+        reg_v1_1 = AttrDict({'prefix': 'v', 'name': '11', 'lanes': '16', 'shape': 'b'})
+        reg_v1_2 = AttrDict({'prefix': 'v', 'name': '11', 'lanes': '8', 'shape': 'h'})
+        reg_v1_3 = AttrDict({'prefix': 'v', 'name': '11', 'lanes': '4', 'shape': 's'})
+        reg_v1_4 = AttrDict({'prefix': 'v', 'name': '11', 'lanes': '2', 'shape': 'd'})
+
+        reg_b5 = AttrDict({'prefix': 'b', 'name': '5'})
+        reg_q15 = AttrDict({'prefix': 'q', 'name': '15'})
+        reg_v10 = AttrDict({'prefix': 'v', 'name': '10', 'lanes': '2', 'shape': 's'})
+        reg_v20 = AttrDict({'prefix': 'v', 'name': '20', 'lanes': '2', 'shape': 'd'})
+
+        reg_1 = [reg_1_1, reg_1_2, reg_1_3, reg_1_4]
+        reg_2 = [reg_2_1, reg_2_2]
+        reg_v = [reg_v1_1, reg_v1_2, reg_v1_3, reg_v1_4]
+        reg_others = [reg_b5, reg_q15, reg_v10, reg_v20]
+        regs = reg_1 + reg_2 + reg_v + reg_others
+
+        # test each register against each other
+        for ri in reg_1:
+            for rj in regs:
+                assert_value = True if rj in reg_1 else False
+                with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
+                    self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
+        for ri in reg_2:
+            for rj in regs:
+                assert_value = True if rj in reg_2 else False
+                with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
+                    self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
+        for ri in reg_v:
+            for rj in regs:
+                assert_value = True if rj in reg_v else False
+                with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
+                    self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
+        for ri in reg_others:
+            for rj in regs:
+                assert_value = True if rj == ri else False
+                with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
+                    self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
+
+    ##################
+    # Helper functions
+    ##################
+    def _get_comment(self, parser, comment):
+        return ' '.join(
+            AttrDict.convert_dict(
+                parser.process_operand(parser.comment.parseString(comment, parseAll=True).asDict())
+            ).comment
+        )
+
+    def _get_label(self, parser, label):
+        return AttrDict.convert_dict(
+            parser.process_operand(parser.label.parseString(label, parseAll=True).asDict())
+        ).label
+
+    def _get_directive(self, parser, directive):
+        return AttrDict.convert_dict(
+            parser.process_operand(parser.directive.parseString(directive, parseAll=True).asDict())
+        ).directive
+
+    @staticmethod
+    def _find_file(name):
+        testdir = os.path.dirname(__file__)
+        name = os.path.join(testdir, 'test_files', name)
+        assert os.path.exists(name)
+        return name
+
+
+if __name__ == '__main__':
+    suite = unittest.TestLoader().loadTestsFromTestCase(TestParserAArch64v81)
+    unittest.TextTestRunner(verbosity=2).run(suite)
diff --git a/tests/test_parser_x86att.py b/tests/test_parser_x86att.py
new file mode 100755
index 0000000..7545f1e
--- /dev/null
+++ b/tests/test_parser_x86att.py
@@ -0,0 +1,306 @@
+#!/usr/bin/env python3
+"""
+Unit tests for x86 AT&T assembly parser
+"""
+
+import os
+import unittest
+
+from pyparsing import ParseException
+
+from osaca.parser import AttrDict, ParserX86ATT
+
+
+class TestParserX86ATT(unittest.TestCase):
+    @classmethod
+    def setUpClass(self):
+        self.parser = ParserX86ATT()
+        with open(self._find_file('triad-x86-iaca.s')) as f:
+            self.triad_code = f.read()
+
+    ##################
+    # Test
+    ##################
+
+    def test_comment_parser(self):
+        self.assertEqual(self._get_comment(self.parser, '# some comments'), 'some comments')
+        self.assertEqual(self._get_comment(self.parser, '\t\t#AA BB CC \t end \t'), 'AA BB CC end')
+        self.assertEqual(
+            self._get_comment(self.parser, '\t## comment ## comment'), '# comment ## comment'
+        )
+
+    def test_label_parser(self):
+        self.assertEqual(self._get_label(self.parser, 'main:').name, 'main')
+        self.assertEqual(self._get_label(self.parser, '..B1.10:').name, '..B1.10')
+        self.assertEqual(self._get_label(self.parser, '.2.3_2_pack.3:').name, '.2.3_2_pack.3')
+        self.assertEqual(self._get_label(self.parser, '.L1:\t\t\t#label1').name, '.L1')
+        self.assertEqual(
+            ' '.join(self._get_label(self.parser, '.L1:\t\t\t#label1').comment), 'label1'
+        )
+        with self.assertRaises(ParseException):
+            self._get_label(self.parser, '\t.cfi_startproc')
+
+    def test_directive_parser(self):
+        self.assertEqual(self._get_directive(self.parser, '\t.text').name, 'text')
+        self.assertEqual(len(self._get_directive(self.parser, '\t.text').parameters), 0)
+        self.assertEqual(self._get_directive(self.parser, '\t.align\t16,0x90').name, 'align')
+        self.assertEqual(len(self._get_directive(self.parser, '\t.align\t16,0x90').parameters), 2)
+        self.assertEqual(
+            self._get_directive(self.parser, '\t.align\t16,0x90').parameters[1], '0x90'
+        )
+        self.assertEqual(
+            self._get_directive(self.parser, '        .byte 100,103,144       #IACA START')[
+                'name'
+            ],
+            'byte',
+        )
+        self.assertEqual(
+            self._get_directive(self.parser, '        .byte 100,103,144       #IACA START')[
+                'parameters'
+            ][2],
+            '144',
+        )
+        self.assertEqual(
+            ' '.join(
+                self._get_directive(self.parser, '        .byte 100,103,144       #IACA START')[
+                    'comment'
+                ]
+            ),
+            'IACA START',
+        )
+
+    def test_parse_instruction(self):
+        instr1 = '\t\tvcvtsi2ss %edx, %xmm2, %xmm2\t\t\t#12.27'
+        instr2 = 'jb        ..B1.4 \t'
+        instr3 = '        movl $222,%ebx          #IACA END'
+        instr4 = 'vmovss    %xmm4, -4(%rsp,%rax,8) #12.9'
+        instr5 = 'mov %ebx,var(,1)'
+        instr6 = 'lea (,%rax,8),%rbx'
+        instr7 = 'vinsertf128 $0x1, %xmm0, %ymm1, %ymm1'
+
+        parsed_1 = self.parser.parse_instruction(instr1)
+        parsed_2 = self.parser.parse_instruction(instr2)
+        parsed_3 = self.parser.parse_instruction(instr3)
+        parsed_4 = self.parser.parse_instruction(instr4)
+        parsed_5 = self.parser.parse_instruction(instr5)
+        parsed_6 = self.parser.parse_instruction(instr6)
+        parsed_7 = self.parser.parse_instruction(instr7)
+
+        self.assertEqual(parsed_1.instruction, 'vcvtsi2ss')
+        self.assertEqual(parsed_1.operands[0].register.name, 'edx')
+        self.assertEqual(parsed_1.operands[1].register.name, 'xmm2')
+        self.assertEqual(parsed_1.comment, '12.27')
+
+        self.assertEqual(parsed_2.instruction, 'jb')
+        self.assertEqual(parsed_2.operands[0].identifier.name, '..B1.4')
+        self.assertEqual(len(parsed_2.operands), 1)
+        self.assertIsNone(parsed_2.comment)
+
+        self.assertEqual(parsed_3.instruction, 'movl')
+        self.assertEqual(parsed_3.operands[0].immediate.value, '222')
+        self.assertEqual(parsed_3.operands[1].register.name, 'ebx')
+        self.assertEqual(parsed_3.comment, 'IACA END')
+
+        self.assertEqual(parsed_4.instruction, 'vmovss')
+        self.assertEqual(parsed_4.operands[1].memory.offset.value, '-4')
+        self.assertEqual(parsed_4.operands[1].memory.base.name, 'rsp')
+        self.assertEqual(parsed_4.operands[1].memory.index.name, 'rax')
+        self.assertEqual(parsed_4.operands[1].memory.scale, 8)
+        self.assertEqual(parsed_4.operands[0].register.name, 'xmm4')
+        self.assertEqual(parsed_4.comment, '12.9')
+
+        self.assertEqual(parsed_5.instruction, 'mov')
+        self.assertEqual(parsed_5.operands[1].memory.offset.identifier.name, 'var')
+        self.assertIsNone(parsed_5.operands[1].memory.base)
+        self.assertIsNone(parsed_5.operands[1].memory.index)
+        self.assertEqual(parsed_5.operands[1].memory.scale, 1)
+        self.assertEqual(parsed_5.operands[0].register.name, 'ebx')
+
+        self.assertEqual(parsed_6.instruction, 'lea')
+        self.assertIsNone(parsed_6.operands[0].memory.offset)
+        self.assertIsNone(parsed_6.operands[0].memory.base)
+        self.assertEqual(parsed_6.operands[0].memory.index.name, 'rax')
+        self.assertEqual(parsed_6.operands[0].memory.scale, 8)
+        self.assertEqual(parsed_6.operands[1].register.name, 'rbx')
+
+        self.assertEqual(parsed_7.operands[0].immediate.value, '0x1')
+        self.assertEqual(parsed_7.operands[1].register.name, 'xmm0')
+        self.assertEqual(parsed_7.operands[2].register.name, 'ymm1')
+        self.assertEqual(parsed_7.operands[3].register.name, 'ymm1')
+
+    def test_parse_line(self):
+        line_comment = '# -- Begin  main'
+        line_label = '..B1.7:                         # Preds ..B1.6'
+        line_directive = '\t\t.quad   .2.3_2__kmpc_loc_pack.2 #qed'
+        line_instruction = '\t\tlea       2(%rax,%rax), %ecx #12.9'
+
+        instruction_form_1 = {
+            'instruction': None,
+            'operands': None,
+            'directive': None,
+            'comment': '-- Begin main',
+            'label': None,
+            'line': '# -- Begin  main',
+            'line_number': 1,
+        }
+        instruction_form_2 = {
+            'instruction': None,
+            'operands': None,
+            'directive': None,
+            'comment': 'Preds ..B1.6',
+            'label': '..B1.7',
+            'line': '..B1.7:                         # Preds ..B1.6',
+            'line_number': 2,
+        }
+        instruction_form_3 = {
+            'instruction': None,
+            'operands': None,
+            'directive': {'name': 'quad', 'parameters': ['.2.3_2__kmpc_loc_pack.2']},
+            'comment': 'qed',
+            'label': None,
+            'line': '.quad   .2.3_2__kmpc_loc_pack.2 #qed',
+            'line_number': 3,
+        }
+        instruction_form_4 = {
+            'instruction': 'lea',
+            'operands': [
+                {
+                    'memory': {
+                        'offset': {'value': '2'},
+                        'base': {'name': 'rax'},
+                        'index': {'name': 'rax'},
+                        'scale': 1,
+                    }
+                },
+                {
+                    'register': {'name': 'ecx'}
+                }
+            ],
+            'directive': None,
+            'comment': '12.9',
+            'label': None,
+            'line': 'lea       2(%rax,%rax), %ecx #12.9',
+            'line_number': 4,
+        }
+
+        parsed_1 = self.parser.parse_line(line_comment, 1)
+        parsed_2 = self.parser.parse_line(line_label, 2)
+        parsed_3 = self.parser.parse_line(line_directive, 3)
+        parsed_4 = self.parser.parse_line(line_instruction, 4)
+
+        self.assertEqual(parsed_1, instruction_form_1)
+        self.assertEqual(parsed_2, instruction_form_2)
+        self.assertEqual(parsed_3, instruction_form_3)
+        self.assertEqual(parsed_4, instruction_form_4)
+
+    def test_parse_file(self):
+        parsed = self.parser.parse_file(self.triad_code)
+        self.assertEqual(parsed[0].line_number, 1)
+        self.assertEqual(len(parsed), 353)
+
+    def test_parse_register(self):
+        register_str_1 = '%rax'
+        register_str_2 = '%r9'
+        register_str_3 = '%xmm1'
+        register_str_4 = '%rip'
+
+        parsed_reg_1 = {'register': {'name': 'rax'}}
+        parsed_reg_2 = {'register': {'name': 'r9'}}
+        parsed_reg_3 = {'register': {'name': 'xmm1'}}
+        parsed_reg_4 = {'register': {'name': 'rip'}}
+
+        self.assertEqual(self.parser.parse_register(register_str_1), parsed_reg_1)
+        self.assertEqual(self.parser.parse_register(register_str_2), parsed_reg_2)
+        self.assertEqual(self.parser.parse_register(register_str_3), parsed_reg_3)
+        self.assertEqual(self.parser.parse_register(register_str_4), parsed_reg_4)
+        self.assertIsNone(self.parser.parse_register('rax'))
+
+    def test_normalize_imd(self):
+        imd_decimal_1 = {'value': '79'}
+        imd_hex_1 = {'value': '0x4f'}
+        imd_decimal_2 = {'value': '8'}
+        imd_hex_2 = {'value': '0x8'}
+        self.assertEqual(
+            self.parser.normalize_imd(imd_decimal_1), self.parser.normalize_imd(imd_hex_1)
+        )
+        self.assertEqual(
+            self.parser.normalize_imd(imd_decimal_2), self.parser.normalize_imd(imd_hex_2)
+        )
+
+    def test_reg_dependency(self):
+        reg_a1 = AttrDict({'name': 'rax'})
+        reg_a2 = AttrDict({'name': 'eax'})
+        reg_a3 = AttrDict({'name': 'ax'})
+        reg_a4 = AttrDict({'name': 'al'})
+        reg_r11 = AttrDict({'name': 'r11'})
+        reg_r11b = AttrDict({'name': 'r11b'})
+        reg_r11d = AttrDict({'name': 'r11d'})
+        reg_r11w = AttrDict({'name': 'r11w'})
+        reg_xmm1 = AttrDict({'name': 'xmm1'})
+        reg_ymm1 = AttrDict({'name': 'ymm1'})
+        reg_zmm1 = AttrDict({'name': 'zmm1'})
+
+        reg_b1 = AttrDict({'name': 'rbx'})
+        reg_r15 = AttrDict({'name': 'r15'})
+        reg_xmm2 = AttrDict({'name': 'xmm2'})
+        reg_ymm3 = AttrDict({'name': 'ymm3'})
+
+        reg_a = [reg_a1, reg_a2, reg_a3, reg_a4]
+        reg_r = [reg_r11, reg_r11b, reg_r11d, reg_r11w]
+        reg_vec_1 = [reg_xmm1, reg_ymm1, reg_zmm1]
+        reg_others = [reg_b1, reg_r15, reg_xmm2, reg_ymm3]
+        regs = reg_a + reg_r + reg_vec_1 + reg_others
+
+        # test each register against each other
+        for ri in reg_a:
+            for rj in regs:
+                assert_value = True if rj in reg_a else False
+                with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
+                    self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
+        for ri in reg_r:
+            for rj in regs:
+                assert_value = True if rj in reg_r else False
+                with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
+                    self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
+        for ri in reg_vec_1:
+            for rj in regs:
+                assert_value = True if rj in reg_vec_1 else False
+                with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
+                    self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
+        for ri in reg_others:
+            for rj in regs:
+                assert_value = True if rj == ri else False
+                with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
+                    self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
+
+    ##################
+    # Helper functions
+    ##################
+    def _get_comment(self, parser, comment):
+        return ' '.join(
+            AttrDict.convert_dict(
+                parser.process_operand(parser.comment.parseString(comment, parseAll=True).asDict())
+            ).comment
+        )
+
+    def _get_label(self, parser, label):
+        return AttrDict.convert_dict(
+            parser.process_operand(parser.label.parseString(label, parseAll=True).asDict())
+        ).label
+
+    def _get_directive(self, parser, directive):
+        return AttrDict.convert_dict(
+            parser.process_operand(parser.directive.parseString(directive, parseAll=True).asDict())
+        ).directive
+
+    @staticmethod
+    def _find_file(name):
+        testdir = os.path.dirname(__file__)
+        name = os.path.join(testdir, 'test_files', name)
+        assert os.path.exists(name)
+        return name
+
+
+if __name__ == '__main__':
+    suite = unittest.TestLoader().loadTestsFromTestCase(TestParserX86ATT)
+    unittest.TextTestRunner(verbosity=2).run(suite)
diff --git a/tests/test_semantics.py b/tests/test_semantics.py
new file mode 100755
index 0000000..324c482
--- /dev/null
+++ b/tests/test_semantics.py
@@ -0,0 +1,359 @@
+#!/usr/bin/env python3
+"""
+Unit tests for Semantic Analysis
+"""
+
+import os
+import unittest
+from subprocess import call
+
+import networkx as nx
+
+from osaca.parser import AttrDict, ParserAArch64v81, ParserX86ATT
+from osaca.semantics import (INSTR_FLAGS, KernelDG, MachineModel,
+                             SemanticsAppender)
+
+
+class TestSemanticTools(unittest.TestCase):
+    MODULE_DATA_DIR = os.path.join(
+        os.path.dirname(os.path.split(os.path.abspath(__file__))[0]), 'osaca/data/'
+    )
+    USER_DATA_DIR = os.path.join(os.path.expanduser('~'), '.osaca/')
+
+    @classmethod
+    def setUpClass(self):
+        # copy db files in user directory
+        if not os.path.isdir(os.path.join(self.USER_DATA_DIR, 'data')):
+            os.makedirs(os.path.join(self.USER_DATA_DIR, 'data'))
+            call(['cp', '-r', self.MODULE_DATA_DIR, self.USER_DATA_DIR])
+        # set up parser and kernels
+        self.parser_x86 = ParserX86ATT()
+        self.parser_AArch64 = ParserAArch64v81()
+        with open(self._find_file('kernel-x86.s')) as f:
+            self.code_x86 = f.read()
+        with open(self._find_file('kernel-AArch64.s')) as f:
+            self.code_AArch64 = f.read()
+        self.kernel_x86 = self.parser_x86.parse_file(self.code_x86)
+        self.kernel_AArch64 = self.parser_AArch64.parse_file(self.code_AArch64)
+
+        # set up machine models
+        self.machine_model_csx = MachineModel(
+            path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'csx.yml')
+        )
+        self.machine_model_tx2 = MachineModel(
+            path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'tx2.yml')
+        )
+        self.semantics_csx = SemanticsAppender(
+            self.machine_model_csx, path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/x86.yml')
+        )
+        self.semantics_tx2 = SemanticsAppender(
+            self.machine_model_tx2,
+            path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/aarch64.yml'),
+        )
+        self.machine_model_zen = MachineModel(arch='zen1')
+
+        for i in range(len(self.kernel_x86)):
+            self.semantics_csx.assign_src_dst(self.kernel_x86[i])
+            self.semantics_csx.assign_tp_lt(self.kernel_x86[i])
+        for i in range(len(self.kernel_AArch64)):
+            self.semantics_tx2.assign_src_dst(self.kernel_AArch64[i])
+            self.semantics_tx2.assign_tp_lt(self.kernel_AArch64[i])
+
+    ###########
+    # Tests
+    ###########
+
+    def test_creation_by_name(self):
+        try:
+            tmp_mm = MachineModel(arch='CSX')
+            SemanticsAppender(tmp_mm)
+        except ValueError:
+            self.fail()
+
+    def test_src_dst_assignment_x86(self):
+        for instruction_form in self.kernel_x86:
+            with self.subTest(instruction_form=instruction_form):
+                if instruction_form['operands'] is not None:
+                    self.assertTrue('source' in instruction_form['operands'])
+                    self.assertTrue('destination' in instruction_form['operands'])
+                    self.assertTrue('src_dst' in instruction_form['operands'])
+
+    def test_src_dst_assignment_AArch64(self):
+        for instruction_form in self.kernel_AArch64:
+            with self.subTest(instruction_form=instruction_form):
+                if instruction_form['operands'] is not None:
+                    self.assertTrue('source' in instruction_form['operands'])
+                    self.assertTrue('destination' in instruction_form['operands'])
+                    self.assertTrue('src_dst' in instruction_form['operands'])
+
+    def test_tp_lt_assignment_x86(self):
+        self.assertTrue('ports' in self.machine_model_csx)
+        port_num = len(self.machine_model_csx['ports'])
+        for instruction_form in self.kernel_x86:
+            with self.subTest(instruction_form=instruction_form):
+                self.assertTrue('throughput' in instruction_form)
+                self.assertTrue('latency' in instruction_form)
+                self.assertIsInstance(instruction_form['port_pressure'], list)
+                self.assertEqual(len(instruction_form['port_pressure']), port_num)
+
+    def test_tp_lt_assignment_AArch64(self):
+        self.assertTrue('ports' in self.machine_model_tx2)
+        port_num = len(self.machine_model_tx2['ports'])
+        for instruction_form in self.kernel_AArch64:
+            with self.subTest(instruction_form=instruction_form):
+                self.assertTrue('throughput' in instruction_form)
+                self.assertTrue('latency' in instruction_form)
+                self.assertIsInstance(instruction_form['port_pressure'], list)
+                self.assertEqual(len(instruction_form['port_pressure']), port_num)
+
+    def test_kernelDG_x86(self):
+        #
+        #  3
+        #   \___>5__>6
+        #   /
+        #  2
+        #     4_______>8
+        #
+        dg = KernelDG(self.kernel_x86, self.parser_x86, self.machine_model_csx)
+        self.assertTrue(nx.algorithms.dag.is_directed_acyclic_graph(dg.dg))
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=4))), 1)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=4)), 7)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=5))), 1)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=5)), 7)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=6))), 1)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=6)), 10)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=7))), 1)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=7)), 8)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=8))), 0)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=9))), 0)
+        with self.assertRaises(ValueError):
+            dg.get_dependent_instruction_forms()
+
+    def test_kernelDG_AArch64(self):
+        dg = KernelDG(self.kernel_AArch64, self.parser_AArch64, self.machine_model_tx2)
+        self.assertTrue(nx.algorithms.dag.is_directed_acyclic_graph(dg.dg))
+        self.assertEqual(set(dg.get_dependent_instruction_forms(line_number=4)), {8, 9})
+        self.assertEqual(set(dg.get_dependent_instruction_forms(line_number=5)), {10, 11})
+        self.assertEqual(set(dg.get_dependent_instruction_forms(line_number=6)), {7, 8, 9})
+        self.assertEqual(set(dg.get_dependent_instruction_forms(line_number=7)), {10, 11})
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=8)), 14)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=9)), 15)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=10)), 17)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=11)), 18)
+        self.assertEqual(set(dg.get_dependent_instruction_forms(line_number=12)), {14, 15})
+        self.assertEqual(set(dg.get_dependent_instruction_forms(line_number=13)), {17, 18})
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=14)), 16)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=15)), 16)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=16))), 0)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=17)), 19)
+        self.assertEqual(next(dg.get_dependent_instruction_forms(line_number=18)), 19)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=19))), 0)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=20))), 0)
+        self.assertEqual(len(list(dg.get_dependent_instruction_forms(line_number=21))), 0)
+        with self.assertRaises(ValueError):
+            dg.get_dependent_instruction_forms()
+
+    def test_hidden_load(self):
+        machine_model_hld = MachineModel(
+            path_to_yaml=self._find_file('hidden_load_machine_model.yml')
+        )
+        self.assertTrue(machine_model_hld.has_hidden_loads())
+        semantics_hld = SemanticsAppender(machine_model_hld)
+        kernel_hld = self.parser_x86.parse_file(self.code_x86)
+        kernel_hld_2 = self.parser_x86.parse_file(self.code_x86)
+        kernel_hld_2 = self.parser_x86.parse_file(self.code_x86)[-3:]
+        kernel_hld_3 = self.parser_x86.parse_file(self.code_x86)[5:8]
+        semantics_hld.add_semantics(kernel_hld)
+        semantics_hld.add_semantics(kernel_hld_2)
+        semantics_hld.add_semantics(kernel_hld_3)
+
+        num_hidden_loads = len([x for x in kernel_hld if INSTR_FLAGS.HIDDEN_LD in x['flags']])
+        num_hidden_loads_2 = len([x for x in kernel_hld_2 if INSTR_FLAGS.HIDDEN_LD in x['flags']])
+        num_hidden_loads_3 = len([x for x in kernel_hld_3 if INSTR_FLAGS.HIDDEN_LD in x['flags']])
+        self.assertEqual(num_hidden_loads, 1)
+        self.assertEqual(num_hidden_loads_2, 0)
+        self.assertEqual(num_hidden_loads_3, 1)
+
+    def test_cyclic_dag(self):
+        dg = KernelDG(self.kernel_x86, self.parser_x86, self.machine_model_csx)
+        dg.dg.add_edge(100, 101, latency=1.0)
+        dg.dg.add_edge(101, 102, latency=2.0)
+        dg.dg.add_edge(102, 100, latency=3.0)
+        with self.assertRaises(NotImplementedError):
+            dg.get_critical_path()
+        with self.assertRaises(NotImplementedError):
+            dg.get_loopcarried_dependencies()
+
+    def test_loop_carried_dependency_x86(self):
+        lcd_id = 9
+        lcd_id2 = 6
+        dg = KernelDG(self.kernel_x86, self.parser_x86, self.machine_model_csx)
+        lc_deps = dg.get_loopcarried_dependencies()
+        self.assertEqual(len(lc_deps), 2)
+        # ID 9
+        self.assertEqual(
+            lc_deps[lcd_id]['root'], dg.dg.nodes(data=True)[lcd_id]['instruction_form']
+        )
+        self.assertEqual(len(lc_deps[lcd_id]['dependencies']), 1)
+        self.assertEqual(
+            lc_deps[lcd_id]['dependencies'][0], dg.dg.nodes(data=True)[lcd_id]['instruction_form']
+        )
+        # ID 6
+        self.assertEqual(
+            lc_deps[lcd_id2]['root'], dg.dg.nodes(data=True)[lcd_id2]['instruction_form']
+        )
+        self.assertEqual(len(lc_deps[lcd_id2]['dependencies']), 1)
+        self.assertEqual(
+            lc_deps[lcd_id2]['dependencies'][0],
+            dg.dg.nodes(data=True)[lcd_id2]['instruction_form'],
+        )
+
+    def test_is_read_is_written_x86(self):
+        # independent form HW model
+        dag = KernelDG(self.kernel_x86, self.parser_x86, None)
+        reg_rcx = AttrDict({'name': 'rcx'})
+        reg_ymm1 = AttrDict({'name': 'ymm1'})
+
+        instr_form_r_c = self.parser_x86.parse_line('vmovsd  %xmm0, (%r15,%rcx,8)')
+        self.semantics_csx.assign_src_dst(instr_form_r_c)
+        instr_form_non_r_c = self.parser_x86.parse_line('movl  %xmm0, (%r15,%rax,8)')
+        self.semantics_csx.assign_src_dst(instr_form_non_r_c)
+        instr_form_w_c = self.parser_x86.parse_line('movi $0x05ACA, %rcx')
+        self.semantics_csx.assign_src_dst(instr_form_w_c)
+
+        instr_form_rw_ymm_1 = self.parser_x86.parse_line('vinsertf128 $0x1, %xmm1, %ymm0, %ymm1')
+        self.semantics_csx.assign_src_dst(instr_form_rw_ymm_1)
+        instr_form_rw_ymm_2 = self.parser_x86.parse_line('vinsertf128 $0x1, %xmm0, %ymm1, %ymm1')
+        self.semantics_csx.assign_src_dst(instr_form_rw_ymm_2)
+        instr_form_r_ymm = self.parser_x86.parse_line('vmovapd %ymm1, %ymm0')
+        self.semantics_csx.assign_src_dst(instr_form_r_ymm)
+
+        self.assertTrue(dag.is_read(reg_rcx, instr_form_r_c))
+        self.assertFalse(dag.is_read(reg_rcx, instr_form_non_r_c))
+        self.assertFalse(dag.is_read(reg_rcx, instr_form_w_c))
+        self.assertTrue(dag.is_written(reg_rcx, instr_form_w_c))
+        self.assertFalse(dag.is_written(reg_rcx, instr_form_r_c))
+
+        self.assertTrue(dag.is_read(reg_ymm1, instr_form_rw_ymm_1))
+        self.assertTrue(dag.is_read(reg_ymm1, instr_form_rw_ymm_2))
+        self.assertTrue(dag.is_read(reg_ymm1, instr_form_r_ymm))
+        self.assertTrue(dag.is_written(reg_ymm1, instr_form_rw_ymm_1))
+        self.assertTrue(dag.is_written(reg_ymm1, instr_form_rw_ymm_2))
+        self.assertFalse(dag.is_written(reg_ymm1, instr_form_r_ymm))
+
+    def test_is_read_is_written_AArch64(self):
+        # independent form HW model
+        dag = KernelDG(self.kernel_AArch64, self.parser_AArch64, None)
+        reg_x1 = AttrDict({'prefix': 'x', 'name': '1'})
+        reg_w1 = AttrDict({'prefix': 'w', 'name': '1'})
+        reg_d1 = AttrDict({'prefix': 'd', 'name': '1'})
+        reg_q1 = AttrDict({'prefix': 'q', 'name': '1'})
+        reg_v1 = AttrDict({'prefix': 'v', 'name': '1', 'lanes': '2', 'shape': 'd'})
+        regs = [reg_d1, reg_q1, reg_v1]
+        regs_gp = [reg_w1, reg_x1]
+
+        instr_form_r_1 = self.parser_AArch64.parse_line('stp q1, q3, [x12, #192]')
+        self.semantics_tx2.assign_src_dst(instr_form_r_1)
+        instr_form_r_2 = self.parser_AArch64.parse_line('fadd v2.2d, v1.2d, v0.2d')
+        self.semantics_tx2.assign_src_dst(instr_form_r_2)
+        instr_form_w_1 = self.parser_AArch64.parse_line('ldr d1, [x1, #:got_lo12:q2c]')
+        self.semantics_tx2.assign_src_dst(instr_form_w_1)
+        instr_form_non_w_1 = self.parser_AArch64.parse_line('ldr x1, [x1, #:got_lo12:q2c]')
+        self.semantics_tx2.assign_src_dst(instr_form_non_w_1)
+        instr_form_rw_1 = self.parser_AArch64.parse_line('fmul v1.2d, v1.2d, v0.2d')
+        self.semantics_tx2.assign_src_dst(instr_form_rw_1)
+        instr_form_rw_2 = self.parser_AArch64.parse_line('ldp q2, q4, [x1, #64]!')
+        self.semantics_tx2.assign_src_dst(instr_form_rw_2)
+        instr_form_rw_3 = self.parser_AArch64.parse_line('str x4, [x1], #64')
+        self.semantics_tx2.assign_src_dst(instr_form_rw_3)
+        instr_form_non_rw_1 = self.parser_AArch64.parse_line('adds x1, x11')
+        self.semantics_tx2.assign_src_dst(instr_form_non_rw_1)
+
+        for reg in regs:
+            with self.subTest(reg=reg):
+                self.assertTrue(dag.is_read(reg, instr_form_r_1))
+                self.assertTrue(dag.is_read(reg, instr_form_r_2))
+                self.assertTrue(dag.is_read(reg, instr_form_rw_1))
+                self.assertFalse(dag.is_read(reg, instr_form_rw_2))
+                self.assertFalse(dag.is_read(reg, instr_form_rw_3))
+                self.assertFalse(dag.is_read(reg, instr_form_w_1))
+                self.assertTrue(dag.is_written(reg, instr_form_w_1))
+                self.assertTrue(dag.is_written(reg, instr_form_rw_1))
+                self.assertFalse(dag.is_written(reg, instr_form_non_w_1))
+                self.assertFalse(dag.is_written(reg, instr_form_rw_2))
+                self.assertFalse(dag.is_written(reg, instr_form_rw_3))
+                self.assertFalse(dag.is_written(reg, instr_form_non_rw_1))
+                self.assertFalse(dag.is_written(reg, instr_form_non_rw_1))
+        for reg in regs_gp:
+            with self.subTest(reg=reg):
+                self.assertFalse(dag.is_read(reg, instr_form_r_1))
+                self.assertFalse(dag.is_read(reg, instr_form_r_2))
+                self.assertFalse(dag.is_read(reg, instr_form_rw_1))
+                self.assertTrue(dag.is_read(reg, instr_form_rw_2))
+                self.assertTrue(dag.is_read(reg, instr_form_rw_3))
+                self.assertTrue(dag.is_read(reg, instr_form_w_1))
+                self.assertFalse(dag.is_written(reg, instr_form_w_1))
+                self.assertFalse(dag.is_written(reg, instr_form_rw_1))
+                self.assertTrue(dag.is_written(reg, instr_form_non_w_1))
+                self.assertTrue(dag.is_written(reg, instr_form_rw_2))
+                self.assertTrue(dag.is_written(reg, instr_form_rw_3))
+                self.assertTrue(dag.is_written(reg, instr_form_non_rw_1))
+                self.assertTrue(dag.is_written(reg, instr_form_non_rw_1))
+
+    def test_invalid_MachineModel(self):
+        with self.assertRaises(ValueError):
+            MachineModel()
+        with self.assertRaises(ValueError):
+            MachineModel(arch='CSX', path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'csx.yml'))
+        with self.assertRaises(FileNotFoundError):
+            MachineModel(arch='THE_MACHINE')
+        with self.assertRaises(FileNotFoundError):
+            MachineModel(path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'THE_MACHINE.yml'))
+
+    def test_MachineModel_getter(self):
+        sample_operands = [
+            {
+                'memory': {
+                    'offset': None,
+                    'base': {'name': 'r12'},
+                    'index': {'name': 'rcx'},
+                    'scale': 8,
+                }
+            }
+        ]
+        self.assertIsNone(self.machine_model_csx.get_instruction('GETRESULT', sample_operands))
+        self.assertIsNone(self.machine_model_tx2.get_instruction('GETRESULT', sample_operands))
+
+        self.assertEqual(self.machine_model_csx.get_arch(), 'csx')
+        self.assertEqual(self.machine_model_tx2.get_arch(), 'tx2')
+
+        self.assertEqual(self.machine_model_csx.get_ISA(), 'x86')
+        self.assertEqual(self.machine_model_tx2.get_ISA(), 'aarch64')
+
+        ports_csx = ['0', '0DV', '1', '2', '2D', '3', '3D', '4', '5', '6', '7']
+        data_ports_csx = ['2D', '3D']
+        self.assertEqual(self.machine_model_csx.get_ports(), ports_csx)
+        self.assertEqual(self.machine_model_csx.get_data_ports(), data_ports_csx)
+
+        self.assertFalse(self.machine_model_tx2.has_hidden_loads())
+
+        self.assertEqual(MachineModel.get_isa_for_arch('CSX'), 'x86')
+        self.assertEqual(MachineModel.get_isa_for_arch('tX2'), 'aarch64')
+        with self.assertRaises(ValueError):
+            self.assertIsNone(MachineModel.get_isa_for_arch('THE_MACHINE'))
+
+    ##################
+    # Helper functions
+    ##################
+
+    @staticmethod
+    def _find_file(name):
+        testdir = os.path.dirname(__file__)
+        name = os.path.join(testdir, 'test_files', name)
+        assert os.path.exists(name)
+        return name
+
+
+if __name__ == '__main__':
+    suite = unittest.TestLoader().loadTestsFromTestCase(TestSemanticTools)
+    unittest.TextTestRunner(verbosity=2).run(suite)
diff --git a/tests/testfiles/3d-7pt.icc.skx.avx512.iaca_marked.s b/tests/testfiles/3d-7pt.icc.skx.avx512.iaca_marked.s
deleted file mode 100644
index aa04c4e..0000000
--- a/tests/testfiles/3d-7pt.icc.skx.avx512.iaca_marked.s
+++ /dev/null
@@ -1,653 +0,0 @@
-	.section	__TEXT,__text,regular,pure_instructions
-	.macosx_version_min 10, 14
-	.globl	_main                   ## -- Begin function main
-	.p2align	4, 0x90
-_main:                                  ## @main
-	.cfi_startproc
-## %bb.0:
-	pushq	%rbp
-	.cfi_def_cfa_offset 16
-	.cfi_offset %rbp, -16
-	movq	%rsp, %rbp
-	.cfi_def_cfa_register %rbp
-	pushq	%r15
-	pushq	%r14
-	pushq	%r13
-	pushq	%r12
-	pushq	%rbx
-	subq	$408, %rsp              ## imm = 0x198
-	.cfi_offset %rbx, -56
-	.cfi_offset %r12, -48
-	.cfi_offset %r13, -40
-	.cfi_offset %r14, -32
-	.cfi_offset %r15, -24
-	movq	%rsi, %rbx
-	movq	16(%rsi), %rdi
-	callq	_atoi
-	movl	%eax, %r14d
-	movq	24(%rbx), %rdi
-	callq	_atoi
-                                        ## kill: def $eax killed $eax def $rax
-	movq	%r14, -96(%rbp)         ## 8-byte Spill
-	movl	%r14d, %ecx
-	imull	%r14d, %ecx
-	movl	%ecx, -88(%rbp)         ## 4-byte Spill
-	movq	%rax, -72(%rbp)         ## 8-byte Spill
-	imull	%eax, %ecx
-	movslq	%ecx, %r13
-	shlq	$3, %r13
-	leaq	-56(%rbp), %rdi
-	movl	$32, %esi
-	movq	%r13, %rdx
-	callq	_posix_memalign
-	testl	%eax, %eax
-	je	LBB0_2
-## %bb.1:
-	movq	$0, -56(%rbp)
-	xorl	%ebx, %ebx
-	jmp	LBB0_3
-LBB0_2:
-	movq	-56(%rbp), %rbx
-LBB0_3:
-	leaq	-56(%rbp), %rdi
-	movl	$32, %esi
-	movq	%r13, %rdx
-	callq	_posix_memalign
-	testl	%eax, %eax
-	je	LBB0_5
-## %bb.4:
-	movq	$0, -56(%rbp)
-	xorl	%eax, %eax
-	jmp	LBB0_6
-LBB0_5:
-	movq	-56(%rbp), %rax
-LBB0_6:
-	movq	%rax, -80(%rbp)         ## 8-byte Spill
-	movq	-96(%rbp), %r9          ## 8-byte Reload
-	movabsq	$4602641980904887326, %rax ## imm = 0x3FDFDE7EEC22D41E
-	movq	%rax, -56(%rbp)
-	cmpl	$3, -72(%rbp)           ## 4-byte Folded Reload
-	jl	LBB0_15
-## %bb.7:
-	movabsq	$4294967296, %r12       ## imm = 0x100000000
-	leal	-1(%r9), %ecx
-	movslq	%r9d, %rax
-	movslq	-88(%rbp), %rdx         ## 4-byte Folded Reload
-	movq	%rdx, -160(%rbp)        ## 8-byte Spill
-	movq	-72(%rbp), %rsi         ## 8-byte Reload
-	leal	-1(%rsi), %edx
-	leaq	8(%rbx,%rax,8), %rsi
-	movq	%rsi, -152(%rbp)        ## 8-byte Spill
-	movq	-80(%rbp), %rsi         ## 8-byte Reload
-	leaq	8(%rsi,%rax,8), %rsi
-	movq	%rsi, -144(%rbp)        ## 8-byte Spill
-	leaq	(,%rax,8), %rsi
-	movq	%rsi, -104(%rbp)        ## 8-byte Spill
-	leaq	2(%rax), %rsi
-	movq	%rsi, -136(%rbp)        ## 8-byte Spill
-	shlq	$32, %rax
-	movq	%rax, -184(%rbp)        ## 8-byte Spill
-	addq	$-1, %rcx
-	movl	%r9d, %eax
-	movq	%rax, -176(%rbp)        ## 8-byte Spill
-	movl	$1, %eax
-	movabsq	$4601149042440805838, %rdi ## imm = 0x3FDA90AD19501DCE
-	movq	%rdx, -208(%rbp)        ## 8-byte Spill
-	.p2align	4, 0x90
-LBB0_8:                                 ## =>This Loop Header: Depth=1
-                                        ##     Child Loop BB0_10 Depth 2
-                                        ##       Child Loop BB0_11 Depth 3
-	cmpl	$2, %r9d
-	jle	LBB0_14
-## %bb.9:                               ##   in Loop: Header=BB0_8 Depth=1
-	movl	%eax, %r14d
-	imull	-88(%rbp), %r14d        ## 4-byte Folded Reload
-	leaq	1(%rax), %r8
-	movq	-160(%rbp), %rdx        ## 8-byte Reload
-	movq	%rdx, %rsi
-	movq	%r8, -168(%rbp)         ## 8-byte Spill
-	imulq	%r8, %rsi
-	movq	-152(%rbp), %r10        ## 8-byte Reload
-	leaq	(%r10,%rsi,8), %r8
-	leaq	-1(%rax), %rsi
-	imulq	%rdx, %rsi
-	leaq	(%r10,%rsi,8), %r10
-	movq	%rax, %rsi
-	imulq	%rdx, %rsi
-	movq	-144(%rbp), %rdx        ## 8-byte Reload
-	leaq	(%rdx,%rsi,8), %r11
-	addl	-136(%rbp), %esi        ## 4-byte Folded Reload
-	shlq	$32, %rsi
-	movl	%r9d, %r15d
-	imull	%eax, %r15d
-	leal	2(%r15), %r13d
-	imull	%r9d, %r13d
-	addl	$1, %r13d
-	addq	$1, %r14
-	addl	$1, %r15d
-	imull	%r9d, %r15d
-	movl	$1, %eax
-	.p2align	4, 0x90
-LBB0_10:                                ##   Parent Loop BB0_8 Depth=1
-                                        ## =>  This Loop Header: Depth=2
-                                        ##       Child Loop BB0_11 Depth 3
-	movq	%rax, -112(%rbp)        ## 8-byte Spill
-	leaq	1(%rax), %rax
-	movq	%rax, -192(%rbp)        ## 8-byte Spill
-	movq	%rsi, -120(%rbp)        ## 8-byte Spill
-	xorl	%edx, %edx
-	.p2align	4, 0x90
-LBB0_11:                                ##   Parent Loop BB0_8 Depth=1
-                                        ##     Parent Loop BB0_10 Depth=2
-                                        ## =>    This Inner Loop Header: Depth=3
-	movq	%rdi, (%r11,%rdx,8)
-	leal	(%r15,%rdx), %r9d
-	movslq	%r9d, %rax
-	movq	%rdi, (%rbx,%rax,8)
-	movq	%rsi, %rax
-	sarq	$29, %rax
-	movq	%rdi, (%rbx,%rax)
-	leal	(%r14,%rdx), %eax
-	cltq
-	movq	%rdi, (%rbx,%rax,8)
-	leal	(%r13,%rdx), %eax
-	cltq
-	movq	%rdi, (%rbx,%rax,8)
-	movq	%rdi, (%r10,%rdx,8)
-	movq	%rdi, (%r8,%rdx,8)
-	addq	$1, %rdx
-	addq	%r12, %rsi
-	cmpq	%rdx, %rcx
-	jne	LBB0_11
-## %bb.12:                              ##   in Loop: Header=BB0_10 Depth=2
-	movq	-104(%rbp), %rax        ## 8-byte Reload
-	addq	%rax, %r8
-	addq	%rax, %r10
-	addq	%rax, %r11
-	movq	-120(%rbp), %rsi        ## 8-byte Reload
-	addq	-184(%rbp), %rsi        ## 8-byte Folded Reload
-	movq	-176(%rbp), %rax        ## 8-byte Reload
-	addq	%rax, %r13
-	addq	%rax, %r14
-	addq	%rax, %r15
-	cmpq	%rdx, -112(%rbp)        ## 8-byte Folded Reload
-	movq	-192(%rbp), %rax        ## 8-byte Reload
-	jne	LBB0_10
-## %bb.13:                              ##   in Loop: Header=BB0_8 Depth=1
-	movq	-168(%rbp), %rsi        ## 8-byte Reload
-	movq	%rsi, %rax
-	movq	-96(%rbp), %r9          ## 8-byte Reload
-	movq	-208(%rbp), %rdx        ## 8-byte Reload
-	cmpq	%rdx, %rsi
-	jne	LBB0_8
-	jmp	LBB0_15
-	.p2align	4, 0x90
-LBB0_14:                                ##   in Loop: Header=BB0_8 Depth=1
-	addq	$1, %rax
-	movq	%rax, %rsi
-	cmpq	%rdx, %rsi
-	jne	LBB0_8
-LBB0_15:
-	movq	_var_false@GOTPCREL(%rip), %rax
-	cmpl	$0, (%rax)
-	je	LBB0_17
-## %bb.16:
-	movq	%rbx, %rdi
-	callq	_dummy
-	movq	-80(%rbp), %rdi         ## 8-byte Reload
-	callq	_dummy
-	leaq	-56(%rbp), %rdi
-	callq	_dummy
-	movq	-96(%rbp), %r9          ## 8-byte Reload
-LBB0_17:
-	cmpl	$3, -72(%rbp)           ## 4-byte Folded Reload
-	jl	LBB0_59
-## %bb.18:
-	movabsq	$4294967296, %r14       ## imm = 0x100000000
-	leal	-1(%r9), %ecx
-	movslq	%r9d, %rsi
-	movslq	-88(%rbp), %rax         ## 4-byte Folded Reload
-	movq	%rax, -312(%rbp)        ## 8-byte Spill
-	movq	-72(%rbp), %rax         ## 8-byte Reload
-	addl	$-1, %eax
-	movq	%rax, -72(%rbp)         ## 8-byte Spill
-	leaq	-1(%rcx), %rax
-	leaq	-2(%rcx), %rdi
-	movq	%rdi, -424(%rbp)        ## 8-byte Spill
-	leaq	1(%rsi), %rdi
-	movq	%rdi, -224(%rbp)        ## 8-byte Spill
-	leaq	(%rsi,%rcx), %rdi
-	movq	%rdi, -304(%rbp)        ## 8-byte Spill
-	movl	%r9d, %edi
-	movq	%rdi, -256(%rbp)        ## 8-byte Spill
-	movq	%rcx, -264(%rbp)        ## 8-byte Spill
-	leaq	(%rbx,%rcx,8), %rcx
-	addq	$-8, %rcx
-	movq	%rcx, -352(%rbp)        ## 8-byte Spill
-	leal	6(%r9), %ecx
-	andl	$7, %ecx
-	movq	%rax, -448(%rbp)        ## 8-byte Spill
-	movq	%rcx, -344(%rbp)        ## 8-byte Spill
-	subq	%rcx, %rax
-	movq	%rsi, %rcx
-	shlq	$32, %rcx
-	movq	%rcx, -440(%rbp)        ## 8-byte Spill
-	leaq	1(%rax), %rcx
-	movq	%rcx, -328(%rbp)        ## 8-byte Spill
-	movq	%rax, -336(%rbp)        ## 8-byte Spill
-	leal	1(%rax), %eax
-	movl	%eax, -212(%rbp)        ## 4-byte Spill
-	leaq	2(%rsi), %rax
-	movq	%rax, -296(%rbp)        ## 8-byte Spill
-	movq	-80(%rbp), %rax         ## 8-byte Reload
-	leaq	8(%rax,%rsi,8), %rax
-	movq	%rax, -288(%rbp)        ## 8-byte Spill
-	leaq	(,%rsi,8), %rax
-	movq	%rax, -432(%rbp)        ## 8-byte Spill
-	movq	%rsi, -200(%rbp)        ## 8-byte Spill
-	leaq	(%rbx,%rsi,8), %rax
-	addq	$8, %rax
-	movq	%rax, -280(%rbp)        ## 8-byte Spill
-	movl	$1, %eax
-	.p2align	4, 0x90
-LBB0_19:                                ## =>This Loop Header: Depth=1
-                                        ##     Child Loop BB0_52 Depth 2
-                                        ##       Child Loop BB0_37 Depth 3
-                                        ##       Child Loop BB0_55 Depth 3
-	cmpl	$2, %r9d
-	jle	LBB0_58
-## %bb.20:                              ##   in Loop: Header=BB0_19 Depth=1
-	movq	%rax, %rcx
-	movq	%rax, %r12
-	movq	-312(%rbp), %r15        ## 8-byte Reload
-	imulq	%r15, %r12
-	leaq	1(%rax), %rax
-	movl	%r9d, %edi
-	imull	%ecx, %edi
-	leal	1(%rdi), %r8d
-	imull	%r9d, %r8d
-	addl	$2, %edi
-	imull	%r9d, %edi
-	movq	%rax, -320(%rbp)        ## 8-byte Spill
-	movq	%rax, %r13
-	imulq	%r15, %r13
-	movq	-224(%rbp), %rdx        ## 8-byte Reload
-	leaq	(%rdx,%r13), %rax
-	movq	%rax, -408(%rbp)        ## 8-byte Spill
-	movq	-304(%rbp), %rsi        ## 8-byte Reload
-	leaq	(%rsi,%r13), %rax
-	movq	%rax, -400(%rbp)        ## 8-byte Spill
-	addq	$-1, %rcx
-	imulq	%r15, %rcx
-	leaq	(%rdx,%rcx), %rax
-	movq	%rax, -392(%rbp)        ## 8-byte Spill
-	leaq	(%rsi,%rcx), %rax
-	movq	%rax, -384(%rbp)        ## 8-byte Spill
-	movq	-296(%rbp), %rax        ## 8-byte Reload
-	leal	(%rax,%r12), %eax
-	shlq	$32, %rax
-	movq	%rax, -104(%rbp)        ## 8-byte Spill
-	movq	-280(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%r13,8), %r10
-	leaq	(%rax,%rcx,8), %r11
-	movl	%r12d, %edx
-	addq	$1, %rdx
-	movq	-200(%rbp), %rax        ## 8-byte Reload
-	addq	%rax, %r13
-	movq	%r13, -144(%rbp)        ## 8-byte Spill
-	addq	%rax, %rcx
-	movq	%rcx, -152(%rbp)        ## 8-byte Spill
-	leal	2(%r8), %eax
-	movq	%rax, -240(%rbp)        ## 8-byte Spill
-	leal	1(%r12), %eax
-	movq	%rax, -416(%rbp)        ## 8-byte Spill
-	movq	%rdi, %rax
-	movq	%rdi, -112(%rbp)        ## 8-byte Spill
-	leal	1(%rdi), %r15d
-	movq	-224(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%r12), %rcx
-	leaq	(%rsi,%r12), %rax
-	movq	%rax, -368(%rbp)        ## 8-byte Spill
-	movq	-288(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%r12,8), %rsi
-	leaq	-8(%rax,%r12,8), %rax
-	movq	%rax, -136(%rbp)        ## 8-byte Spill
-	movq	%r12, -120(%rbp)        ## 8-byte Spill
-	leaq	1(%r12), %rax
-	movq	%rax, -360(%rbp)        ## 8-byte Spill
-	leal	-1(%r8), %eax
-	movl	%eax, -124(%rbp)        ## 4-byte Spill
-	movq	%rcx, -376(%rbp)        ## 8-byte Spill
-	movq	%rcx, -272(%rbp)        ## 8-byte Spill
-	movq	%r8, -248(%rbp)         ## 8-byte Spill
-	movq	%r8, %rdi
-	movq	%r15, -232(%rbp)        ## 8-byte Spill
-	movq	%r15, %r8
-	xorl	%r12d, %r12d
-	movl	$1, %eax
-	jmp	LBB0_52
-	.p2align	4, 0x90
-LBB0_21:                                ##   in Loop: Header=BB0_52 Depth=2
-	movl	%r9d, %edx
-	imull	%r12d, %edx
-	movq	-248(%rbp), %rax        ## 8-byte Reload
-	leal	(%rax,%rdx), %ecx
-	movq	-424(%rbp), %rax        ## 8-byte Reload
-	leal	(%rcx,%rax), %esi
-	cmpl	%ecx, %esi
-	jl	LBB0_53
-## %bb.22:                              ##   in Loop: Header=BB0_52 Depth=2
-	movq	%rax, %rcx
-	shrq	$32, %rcx
-	jne	LBB0_53
-## %bb.23:                              ##   in Loop: Header=BB0_52 Depth=2
-	movq	-240(%rbp), %rsi        ## 8-byte Reload
-	leal	(%rsi,%rdx), %esi
-	leal	(%rsi,%rax), %edi
-	cmpl	%esi, %edi
-	jl	LBB0_53
-## %bb.24:                              ##   in Loop: Header=BB0_52 Depth=2
-	testq	%rcx, %rcx
-	jne	LBB0_53
-## %bb.25:                              ##   in Loop: Header=BB0_52 Depth=2
-	movq	-416(%rbp), %rsi        ## 8-byte Reload
-	leal	(%rsi,%rdx), %esi
-	leal	(%rsi,%rax), %edi
-	cmpl	%esi, %edi
-	jl	LBB0_53
-## %bb.26:                              ##   in Loop: Header=BB0_52 Depth=2
-	testq	%rcx, %rcx
-	jne	LBB0_53
-## %bb.27:                              ##   in Loop: Header=BB0_52 Depth=2
-	addl	-232(%rbp), %edx        ## 4-byte Folded Reload
-	leal	(%rdx,%rax), %esi
-	cmpl	%edx, %esi
-	jl	LBB0_53
-## %bb.28:                              ##   in Loop: Header=BB0_52 Depth=2
-	testq	%rcx, %rcx
-	jne	LBB0_53
-## %bb.29:                              ##   in Loop: Header=BB0_52 Depth=2
-	movq	-192(%rbp), %rdx        ## 8-byte Reload
-	movq	%rdx, %rsi
-	imulq	-200(%rbp), %rsi        ## 8-byte Folded Reload
-	movq	-376(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%rsi), %rdi
-	movq	-368(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%rsi), %r13
-	movq	-408(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%rsi), %r11
-	movq	-400(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%rsi), %rcx
-	movq	-392(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%rsi), %r10
-	addq	-384(%rbp), %rsi        ## 8-byte Folded Reload
-                                        ## kill: def $edx killed $edx killed $rdx def $rdx
-	imull	-256(%rbp), %edx        ## 4-byte Folded Reload
-	movq	-232(%rbp), %rax        ## 8-byte Reload
-	leal	(%rax,%rdx), %r12d
-	movq	-360(%rbp), %rax        ## 8-byte Reload
-	leal	(%rax,%rdx), %r9d
-	movq	-240(%rbp), %rax        ## 8-byte Reload
-	leal	(%rax,%rdx), %eax
-	movl	%eax, -60(%rbp)         ## 4-byte Spill
-	addl	-248(%rbp), %edx        ## 4-byte Folded Reload
-	movq	-80(%rbp), %rax         ## 8-byte Reload
-	leaq	(%rax,%rdi,8), %rdi
-	leaq	(%rbx,%rcx,8), %rcx
-	cmpq	%rcx, %rdi
-	leaq	(%rax,%r13,8), %rcx
-	leaq	(%rbx,%r11,8), %r11
-	setb	-45(%rbp)               ## 1-byte Folded Spill
-	cmpq	%rcx, %r11
-	leaq	(%rbx,%r10,8), %r10
-	leaq	(%rbx,%rsi,8), %r11
-	movslq	%r12d, %rsi
-	setb	-44(%rbp)               ## 1-byte Folded Spill
-	cmpq	%r11, %rdi
-	setb	%r12b
-	cmpq	%rcx, %r10
-	leaq	(%rbx,%rsi,8), %r10
-	movq	-352(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%rsi,8), %rsi
-	movslq	%r9d, %r9
-	setb	-43(%rbp)               ## 1-byte Folded Spill
-	cmpq	%rsi, %rdi
-	setb	%r11b
-	cmpq	%rcx, %r10
-	leaq	(%rbx,%r9,8), %r10
-	leaq	(%rax,%r9,8), %rsi
-	movslq	-60(%rbp), %r9          ## 4-byte Folded Reload
-	setb	-60(%rbp)               ## 1-byte Folded Spill
-	cmpq	%rsi, %rdi
-	setb	%r13b
-	cmpq	%rcx, %r10
-	leaq	(%rbx,%r9,8), %r10
-	leaq	(%rax,%r9,8), %rsi
-	movslq	%edx, %rdx
-	setb	-42(%rbp)               ## 1-byte Folded Spill
-	cmpq	%rsi, %rdi
-	setb	%r9b
-	cmpq	%rcx, %r10
-	leaq	(%rax,%rdx,8), %rsi
-	setb	-41(%rbp)               ## 1-byte Folded Spill
-	cmpq	%rsi, %rdi
-	leaq	(%rbx,%rdx,8), %rdx
-	setb	%r10b
-	cmpq	%rcx, %rdx
-	setb	%dl
-	leaq	-55(%rbp), %rax
-	cmpq	%rdi, %rax
-	seta	%dil
-	leaq	-56(%rbp), %rax
-	cmpq	%rcx, %rax
-	setb	%al
-	movb	-44(%rbp), %cl          ## 1-byte Reload
-	testb	%cl, -45(%rbp)          ## 1-byte Folded Reload
-	jne	LBB0_53
-## %bb.30:                              ##   in Loop: Header=BB0_52 Depth=2
-	andb	-43(%rbp), %r12b        ## 1-byte Folded Reload
-	jne	LBB0_53
-## %bb.31:                              ##   in Loop: Header=BB0_52 Depth=2
-	andb	-60(%rbp), %r11b        ## 1-byte Folded Reload
-	jne	LBB0_53
-## %bb.32:                              ##   in Loop: Header=BB0_52 Depth=2
-	andb	-42(%rbp), %r13b        ## 1-byte Folded Reload
-	jne	LBB0_53
-## %bb.33:                              ##   in Loop: Header=BB0_52 Depth=2
-	andb	-41(%rbp), %r9b         ## 1-byte Folded Reload
-	jne	LBB0_53
-## %bb.34:                              ##   in Loop: Header=BB0_52 Depth=2
-	movl	$1, %r9d
-	andb	%dl, %r10b
-	jne	LBB0_54
-## %bb.35:                              ##   in Loop: Header=BB0_52 Depth=2
-	andb	%al, %dil
-	jne	LBB0_54
-## %bb.36:                              ##   in Loop: Header=BB0_52 Depth=2
-	vbroadcastsd	-56(%rbp), %zmm0
-	movq	-104(%rbp), %rdx        ## 8-byte Reload
-	xorl	%esi, %esi
-	movq	-336(%rbp), %r9         ## 8-byte Reload
-	movabsq	$34359738368, %rdi      ## imm = 0x800000000
-	movq	%rdi, %r10
-	movq	-184(%rbp), %r11        ## 8-byte Reload
-	movq	-176(%rbp), %r15        ## 8-byte Reload
-	movq	-168(%rbp), %r12        ## 8-byte Reload
-	movq	-88(%rbp), %rdi         ## 8-byte Reload
-	movq	-160(%rbp), %rax        ## 8-byte Reload
-	.p2align	4, 0x90
-        movl      $111, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     100        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     103        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     144        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-LBB0_37:                                ##   Parent Loop BB0_19 Depth=1
-                                        ##     Parent Loop BB0_52 Depth=2
-                                        ## =>    This Inner Loop Header: Depth=3
-	leal	(%rax,%rsi), %ecx
-	movslq	%ecx, %rcx
-	vmovupd	(%rbx,%rcx,8), %zmm1
-	movq	%rdx, %rcx
-	sarq	$29, %rcx
-	vaddpd	(%rbx,%rcx), %zmm1, %zmm1
-	leal	(%r12,%rsi), %ecx
-	movslq	%ecx, %rcx
-	vaddpd	(%rbx,%rcx,8), %zmm1, %zmm1
-	leal	(%r8,%rsi), %ecx
-	movslq	%ecx, %rcx
-	vaddpd	(%rbx,%rcx,8), %zmm1, %zmm1
-	vaddpd	(%r15,%rsi,8), %zmm1, %zmm1
-	vaddpd	(%r11,%rsi,8), %zmm1, %zmm1
-	vmulpd	%zmm0, %zmm1, %zmm1
-	vmovupd	%zmm1, (%rdi,%rsi,8)
-	addq	$8, %rsi
-	addq	%r10, %rdx
-	cmpq	%rsi, %r9
-	jne	LBB0_37
-        movl      $222, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     100        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     103        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     144        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-## %bb.38:                              ##   in Loop: Header=BB0_52 Depth=2
-	movq	-328(%rbp), %r9         ## 8-byte Reload
-	movl	-212(%rbp), %eax        ## 4-byte Reload
-	movl	%eax, %r15d
-	cmpl	$0, -344(%rbp)          ## 4-byte Folded Reload
-	jne	LBB0_54
-	jmp	LBB0_56
-	.p2align	4, 0x90
-LBB0_52:                                ##   Parent Loop BB0_19 Depth=1
-                                        ## =>  This Loop Header: Depth=2
-                                        ##       Child Loop BB0_37 Depth 3
-                                        ##       Child Loop BB0_55 Depth 3
-	movq	%rdx, -168(%rbp)        ## 8-byte Spill
-	addq	$1, %rax
-	movl	$1, %r15d
-	cmpq	$8, -448(%rbp)          ## 8-byte Folded Reload
-	movq	%r10, -184(%rbp)        ## 8-byte Spill
-	movq	%r11, -176(%rbp)        ## 8-byte Spill
-	movq	%rsi, -88(%rbp)         ## 8-byte Spill
-	movq	%rdi, -160(%rbp)        ## 8-byte Spill
-	movq	%r12, -192(%rbp)        ## 8-byte Spill
-	movq	%rax, -208(%rbp)        ## 8-byte Spill
-	jae	LBB0_21
-LBB0_53:                                ##   in Loop: Header=BB0_52 Depth=2
-	movl	$1, %r9d
-LBB0_54:                                ##   in Loop: Header=BB0_52 Depth=2
-	movq	-136(%rbp), %rax        ## 8-byte Reload
-	leaq	(%rax,%r9,8), %rdx
-	movq	-144(%rbp), %rax        ## 8-byte Reload
-	leaq	(%r9,%rax), %rcx
-	leaq	(%rbx,%rcx,8), %r11
-	movq	-152(%rbp), %rax        ## 8-byte Reload
-	leaq	(%r9,%rax), %rcx
-	leaq	(%rbx,%rcx,8), %r10
-	movq	-272(%rbp), %rax        ## 8-byte Reload
-	leal	(%r9,%rax), %r12d
-	shlq	$32, %r12
-	movq	-264(%rbp), %r13        ## 8-byte Reload
-	subq	%r9, %r13
-	movq	-112(%rbp), %rax        ## 8-byte Reload
-	leal	(%r15,%rax), %esi
-	movq	-120(%rbp), %rax        ## 8-byte Reload
-	leal	(%r15,%rax), %edi
-	addl	-124(%rbp), %r15d       ## 4-byte Folded Reload
-	xorl	%ecx, %ecx
-	.p2align	4, 0x90
-LBB0_55:                                ##   Parent Loop BB0_19 Depth=1
-                                        ##     Parent Loop BB0_52 Depth=2
-                                        ## =>    This Inner Loop Header: Depth=3
-	leal	(%r15,%rcx), %eax
-	cltq
-	vmovsd	(%rbx,%rax,8), %xmm0    ## xmm0 = mem[0],zero
-	movq	%r12, %rax
-	sarq	$29, %rax
-	vaddsd	(%rbx,%rax), %xmm0, %xmm0
-	leal	(%rdi,%rcx), %eax
-	cltq
-	vaddsd	(%rbx,%rax,8), %xmm0, %xmm0
-	leal	(%rsi,%rcx), %eax
-	cltq
-	vaddsd	(%rbx,%rax,8), %xmm0, %xmm0
-	vaddsd	(%r10,%rcx,8), %xmm0, %xmm0
-	vaddsd	(%r11,%rcx,8), %xmm0, %xmm0
-	vmulsd	-56(%rbp), %xmm0, %xmm0
-	vmovsd	%xmm0, (%rdx,%rcx,8)
-	addq	$1, %rcx
-	addq	%r14, %r12
-	cmpq	%rcx, %r13
-	jne	LBB0_55
-LBB0_56:                                ##   in Loop: Header=BB0_52 Depth=2
-	movq	-192(%rbp), %r12        ## 8-byte Reload
-	addq	$1, %r12
-	movq	-104(%rbp), %rax        ## 8-byte Reload
-	addq	-440(%rbp), %rax        ## 8-byte Folded Reload
-	movq	%rax, -104(%rbp)        ## 8-byte Spill
-	movq	-432(%rbp), %rcx        ## 8-byte Reload
-	movq	-88(%rbp), %rsi         ## 8-byte Reload
-	addq	%rcx, %rsi
-	movq	-184(%rbp), %r10        ## 8-byte Reload
-	addq	%rcx, %r10
-	movq	-176(%rbp), %r11        ## 8-byte Reload
-	addq	%rcx, %r11
-	movq	-256(%rbp), %rax        ## 8-byte Reload
-	addq	%rax, %r8
-	movq	-168(%rbp), %rdx        ## 8-byte Reload
-	addq	%rax, %rdx
-	movq	-160(%rbp), %rdi        ## 8-byte Reload
-	addq	%rax, %rdi
-	addq	%rcx, -136(%rbp)        ## 8-byte Folded Spill
-	movq	-200(%rbp), %rax        ## 8-byte Reload
-	addq	%rax, -144(%rbp)        ## 8-byte Folded Spill
-	addq	%rax, -152(%rbp)        ## 8-byte Folded Spill
-	addq	%rax, -272(%rbp)        ## 8-byte Folded Spill
-	movq	-96(%rbp), %r9          ## 8-byte Reload
-	movq	-112(%rbp), %rax        ## 8-byte Reload
-	addl	%r9d, %eax
-	movq	%rax, -112(%rbp)        ## 8-byte Spill
-	movq	-120(%rbp), %rax        ## 8-byte Reload
-	addl	%r9d, %eax
-	movq	%rax, -120(%rbp)        ## 8-byte Spill
-	addl	%r9d, -124(%rbp)        ## 4-byte Folded Spill
-	movq	-208(%rbp), %rax        ## 8-byte Reload
-	cmpq	-264(%rbp), %rax        ## 8-byte Folded Reload
-	jne	LBB0_52
-## %bb.57:                              ##   in Loop: Header=BB0_19 Depth=1
-	movq	-320(%rbp), %rcx        ## 8-byte Reload
-	movq	%rcx, %rax
-	cmpq	-72(%rbp), %rcx         ## 8-byte Folded Reload
-	jne	LBB0_19
-	jmp	LBB0_59
-	.p2align	4, 0x90
-LBB0_58:                                ##   in Loop: Header=BB0_19 Depth=1
-	movq	%rax, %rcx
-	addq	$1, %rcx
-	movq	%rcx, %rax
-	cmpq	-72(%rbp), %rcx         ## 8-byte Folded Reload
-	jne	LBB0_19
-LBB0_59:
-	movq	_var_false@GOTPCREL(%rip), %rax
-	cmpl	$0, (%rax)
-	je	LBB0_61
-## %bb.60:
-	movq	%rbx, %rdi
-	vzeroupper
-	callq	_dummy
-	movq	-80(%rbp), %rdi         ## 8-byte Reload
-	callq	_dummy
-	leaq	-56(%rbp), %rdi
-	callq	_dummy
-LBB0_61:
-	xorl	%eax, %eax
-	addq	$408, %rsp              ## imm = 0x198
-	popq	%rbx
-	popq	%r12
-	popq	%r13
-	popq	%r14
-	popq	%r15
-	popq	%rbp
-	vzeroupper
-	retq
-	.cfi_endproc
-                                        ## -- End function
-
-.subsections_via_symbols
diff --git a/tests/testfiles/taxCalc-ivb-iaca b/tests/testfiles/taxCalc-ivb-iaca
deleted file mode 100755
index 5d7f82e..0000000
Binary files a/tests/testfiles/taxCalc-ivb-iaca and /dev/null differ
diff --git a/tests/testfiles/taxCalc-ivb-iaca.S b/tests/testfiles/taxCalc-ivb-iaca.S
deleted file mode 100644
index e9959dc..0000000
--- a/tests/testfiles/taxCalc-ivb-iaca.S
+++ /dev/null
@@ -1,196 +0,0 @@
-# mark_description "Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 16.0.3.210 Build 20160415";
-# mark_description "-I../../iaca-lin64/include -fno-alias -O3 -fopenmp -xCORE-AVX-I -S -o ivb-asm.S";
-	.file "taxCalc.c"
-	.text
-..TXTST0:
-# -- Begin  main
-	.text
-# mark_begin;
-       .align    16,0x90
-	.globl main
-# --- main(void)
-main:
-..B1.1:                         # Preds ..B1.0
-	.cfi_startproc
-..___tag_value_main.1:
-..L2:
-                                                          #4.15
-        pushq     %rbp                                          #4.15
-	.cfi_def_cfa_offset 16
-        movq      %rsp, %rbp                                    #4.15
-	.cfi_def_cfa 6, 16
-	.cfi_offset 6, -16
-        andq      $-128, %rsp                                   #4.15
-        subq      $4096, %rsp                                   #4.15
-        movl      $104446, %esi                                 #4.15
-        movl      $3, %edi                                      #4.15
-        call      __intel_new_feature_proc_init                 #4.15
-                                # LOE rbx r12 r13 r14 r15
-..B1.10:                        # Preds ..B1.1
-        vstmxcsr  (%rsp)                                        #4.15
-        movl      $.2.3_2_kmpc_loc_struct_pack.3, %edi          #4.15
-        xorl      %esi, %esi                                    #4.15
-        orl       $32832, (%rsp)                                #4.15
-        xorl      %eax, %eax                                    #4.15
-        vldmxcsr  (%rsp)                                        #4.15
-..___tag_value_main.6:
-        call      __kmpc_begin                                  #4.15
-..___tag_value_main.7:
-                                # LOE rbx r12 r13 r14 r15
-..B1.2:                         # Preds ..B1.10
-        movl      $il0_peep_printf_format_0, %edi               #5.5
-        call      puts                                          #5.5
-                                # LOE rbx r12 r13 r14 r15
-..B1.3:                         # Preds ..B1.2
-        vmovss    .L_2il0floatpacket.0(%rip), %xmm0             #8.15
-        xorl      %eax, %eax                                    #11.5
-        vxorps    %xmm1, %xmm1, %xmm1                           #9.5
-        vmovss    %xmm1, (%rsp)                                 #9.5
-
-        movl $111,%ebx
-       .byte 100,103,144
-
-..B1.4:                         # Preds ..B1.4 ..B1.3
-        lea       1(%rax,%rax), %edx                            #12.9
-        vcvtsi2ss %edx, %xmm2, %xmm2                            #12.27
-        vmulss    %xmm2, %xmm0, %xmm3                           #12.29
-        lea       2(%rax,%rax), %ecx                            #12.9
-        vaddss    %xmm3, %xmm1, %xmm4                           #12.29
-        vxorps    %xmm1, %xmm1, %xmm1                           #12.27
-        vcvtsi2ss %ecx, %xmm1, %xmm1                            #12.27
-        vmulss    %xmm1, %xmm0, %xmm5                           #12.29
-        vmovss    %xmm4, 4(%rsp,%rax,8)                         #12.9
-        vaddss    %xmm5, %xmm4, %xmm1                           #12.29
-        vmovss    %xmm1, 8(%rsp,%rax,8)                         #12.9
-        incq      %rax                                          #11.5
-        cmpq      $499, %rax                                    #11.5
-        jb        ..B1.4        # Prob 99%                      #11.5
-                                # LOE rax rbx r12 r13 r14 r15 xmm0 xmm1
-        movl $222,%ebx
-        .byte 100,103,144
-..B1.5:                         # Preds ..B1.4
-        vmovss    3992(%rsp), %xmm0                             #12.18
-        movl      $il0_peep_printf_format_1, %edi               #15.5
-        vaddss    .L_2il0floatpacket.1(%rip), %xmm0, %xmm1      #12.29
-        vmovss    %xmm1, 3996(%rsp)                             #12.9
-        call      puts                                          #15.5
-                                # LOE rbx r12 r13 r14 r15
-..B1.6:                         # Preds ..B1.5
-        movl      $.2.3_2_kmpc_loc_struct_pack.14, %edi         #16.12
-        xorl      %eax, %eax                                    #16.12
-..___tag_value_main.8:
-        call      __kmpc_end                                    #16.12
-..___tag_value_main.9:
-                                # LOE rbx r12 r13 r14 r15
-..B1.7:                         # Preds ..B1.6
-        xorl      %eax, %eax                                    #16.12
-        movq      %rbp, %rsp                                    #16.12
-        popq      %rbp                                          #16.12
-	.cfi_def_cfa 7, 8
-	.cfi_restore 6
-        ret                                                     #16.12
-        .align    16,0x90
-	.cfi_endproc
-                                # LOE
-# mark_end;
-	.type	main,@function
-	.size	main,.-main
-	.data
-	.align 4
-	.align 4
-.2.3_2_kmpc_loc_struct_pack.3:
-	.long	0
-	.long	2
-	.long	0
-	.long	0
-	.quad	.2.3_2__kmpc_loc_pack.2
-	.align 4
-.2.3_2__kmpc_loc_pack.2:
-	.byte	59
-	.byte	117
-	.byte	110
-	.byte	107
-	.byte	110
-	.byte	111
-	.byte	119
-	.byte	110
-	.byte	59
-	.byte	109
-	.byte	97
-	.byte	105
-	.byte	110
-	.byte	59
-	.byte	52
-	.byte	59
-	.byte	52
-	.byte	59
-	.byte	59
-	.space 1, 0x00 	# pad
-	.align 4
-.2.3_2_kmpc_loc_struct_pack.14:
-	.long	0
-	.long	2
-	.long	0
-	.long	0
-	.quad	.2.3_2__kmpc_loc_pack.13
-	.align 4
-.2.3_2__kmpc_loc_pack.13:
-	.byte	59
-	.byte	117
-	.byte	110
-	.byte	107
-	.byte	110
-	.byte	111
-	.byte	119
-	.byte	110
-	.byte	59
-	.byte	109
-	.byte	97
-	.byte	105
-	.byte	110
-	.byte	59
-	.byte	49
-	.byte	54
-	.byte	59
-	.byte	49
-	.byte	54
-	.byte	59
-	.byte	59
-	.section .rodata.str1.4, "aMS",@progbits,1
-	.align 4
-	.align 4
-il0_peep_printf_format_0:
-	.long	1128354639
-	.long	1702109249
-	.long	1931506803
-	.long	1953653108
-	.byte	0
-	.space 3, 0x00 	# pad
-	.align 4
-il0_peep_printf_format_1:
-	.long	1128354639
-	.long	1702109249
-	.long	1696625779
-	.word	25710
-	.byte	0
-	.data
-# -- End  main
-	.section .rodata, "a"
-	.align 4
-	.align 4
-.L_2il0floatpacket.0:
-	.long	0x3e428f5c
-	.type	.L_2il0floatpacket.0,@object
-	.size	.L_2il0floatpacket.0,4
-	.align 4
-.L_2il0floatpacket.1:
-	.long	0x433dcf5c
-	.type	.L_2il0floatpacket.1,@object
-	.size	.L_2il0floatpacket.1,4
-	.data
-	.section .note.GNU-stack, ""
-// -- Begin DWARF2 SEGMENT .eh_frame
-	.section .eh_frame,"a",@progbits
-.eh_frame_seg:
-	.align 8
-# End
diff --git a/tests/testfiles/taxCalc-ivb-iaca2.S b/tests/testfiles/taxCalc-ivb-iaca2.S
deleted file mode 100644
index 08af5e5..0000000
--- a/tests/testfiles/taxCalc-ivb-iaca2.S
+++ /dev/null
@@ -1,201 +0,0 @@
-# mark_description "Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 16.0.3.210 Build 20160415";
-# mark_description "-I../../iaca-lin64/include -fno-alias -O3 -fopenmp -xCORE-AVX-I -S -o ivb-asm.S";
-	.file "taxCalc.c"
-	.text
-..TXTST0:
-# -- Begin  main
-	.text
-# mark_begin;
-       .align    16,0x90
-	.globl main
-# --- main(void)
-main:
-..B1.1:                         # Preds ..B1.0
-	.cfi_startproc
-..___tag_value_main.1:
-..L2:
-                                                          #4.15
-        pushq     %rbp                                          #4.15
-	.cfi_def_cfa_offset 16
-        movq      %rsp, %rbp                                    #4.15
-	.cfi_def_cfa 6, 16
-	.cfi_offset 6, -16
-        andq      $-128, %rsp                                   #4.15
-        subq      $4096, %rsp                                   #4.15
-        movl      $104446, %esi                                 #4.15
-        movl      $3, %edi                                      #4.15
-        call      __intel_new_feature_proc_init                 #4.15
-                                # LOE rbx r12 r13 r14 r15
-..B1.10:                        # Preds ..B1.1
-        vstmxcsr  (%rsp)                                        #4.15
-        movl      $.2.3_2_kmpc_loc_struct_pack.3, %edi          #4.15
-        xorl      %esi, %esi                                    #4.15
-        orl       $32832, (%rsp)                                #4.15
-        xorl      %eax, %eax                                    #4.15
-        vldmxcsr  (%rsp)                                        #4.15
-..___tag_value_main.6:
-        call      __kmpc_begin                                  #4.15
-..___tag_value_main.7:
-                                # LOE rbx r12 r13 r14 r15
-..B1.2:                         # Preds ..B1.10
-        movl      $il0_peep_printf_format_0, %edi               #5.5
-        call      puts                                          #5.5
-                                # LOE rbx r12 r13 r14 r15
-..B1.3:                         # Preds ..B1.2
-        vmovss    .L_2il0floatpacket.0(%rip), %xmm0             #8.15
-        xorl      %eax, %eax                                    #11.5
-        vxorps    %xmm1, %xmm1, %xmm1                           #9.5
-        vmovss    %xmm1, (%rsp)                                 #9.5
-
-                                # LOE rax rbx r12 r13 r14 r15 xmm0 xmm1
-        movl      $111, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     100        
-        .byte     103        
-        .byte     144        
-..B1.4:                         # Preds ..B1.4 ..B1.3
-        lea       1(%rax,%rax), %edx                            #12.9
-        vcvtsi2ss %edx, %xmm2, %xmm2                            #12.27
-        vmulss    %xmm2, %xmm0, %xmm3                           #12.29
-        lea       2(%rax,%rax), %ecx                            #12.9
-        vaddss    %xmm3, %xmm1, %xmm4                           #12.29
-        vxorps    %xmm1, %xmm1, %xmm1                           #12.27
-        vcvtsi2ss %ecx, %xmm1, %xmm1                            #12.27
-        vmulss    %xmm1, %xmm0, %xmm5                           #12.29
-        vmovss    %xmm4, 4(%rsp,%rax,8)                         #12.9
-        vaddss    %xmm5, %xmm4, %xmm1                           #12.29
-        vmovss    %xmm1, 8(%rsp,%rax,8)                         #12.9
-        incq      %rax                                          #11.5
-        cmpq      $499, %rax                                    #11.5
-        jb        ..B1.4        # Prob 99%                      #11.5
-        movl      $222, %ebx 
-        .byte     100        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-        .byte     103        
-        .byte     144        # INSERTED BY KERNCRAFT IACA MARKER UTILITY
-                                # LOE rax rbx r12 r13 r14 r15 xmm0 xmm1
-
-..B1.5:                         # Preds ..B1.4
-        vmovss    3992(%rsp), %xmm0                             #12.18
-        movl      $il0_peep_printf_format_1, %edi               #15.5
-        vaddss    .L_2il0floatpacket.1(%rip), %xmm0, %xmm1      #12.29
-        vmovss    %xmm1, 3996(%rsp)                             #12.9
-        call      puts                                          #15.5
-                                # LOE rbx r12 r13 r14 r15
-..B1.6:                         # Preds ..B1.5
-        movl      $.2.3_2_kmpc_loc_struct_pack.14, %edi         #16.12
-        xorl      %eax, %eax                                    #16.12
-..___tag_value_main.8:
-        call      __kmpc_end                                    #16.12
-..___tag_value_main.9:
-                                # LOE rbx r12 r13 r14 r15
-..B1.7:                         # Preds ..B1.6
-        xorl      %eax, %eax                                    #16.12
-        movq      %rbp, %rsp                                    #16.12
-        popq      %rbp                                          #16.12
-	.cfi_def_cfa 7, 8
-	.cfi_restore 6
-        ret                                                     #16.12
-        .align    16,0x90
-	.cfi_endproc
-                                # LOE
-# mark_end;
-	.type	main,@function
-	.size	main,.-main
-	.data
-	.align 4
-	.align 4
-.2.3_2_kmpc_loc_struct_pack.3:
-	.long	0
-	.long	2
-	.long	0
-	.long	0
-	.quad	.2.3_2__kmpc_loc_pack.2
-	.align 4
-.2.3_2__kmpc_loc_pack.2:
-	.byte	59
-	.byte	117
-	.byte	110
-	.byte	107
-	.byte	110
-	.byte	111
-	.byte	119
-	.byte	110
-	.byte	59
-	.byte	109
-	.byte	97
-	.byte	105
-	.byte	110
-	.byte	59
-	.byte	52
-	.byte	59
-	.byte	52
-	.byte	59
-	.byte	59
-	.space 1, 0x00 	# pad
-	.align 4
-.2.3_2_kmpc_loc_struct_pack.14:
-	.long	0
-	.long	2
-	.long	0
-	.long	0
-	.quad	.2.3_2__kmpc_loc_pack.13
-	.align 4
-.2.3_2__kmpc_loc_pack.13:
-	.byte	59
-	.byte	117
-	.byte	110
-	.byte	107
-	.byte	110
-	.byte	111
-	.byte	119
-	.byte	110
-	.byte	59
-	.byte	109
-	.byte	97
-	.byte	105
-	.byte	110
-	.byte	59
-	.byte	49
-	.byte	54
-	.byte	59
-	.byte	49
-	.byte	54
-	.byte	59
-	.byte	59
-	.section .rodata.str1.4, "aMS",@progbits,1
-	.align 4
-	.align 4
-il0_peep_printf_format_0:
-	.long	1128354639
-	.long	1702109249
-	.long	1931506803
-	.long	1953653108
-	.byte	0
-	.space 3, 0x00 	# pad
-	.align 4
-il0_peep_printf_format_1:
-	.long	1128354639
-	.long	1702109249
-	.long	1696625779
-	.word	25710
-	.byte	0
-	.data
-# -- End  main
-	.section .rodata, "a"
-	.align 4
-	.align 4
-.L_2il0floatpacket.0:
-	.long	0x3e428f5c
-	.type	.L_2il0floatpacket.0,@object
-	.size	.L_2il0floatpacket.0,4
-	.align 4
-.L_2il0floatpacket.1:
-	.long	0x433dcf5c
-	.type	.L_2il0floatpacket.1,@object
-	.size	.L_2il0floatpacket.1,4
-	.data
-	.section .note.GNU-stack, ""
-// -- Begin DWARF2 SEGMENT .eh_frame
-	.section .eh_frame,"a",@progbits
-.eh_frame_seg:
-	.align 8
-# End
diff --git a/tox.ini b/tox.ini
index 0fc572b..37ea5e3 100644
--- a/tox.ini
+++ b/tox.ini
@@ -1,8 +1,5 @@
 [tox]
-envlist = py35
+envlist = py35,py36
 [testenv]
 commands=
     python tests/all_tests.py
-#    osaca --arch ivb --iaca examples/taxCalc-ivb-iaca
-#    osaca --arch ivb --iaca examples/taxCalc-ivb-iaca.S
-#    osaca --arch ivb examples/taxCalc-ivb