diff --git a/osaca/data/ivb_data.csv b/osaca/data/ivb_data.csv index ec8c9af..4f8cb96 100644 --- a/osaca/data/ivb_data.csv +++ b/osaca/data/ivb_data.csv @@ -1,89 +1,89 @@ instr,TP,LT,ports -jmp-lbl,0.0,0.0,"((5,),)" -jmpq-lbl,0.0,0.0,"((5,),)" -jo-lbl,0.0,0.0,"((5,),)" -jno-lbl,0.0,0.0,"((5,),)" -js-lbl,0.0,0.0,"((5,),)" -jns-lbl,0.0,0.0,"((5,),)" -je-lbl,0.0,0.0,"((5,),)" -jz-lbl,0.0,0.0,"((5,),)" -jne-lbl,0.0,0.0,"((5,),)" -jnz-lbl,0.0,0.0,"((5,),)" -jb-lbl,0.0,0.0,"((5,),)" -jnae-lbl,0.0,0.0,"((5,),)" -jc-lbl,0.0,0.0,"((5,),)" -jnb-lbl,0.0,0.0,"((5,),)" -jae-lbl,0.0,0.0,"((5,),)" -jnc-lbl,0.0,0.0,"((5,),)" -jbe-lbl,0.0,0.0,"((5,),)" -jna-lbl,0.0,0.0,"((5,),)" -ja-lbl,0.0,0.0,"((5,),)" -jnbe-lbl,0.0,0.0,"((5,),)" -jl-lbl,0.0,0.0,"((5,),)" -jnge-lbl,0.0,0.0,"((5,),)" -jge-lbl,0.0,0.0,"((5,),)" -jnl-lbl,0.0,0.0,"((5,),)" -jle-lbl,0.0,0.0,"((5,),)" -jng-lbl,0.0,0.0,"((5,),)" -jg-lbl,0.0,0.0,"((5,),)" -jnle-lbl,0.0,0.0,"((5,),)" -jp-lbl,0.0,0.0,"((5,),)" -jpe-lbl,0.0,0.0,"((5,),)" -jnp-lbl,0.0,0.0,"((5,),)" -jpo-lbl,0.0,0.0,"((5,),)" -jcxz-lbl,0.0,0.0,"((5,),)" -jecxz-lbl,0.0,0.0,"((5,),)" -jo-lbl,0.0,0.0,"((5,),)" -jno-lbl,0.0,0.0,"((5,),)" -js-lbl,0.0,0.0,"((5,),)" -jns-lbl,0.0,0.0,"((5,),)" -lea-r64_mem,1.0,1.0,"((0,),(1,))" -lea-r32_mem,1.0,1.0,"((0,),(1,))" -vcvtsi2ss-xmm_xmm_r64,1.0,3.0,"((1,5),)" -vcvtsi2ss-xmm_xmm_r32,1.0,3.0,"((1,5),)" -vmulss-xmm_xmm_xmm,1.0,5.0,"((0,),)" -vaddss-xmm_xmm_mem,1.0,3.0,"((1,2),(1,3))" -vaddss-xmm_xmm_xmm,1.0,3.0,"((1,),)" -vxorps-xmm_xmm_xmm,1.0,1.0,"((5,),)" -vmovss-xmm_mem,0.5,1.0,"((2,),(3,))" -vmovss-mem_xmm,1.0,1.0,"((2,4),(3,4))" -inc-r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" -inc-r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" -cmp-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" -cmp-r32_mem,0.5,1.0,"((0,2),(0,3),(1,2),(1,3),(2,5),(3,5))" -cmp-r32_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" -cmpq-r32_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" -cmpq-r64_r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" -incq-r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" -incq-r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" -cmpq-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" -mov-mem_r32,1.0,3.0,"((2,),(3,))" -add-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" -mov-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" -movsx-r64_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" -vmulsd-xmm_xmm_mem,1.0,5.0,"((0,2),(0,3))" -mov-r64_mem,0.5,2.0,"((2,),(3,))" -vmovsd-xmm_mem,0.5,3.0,"((2,),(3,))" -vaddsd-xmm_xmm_xmm,1.0,3.0,"((1,),)" -mov-r32_mem,0.5,2.0,"((2,),(3,))" -vmovsd-mem_xmm,1.0,3.0,"((2,4),(3,4))" -movslq-r64_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" -add-mem_imd,1.0,6.0,"((0,2,3,4),(1,2,3,4),(2,3,4,5))" -addl-mem_imd,1.0,6.0,"((0,2,3,4),(1,2,3,4),(2,3,4,5))" -mov-mem_imd,1.0,1.0,"((2,4),(3,4))" -movl-mem_imd,1.0,1.0,"((2,4),(3,4))" -mov-r64_r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" -mov-mem_r64,1.0,3.0,"((2,4),(3,4))" -vmovupd-mem_ymm,2.0,2.0,"((2,4),(3,4))" -^comment,0,0,"(0, 0, 0.5, 0.5, 2.0, 0)" -add-r32_imd,0.3333333333333333,1,"((0,),(1,),(5,))" -vaddsd-xmm_xmm_mem,1.0,3.0,"((1,2),(1,3))" -and-r32_imd,0.3333333333333333,1,"((0,),(1,),(5,))" -mov-r32_r32,0.25,1.0,"((0,),(1,),(5,))" -sub-r64_r64,0.3333333333333333,1,"((0,),(1,),(5,))" -add-r64_r64,0.3333333333333333,1,"((0,),(1,),(5,))" -shl-r64_imd,0.5,1.0,"((1,),(5,))" -cmp-r64_r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" -cmp-r32_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" -vmulsd-xmm_xmm_xmm,1.0,5.0,"((0,),)" -xor-r32_r32,0.3333333333333333,1,"((0,),(1,),(5,))" +jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jmpq-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" +lea-r64_mem,1.0,1.0,"(0.5, 0.5, 0.0, 0.0, 0.0, 0.0)" +lea-r32_mem,1.0,1.0,"(0.5, 0.5, 0.0, 0.0, 0.0, 0.0)" +vcvtsi2ss-xmm_xmm_r64,1.0,3.0,"(0, 1.0, 0, 0, 0, 1.0)" +vcvtsi2ss-xmm_xmm_r32,1.0,3.0,"(0, 1.0, 0, 0, 0, 1.0)" +vmulss-xmm_xmm_xmm,1.0,5.0,"(1.0, 0, 0, 0, 0, 0)" +vaddss-xmm_xmm_mem,1.0,3.0,"(0.0, 1.0, 0.5, 0.5, 0.0, 0.0)" +vaddss-xmm_xmm_xmm,1.0,3.0,"(0, 1.0, 0, 0, 0, 0)" +vxorps-xmm_xmm_xmm,1.0,1.0,"(0, 0, 0, 0, 0, 1.0)" +vmovss-xmm_mem,0.5,1.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" +vmovss-mem_xmm,1.0,1.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" +inc-r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +inc-r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +cmp-r32_mem,0.5,1.0,"(0.3333333333333333, 0.3333333333333333, 0.5, 0.5, 0.0, 0.3333333333333333)" +cmp-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +cmpq-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +cmpq-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +incq-r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +incq-r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +mov-mem_r32,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" +add-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +mov-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +movsx-r64_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +vmulsd-xmm_xmm_mem,1.0,5.0,"(1.0, 0.0, 0.5, 0.5, 0.0, 0.0)" +mov-r64_mem,0.5,2.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" +vmovsd-xmm_mem,0.5,3.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" +vaddsd-xmm_xmm_xmm,1.0,3.0,"(0, 1.0, 0, 0, 0, 0)" +mov-r32_mem,0.5,2.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" +vmovsd-mem_xmm,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" +movslq-r64_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +add-mem_imd,1.0,6.0,"(0.3333333333333333, 0.3333333333333333, 1.0, 1.0, 1.0, 0.3333333333333333)" +addl-mem_imd,1.0,6.0,"(0.3333333333333333, 0.3333333333333333, 1.0, 1.0, 1.0, 0.3333333333333333)" +mov-mem_imd,1.0,1.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" +movl-mem_imd,1.0,1.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" +mov-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +mov-mem_r64,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" +vmovupd-mem_ymm,2.0,2.0,"(0.0, 0.0, 0.5, 0.5, 2.0, 0.0)" +add-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +vaddsd-xmm_xmm_mem,1.0,3.0,"(0.0, 1.0, 0.5, 0.5, 0.0, 0.0)" +and-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +mov-r32_r32,0.25,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +sub-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +add-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +shl-r64_imd,0.5,1.0,"(0.0, 0.5, 0.0, 0.0, 0.0, 0.5)" +cmp-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +vmulsd-xmm_xmm_xmm,1.0,5.0,"(1.0, 0, 0, 0, 0, 0)" +xor-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +jan-xmm_xmm,1.0,2.0,"(0.0,17,0.0,3.0,9.0,6.0)" diff --git a/osaca/data/ivb_data_old.csv b/osaca/data/ivb_data_old.csv index 334b377..973a979 100644 --- a/osaca/data/ivb_data_old.csv +++ b/osaca/data/ivb_data_old.csv @@ -1,92 +1,90 @@ -instr,TP,LT -jmp-lbl,0.0,-1.0 -jo-lbl,0.0,-1.0 -jno-lbl,0.0,-1.0 -js-lbl,0.0,-1.0 -jns-lbl,0.0,-1.0 -je-lbl,0.0,-1.0 -jz-lbl,0.0,-1.0 -jne-lbl,0.0,-1.0 -jnz-lbl,0.0,-1.0 -jb-lbl,0.0,-1.0 -jnae-lbl,0.0,-1.0 -jc-lbl,0.0,-1.0 -jnb-lbl,0.0,-1.0 -jae-lbl,0.0,-1.0 -jnc-lbl,0.0,-1.0 -jbe-lbl,0.0,-1.0 -jna-lbl,0.0,-1.0 -ja-lbl,0.0,-1.0 -jnbe-lbl,0.0,-1.0 -jl-lbl,0.0,-1.0 -jnge-lbl,0.0,-1.0 -jge-lbl,0.0,-1.0 -jnl-lbl,0.0,-1.0 -jle-lbl,0.0,-1.0 -jng-lbl,0.0,-1.0 -jg-lbl,0.0,-1.0 -jnle-lbl,0.0,-1.0 -jp-lbl,0.0,-1.0 -jpe-lbl,0.0,-1.0 -jnp-lbl,0.0,-1.0 -jpo-lbl,0.0,-1.0 -jcxz-lbl,0.0,-1.0 -jecxz-lbl,0.0,-1.0 -jo-lbl,0.0,-1.0 -jno-lbl,0.0,-1.0 -js-lbl,0.0,-1.0 -jns-lbl,0.0,-1.0 -vmulss-xmm_xmm_xmm,1.0,-1.0 -vaddss-xmm_xmm_xmm,1.0,-1.0 -vxorps-xmm_xmm_xmm,0.25,-1.0 -inc-r64,0.3333333333333333,-1.0 -xor-r32_r32,0.3333333333333333,-1.0 -vcvtsi2ss-xmm_xmm_r32,1.0,-1.0 -vaddss-xmm_xmm_mem,1.0,-1.0 -vmovupd-load-avx,1.0,-1.0 -lea-r32_mem,1.0,-1.0 -vmovss-xmm_mem,0.5,-1.0 -vmovss-mem_xmm,1.0,-1.0 -vmovupd-store-avx,2.0,-1.0 -lea-r64_mem,1.0,-1.0 -movslq-r64_mem,0.5,-1.0 -mov-r64_mem,0.5,-1.0 -vaddpd-ymm_ymm_ymm,1.0,-1.0 -cmp-r32_r32,0.3333333333333333,-1.0 -vmovsd-xmm_xmm_xmm,1.0,-1.0 -vmulsd-xmm_xmm_mem,1.0,-1.0 -vmovsd-mem_xmm,1.0,-1.0 -vmovhpd-xmm_xmm_mem,1.0,-1.0 -vsubpd-ymm_ymm_ymm,1.0,-1.0 -vmovq-xmm_r64,1.0,-1.0 -vunpckhpd-xmm_xmm_xmm,1.0,-1.0 -vmulpd-ymm_ymm_mem,1.0,-1.0 -mov-mem_r64,1.0,-1.0 -movzbl-r32_r8,0.29600000000000004,-1.0 -vmulsd-xmm_xmm_xmm,1.0,-1.0 -vaddsd-xmm_xmm_mem,1.0,-1.0 -vmovq-r64_xmm,1.0,-1.0 -vmulpd-ymm_ymm_ymm,1.0,-1.0 -mov-r32_mem,0.5,-1.0 -cmp-r32_mem,0.5,-1.0 -vaddpd-xmm_xmm_xmm,1.0,-1.0 -mov-mem_r32,1.0,-1.0 -vmovsd-xmm_mem,0.5,-1.0 -vsubsd-xmm_xmm_xmm,1.0,-1.0 -vmovaps-xmm_xmm,0.845,-1.0 -vaddsd-xmm_xmm_xmm,1.0,-1.0 -add-r32_mem,0.5,-1.0 -vmovupd-xmm_mem,0.5,-1.0 -test-r32_r32,0.3333333333333333,-1.0 -add-r64_r64,0.3333333333333333,-1.0 -dec-r32,0.3333333333333333,-1.0 -movslq-r64_r32,0.3333333333333333,-1.0 -vxorpd-ymm_ymm_ymm,0.25,-1.0 -sub-r32_r32,0.3333333333333333,-1.0 -inc-r32,0.3333333333333333,-1.0 -neg-r32,0.3333333333333333,-1.0 -cmp-r64_imd,0.3333333333333333,-1.0 -vxorpd-xmm_xmm_xmm,0.25,-1.0 -vmovapd-ymm_ymm,0.856,-1.0 -vmovapd-xmm_xmm,0.855,-1.0 -mov-r32_r32,0.3333333333333333,-1.0 +instr,TP,LT,ports +jmp-lbl,0.0,0.0,"((5,),)" +jmpq-lbl,0.0,0.0,"((5,),)" +jo-lbl,0.0,0.0,"((5,),)" +jno-lbl,0.0,0.0,"((5,),)" +js-lbl,0.0,0.0,"((5,),)" +jns-lbl,0.0,0.0,"((5,),)" +je-lbl,0.0,0.0,"((5,),)" +jz-lbl,0.0,0.0,"((5,),)" +jne-lbl,0.0,0.0,"((5,),)" +jnz-lbl,0.0,0.0,"((5,),)" +jb-lbl,0.0,0.0,"((5,),)" +jnae-lbl,0.0,0.0,"((5,),)" +jc-lbl,0.0,0.0,"((5,),)" +jnb-lbl,0.0,0.0,"((5,),)" +jae-lbl,0.0,0.0,"((5,),)" +jnc-lbl,0.0,0.0,"((5,),)" +jbe-lbl,0.0,0.0,"((5,),)" +jna-lbl,0.0,0.0,"((5,),)" +ja-lbl,0.0,0.0,"((5,),)" +jnbe-lbl,0.0,0.0,"((5,),)" +jl-lbl,0.0,0.0,"((5,),)" +jnge-lbl,0.0,0.0,"((5,),)" +jge-lbl,0.0,0.0,"((5,),)" +jnl-lbl,0.0,0.0,"((5,),)" +jle-lbl,0.0,0.0,"((5,),)" +jng-lbl,0.0,0.0,"((5,),)" +jg-lbl,0.0,0.0,"((5,),)" +jnle-lbl,0.0,0.0,"((5,),)" +jp-lbl,0.0,0.0,"((5,),)" +jpe-lbl,0.0,0.0,"((5,),)" +jnp-lbl,0.0,0.0,"((5,),)" +jpo-lbl,0.0,0.0,"((5,),)" +jcxz-lbl,0.0,0.0,"((5,),)" +jecxz-lbl,0.0,0.0,"((5,),)" +jo-lbl,0.0,0.0,"((5,),)" +jno-lbl,0.0,0.0,"((5,),)" +js-lbl,0.0,0.0,"((5,),)" +jns-lbl,0.0,0.0,"((5,),)" +lea-r64_mem,1.0,1.0,"((0,),(1,))" +lea-r32_mem,1.0,1.0,"((0,),(1,))" +vcvtsi2ss-xmm_xmm_r64,1.0,3.0,"((1,5),)" +vcvtsi2ss-xmm_xmm_r32,1.0,3.0,"((1,5),)" +vmulss-xmm_xmm_xmm,1.0,5.0,"((0,),)" +vaddss-xmm_xmm_mem,1.0,3.0,"((1,2),(1,3))" +vaddss-xmm_xmm_xmm,1.0,3.0,"((1,),)" +vxorps-xmm_xmm_xmm,1.0,1.0,"((5,),)" +vmovss-xmm_mem,0.5,1.0,"((2,),(3,))" +vmovss-mem_xmm,1.0,1.0,"((2,4),(3,4))" +inc-r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" +inc-r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" +cmp-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" +cmp-r32_mem,0.5,1.0,"((0,2),(0,3),(1,2),(1,3),(2,5),(3,5))" +cmp-r32_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" +cmpq-r32_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" +cmpq-r64_r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" +incq-r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" +incq-r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" +cmpq-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" +mov-mem_r32,1.0,3.0,"((2,),(3,))" +add-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" +mov-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" +movsx-r64_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" +vmulsd-xmm_xmm_mem,1.0,5.0,"((0,2),(0,3))" +mov-r64_mem,0.5,2.0,"((2,),(3,))" +vmovsd-xmm_mem,0.5,3.0,"((2,),(3,))" +vaddsd-xmm_xmm_xmm,1.0,3.0,"((1,),)" +mov-r32_mem,0.5,2.0,"((2,),(3,))" +vmovsd-mem_xmm,1.0,3.0,"((2,4),(3,4))" +movslq-r64_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" +add-mem_imd,1.0,6.0,"((0,2,3,4),(1,2,3,4),(2,3,4,5))" +addl-mem_imd,1.0,6.0,"((0,2,3,4),(1,2,3,4),(2,3,4,5))" +mov-mem_imd,1.0,1.0,"((2,4),(3,4))" +movl-mem_imd,1.0,1.0,"((2,4),(3,4))" +mov-r64_r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" +mov-mem_r64,1.0,3.0,"((2,4),(3,4))" +vmovupd-mem_ymm,2.0,2.0,"((2,4),(3,4))" +^comment,0.0,0.0,"(0, 0, 0.5, 0.5, 2.0, 0)" +add-r32_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" +vaddsd-xmm_xmm_mem,1.0,3.0,"((1,2),(1,3))" +and-r32_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" +mov-r32_r32,0.25,1.0,"((0,),(1,),(5,))" +sub-r64_r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" +add-r64_r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" +shl-r64_imd,0.5,1.0,"((1,),(5,))" +cmp-r64_r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" +cmp-r32_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" +vmulsd-xmm_xmm_xmm,1.0,5.0,"((0,),)" +xor-r32_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" +jan-xmm_xmm,1.0,2.0,"(-1,)" diff --git a/osaca/data/skl_data.csv b/osaca/data/skl_data.csv index f31169f..42c4ca8 100644 --- a/osaca/data/skl_data.csv +++ b/osaca/data/skl_data.csv @@ -1,53 +1,67 @@ instr,TP,LT,ports -jmp-lbl,0.0,0.0,"((5,),)" -jo-lbl,0.0,0.0,"((5,),)" -jno-lbl,0.0,0.0,"((5,),)" -js-lbl,0.0,0.0,"((5,),)" -jns-lbl,0.0,0.0,"((5,),)" -je-lbl,0.0,0.0,"((5,),)" -jz-lbl,0.0,0.0,"((5,),)" -jne-lbl,0.0,0.0,"((5,),)" -jnz-lbl,0.0,0.0,"((5,),)" -jb-lbl,0.0,0.0,"((5,),)" -jnae-lbl,0.0,0.0,"((5,),)" -jc-lbl,0.0,0.0,"((5,),)" -jnb-lbl,0.0,0.0,"((5,),)" -jae-lbl,0.0,0.0,"((5,),)" -jnc-lbl,0.0,0.0,"((5,),)" -jbe-lbl,0.0,0.0,"((5,),)" -jna-lbl,0.0,0.0,"((5,),)" -ja-lbl,0.0,0.0,"((5,),)" -jnbe-lbl,0.0,0.0,"((5,),)" -jl-lbl,0.0,0.0,"((5,),)" -jnge-lbl,0.0,0.0,"((5,),)" -jge-lbl,0.0,0.0,"((5,),)" -jnl-lbl,0.0,0.0,"((5,),)" -jle-lbl,0.0,0.0,"((5,),)" -jng-lbl,0.0,0.0,"((5,),)" -jg-lbl,0.0,0.0,"((5,),)" -jnle-lbl,0.0,0.0,"((5,),)" -jp-lbl,0.0,0.0,"((5,),)" -jpe-lbl,0.0,0.0,"((5,),)" -jnp-lbl,0.0,0.0,"((5,),)" -jpo-lbl,0.0,0.0,"((5,),)" -jcxz-lbl,0.0,0.0,"((5,),)" -jecxz-lbl,0.0,0.0,"((5,),)" -jo-lbl,0.0,0.0,"((5,),)" -jno-lbl,0.0,0.0,"((5,),)" -js-lbl,0.0,0.0,"((5,),)" -jns-lbl,0.0,0.0,"((5,),)" -lea-r64_mem,1.0,1.0,"((2,),(3,))" -lea-r32_mem,1.0,1.0,"((2,),(3,))" -vcvtsi2ss-xmm_xmm_r64,1.0,3.0,"((0,1),(1,5))" -vcvtsi2ss-xmm_xmm_r32,1.0,3.0,"((-1,))" -vmulss-xmm_xmm_xmm,1.0,5.0,"((0,),)" -vaddss-xmm_xmm_mem,1.0,3.0,"((1,),)" -vaddss-xmm_xmm_xmm,1.0,3.0,"((1,),)" -vxorps-xmm_xmm_xmm,0.3333333333333333,1.0,"((0,),(1,),(5,))" -vmovss-xmm_mem,0.5,1.0,"((2,),(3,))" -vmovss-mem_xmm,1.0,1.0,"((2,4),(3,4))" -inc-r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" -inc-r64,0.3333333333333333,1.0,"((0,),(1,),(5,))" -cmp-r64_imd,0.3333333333333333,1.0,"((0,),(1,),(5,))" -cmp-r32_mem,0.5,1.0,"((0,),(1,),(5,))" -cmp-r32_r32,0.3333333333333333,1.0,"((0,),(1,),(5,))" +jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" +mov-mem_r64,1.0,2.0,"(0,0,0.3333333333333333,0.3333333333333333,1.0,0,0,0.3333333333333333)" +vmovupd-mem_ymm,1.0,3.0,"(0,0,0.3333333333333333,0.3333333333333333,1.0,0,0,0.3333333333333333)" +mov-mem_r32,1.0,2.0,"(0,0,0.3333333333333333,0.3333333333333333,1.0,0,0,0.3333333333333333)" +add-r64_imd,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +add-r64_r64,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +vxorps-xmm_xmm_xmm,1.0,1.0,"(0,0,0,0,0,1.0,0,0)" +vaddsd-xmm_xmm_mem,0.5,4.0,"(0.5,0.5,0,0,0,0,0,0)" +mov-r64_r64,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +and-r32_imd,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +cmp-r64_r64,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +mov-r64_imd,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +vcvtsi2ss-xmm_xmm_r32,2.0,4.0,"(2.0,2.0,0,0,0,2.0,0,0)" +vmovsd-xmm_mem,0.5,3.0,"(0,0,0.5,0.5,0,0,0,0)" +vaddsd-xmm_xmm_xmm,0.5,4.0,"(0.5,0.5,0,0,0,0,0,0)" +shl-r64_imd,0.5,1.0,"(0.5,0,0,0,0,0,0.5,0)" +vmovsd-mem_xmm,1.0,3.0,"(0,0,0.3333333333333333,0.3333333333333333,1.0,0,0,0.3333333333333333)" +add-r32_imd,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +vmulsd-xmm_xmm_mem,0.5,4.0,"(0.5,0.5,0.5,0.5,0,0,0,0)" +movslq-r64_r32,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +vmulsd-xmm_xmm_xmm,0.5,4.0,"(0.5,0.5,0,0,0,0,0,0)" +mov-r64_mem,0.5,2.0,"(0,0,0.5,0.5,0,0,0,0)" +xor-r32_r32,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +cmp-r32_imd,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +mov-r32_mem,0.5,2.0,"(0,0,0.5,0.5,0,0,0,0)" +add-mem_imd,1.0,5.0,"(0.5,0.5,0.6666666666666666,0.6666666666666666,1.0,0.5,0.5,0.6666666666666666)" +movsx-r64_r32,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +mov-mem_imd,1.0,2.0,"(0,0,0.3333333333333333,0.3333333333333333,1.0,0,0,0.3333333333333333)" +mov-r32_r32,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" +sub-r64_r64,0.25,1.0,"(0.25,0.25,0,0,0,0.25,0.25,0)" diff --git a/osaca/eu_sched.py b/osaca/eu_sched.py index 66004ab..1286700 100755 --- a/osaca/eu_sched.py +++ b/osaca/eu_sched.py @@ -29,6 +29,42 @@ class Scheduler(object): curr_dir = os.path.realpath(__file__)[:-11] self.df = pd.read_csv(curr_dir + 'data/' + arch.lower() + '_data.csv', quotechar='"', converters={'ports': ast.literal_eval}) + def new_schedule(self): + """ + Schedules Instruction Form list and calculates port bindings. + + Returns + ------- + (str, [int, ...]) + A tuple containing the graphic output of the schedule as string and + the port bindings as list of ints. + """ + sched = self.get_head() + # Initialize ports + occ_ports = [[0] * self.ports for x in range(len(self.instrList))] + port_bndgs = [0] * self.ports + # Check if there's a port occupation stored in the CSV, otherwise leave the + # occ_port list item empty + for i, instrForm in enumerate(self.instrList): + try: + search_string = instrForm[0] + '-' + self.get_operand_suffix(instrForm) + entry = self.df.loc[lambda df, sStr=search_string: df.instr == sStr] + tup = entry.ports.values[0] + if(len(tup) == 1 and tup[0] == -1): + raise IndexError() + except IndexError: + # Instruction form not in CSV + if(instrForm[0][:3] == 'nop'): + sched += self.get_line(occ_ports[i], '* ' + instrForm[-1]) + else: + sched += self.get_line(occ_ports[i], 'X ' + instrForm[-1]) + continue + occ_ports[i] = list(tup) + # Write schedule line + sched += self.get_line(occ_ports[i], instrForm[-1]) + # Add throughput to total port binding + port_bndgs = list(map(add, port_bndgs, occ_ports[i])) + return (sched, port_bndgs) def schedule(self): """ @@ -87,15 +123,14 @@ class Scheduler(object): # Add throughput to total port binding port_bndgs = list(map(add, port_bndgs, occ_ports[i])) return (sched, port_bndgs) - def flatten(self, l): if(len(l) == 0): return l if(isinstance(l[0], type(l))): return self.flatten(l[0]) + self.flatten(l[1:]) - return l[:1] + self.flatten(l[1:]) - + return l[:1] + self.flatten(l[1:]) + def schedule_fcfs(self): """ Schedules Instruction Form list for a single run with latencies. @@ -222,8 +257,8 @@ class Scheduler(object): String containing the report information """ analysis = 'Throughput Analysis Report\n' + ('-' * 26) + '\n' - annotations = ('* - No information for this instruction in database\n' - '\" - Instruction micro-ops not bound to a port\n' + annotations = ('X - No information for this instruction in database\n' + '* - Instruction micro-ops not bound to a port\n' '\n') return analysis + annotations @@ -265,7 +300,10 @@ class Scheduler(object): line = '' for i in occ_ports: cycles = ' ' if (i == 0) else '%.2f' % float(i) - line += '| ' + cycles + ' ' + if(i >= 10): + line += '|' + cycles + ' ' + else: + line += '| ' + cycles + ' ' line += '| ' + instr_name + '\n' return line diff --git a/osaca/osaca.py b/osaca/osaca.py index 5ead90f..dfc0d40 100755 --- a/osaca/osaca.py +++ b/osaca/osaca.py @@ -103,9 +103,9 @@ class Osaca(object): new = False break if(new and clmn == 'TP'): - new_data.append([instr, clk_cyc, '-1', ((-1,),)]) + new_data.append([instr, clk_cyc, '-1', (-1,)]) elif(new and clmn == 'LT'): - new_data.append([instr, '-1', clk_cyc, ((-1,),)]) + new_data.append([instr, '-1', clk_cyc, (-1,)]) new = True added_vals += 1 # If val is -1 (= not filled with a valid value) add it immediately @@ -641,7 +641,7 @@ class Osaca(object): if(pr_sched): output += '\n\n' sched = Scheduler(self.arch, self.instr_forms) - sched_output, port_binding = sched.schedule() + sched_output, port_binding = sched.new_schedule() binding = sched.get_port_binding(port_binding) output += sched.get_report_info() + '\n' + binding + '\n\n' + sched_output block_tp = round(max(port_binding), 2)