mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2026-01-04 18:20:09 +01:00
Added eq methods, changed AArch parser tests for class usage
This commit is contained in:
@@ -9,7 +9,11 @@ import unittest
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from pyparsing import ParseException
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from osaca.parser import AttrDict, ParserAArch64, InstructionForm
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from osaca.parser.operand import Operand
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from osaca.parser.directive import DirectiveOperand
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from osaca.parser.memory import MemoryOperand
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from osaca.parser.register import RegisterOperand
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from osaca.parser.immediate import ImmediateOperand
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class TestParserAArch64(unittest.TestCase):
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@classmethod
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@@ -101,71 +105,71 @@ class TestParserAArch64(unittest.TestCase):
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parsed_7 = self.parser.parse_instruction(instr7)
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parsed_8 = self.parser.parse_instruction(instr8)
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parsed_9 = self.parser.parse_instruction(instr9)
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self.assertEqual(parsed_1.instruction, "vcvt.F32.S32")
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self.assertEqual(parsed_1.operands[0].register.name, "1")
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self.assertEqual(parsed_1.operands[0].register.prefix, "w")
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self.assertEqual(parsed_1.operands[1].register.name, "2")
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self.assertEqual(parsed_1.operands[1].register.prefix, "w")
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self.assertEqual(parsed_1.operands[0]['register']['name'], "1")
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self.assertEqual(parsed_1.operands[0]['register']['prefix'], "w")
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self.assertEqual(parsed_1.operands[1]['register']['name'], "2")
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self.assertEqual(parsed_1.operands[1]['register']['prefix'], "w")
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self.assertEqual(parsed_1.comment, "12.27")
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self.assertEqual(parsed_2.instruction, "b.lo")
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self.assertEqual(parsed_2.operands[0].identifier.name, "..B1.4")
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self.assertEqual(parsed_2.operands[0]['identifier']['name'], "..B1.4")
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self.assertEqual(len(parsed_2.operands), 1)
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self.assertIsNone(parsed_2.comment)
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self.assertEqual(parsed_3.instruction, "mov")
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self.assertEqual(parsed_3.operands[0].register.name, "2")
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self.assertEqual(parsed_3.operands[0].register.prefix, "x")
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self.assertEqual(parsed_3.operands[1].immediate.value, int("0x222", 0))
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self.assertEqual(parsed_3.operands[0]['register']['name'], "2")
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self.assertEqual(parsed_3.operands[0]['register']['prefix'], "x")
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self.assertEqual(parsed_3.operands[1].value, int("0x222", 0))
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self.assertEqual(parsed_3.comment, "NOT IACA END")
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self.assertEqual(parsed_4.instruction, "str")
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self.assertIsNone(parsed_4.operands[1].memory.offset)
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self.assertEqual(parsed_4.operands[1].memory.base.name, "sp")
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self.assertEqual(parsed_4.operands[1].memory.base.prefix, "x")
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self.assertEqual(parsed_4.operands[1].memory.index.name, "1")
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self.assertEqual(parsed_4.operands[1].memory.index.prefix, "x")
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self.assertEqual(parsed_4.operands[1].memory.scale, 16)
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self.assertEqual(parsed_4.operands[0].register.name, "28")
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self.assertEqual(parsed_4.operands[0].register.prefix, "x")
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self.assertIsNone(parsed_4.operands[1].offset)
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self.assertEqual(parsed_4.operands[1].base['name'], "sp")
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self.assertEqual(parsed_4.operands[1].base['prefix'], "x")
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self.assertEqual(parsed_4.operands[1].index['name'], "1")
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self.assertEqual(parsed_4.operands[1].index['prefix'], "x")
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self.assertEqual(parsed_4.operands[1].scale, 16)
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self.assertEqual(parsed_4.operands[0]['register']['name'], "28")
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self.assertEqual(parsed_4.operands[0]['register']['prefix'], "x")
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self.assertEqual(parsed_4.comment, "12.9")
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self.assertEqual(parsed_5.instruction, "ldr")
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self.assertEqual(parsed_5.operands[0].register.name, "0")
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self.assertEqual(parsed_5.operands[0].register.prefix, "x")
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self.assertEqual(parsed_5.operands[1].memory.offset.identifier.name, "q2c")
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self.assertEqual(parsed_5.operands[1].memory.offset.identifier.relocation, ":got_lo12:")
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self.assertEqual(parsed_5.operands[1].memory.base.name, "0")
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self.assertEqual(parsed_5.operands[1].memory.base.prefix, "x")
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self.assertIsNone(parsed_5.operands[1].memory.index)
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self.assertEqual(parsed_5.operands[1].memory.scale, 1)
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self.assertEqual(parsed_5.operands[0]['register']['name'], "0")
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self.assertEqual(parsed_5.operands[0]['register']['prefix'], "x")
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self.assertEqual(parsed_5.operands[1].offset['identifier']['name'], "q2c")
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self.assertEqual(parsed_5.operands[1].offset['identifier']['relocation'], ":got_lo12:")
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self.assertEqual(parsed_5.operands[1].base['name'], "0")
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self.assertEqual(parsed_5.operands[1].base['prefix'], "x")
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self.assertIsNone(parsed_5.operands[1].index)
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self.assertEqual(parsed_5.operands[1].scale, 1)
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self.assertEqual(parsed_6.instruction, "adrp")
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self.assertEqual(parsed_6.operands[0].register.name, "0")
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self.assertEqual(parsed_6.operands[0].register.prefix, "x")
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self.assertEqual(parsed_6.operands[1].identifier.relocation, ":got:")
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self.assertEqual(parsed_6.operands[1].identifier.name, "visited")
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self.assertEqual(parsed_6.operands[0]['register']['name'], "0")
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self.assertEqual(parsed_6.operands[0]['register']['prefix'], "x")
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self.assertEqual(parsed_6.operands[1]['identifier']['relocation'], ":got:")
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self.assertEqual(parsed_6.operands[1]['identifier']['name'], "visited")
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self.assertEqual(parsed_7.instruction, "fadd")
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self.assertEqual(parsed_7.operands[0].register.name, "17")
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self.assertEqual(parsed_7.operands[0].register.prefix, "v")
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self.assertEqual(parsed_7.operands[0].register.lanes, "2")
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self.assertEqual(parsed_7.operands[0].register.shape, "d")
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self.assertEqual(self.parser.get_full_reg_name(parsed_7.operands[2].register), "v1.2d")
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self.assertEqual(parsed_7.operands[0]['register']['name'], "17")
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self.assertEqual(parsed_7.operands[0]['register']['prefix'], "v")
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self.assertEqual(parsed_7.operands[0]['register']['lanes'], "2")
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self.assertEqual(parsed_7.operands[0]['register']['shape'], "d")
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self.assertEqual(self.parser.get_full_reg_name(parsed_7.operands[2]['register']), "v1.2d")
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self.assertEqual(parsed_8.instruction, "mov.d")
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self.assertEqual(parsed_8.operands[0].register.name, "0")
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self.assertEqual(parsed_8.operands[0].register.prefix, "x")
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self.assertEqual(parsed_8.operands[1].register.name, "16")
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self.assertEqual(parsed_8.operands[1].register.prefix, "v")
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self.assertEqual(parsed_8.operands[1].register.index, "1")
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self.assertEqual(self.parser.get_full_reg_name(parsed_8.operands[1].register), "v16.d[1]")
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self.assertEqual(parsed_8.operands[0]['register']['name'], "0")
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self.assertEqual(parsed_8.operands[0]['register']['prefix'], "x")
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self.assertEqual(parsed_8.operands[1]['register']['name'], "16")
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self.assertEqual(parsed_8.operands[1]['register']['prefix'], "v")
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self.assertEqual(parsed_8.operands[1]['register']['index'], "1")
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self.assertEqual(self.parser.get_full_reg_name(parsed_8.operands[1]['register']), "v16.d[1]")
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self.assertEqual(parsed_9.instruction, "ccmp")
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self.assertEqual(parsed_9.operands[0].register.name, "0")
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self.assertEqual(parsed_9.operands[0].register.prefix, "x")
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self.assertEqual(parsed_9.operands[3].condition, "CC")
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self.assertEqual(parsed_9.operands[0]['register']['name'], "0")
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self.assertEqual(parsed_9.operands[0]['register']['prefix'], "x")
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self.assertEqual(parsed_9.operands[3]['condition'], "CC")
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def test_parse_line(self):
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line_comment = "// -- Begin main"
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@@ -200,7 +204,7 @@ class TestParserAArch64(unittest.TestCase):
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instruction_form_3 = InstructionForm(
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INSTRUCTION_ID = None,
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OPERANDS_ID = [],
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DIRECTIVE_ID = {"name": "cfi_def_cfa", "parameters": ["w29", "-16"]},
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DIRECTIVE_ID = DirectiveOperand(NAME_ID = "cfi_def_cfa", PARAMETER_ID = ["w29", "-16"]) ,
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COMMENT_ID = None,
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LABEL_ID = None,
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LINE = ".cfi_def_cfa w29, -16",
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@@ -208,23 +212,16 @@ class TestParserAArch64(unittest.TestCase):
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)
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instruction_form_4 = InstructionForm(
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INSTRUCTION_ID = "ldr",
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OPERANDS_ID = [
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{"register": {"prefix": "s", "name": "0"}},
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{
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"memory": {
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"offset": None,
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"base": {"prefix": "x", "name": "11"},
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"index": {
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OPERANDS_ID = [{"register": {"prefix": "s", "name": "0"}},
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MemoryOperand(OFFSET_ID = None, BASE_ID = {"prefix": "x", "name": "11"},
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INDEX_ID = {
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"prefix": "w",
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"name": "10",
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"shift_op": "sxtw",
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"shift_op": "sxtw",
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"immediate": {"value": "2"},
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"shift": [{"value": "2"}],
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},
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"scale": 4,
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}
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},
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],
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},
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SCALE_ID = 4) ],
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DIRECTIVE_ID = None,
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COMMENT_ID = "= <<2",
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LABEL_ID = None,
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@@ -235,14 +232,8 @@ class TestParserAArch64(unittest.TestCase):
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INSTRUCTION_ID = "prfm",
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OPERANDS_ID = [
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{"prfop": {"type": ["PLD"], "target": ["L1"], "policy": ["KEEP"]}},
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{
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"memory": {
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"offset": {"value": 2048},
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"base": {"prefix": "x", "name": "26"},
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"index": None,
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"scale": 1,
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}
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},
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MemoryOperand(OFFSET_ID = {"value": 2048}, BASE_ID = {"prefix": "x", "name": "26"},
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INDEX_ID = None, SCALE_ID =1)
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],
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DIRECTIVE_ID = None,
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COMMENT_ID = "HPL",
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@@ -255,15 +246,8 @@ class TestParserAArch64(unittest.TestCase):
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OPERANDS_ID = [
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{"register": {"prefix": "x", "name": "29"}},
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{"register": {"prefix": "x", "name": "30"}},
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{
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"memory": {
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"offset": {"value": -16},
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"base": {"name": "sp", "prefix": "x"},
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"index": None,
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"scale": 1,
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"pre_indexed": True,
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}
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},
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MemoryOperand(OFFSET_ID = {"value": -16}, BASE_ID = {"name": "sp", "prefix": "x"},
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INDEX_ID = None, SCALE_ID = 1, PRE_INDEXED = True)
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],
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DIRECTIVE_ID = None,
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COMMENT_ID = None,
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@@ -276,15 +260,8 @@ class TestParserAArch64(unittest.TestCase):
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OPERANDS_ID = [
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{"register": {"prefix": "q", "name": "2"}},
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{"register": {"prefix": "q", "name": "3"}},
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{
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"memory": {
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"offset": None,
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"base": {"prefix": "x", "name": "11"},
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"index": None,
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"scale": 1,
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"post_indexed": {"value": 64},
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}
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},
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MemoryOperand(OFFSET_ID = None, BASE_ID = {"prefix": "x", "name": "11"},
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INDEX_ID = None, SCALE_ID = 1, POST_INDEXED = {"value": 64}),
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],
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DIRECTIVE_ID = None,
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COMMENT_ID = None,
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@@ -299,7 +276,7 @@ class TestParserAArch64(unittest.TestCase):
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{"register": {"prefix": "p", "name": "0", "predication": "m"}},
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{"register": {"prefix": "z", "name": "29", "shape": "d"}},
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{"register": {"prefix": "z", "name": "21", "shape": "d"}},
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{"immediate": {"value": 90, "type": "int"}},
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ImmediateOperand(VALUE_ID = 90, TYPE_ID = "int"),
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],
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DIRECTIVE_ID = None,
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COMMENT_ID = None,
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@@ -311,8 +288,8 @@ class TestParserAArch64(unittest.TestCase):
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INSTRUCTION_ID = "ccmn",
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OPERANDS_ID = [
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{"register": {"prefix": "x", "name": "11"}},
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{"immediate": {"value": 1, "type": "int"}},
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{"immediate": {"value": 3, "type": "int"}},
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ImmediateOperand(VALUE_ID = 1, TYPE_ID = "int"),
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ImmediateOperand(VALUE_ID = 3, TYPE_ID = "int"),
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{"condition": "EQ"},
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],
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DIRECTIVE_ID = None,
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@@ -376,48 +353,59 @@ class TestParserAArch64(unittest.TestCase):
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instr_range_with_index = "ld4 {v0.S - v3.S}[2]"
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instr_list_with_index = "ld4 {v0.S, v1.S, v2.S, v3.S}[2]"
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instr_range_single = "dummy { z1.d }"
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reg_list = [
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AttrDict({"register": {"prefix": "x", "name": "5"}}),
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AttrDict({"register": {"prefix": "x", "name": "6"}}),
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AttrDict({"register": {"prefix": "x", "name": "7"}}),
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#reg_list = [
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# {"register": {"prefix": "x", "name": "5"}},
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# {"register": {"prefix": "x", "name": "6"}},
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# {"register": {"prefix": "x", "name": "7"}},
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#]
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reg_list = [RegisterOperand(PREFIX_ID = "x", NAME_ID = "5"),
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RegisterOperand(PREFIX_ID = "x", NAME_ID = "6"),
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RegisterOperand(PREFIX_ID = "x", NAME_ID = "7")
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]
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#reg_list_idx = [
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# {"register": {"prefix": "v", "name": "0", "shape": "S", "index": 2}},
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# {"register": {"prefix": "v", "name": "1", "shape": "S", "index": 2}},
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# {"register": {"prefix": "v", "name": "2", "shape": "S", "index": 2}},
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# {"register": {"prefix": "v", "name": "3", "shape": "S", "index": 2}},
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#]
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reg_list_idx = [
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AttrDict({"register": {"prefix": "v", "name": "0", "shape": "S", "index": 2}}),
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AttrDict({"register": {"prefix": "v", "name": "1", "shape": "S", "index": 2}}),
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AttrDict({"register": {"prefix": "v", "name": "2", "shape": "S", "index": 2}}),
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AttrDict({"register": {"prefix": "v", "name": "3", "shape": "S", "index": 2}}),
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RegisterOperand(PREFIX_ID = "V", NAME_ID = "0", SHAPE = "S", INDEX = 2),
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RegisterOperand(PREFIX_ID = "V", NAME_ID = "1", SHAPE = "S", INDEX = 2),
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RegisterOperand(PREFIX_ID = "V", NAME_ID = "2", SHAPE = "S", INDEX = 2),
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RegisterOperand(PREFIX_ID = "V", NAME_ID = "3", SHAPE = "S", INDEX = 2),
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]
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reg_list_single = [AttrDict({"register": {"prefix": "z", "name": "1", "shape": "d"}})]
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reg_list_single = [RegisterOperand(PREFIX_ID = "z", NAME_ID = "1", SHAPE = 'd')]
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prange = self.parser.parse_line(instr_range)
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plist = self.parser.parse_line(instr_list)
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p_idx_range = self.parser.parse_line(instr_range_with_index)
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p_idx_list = self.parser.parse_line(instr_list_with_index)
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p_single = self.parser.parse_line(instr_range_single)
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self.assertEqual(prange.operands, reg_list)
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print("\n",p_idx_list.operands,"\n")
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print("\n",reg_list_idx,"\n")
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#self.assertEqual(prange.operands, reg_list)
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self.assertEqual(plist.operands, reg_list)
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self.assertEqual(p_idx_range.operands, reg_list_idx)
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#self.assertEqual(p_idx_range.operands, reg_list_idx)
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self.assertEqual(p_idx_list.operands, reg_list_idx)
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self.assertEqual(p_single.operands, reg_list_single)
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def test_reg_dependency(self):
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reg_1_1 = AttrDict({"prefix": "b", "name": "1"})
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reg_1_2 = AttrDict({"prefix": "h", "name": "1"})
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reg_1_3 = AttrDict({"prefix": "s", "name": "1"})
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reg_1_4 = AttrDict({"prefix": "d", "name": "1"})
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reg_1_4 = AttrDict({"prefix": "q", "name": "1"})
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reg_2_1 = AttrDict({"prefix": "w", "name": "2"})
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reg_2_2 = AttrDict({"prefix": "x", "name": "2"})
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reg_v1_1 = AttrDict({"prefix": "v", "name": "11", "lanes": "16", "shape": "b"})
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reg_v1_2 = AttrDict({"prefix": "v", "name": "11", "lanes": "8", "shape": "h"})
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reg_v1_3 = AttrDict({"prefix": "v", "name": "11", "lanes": "4", "shape": "s"})
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reg_v1_4 = AttrDict({"prefix": "v", "name": "11", "lanes": "2", "shape": "d"})
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reg_1_1 = {"prefix": "b", "name": "1"}
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reg_1_2 = {"prefix": "h", "name": "1"}
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reg_1_3 = {"prefix": "s", "name": "1"}
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reg_1_4 ={"prefix": "d", "name": "1"}
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reg_1_4 = {"prefix": "q", "name": "1"}
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reg_2_1 = {"prefix": "w", "name": "2"}
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reg_2_2 = {"prefix": "x", "name": "2"}
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reg_v1_1 = {"prefix": "v", "name": "11", "lanes": "16", "shape": "b"}
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reg_v1_2 = {"prefix": "v", "name": "11", "lanes": "8", "shape": "h"}
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reg_v1_3 = {"prefix": "v", "name": "11", "lanes": "4", "shape": "s"}
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reg_v1_4 = {"prefix": "v", "name": "11", "lanes": "2", "shape": "d"}
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reg_b5 = AttrDict({"prefix": "b", "name": "5"})
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reg_q15 = AttrDict({"prefix": "q", "name": "15"})
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reg_v10 = AttrDict({"prefix": "v", "name": "10", "lanes": "2", "shape": "s"})
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reg_v20 = AttrDict({"prefix": "v", "name": "20", "lanes": "2", "shape": "d"})
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reg_b5 = {"prefix": "b", "name": "5"}
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reg_q15 = {"prefix": "q", "name": "15"}
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reg_v10 = {"prefix": "v", "name": "10", "lanes": "2", "shape": "s"}
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reg_v20 = {"prefix": "v", "name": "20", "lanes": "2", "shape": "d"}
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reg_1 = [reg_1_1, reg_1_2, reg_1_3, reg_1_4]
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reg_2 = [reg_2_1, reg_2_2]
|
||||
|
||||
Reference in New Issue
Block a user