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https://github.com/RRZE-HPC/OSACA.git
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Changing operand matching for class operand style
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@@ -182,19 +182,19 @@ class ISASemantics(object):
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isa_data = self._isa_model.get_instruction(
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instruction_form.instruction[:suffix_start], instruction_form.operands
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)
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"""
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if only_postindexed:
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for o in instruction_form.operands:
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if isinstance(o, MemoryOperand) and o.base!=None:
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if isinstance(o, MemoryOperand) and o.base!=None and o.post_indexed!=False:
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base_name = o.base.prefix if o.base.prefix!=None else "" + o.base.name
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return {
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base_name: {
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"name": o.base.prefix if o.base.prefix!=None else "" + o.base.name,
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"value": o.post_indexed["value"],
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"value": o.post_indexed['value'],
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}
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}
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return {}
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"""
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reg_operand_names = {} # e.g., {'rax': 'op1'}
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operand_state = {} # e.g., {'op1': {'name': 'rax', 'value': 0}} 0 means unchanged
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@@ -253,13 +253,12 @@ class ISASemantics(object):
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op_dict["destination"] += operands
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if "hidden_operands" in isa_data:
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op_dict["destination"] += [
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AttrDict.convert_dict(
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{
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hop["class"]: {
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k: hop[k] for k in ["name", "class", "source", "destination"]
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}
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}
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)
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for hop in isa_data["hidden_operands"]
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]
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return op_dict
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@@ -267,6 +266,7 @@ class ISASemantics(object):
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for i, op in enumerate(isa_data["operands"]):
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if isinstance(op, RegisterOperand):
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continue
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'''
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if op["source"] and op["destination"]:
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op_dict["src_dst"].append(operands[i])
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continue
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@@ -276,6 +276,7 @@ class ISASemantics(object):
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if op["destination"]:
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op_dict["destination"].append(operands[i])
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continue
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'''
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# check for hidden operands like flags or registers
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if "hidden_operands" in isa_data:
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# add operand(s) to semantic_operands of instruction form
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