diff --git a/osaca/__init__.py b/osaca/__init__.py index 3d9fc2c..5a37918 100644 --- a/osaca/__init__.py +++ b/osaca/__init__.py @@ -1,2 +1,2 @@ name = "osaca" -__version__ = '0.2.0' +__version__ = '0.2.1' diff --git a/osaca/data/CFL_data.csv b/osaca/data/CFL_data.csv new file mode 100644 index 0000000..228e019 --- /dev/null +++ b/osaca/data/CFL_data.csv @@ -0,0 +1,3669 @@ +instr,TP,LT,ports +sldt-mem,2.5,None,"(2.5,0.0,1.0,0.5,0.5,1.0,0.0,2.5,0.0)" +sldt-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +sldt-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +sldtl-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +sldt-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +sldtq-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +lgdt-mem,8.0,None,"(8.0,0.0,5.0,2.3333333333333335,2.3333333333333335,1.0,0.0,6.0,0.3333333333333333)" +call-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +call-r64,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +callq-r64,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +call-LBL,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +mov-LBL,19.833333333333336,None,"(19.833333333333336,0.0,8.333333333333334,0.0,0.0,2.0,11.833333333333334,12.0,0.0)" +mov-LBL,12.333333333333334,None,"(12.333333333333334,0.0,4.333333333333334,0.0,0.0,0.0,5.333333333333334,8.0,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wrmsr-,48.5,None,"(48.5,0.0,23.0,0.0,0.0,1.0,26.5,33.0,0.0)" +repe scasb-,7.0,None,"(7.0,0.0,3.5,1.5,1.5,0.0,2.5,5.0,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-mem,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +cmovbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lsl-mem,26.5,None,"(26.5,0.0,13.0,1.5,1.5,0.0,11.5,16.0,0.0)" +lsl-r32_mem,27.0,None,"(27.0,0.0,13.0,1.0,1.0,0.0,12.0,16.0,0.0)" +lsl-r64_mem,26.5,None,"(26.5,0.0,12.5,1.5,1.5,0.0,11.5,16.5,0.0)" +lslq-r64_mem,26.5,None,"(26.5,0.0,12.5,1.5,1.5,0.0,11.5,16.5,0.0)" +lsl-,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)" +lsl-r32_r32,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)" +lsl-r64_r32,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)" +lahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpsw-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adcb-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adc-mem,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adc-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adcl-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adc-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adcq-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +cmpsd-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lodsw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lodsd-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +std-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sti-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +str-mem,2.5,None,"(2.5,0.0,1.0,0.5,0.5,1.0,0.0,2.5,0.0)" +str-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +str-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +strl-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +str-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +strq-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rdmsr-,27.0,None,"(27.0,0.0,17.5,0.0,0.0,0.0,17.0,18.5,0.0)" +rep lodsb-,6.5,None,"(6.5,0.0,3.5,1.5,1.5,0.0,2.0,5.0,0.0)" +lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +idiv-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)" +idiv-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)" +idivb-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)" +idiv-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)" +idiv-mem,22.833333333333332,None,"(22.833333333333332,18,10.833333333333332,0.5,0.5,0.0,9.833333333333332,13.5,0.0)" +idiv-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +idivl-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +idiv-r64,23.166666666666668,None,"(23.166666666666668,18,10.666666666666668,0.0,0.0,0.0,10.166666666666668,14.0,0.0)" +idivq-r64,23.166666666666668,None,"(23.166666666666668,18,10.666666666666668,0.0,0.0,0.0,10.166666666666668,14.0,0.0)" +repne cmpsb-,7.333333333333333,None,"(7.333333333333333,0.0,3.833333333333333,2.0,2.0,0.0,2.833333333333333,5.0,0.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrd-mem_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrd-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrdl-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrd-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrdq-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shrdb-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shrd-mem_r32_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shrd-mem_r64_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shrd-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrdb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +movsd-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsx-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsw-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +mov-r64_r8,4.083333333333333,None,"(4.083333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,1.5833333333333333,3.75,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +bts-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btsl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +bts-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btsq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btr-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btrl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btr-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btrq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sgdt-mem,3.0,None,"(2.0,0.0,3.0,0.8333333333333333,0.8333333333333333,2.0,0.0,2.0,0.3333333333333333)" +loop-LBL,2.5,None,"(2.5,0.0,1.5,0.0,0.0,0.0,0.5,2.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btc-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btcl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btc-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btcq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wbinvd-,425143.5,None,"(425143.5,0.0,284323.5,131656.66666666666,131656.66666666666,295223.0,285031.5,199555.5,35553.666666666664)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mul-mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +mul-r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pushw-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pushw-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cli-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cld-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +clc-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lldt-mem,4.5,None,"(4.5,0.0,3.0,1.3333333333333333,1.3333333333333333,1.0,0.0,4.5,0.3333333333333333)" +lldt-,3.8333333333333335,None,"(3.8333333333333335,0.0,3.3333333333333335,0.8333333333333333,0.8333333333333333,1.0,0.3333333333333333,3.5,0.3333333333333333)" +ret-imd,1.75,None,"(1.75,0.0,0.25,0.5,0.5,0.0,0.25,1.75,0.0)" +ret-,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock subl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock subq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btc-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btc-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)" +lock btcl-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)" +lock btc-mem_r64,3.083333333333333,None,"(3.083333333333333,0.0,1.5833333333333333,1.0,1.0,2.0,0.5833333333333333,2.75,0.0)" +lock btcq-mem_r64,3.083333333333333,None,"(3.083333333333333,0.0,1.5833333333333333,1.0,1.0,2.0,0.5833333333333333,2.75,0.0)" +setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,1.0,0.3333333333333333)" +setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +verr-mem,24.75,None,"(24.75,0.0,12.75,1.5,1.5,0.0,12.25,15.25,0.0)" +verr-,6.0,None,"(6.0,0.0,4.0,2.0,2.0,0.0,4.0,4.0,0.0)" +rep stosb-,20.0,None,"(20.0,0.0,13.5,3.5,3.5,0.0,13.0,10.5,0.0)" +cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock andb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock andl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock andq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rdpmc-,12.666666666666666,None,"(12.666666666666666,0.0,7.166666666666666,0.0,0.0,0.0,6.166666666666666,9.0,0.0)" +lock cmpxchg-mem_r8,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchgb-mem_r8,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchg-mem_r32,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchgl-mem_r32,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchg-mem_r64,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchgq-mem_r64,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock orb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock orl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock orq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +enter-imd_imd,13.5,None,"(13.5,0.0,9.0,6.5,6.5,4.0,9.0,8.5,0.0)" +repne scasb-,7.0,None,"(7.0,0.0,3.5,1.5,1.5,0.0,2.5,5.0,0.0)" +leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xadd-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xaddb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xadd-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xadd-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xaddl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xadd-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xaddq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lidt-mem,8.0,None,"(8.0,0.0,5.0,1.8333333333333333,1.8333333333333333,1.0,0.0,6.0,0.3333333333333333)" +xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xchg-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchgb-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchgb-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +lock xchg-mem,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchg-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchgl-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchg-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchgq-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-mem,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchgl-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchgq-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +smsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0,1.0,0.0)" +smsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smsw-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smswl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smsw-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smswq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +andb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +andl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +andq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +movb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +mov-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +movb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cpuid-,54.5,None,"(54.5,0.0,31.0,4.0,4.0,8.0,29.5,35.0,3.0)" +rdtsc-,5.75,None,"(5.75,0.0,5.75,0.0,0.0,0.0,2.75,3.75,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.0,1.0,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock addb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock addl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock addq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +sidt-mem,3.0,None,"(1.5,0.0,3.0,0.8333333333333333,0.8333333333333333,2.0,0.0,1.5,0.3333333333333333)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbb-mem,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbb-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbbl-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbb-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbbq-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +imul-r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imul-mem_imd,1.25,None,"(0.25,0.0,1.25,0.5,0.5,0.0,0.25,0.25,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.25,None,"(0.25,0.0,1.25,0.5,0.5,0.0,0.25,0.25,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)" +rcr-r8_imd,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)" +rcrb-r8_imd,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)" +rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcrl-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcrq-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcr-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcrb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcr-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcr-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcrl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcr-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcrq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcr-mem_r8,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)" +rcrb-mem_r8,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)" +rcr-r8_r8,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)" +rcrb-r8_r8,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)" +rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcrb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-r32_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-r64_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-mem_imd,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)" +rcl-r8_imd,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)" +rclb-r8_imd,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)" +rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rclq-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcl-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rclb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcl-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcl-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rclq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcl-mem_r8,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)" +rclb-mem_r8,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)" +rcl-r8_r8,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)" +rclb-r8_r8,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rclb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-r32_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-r64_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +div-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)" +div-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +divb-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +div-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)" +div-mem,18,None,"(12.5,18,5.0,0.5,0.5,0.0,7.0,7.5,0.0)" +div-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +divl-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +div-r64,18,None,"(12.833333333333334,18,5.333333333333334,0.0,0.0,0.0,7.333333333333334,7.5,0.0)" +divq-r64,18,None,"(12.833333333333334,18,5.333333333333334,0.0,0.0,0.0,7.333333333333334,7.5,0.0)" +stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rep movsb-,16.5,None,"(16.5,0.0,12.5,5.0,5.0,0.0,11.5,11.5,0.0)" +cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +bt-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +btl-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +bt-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)" +btq-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pop-mem,1.0,None,"(0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +shld-mem_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shld-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shldl-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shld-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shldq-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shldb-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shld-mem_r32_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shld-mem_r64_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shld-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shldb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shld-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shld-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +invlpg-mem,13.833333333333332,None,"(13.833333333333332,0.0,7.833333333333333,2.0,2.0,5.0,8.833333333333334,6.5,1.0)" +sahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lmsw-mem,7.25,None,"(7.25,0.0,4.75,0.8333333333333333,0.8333333333333333,1.0,4.25,4.75,0.3333333333333333)" +lmsw-,6.0,None,"(6.0,0.0,2.5,0.3333333333333333,0.3333333333333333,1.0,4.5,4.0,0.3333333333333333)" +lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock bts-mem,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)" +lock bts-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)" +lock btsl-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)" +lock bts-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock btsq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xorb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xorl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xorq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +orb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +orl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +orq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +repe cmpsb-,7.333333333333333,None,"(7.333333333333333,0.0,3.833333333333333,2.0,2.0,0.0,2.833333333333333,5.0,0.0)" +clts-,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,2.0,2.0,0.0)" +movzx-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +verw-mem,25.0,None,"(25.0,0.0,11.0,1.5,1.5,0.0,13.0,15.0,0.0)" +verw-,6.0,None,"(6.0,0.0,4.0,2.0,2.0,0.0,3.0,3.0,0.0)" +jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +subl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +subq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmpxchg8b-mem,4.666666666666666,None,"(4.666666666666666,0.0,2.1666666666666665,1.0,1.0,1.0,2.1666666666666665,4.0,0.0)" +lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btr-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btr-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btrl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btr-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock btrq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +addb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +addl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +addq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adc-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adc-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock cmpxchg8b-mem,6.0,None,"(6.0,0.0,3.0,1.0,1.0,1.0,3.0,4.0,0.0)" +cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lea-mem,0.75,None,"(0.25,0.0,0.75,0.0,0.0,0.0,0.75,0.25,0.0)" +lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setbe-mem,1.0,None,"(1.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,1.0,0.3333333333333333)" +setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock neg-mem,2.0,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,2.0,0.3333333333333333,1.0,0.0)" +bswap-r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bswapl-r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +divps-xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divps-xmm_xmm,5,None,"(0.5,5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mmx,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpss-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fxsave64-mem,38.0,None,"(21.25,0.0,13.25,19.666666666666668,19.666666666666668,38.0,13.25,9.25,0.6666666666666666)" +andnps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andnps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +ldmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.0,0.5,0.0)" +orps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +orps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divss-xmm_xmm,5,None,"(0.3333333333333333,5,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtss-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtss-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +xorps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +xorps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +subps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +minss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +minss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +addps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_r64,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,30.166666666666668,None,"(29.166666666666668,0.0,11.166666666666666,19.5,19.5,0.0,30.166666666666668,9.5,0.0)" +fxsave-mem,38.0,None,"(21.0,0.0,13.5,19.666666666666668,19.666666666666668,38.0,13.0,9.5,0.6666666666666666)" +sqrtps-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtps-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +minps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +andps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +fxrstor-mem,30.166666666666668,None,"(29.166666666666668,0.0,11.166666666666666,19.5,19.5,0.0,30.166666666666668,9.5,0.0)" +stmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +maxps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +maxps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +comiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +maxss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +divpd-xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divpd-xmm_xmm,8,None,"(0.5,8,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pcmpgtw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.0,2.0,2.0,2.0,2.0,0.5,0.0)" +andnpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andnpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psubd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psadbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmullw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +divsd-xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divsd-xmm_xmm,8,None,"(0.5,8,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +orpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +orpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cmppd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cmppd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movq2dq-xmm_mmx,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +psubb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psubusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psubw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaxsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +paddd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cmpsd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpsd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +minsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +minsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cvtsd2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsd2ss-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +pslld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtsd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtsd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r64,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psllq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psubusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmulhw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cvtss2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2sd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +xorpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +xorpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +maxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +maxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +minpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +minpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psrld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +subsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +lfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2pi-mmx_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +mfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maxpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +maxpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +psubsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +comisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pcmpgtw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packuswb-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +psubd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psadbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packssdw-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pxor-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pxor-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +por-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pandn-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pandn-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pminsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +emms-,5.5,None,"(5.5,0.0,0.0,0.0,0.0,0.0,4.0,0.5,0.0)" +punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pand-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pminub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +psubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maskmovq-mmx_mmx,2.0,None,"(2.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packsswb-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +repe scasq-,6.833333333333333,None,"(6.833333333333333,0.0,3.833333333333333,1.5,1.5,0.0,2.333333333333333,5.0,0.0)" +cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep lodsq-,6.5,None,"(6.5,0.0,3.5,1.5,1.5,0.0,2.0,5.0,0.0)" +repne cmpsq-,7.0,None,"(7.0,0.0,4.0,2.0,2.0,0.0,3.0,5.0,0.0)" +movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +pushfq-,1.0,None,"(0.5,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +rep movsq-,15.0,None,"(15.0,0.0,9.0,2.0,2.0,0.0,10.5,11.5,0.0)" +movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep stosq-,18.5,None,"(18.5,0.0,13.0,4.0,4.0,0.0,14.0,10.5,0.0)" +swapgs-,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +repne scasq-,6.666666666666666,None,"(6.666666666666666,0.0,3.6666666666666665,1.5,1.5,0.0,2.6666666666666665,5.0,0.0)" +popfq-,1.5,None,"(1.5,0.0,1.5,0.5,0.5,0.0,0.5,1.5,0.0)" +stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +cmpxchg16b-mem,7.5,None,"(7.5,0.0,2.0,1.0,1.0,1.0,6.0,4.5,0.0)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +repe cmpsq-,7.0,None,"(7.0,0.0,4.0,2.0,2.0,0.0,3.0,5.0,0.0)" +lock cmpxchg16b-mem,9.166666666666668,None,"(9.166666666666668,0.0,1.6666666666666667,1.0,1.0,1.0,7.166666666666667,4.0,0.0)" +bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +roundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +roundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mpsadbw-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +mpsadbw-xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmulld-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulld-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendpd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)" +pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)" +rex.w pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)" +rex.w pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)" +pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)" +pcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)" +rex.w pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)" +rex.w pcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)" +pmuldq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuldq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +dpps-xmm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)" +dpps-xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +blendvps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendvps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +blendvpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendvpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +roundss-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundss-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +roundsd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundsd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendvb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pblendvb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +phsubd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phsubd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phsubw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +psignw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psignw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psignw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psignd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psignd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psignd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psignb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psignb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psignb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +phaddsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phaddsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +phaddsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +phsubsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phsubsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +phsubsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +pabsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phaddd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pabsd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phaddw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +addsubps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +hsubpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +haddpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +haddpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +haddps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +haddps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +rdtscp-,7.5,None,"(7.5,0.0,6.0,0.0,0.0,0.0,3.0,3.5,0.0)" +aesdec-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesdec-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aeskeygenassist-xmm_xmm_imd,7.0,None,"(5.5,0.0,0.0,0.0,0.0,0.0,7.0,0.5,0.0)" +aeskeygenassist-xmm_mem_imd,6.0,None,"(5.5,0.0,0.0,0.5,0.5,0.0,6.0,0.5,0.0)" +aesenclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesenclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesdeclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesdeclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesenc-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesenc-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +clflushopt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rdseed-,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdseed-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdseedl-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdseed-r64,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,1.0,4.5,0.0)" +rdseedq-r64,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,1.0,4.5,0.0)" +movbe-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r64_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +movbeq-r64_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +movbe-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)" +movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)" +movbe-mem_r64,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.5,0.3333333333333333)" +movbeq-mem_r64,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.5,0.3333333333333333)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +clflush-mem,1.0,None,"(0.5,0.0,1.0,0.5,0.5,1.0,0.0,0.5,0.0)" +rdrand-,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdrand-r32,7.25,None,"(7.25,0.0,3.25,0.5,0.5,0.0,1.25,3.25,0.0)" +rdrandl-r32,7.25,None,"(7.25,0.0,3.25,0.5,0.5,0.0,1.25,3.25,0.0)" +rdrand-r64,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdrandq-r64,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +pause-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhaddpd-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhaddpd-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhaddpd-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhaddpd-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vstmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vsqrtsd-xmm_xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsqrtss-xmm_xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendvb-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vpblendvb-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vzeroall-,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,2.0,3.0,0.0)" +vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,16,None,"(1.0,16,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_ymm,16,None,"(1.0,16,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vdivps-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,10,None,"(1.0,10,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_ymm,10,None,"(1.0,10,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vldmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.0,0.5,0.0)" +vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvpd-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_ymm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vsqrtpd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_ymm,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)" +vdpps-xmm_xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)" +vdpps-ymm_ymm_ymm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaskmovpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaskmovps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vroundsd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundsd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_ymm,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhsubpd-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhsubpd-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhsubpd-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhsubpd-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vhsubps-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhsubps-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhsubps-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhsubps-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhaddps-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhaddps-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhaddps-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhaddps-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vcmpps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphaddsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvps-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)" +vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)" +rex.w vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)" +rex.w vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)" +vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)" +vpcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)" +rex.w vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)" +rex.w vpcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vzeroupper-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendps-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendps-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendps-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendps-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovaps-xmm_mem,0.3333333333333333,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vroundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.0,2.0,2.0,2.0,2.0,0.5,0.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphsubsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvttsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendvb-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vpblendvb-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphaddsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphsubw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphsubsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtps2ph-mem_xmm_imd,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vcvtps2ph-xmm_xmm_imd,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtps2ph-mem_ymm_imd,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvtps2ph-xmm_ymm_imd,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vgatherqpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherqpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherqps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherqps-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherdps-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherdps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherdpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherdpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherqq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherdd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vaesdec-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesdec-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesdeclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesdeclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesenc-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesenc-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesenclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesenclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaeskeygenassist-xmm_xmm_imd,7.0,None,"(5.5,0.0,0.0,0.0,0.0,0.0,7.0,0.5,0.0)" +vaeskeygenassist-xmm_mem_imd,6.0,None,"(5.5,0.0,0.0,0.5,0.5,0.0,6.0,0.5,0.0)" +shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" diff --git a/osaca/data/KBL_data.csv b/osaca/data/KBL_data.csv new file mode 100644 index 0000000..1d6c03d --- /dev/null +++ b/osaca/data/KBL_data.csv @@ -0,0 +1,3669 @@ +instr,TP,LT,ports +sldt-mem,2.5,None,"(2.5,0.0,1.0,0.5,0.5,1.0,0.0,2.5,0.0)" +sldt-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +sldt-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +sldtl-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +sldt-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +sldtq-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +lgdt-mem,8.0,None,"(8.0,0.0,5.0,2.3333333333333335,2.3333333333333335,1.0,0.0,6.0,0.3333333333333333)" +call-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +call-r64,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +callq-r64,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +call-LBL,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +mov-LBL,19.666666666666664,None,"(19.666666666666664,0.0,8.166666666666666,0.0,0.0,2.0,12.166666666666666,12.0,0.0)" +mov-LBL,12.0,None,"(12.0,0.0,4.0,0.0,0.0,0.0,6.0,8.0,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wrmsr-,48.5,None,"(48.5,0.0,24.0,0.0,0.0,1.0,25.5,33.0,0.0)" +repe scasb-,7.666666666666667,None,"(7.666666666666667,0.0,4.166666666666667,0.5,0.5,0.0,3.166666666666667,5.0,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-mem,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,0.8333333333333333,0.8333333333333333,1.0,0.5,0.5,0.3333333333333333)" +xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +cmovbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lsl-mem,26.25,None,"(26.25,0.0,13.25,1.5,1.5,0.0,11.25,16.25,0.0)" +lsl-r32_mem,26.083333333333336,None,"(26.083333333333336,0.0,13.083333333333334,1.5,1.5,0.0,11.583333333333334,16.25,0.0)" +lsl-r64_mem,25.916666666666664,None,"(25.916666666666664,0.0,12.916666666666666,1.5,1.5,0.0,11.916666666666666,16.25,0.0)" +lslq-r64_mem,25.916666666666664,None,"(25.916666666666664,0.0,12.916666666666666,1.5,1.5,0.0,11.916666666666666,16.25,0.0)" +lsl-,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)" +lsl-r32_r32,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)" +lsl-r64_r32,5.083333333333333,None,"(5.083333333333333,0.0,4.083333333333333,1.0,1.0,0.0,1.0833333333333333,3.75,0.0)" +lahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +not-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +inc-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpsw-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adcb-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adc-mem,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adc-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adcl-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adc-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock adcq-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +cmpsd-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock dec-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lodsw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lodsd-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +std-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sti-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +str-mem,2.5,None,"(2.5,0.0,1.0,0.5,0.5,1.0,0.0,2.5,0.0)" +str-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +str-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +strl-r32,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +str-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +strq-r64,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rdmsr-,28.0,None,"(28.0,0.0,19.5,0.0,0.0,0.0,15.0,17.5,0.0)" +rep lodsb-,7.0,None,"(7.0,0.0,4.0,0.5,0.5,0.0,3.0,5.0,0.0)" +lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock not-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +idiv-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)" +idiv-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)" +idivb-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)" +idiv-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)" +idiv-mem,22.666666666666668,None,"(22.666666666666668,18,10.666666666666668,0.5,0.5,0.0,10.166666666666668,13.5,0.0)" +idiv-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +idivl-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +idiv-r64,23.166666666666668,None,"(23.166666666666668,18,10.666666666666668,0.0,0.0,0.0,10.166666666666668,14.0,0.0)" +idivq-r64,23.166666666666668,None,"(23.166666666666668,18,10.666666666666668,0.0,0.0,0.0,10.166666666666668,14.0,0.0)" +repne cmpsb-,8.0,None,"(8.0,0.0,4.5,0.6666666666666666,0.6666666666666666,0.0,3.5,5.0,0.6666666666666666)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrd-mem_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrd-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrdl-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrd-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrdq-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shrdb-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shrd-mem_r32_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shrd-mem_r64_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shrd-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrdb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +movsd-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsx-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsw-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-mem,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +mov-r64_r8,4.083333333333333,None,"(4.083333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,1.5833333333333333,3.75,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +bts-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btsl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +bts-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btsq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btr-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btrl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btr-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btrq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sgdt-mem,3.0,None,"(2.0,0.0,3.0,0.8333333333333333,0.8333333333333333,2.0,0.0,2.0,0.3333333333333333)" +loop-LBL,2.5,None,"(2.5,0.0,1.5,0.0,0.0,0.0,0.5,2.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.5,0.3333333333333333)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btc-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btcl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btc-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btcq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wbinvd-,397159.5,None,"(397159.5,0.0,235401.5,111916.16666666667,111916.16666666667,234230.0,246961.0,176369.0,22724.666666666668)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mul-mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +mul-r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pushw-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +push-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pushw-r16,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cli-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cld-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +clc-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lldt-mem,4.5,None,"(4.5,0.0,3.0,1.3333333333333333,1.3333333333333333,1.0,0.0,4.5,0.3333333333333333)" +lldt-,3.75,None,"(3.75,0.0,3.25,0.8333333333333333,0.8333333333333333,1.0,0.25,3.75,0.3333333333333333)" +ret-imd,1.75,None,"(1.75,0.0,0.25,0.5,0.5,0.0,0.25,1.75,0.0)" +ret-,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,2.0,0.3333333333333333,1.0,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock subl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock sub-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock subq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btc-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btc-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btc-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btcl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btc-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock btcq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,1.0,0.3333333333333333)" +setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +verr-mem,25.0,None,"(25.0,0.0,11.5,1.5,1.5,0.0,12.5,15.0,0.0)" +verr-,6.0,None,"(6.0,0.0,4.0,2.0,2.0,0.0,4.0,4.0,0.0)" +rep stosb-,17.5,None,"(17.5,0.0,13.0,4.0,4.0,0.0,15.0,10.5,0.0)" +cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock andb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock andl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock and-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock andq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rdpmc-,12.666666666666666,None,"(12.666666666666666,0.0,7.166666666666666,0.0,0.0,0.0,6.166666666666666,9.0,0.0)" +lock cmpxchg-mem_r8,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchgb-mem_r8,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchg-mem_r32,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchgl-mem_r32,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchg-mem_r64,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock cmpxchgq-mem_r64,2.5,None,"(2.5,0.0,0.5,1.0,1.0,1.0,0.5,2.5,0.0)" +lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock inc-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock orb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock orl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock or-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock orq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +enter-imd_imd,13.5,None,"(13.5,0.0,9.0,6.5,6.5,4.0,9.0,8.5,0.0)" +repne scasb-,7.666666666666667,None,"(7.666666666666667,0.0,4.166666666666667,0.5,0.5,0.0,3.166666666666667,5.0,0.0)" +leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xadd-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xaddb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xadd-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xadd-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xaddl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xadd-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xaddq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lidt-mem,8.0,None,"(8.0,0.0,5.0,1.8333333333333333,1.8333333333333333,1.0,0.0,6.0,0.3333333333333333)" +xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xchg-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchgb-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchgb-mem_r8,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +lock xchg-mem,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchg-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchgl-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchg-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +lock xchgq-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-mem,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchgl-mem_r32,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchgq-mem_r64,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,0.5,1.5,0.0)" +xchg-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +smsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0,1.0,0.0)" +smsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smsw-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smswl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smsw-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smswq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +andb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +andl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +andq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +movb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +mov-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +movb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cpuid-,54.5,None,"(54.5,0.0,31.0,4.0,4.0,8.0,29.5,35.0,3.0)" +rdtsc-,5.666666666666667,None,"(5.666666666666667,0.0,5.666666666666667,0.0,0.0,0.0,3.166666666666667,3.5,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock addb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock addl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock add-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock addq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +sidt-mem,3.0,None,"(1.5,0.0,3.0,0.8333333333333333,0.8333333333333333,2.0,0.0,1.5,0.3333333333333333)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_r8,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbb-mem,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbb-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbbl-mem_r32,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbb-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock sbbq-mem_r64,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +imul-r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imul-mem_imd,1.25,None,"(0.25,0.0,1.25,0.5,0.5,0.0,0.25,0.25,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.25,None,"(0.25,0.0,1.25,0.5,0.5,0.0,0.25,0.25,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)" +rcr-r8_imd,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)" +rcrb-r8_imd,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)" +rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcrl-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcrq-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcr-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcrb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcr-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcr-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcr-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcrl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcr-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcrq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcr-mem_r8,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)" +rcrb-mem_r8,3.0,None,"(3.0,0.0,3.0,1.0,1.0,1.0,1.0,3.0,0.0)" +rcr-r8_r8,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)" +rcrb-r8_r8,3.25,None,"(3.25,0.0,3.25,0.0,0.0,0.0,1.25,3.25,0.0)" +rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcrb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcr-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcrb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-r32_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcr-r64_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-mem_imd,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)" +rcl-r8_imd,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)" +rclb-r8_imd,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)" +rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_imd,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-r32_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rclq-r64_imd,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcl-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rclb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcl-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +rcl-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcl-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rclq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rcl-mem_r8,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)" +rclb-mem_r8,3.25,None,"(3.25,0.0,1.75,1.0,1.0,1.0,0.75,3.25,0.0)" +rcl-r8_r8,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)" +rclb-r8_r8,3.5,None,"(3.5,0.0,2.0,0.0,0.0,0.0,1.0,3.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,2.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rclb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-r32_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +rcl-r64_r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,0.5,2.5,0.0)" +div-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)" +div-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +divb-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +div-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)" +div-mem,18,None,"(12.5,18,5.0,0.5,0.5,0.0,7.0,7.5,0.0)" +div-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +divl-r32,8,None,"(3.0,8,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +div-r64,18,None,"(12.833333333333334,18,5.333333333333334,0.0,0.0,0.0,7.333333333333334,7.5,0.0)" +divq-r64,18,None,"(12.833333333333334,18,5.333333333333334,0.0,0.0,0.0,7.333333333333334,7.5,0.0)" +stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rep movsb-,16.5,None,"(16.5,0.0,12.5,5.0,5.0,0.0,11.5,11.5,0.0)" +cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +bt-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +btl-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +bt-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)" +btq-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pop-mem,1.0,None,"(0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +shld-mem_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shld-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shldl-mem_r32_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shld-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shldq-mem_r64_imd,1.25,None,"(0.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shldb-mem_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shld-mem_r32_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shld-mem_r64_r8,1.25,None,"(1.25,0.0,1.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +shld-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shldb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shld-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shld-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +invlpg-mem,13.833333333333332,None,"(13.833333333333332,0.0,7.833333333333333,2.0,2.0,5.0,8.833333333333334,6.5,1.0)" +sahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lmsw-mem,7.75,None,"(7.75,0.0,4.75,1.3333333333333333,1.3333333333333333,2.0,5.25,6.25,0.3333333333333333)" +lmsw-,6.0,None,"(6.0,0.0,2.5,0.3333333333333333,0.3333333333333333,1.0,4.5,4.0,0.3333333333333333)" +lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock bts-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock bts-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock bts-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btsl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock bts-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock btsq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_imd,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xorb-mem_r8,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xorl-mem_r32,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xor-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock xorq-mem_r64,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.0,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +orb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +orl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +orq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +repe cmpsb-,8.0,None,"(8.0,0.0,4.5,0.6666666666666666,0.6666666666666666,0.0,3.5,5.0,0.6666666666666666)" +clts-,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,2.0,2.0,0.0)" +movzx-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +verw-mem,24.5,None,"(24.5,0.0,12.0,1.5,1.5,0.0,12.5,15.0,0.0)" +verw-,6.0,None,"(6.0,0.0,4.0,2.0,2.0,0.0,3.0,3.0,0.0)" +jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-mem,1.0,None,"(1.0,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.0,0.3333333333333333)" +ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.8333333333333333,0.8333333333333333,1.0,0.0,1.5,0.3333333333333333)" +ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +subl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +subq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +neg-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmpxchg8b-mem,4.666666666666666,None,"(4.666666666666666,0.0,2.1666666666666665,1.0,1.0,1.0,2.1666666666666665,4.0,0.0)" +lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btr-mem_imd,2.0,None,"(1.5,0.0,0.0,1.0,1.0,2.0,0.0,1.5,0.0)" +lock btr-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btr-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btrl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btr-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock btrq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +addb-mem_r8,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +addl-mem_r32,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +addq-mem_r64,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,0.8333333333333333,0.8333333333333333,1.0,0.75,0.75,0.3333333333333333)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adc-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adc-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,1.25,0.3333333333333333)" +adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock cmpxchg8b-mem,6.0,None,"(6.0,0.0,3.0,1.0,1.0,1.0,3.0,4.0,0.0)" +cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lea-mem,0.75,None,"(0.25,0.0,0.75,0.0,0.0,0.0,0.75,0.25,0.0)" +lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +dec-mem,1.0,None,"(0.25,0.0,0.25,0.8333333333333333,0.8333333333333333,1.0,0.25,0.25,0.3333333333333333)" +dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setbe-mem,1.0,None,"(1.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,1.0,0.3333333333333333)" +setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +lock neg-mem,2.0,None,"(1.25,0.0,0.25,1.0,1.0,2.0,0.25,1.25,0.0)" +bswap-r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bswapl-r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +divps-xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divps-xmm_xmm,5,None,"(0.5,5,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mmx,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpss-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fxsave64-mem,38.0,None,"(21.0,0.0,13.5,19.666666666666668,19.666666666666668,38.0,13.0,9.5,0.6666666666666666)" +andnps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andnps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +ldmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.0,0.5,0.0)" +orps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +orps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divss-xmm_xmm,5,None,"(0.3333333333333333,5,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtss-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtss-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +xorps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +xorps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +subps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +minss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +minss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +addps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_r64,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,30.166666666666668,None,"(29.166666666666668,0.0,11.166666666666666,19.5,19.5,0.0,30.166666666666668,9.5,0.0)" +fxsave-mem,38.0,None,"(20.75,0.0,13.25,19.666666666666668,19.666666666666668,38.0,12.75,9.25,0.6666666666666666)" +sqrtps-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtps-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +minps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +andps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +fxrstor-mem,30.166666666666668,None,"(29.166666666666668,0.0,11.166666666666666,19.5,19.5,0.0,30.166666666666668,9.5,0.0)" +stmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +maxps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +maxps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +comiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +maxss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +divpd-xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divpd-xmm_xmm,8,None,"(0.5,8,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pcmpgtw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.0,2.0,2.0,2.0,2.0,0.5,0.0)" +andnpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andnpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psubd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psadbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmullw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +divsd-xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divsd-xmm_xmm,8,None,"(0.3333333333333333,8,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pcmpeqw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +orpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +orpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cmppd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cmppd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movq2dq-xmm_mmx,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +psubb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psubusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psubw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaxsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +paddd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cmpsd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpsd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +minsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +minsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cvtsd2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsd2ss-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +pslld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtsd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtsd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r64,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psllq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psubusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmulhw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cvtss2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2sd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +xorpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +xorpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +maxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +maxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +minpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +minpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psrld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +subsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +lfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2pi-mmx_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +mfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maxpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +maxpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +psubsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +comisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pcmpgtw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packuswb-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +psubd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psadbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packssdw-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pxor-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pxor-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +por-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pandn-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pandn-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pminsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +emms-,5.5,None,"(5.5,0.0,0.0,0.0,0.0,0.0,4.0,0.5,0.0)" +punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pand-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pminub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +psubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maskmovq-mmx_mmx,2.0,None,"(2.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packsswb-mmx_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +repe scasq-,7.333333333333333,None,"(7.333333333333333,0.0,4.333333333333333,0.3333333333333333,0.3333333333333333,0.0,3.333333333333333,5.0,0.3333333333333333)" +cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep lodsq-,7.0,None,"(7.0,0.0,4.0,0.3333333333333333,0.3333333333333333,0.0,3.0,5.0,0.3333333333333333)" +repne cmpsq-,8.0,None,"(8.0,0.0,4.5,0.8333333333333333,0.8333333333333333,0.0,3.5,5.0,0.3333333333333333)" +movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +pushfq-,1.0,None,"(0.5,0.0,1.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +rep movsq-,15.0,None,"(15.0,0.0,9.0,2.0,2.0,0.0,10.5,11.5,0.0)" +movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep stosq-,17.5,None,"(17.5,0.0,13.0,4.0,4.0,0.0,15.0,10.5,0.0)" +swapgs-,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +repne scasq-,6.833333333333333,None,"(6.833333333333333,0.0,4.333333333333333,0.3333333333333333,0.3333333333333333,0.0,3.333333333333333,4.5,0.3333333333333333)" +popfq-,1.5,None,"(1.5,0.0,1.5,0.5,0.5,0.0,0.5,1.5,0.0)" +stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +cmpxchg16b-mem,7.5,None,"(7.5,0.0,2.0,1.0,1.0,1.0,6.0,4.5,0.0)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +repe cmpsq-,8.0,None,"(8.0,0.0,4.5,0.8333333333333333,0.8333333333333333,0.0,3.5,5.0,0.3333333333333333)" +lock cmpxchg16b-mem,9.166666666666668,None,"(9.166666666666668,0.0,1.6666666666666667,1.0,1.0,1.0,7.166666666666667,4.0,0.0)" +bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +roundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +roundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mpsadbw-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +mpsadbw-xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmulld-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulld-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)" +pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)" +rex.w pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)" +rex.w pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)" +pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)" +pcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)" +rex.w pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)" +rex.w pcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)" +pmuldq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuldq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +dpps-xmm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)" +dpps-xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +blendvps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendvps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +blendvpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendvpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +roundss-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundss-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +roundsd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundsd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendvb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pblendvb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +phsubd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phsubd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phsubw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +psignw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psignw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psignw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psignd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psignd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psignd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psignb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psignb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psignb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +phaddsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phaddsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +phaddsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +phsubsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phsubsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +phsubsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +pabsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phaddd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pabsd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phaddw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +addsubps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +hsubpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +haddpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +haddpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +haddps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +haddps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +rdtscp-,7.5,None,"(7.5,0.0,6.0,0.0,0.0,0.0,3.0,3.5,0.0)" +aesdec-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesdec-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aeskeygenassist-xmm_xmm_imd,7.0,None,"(5.5,0.0,0.0,0.0,0.0,0.0,7.0,0.5,0.0)" +aeskeygenassist-xmm_mem_imd,6.0,None,"(5.5,0.0,0.0,0.5,0.5,0.0,6.0,0.5,0.0)" +aesenclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesenclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesdeclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesdeclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesenc-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesenc-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +clflushopt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rdseed-,7.0,None,"(7.0,0.0,4.5,0.5,0.5,0.0,0.5,4.0,0.0)" +rdseed-r32,6.25,None,"(6.25,0.0,3.25,0.5,0.5,0.0,1.25,4.25,0.0)" +rdseedl-r32,6.25,None,"(6.25,0.0,3.25,0.5,0.5,0.0,1.25,4.25,0.0)" +rdseed-r64,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)" +rdseedq-r64,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)" +movbe-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r64_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +movbeq-r64_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +movbe-mem,1.0,None,"(0.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)" +movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.0,0.3333333333333333)" +movbe-mem_r64,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.5,0.3333333333333333)" +movbeq-mem_r64,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.5,0.5,0.3333333333333333)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +clflush-mem,1.0,None,"(0.5,0.0,1.0,0.5,0.5,1.0,0.0,0.5,0.0)" +rdrand-,6.916666666666666,None,"(6.916666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,1.4166666666666665,3.25,0.0)" +rdrand-r32,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)" +rdrandl-r32,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)" +rdrand-r64,6.833333333333333,None,"(6.833333333333333,0.0,2.3333333333333335,0.5,0.5,0.0,1.8333333333333333,4.0,0.0)" +rdrandq-r64,6.833333333333333,None,"(6.833333333333333,0.0,2.3333333333333335,0.5,0.5,0.0,1.8333333333333333,4.0,0.0)" +pause-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhaddpd-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhaddpd-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhaddpd-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhaddpd-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vstmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.5,0.3333333333333333)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vsqrtsd-xmm_xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsqrtss-xmm_xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendvb-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vpblendvb-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vzeroall-,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,2.0,3.0,0.0)" +vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,16,None,"(1.0,16,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_ymm,16,None,"(1.0,16,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vdivps-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,10,None,"(1.0,10,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_ymm,10,None,"(1.0,10,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vldmxcsr-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.0,0.5,0.0)" +vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvpd-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_ymm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vsqrtpd-xmm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_xmm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_ymm,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)" +vdpps-xmm_xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.5,0.5,0.5,0.0,1.0,0.5,0.0)" +vdpps-ymm_ymm_ymm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaskmovpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaskmovps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vroundsd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundsd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhsubpd-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhsubpd-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhsubpd-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhsubpd-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vhsubps-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhsubps-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhsubps-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhsubps-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhaddps-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhaddps-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vhaddps-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vhaddps-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vcmpps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphaddsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvps-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)" +vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)" +rex.w vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.0,0.5,0.0)" +rex.w vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.0,0.5,0.0)" +vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)" +vpcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)" +rex.w vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,3.0,0.5,0.0)" +rex.w vpcmpestrm-xmm_xmm_imd,4.0,None,"(3.5,0.0,1.0,0.0,0.0,0.0,4.0,0.5,0.0)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vzeroupper-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendps-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendps-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendps-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendps-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,1.0,0.0,0.3333333333333333)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vroundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.0,2.0,2.0,2.0,2.0,0.5,0.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphsubsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvttsd2si-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2sil-r32_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r32_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2siq-r64_mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_xmm,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_ymm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendvb-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vpblendvb-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphaddsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphsubw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphsubsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtps2ph-mem_xmm_imd,1.0,None,"(0.5,0.0,0.5,0.3333333333333333,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +vcvtps2ph-xmm_xmm_imd,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtps2ph-mem_ymm_imd,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvtps2ph-xmm_ymm_imd,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vgatherqpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherqpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherqps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherqps-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherdps-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherdps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherdpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherdpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherqq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherdd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vaesdec-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesdec-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesdeclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesdeclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesenc-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesenc-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesenclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesenclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaeskeygenassist-xmm_xmm_imd,7.0,None,"(5.5,0.0,0.0,0.0,0.0,0.0,7.0,0.5,0.0)" +vaeskeygenassist-xmm_mem_imd,6.0,None,"(5.5,0.0,0.0,0.5,0.5,0.0,6.0,0.5,0.0)" +shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" diff --git a/osaca/data/bdw_data.csv b/osaca/data/bdw_data.csv index d5ffdba..617a459 100644 --- a/osaca/data/bdw_data.csv +++ b/osaca/data/bdw_data.csv @@ -1,39 +1,3845 @@ instr,TP,LT,ports -jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" - +sldt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sldt-,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldt-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldtl-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldt-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldtq-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +lgdt-mem,6.5,None,"(6.5,0.0,5.0,0.0,0.0,1.0,0.0,4.5,0.0)" +call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-LBL,17.833333333333332,None,"(17.833333333333332,0.0,4.833333333333333,1.0,1.0,2.0,10.833333333333334,14.5,0.0)" +mov-LBL,12.166666666666666,None,"(12.166666666666666,0.0,3.6666666666666665,0.0,0.0,0.0,5.666666666666666,8.5,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wrmsr-,39.5,None,"(39.5,0.0,20.0,0.0,0.0,1.0,20.0,26.5,0.0)" +repe scasb-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lar-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +larl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +larq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)" +lar-r32_r32,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)" +larl-r32_r32,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)" +lar-r64_r64,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)" +larq-r64_r64,2.75,None,"(1.75,0.0,2.75,0.5,0.5,0.0,0.75,1.75,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-mem,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +cmovbe-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovbe-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovbel-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovbe-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovbeq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovbe-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovbe-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovbel-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovbe-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovbeq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lsl-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lslq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-,4.0,None,"(4.0,0.0,3.6666666666666665,1.0,1.0,0.0,2.0,3.3333333333333335,0.0)" +lsl-r32_r32,4.0,None,"(4.0,0.0,3.6666666666666665,1.0,1.0,0.0,2.0,3.3333333333333335,0.0)" +lsl-r64_r32,4.0,None,"(4.0,0.0,3.6666666666666665,1.0,1.0,0.0,2.0,3.3333333333333335,0.0)" +lahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpsw-,1.0,None,"(0.8333333333333333,0.0,0.5,1.0,1.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock adc-mem_imd,1.5833333333333333,None,"(1.5833333333333333,0.0,0.75,1.0,1.0,1.0,1.0833333333333333,1.5833333333333333,0.0)" +lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock adc-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock adc-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adcb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adcl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adcq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +cmpsb-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,0.0,0.5833333333333333,0.5833333333333333,0.0)" +cmpsd-,1.0,None,"(0.8333333333333333,0.0,0.5,1.0,1.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +out-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +outb-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +outl-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-r16_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-r16_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lodsb-,0.5833333333333333,None,"(0.5833333333333333,0.0,0.25,0.5,0.5,0.0,0.5833333333333333,0.5833333333333333,0.0)" +lodsw-,0.5833333333333333,None,"(0.5833333333333333,0.0,0.25,0.5,0.5,0.0,0.5833333333333333,0.5833333333333333,0.0)" +lodsd-,0.5,None,"(0.3333333333333333,0.0,0.0,0.5,0.5,0.0,0.3333333333333333,0.3333333333333333,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +std-,1.75,None,"(1.75,0.0,1.25,0.0,0.0,0.0,1.25,1.75,0.0)" +stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sar-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sarb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sar-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sarb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sar-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sar-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sti-,2.3333333333333335,None,"(2.3333333333333335,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,2.3333333333333335,0.0)" +str-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rdmsr-,23.5,None,"(23.5,0.0,14.5,0.0,0.0,0.0,10.5,19.5,0.0)" +rep lodsb-,4.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,0.0,4.0,0.0)" +lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +idiv-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)" +idiv-r8,12,None,"(2.8333333333333335,12,2.5,0.0,0.0,0.0,2.833333333333333,0.8333333333333333,0.0)" +idivb-r8,12,None,"(2.8333333333333335,12,2.5,0.0,0.0,0.0,2.833333333333333,0.8333333333333333,0.0)" +idiv-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)" +idiv-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)" +idiv-r32,24.25,None,"(24.25,0.0,14.75,0.0,0.0,0.0,14.75,12.25,0.0)" +idivl-r32,24.25,None,"(24.25,0.0,14.75,0.0,0.0,0.0,14.75,12.25,0.0)" +idiv-r64,24.25,None,"(24.25,0.0,14.75,0.0,0.0,0.0,14.75,12.25,0.0)" +idivq-r64,24.25,None,"(24.25,0.0,14.75,0.0,0.0,0.0,14.75,12.25,0.0)" +repne cmpsb-,4.5,None,"(4.5,0.0,1.0,0.0,0.0,0.0,1.0,4.5,0.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shr-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shr-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shr-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shr-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrdl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrdq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shrdb-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shrd-mem_r32_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shrd-mem_r64_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shrd-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shrdb-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shrd-r32_r32_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shrd-r64_r64_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +movsd-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,1.0,0.5833333333333333,0.5833333333333333,0.0)" +movsb-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,1.0,0.5833333333333333,0.5833333333333333,0.0)" +movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsw-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,1.0,0.5833333333333333,0.5833333333333333,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shl-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shlb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shl-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shlb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shl-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shl-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +mov-r64_r8,4.083333333333333,None,"(4.083333333333333,0.0,0.25,0.0,0.0,0.0,1.5833333333333333,4.083333333333333,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-mem,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)" +bts-mem_r32,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)" +btsl-mem_r32,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)" +bts-mem_r64,2.083333333333333,None,"(2.083333333333333,0.0,1.25,1.0,1.0,1.0,0.5833333333333333,2.083333333333333,0.0)" +btsq-mem_r64,2.083333333333333,None,"(2.083333333333333,0.0,1.25,1.0,1.0,1.0,0.5833333333333333,2.083333333333333,0.0)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)" +btr-mem_r32,2.4166666666666665,None,"(2.4166666666666665,0.0,1.25,1.0,1.0,1.0,0.9166666666666666,2.4166666666666665,0.0)" +btrl-mem_r32,2.4166666666666665,None,"(2.4166666666666665,0.0,1.25,1.0,1.0,1.0,0.9166666666666666,2.4166666666666665,0.0)" +btr-mem_r64,2.333333333333333,None,"(2.333333333333333,0.0,1.5,1.0,1.0,1.0,0.8333333333333333,2.333333333333333,0.0)" +btrq-mem_r64,2.333333333333333,None,"(2.333333333333333,0.0,1.5,1.0,1.0,1.0,0.8333333333333333,2.333333333333333,0.0)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sgdt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +loop-LBL,2.5,None,"(2.5,0.0,1.0,0.0,0.0,0.0,1.0,2.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-mem,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,1.0,1.0,1.0,1.1666666666666665,2.6666666666666665,0.0)" +btc-mem_r32,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,1.5,2.5,0.0)" +btcl-mem_r32,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,1.5,2.5,0.0)" +btc-mem_r64,2.333333333333333,None,"(2.333333333333333,0.0,1.5,1.0,1.0,1.0,0.8333333333333333,2.333333333333333,0.0)" +btcq-mem_r64,2.333333333333333,None,"(2.333333333333333,0.0,1.5,1.0,1.0,1.0,0.8333333333333333,2.333333333333333,0.0)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wbinvd-,132280.0,None,"(106397.0,1,113334.0,0.0,0.0,132280.0,38340.0,27655.0,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cli-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cld-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +clc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lldt-mem,4.5,None,"(4.5,0.0,3.0,1.5,1.5,1.0,0.0,4.5,0.0)" +lldt-,3.8333333333333335,None,"(3.8333333333333335,0.0,3.0,1.0,1.0,1.0,0.3333333333333333,3.8333333333333335,0.0)" +ret-imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +ret-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock subl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock subq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btc-mem,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)" +lock btc-mem_r32,3.75,None,"(3.75,0.0,1.5833333333333333,1.0,1.0,2.0,1.25,3.4166666666666665,0.0)" +lock btcl-mem_r32,3.75,None,"(3.75,0.0,1.5833333333333333,1.0,1.0,2.0,1.25,3.4166666666666665,0.0)" +lock btc-mem_r64,3.5,None,"(3.5,0.0,2.0,1.0,1.0,2.0,1.0,2.5,0.0)" +lock btcq-mem_r64,3.5,None,"(3.5,0.0,2.0,1.0,1.0,2.0,1.0,2.5,0.0)" +setnbe-mem,1.0,None,"(0.75,0.0,0.25,0.5,0.5,1.0,0.25,0.75,0.0)" +setnbe-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +setnbeb-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +verr-mem,17.0,None,"(14.5,0.0,11.0,0.0,0.0,0.0,17.0,1.5,0.0)" +verr-,5.0,None,"(3.5,0.0,5.0,0.0,0.0,0.0,3.0,1.5,0.0)" +rep stosb-,7.5,None,"(7.5,0.0,2.0,0.0,0.0,0.0,2.0,5.5,0.0)" +cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock andb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock andl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock andq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rdpmc-,13.333333333333332,None,"(13.333333333333332,0.0,6.833333333333333,0.0,0.0,0.0,5.333333333333333,8.5,0.0)" +lock cmpxchg-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchg-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchg-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ret far-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock orb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock orl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock orq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +enter-imd_imd,1.75,None,"(1.25,0.0,1.75,0.5,0.5,1.0,0.75,1.25,0.0)" +repne scasb-,10.166666666666666,None,"(10.166666666666666,0.0,6.166666666666666,1.5,1.5,0.0,6.166666666666666,6.5,0.0)" +leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xadd-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddb-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddl-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddq-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lidt-mem,6.5,None,"(6.5,0.0,5.0,0.0,0.0,1.0,0.0,4.5,0.0)" +xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xchg-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchgb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchgb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +lock xchg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchg-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchgl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchg-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchgq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchgl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchgq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchg-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchgl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchg-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchgq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchg-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchgl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchg-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchgq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchg-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchgl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchg-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +xchgq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.5,0.0,0.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +smsw-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +smsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smsw-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smswl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smsw-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smswq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +mov-r32,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +movl-r32,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +mov-r64,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +movq-r64,1.0,None,"(0.3333333333333333,0.0,1.0,0.0,0.0,0.0,0.3333333333333333,0.3333333333333333,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cpuid-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)" +rdtsc-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock addb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock addl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock addq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +sidt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock sbb-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock sbb-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock sbb-mem_imd,1.6666666666666665,None,"(1.6666666666666665,0.0,0.5,1.0,1.0,1.0,1.1666666666666665,1.6666666666666665,0.0)" +lock sbb-mem_imd,2.0,None,"(2.0,0.0,0.6666666666666666,1.0,1.0,1.0,1.0,1.3333333333333333,0.0)" +lock sbb-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock sbb-mem_imd,1.8333333333333333,None,"(1.8333333333333333,0.0,0.5,1.0,1.0,1.0,0.8333333333333333,1.8333333333333333,0.0)" +lock sbb-mem_imd,1.9166666666666665,None,"(1.9166666666666665,0.0,0.25,1.0,1.0,1.0,0.9166666666666666,1.9166666666666665,0.0)" +lock sbb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbbl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbbq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +insb-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +insd-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcr-r8_r8,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,1.5,2.5,0.0)" +rcrb-r8_r8,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,1.5,2.5,0.0)" +rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcr-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcrb-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcr-r32_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcr-r64_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcl-r8_r8,2.75,None,"(2.75,0.0,2.25,0.0,0.0,0.0,1.25,2.75,0.0)" +rclb-r8_r8,2.75,None,"(2.75,0.0,2.25,0.0,0.0,0.0,1.25,2.75,0.0)" +rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcl-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rclb-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcl-r32_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcl-r64_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +insw-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +div-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)" +div-r8,12,None,"(2.75,12,2.25,0.0,0.0,0.0,2.25,0.75,0.0)" +divb-r8,12,None,"(2.75,12,2.25,0.0,0.0,0.0,2.25,0.75,0.0)" +div-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)" +div-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)" +div-r32,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)" +divl-r32,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)" +div-r64,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)" +divq-r64,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)" +stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rep movsb-,8.0,None,"(8.0,0.0,2.0,0.0,0.0,0.0,3.0,6.0,0.0)" +in-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +inb-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +inl-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r8_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r32_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem,2.9166666666666665,None,"(2.9166666666666665,0.0,1.75,0.5,0.5,0.0,1.4166666666666665,2.9166666666666665,0.0)" +bt-mem_r32,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,0.5,0.5,0.0,1.1666666666666665,2.6666666666666665,0.0)" +btl-mem_r32,2.6666666666666665,None,"(2.6666666666666665,0.0,1.5,0.5,0.5,0.0,1.1666666666666665,2.6666666666666665,0.0)" +bt-mem_r64,2.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,0.5,0.5,0.0,1.3333333333333333,1.5,0.0)" +btq-mem_r64,2.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,0.5,0.5,0.0,1.3333333333333333,1.5,0.0)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +shld-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shldl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shldq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shldb-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shld-mem_r32_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shld-mem_r64_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shld-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shldb-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shld-r32_r32_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shld-r64_r64_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +invlpg-mem,14.833333333333332,None,"(14.833333333333332,0.0,6.333333333333333,2.5,2.5,5.0,8.333333333333334,7.5,0.0)" +sahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lmsw-mem,7.25,None,"(7.25,0.0,4.75,1.0,1.0,1.0,5.25,5.75,0.0)" +lmsw-,6.166666666666666,None,"(6.166666666666666,0.0,2.0,0.5,0.5,1.0,5.666666666666666,5.166666666666667,0.0)" +lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock bts-mem,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)" +lock bts-mem_r32,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)" +lock btsl-mem_r32,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)" +lock bts-mem_r64,3.4166666666666665,None,"(3.4166666666666665,0.0,1.5833333333333333,1.0,1.0,2.0,0.9166666666666665,3.083333333333333,0.0)" +lock btsq-mem_r64,3.4166666666666665,None,"(3.4166666666666665,0.0,1.5833333333333333,1.0,1.0,2.0,0.9166666666666665,3.083333333333333,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xorb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xorl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xorq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +repe cmpsb-,4.5,None,"(4.5,0.0,1.0,0.0,0.0,0.0,1.0,4.5,0.0)" +clts-,2.3333333333333335,None,"(2.3333333333333335,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,2.0,0.0)" +movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rol-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rolb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rol-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rolb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rol-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rol-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +verw-mem,17.0,None,"(14.5,0.0,11.0,0.0,0.0,0.0,17.0,1.5,0.0)" +verw-,4.0,None,"(3.5,0.0,4.0,0.0,0.0,0.0,4.0,1.5,0.0)" +jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rorb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rorb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +ror-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +ror-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbe-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnbe-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnbel-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnbe-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnbeq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnbe-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnbe-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnbel-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnbe-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnbeq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +subl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +subq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmpxchg8b-mem,3.25,None,"(3.25,0.0,2.25,1.0,1.0,1.0,2.25,3.25,0.0)" +lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btr-mem,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)" +lock btr-mem_r32,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)" +lock btrl-mem_r32,3.6666666666666665,None,"(3.6666666666666665,0.0,1.5,1.0,1.0,2.0,1.1666666666666665,3.6666666666666665,0.0)" +lock btr-mem_r64,3.4166666666666665,None,"(3.4166666666666665,0.0,1.5833333333333333,1.0,1.0,2.0,0.9166666666666665,3.083333333333333,0.0)" +lock btrq-mem_r64,3.4166666666666665,None,"(3.4166666666666665,0.0,1.5833333333333333,1.0,1.0,2.0,0.9166666666666665,3.083333333333333,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock cmpxchg8b-mem,3.75,None,"(3.75,0.0,2.75,1.0,1.0,1.0,2.75,3.75,0.0)" +cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lea-mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setbe-mem,1.0,None,"(0.75,0.0,0.25,0.5,0.5,1.0,0.25,0.75,0.0)" +setbe-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +setbeb-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +bswap-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapl-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +jmp far-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +divps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxsave64-mem,38.0,None,"(19.166666666666664,0.0,13.0,20.0,20.0,38.0,21.166666666666668,8.666666666666666,0.0)" +andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,19.166666666666668,None,"(19.166666666666668,0.0,16.166666666666668,15.5,15.5,0.0,14.166666666666668,7.5,0.0)" +fxsave-mem,38.0,None,"(19.166666666666664,0.0,13.0,20.0,20.0,38.0,21.166666666666668,8.666666666666666,0.0)" +sqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fxrstor-mem,18.666666666666668,None,"(18.666666666666668,0.0,16.666666666666668,16.5,16.5,0.0,14.666666666666668,7.0,0.0)" +stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +comiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divpd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divpd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pcmpgtw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpgtb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpgtd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maskmovdqu-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psubd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psadbw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmullw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divsd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divsd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq2dq-xmm_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psubb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pslld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pslld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtsd-xmm_mem,13,None,"(1.0,13,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtsd-xmm_xmm,13,None,"(1.0,13,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psllw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psllq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psllq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psubusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,13,None,"(1.0,13,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_xmm,13,None,"(1.0,13,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmulhw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtss2sd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2sd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psrlq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psrlw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psrld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +cvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,0.8333333333333333,None,"(0.8333333333333333,0.0,0.8333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pminub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pavgw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pavgw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psubsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pavgb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pavgb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psraw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psraw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +comisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psrad-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldl2t-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldl2e-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fyl2x-,4.5,None,"(4.5,0.0,4.5,0.0,0.0,0.0,0.5,1.5,0.0)" +faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxtract-,2.5,None,"(0.5,0.0,2.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcompp-,1.5,None,"(0.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fyl2xp1-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +frndint-,7.75,None,"(7.75,0.0,6.75,0.0,0.0,0.0,1.75,1.75,0.0)" +fnclex-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,1.0,0.0)" +fptan-,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fcos-,9.5,None,"(9.5,0.0,6.0,0.0,0.0,0.0,3.0,2.5,0.0)" +fscale-,2.75,None,"(2.25,0.0,2.75,0.0,0.0,0.0,0.75,1.25,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fxam-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fprem1-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fninit-,7.5,None,"(3.0,0.0,3.0,0.0,0.0,0.0,7.5,1.5,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fnop-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fldpi-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fnstsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fnstsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +fwait-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +f2xm1-,5.25,None,"(5.25,0.0,3.75,0.0,0.0,0.0,0.75,2.25,0.0)" +fprem-,2.25,None,"(2.25,0.0,2.25,0.0,0.0,0.0,0.25,0.25,0.0)" +fincstp-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldenv-mem,18.833333333333332,None,"(18.833333333333332,0.0,15.833333333333332,4.0,4.0,0.0,12.833333333333332,8.5,0.0)" +fldenv-mem,18.833333333333332,None,"(18.833333333333332,0.0,15.833333333333332,4.0,4.0,0.0,12.833333333333332,8.5,0.0)" +fpatan-,31.0,None,"(31.0,0.0,13.5,0.0,0.0,0.0,5.5,5.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsin-,10.75,None,"(10.75,0.0,5.75,0.0,0.0,0.0,2.75,2.75,0.0)" +fldcw-mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldln2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxch-fpu,5.25,None,"(5.25,0.0,2.25,0.0,0.0,0.0,1.25,3.25,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdecstp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldlg2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldz-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fbstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fucompp-,1.5,None,"(0.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fnstenv-mem,28.833333333333332,None,"(28.833333333333332,0.0,18.833333333333332,5.5,5.5,11.0,17.333333333333332,13.0,0.0)" +fnstenv-mem,28.833333333333332,None,"(28.833333333333332,0.0,18.833333333333332,5.5,5.5,11.0,17.333333333333332,13.0,0.0)" +fld1-,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fsincos-,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fnstcw-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pcmpgtw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpgtb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpgtd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packuswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +psubd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psadbw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packssdw-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pxor-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psubb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pandn-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +emms-,12.583333333333332,None,"(9.583333333333332,0.0,12.583333333333332,0.0,0.0,0.0,8.583333333333332,0.25,0.0)" +punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaxub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +psubsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pavgw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pavgw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pavgb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pavgb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +maskmovq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packsswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +repe scasq-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)" +cmpsq-,1.0,None,"(0.8333333333333333,0.0,0.5,1.0,1.0,0.0,0.8333333333333333,0.8333333333333333,0.0)" +lodsq-,0.5,None,"(0.3333333333333333,0.0,0.0,0.5,0.5,0.0,0.3333333333333333,0.3333333333333333,0.0)" +cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep lodsq-,4.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,0.0,4.0,0.0)" +syscall-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +repne cmpsq-,3.0,None,"(3.0,0.0,2.0,0.5,0.5,0.0,2.0,3.0,0.0)" +movsq-,1.0,None,"(0.5833333333333333,0.0,0.25,1.0,1.0,1.0,0.5833333333333333,0.5833333333333333,0.0)" +pushfq-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rep movsq-,16.0,None,"(11.166666666666666,0.0,7.833333333333333,16.0,16.0,16.0,7.166666666666667,6.833333333333334,0.0)" +movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep stosq-,16.0,None,"(10.833333333333332,0.0,7.166666666666666,8.0,8.0,16.0,7.833333333333333,6.166666666666666,0.0)" +swapgs-,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +repne scasq-,4.5,None,"(4.5,0.0,1.0,0.0,0.0,0.0,1.0,4.5,0.0)" +popfq-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +repe cmpsq-,4.5,None,"(4.5,0.0,1.0,0.0,0.0,0.0,1.0,4.5,0.0)" +iretq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lock cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)" +bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +roundpd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundpd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +roundps-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundps-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mpsadbw-xmm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +mpsadbw-xmm_xmm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmulld-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulld-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pminsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +rex.w pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +rex.w pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +rex.w pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +rex.w pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +pmuldq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuldq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +dpps-xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +dpps-xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pminud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +blendvps-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +blendvps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +blendvpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +blendvpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +roundss-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundss-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +roundsd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundsd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendvb-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +pblendvb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +phsubd-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubd-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubd-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubd-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +psignw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +phaddsw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddsw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddsw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddsw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubsw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubsw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubsw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubsw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +pabsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +phaddd-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddd-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddd-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddd-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pabsd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +phaddw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vmclear-mem,4.5,None,"(3.5,0.0,3.5,1.0,1.0,1.0,4.5,3.5,0.0)" +vmptrst-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +xsetbv-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)" +xgetbv-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +xrstor-mem,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,4.0,4.5,0.0)" +xrstor64-mem,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,4.0,4.5,0.0)" +xsave-mem,8.5,None,"(8.5,0.0,5.5,1.0,1.0,1.0,5.5,5.5,0.0)" +xsave64-mem,7.916666666666666,None,"(7.916666666666666,0.0,5.416666666666666,1.0,1.0,1.0,5.416666666666666,5.25,0.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +rdtscp-,7.333333333333333,None,"(5.333333333333333,0.0,5.333333333333333,0.0,0.0,0.0,7.333333333333333,4.0,0.0)" +aesdec-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +aesdec-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +aeskeygenassist-xmm_xmm_imd,7.666666666666667,None,"(2.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,7.666666666666667,0.0,0.0)" +aeskeygenassist-xmm_mem_imd,7.333333333333333,None,"(2.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,7.333333333333333,0.0,0.0)" +aesenclast-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +aesenclast-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +aesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +aesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +aesdeclast-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +aesdeclast-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +aesenc-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +aesenc-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +xsaveopt64-mem,9.75,None,"(9.75,0.0,6.75,1.0,1.0,1.0,6.75,5.75,0.0)" +xsaveopt-mem,8.5,None,"(8.5,0.0,5.5,1.0,1.0,1.0,5.5,5.5,0.0)" +clac-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mwait-,2.75,None,"(2.75,0.0,1.75,0.0,0.0,0.0,2.75,2.75,0.0)" +rdseed-,4.166666666666667,None,"(4.166666666666667,0.0,2.8333333333333335,0.5,0.5,0.0,3.1666666666666665,3.8333333333333335,0.0)" +rdseed-r32,5.0,None,"(5.0,0.0,2.3333333333333335,0.5,0.5,0.0,3.0,3.6666666666666665,0.0)" +rdseedl-r32,5.0,None,"(5.0,0.0,2.3333333333333335,0.5,0.5,0.0,3.0,3.6666666666666665,0.0)" +rdseed-r64,5.333333333333333,None,"(5.333333333333333,0.0,1.6666666666666665,0.5,0.5,0.0,3.333333333333333,3.6666666666666665,0.0)" +rdseedq-r64,5.333333333333333,None,"(5.333333333333333,0.0,1.6666666666666665,0.5,0.5,0.0,3.333333333333333,3.6666666666666665,0.0)" +movbe-mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbeq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-mem,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbe-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbeq-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pclmulqdq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pclmulqdq-xmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +clflush-mem,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +rdrand-,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)" +rdrand-r32,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)" +rdrandl-r32,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)" +rdrand-r64,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)" +rdrandq-r64,1.25,None,"(1.25,0.0,0.75,0.5,0.5,0.0,0.75,1.25,0.0)" +pause-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)" +vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vandpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vandps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vandps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vstmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vaddsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vsqrtsd-xmm_xmm_mem,13,None,"(1.0,13,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,13,None,"(1.0,13,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsqrtss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendvb-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpblendvb-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vzeroall-,16.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,16.0,0.0,0.0)" +vcomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_xmm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,16,None,"(2.5,16,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_ymm,16,None,"(2.5,16,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_xmm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,10,None,"(2.5,10,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_ymm,10,None,"(2.5,10,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +vpslld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvpd-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vblendvpd-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vblendvpd-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vblendvpd-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsllw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsubsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,14,None,"(2.5,14,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_ymm,14,None,"(2.5,14,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddd-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddd-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vsqrtpd-xmm_mem,13,None,"(1.0,13,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_xmm,13,None,"(1.0,13,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,26,None,"(2.5,26,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_ymm,26,None,"(2.5,26,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdpps-xmm_xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdpps-ymm_ymm_ymm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaskmovpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmaskmovpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaskmovps-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmaskmovps-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsignb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsignd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vxorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vxorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vxorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vroundsd-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundsd-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vxorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vxorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vxorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vhsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddsw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vminsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendvps-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vblendvps-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vblendvps-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vblendvps-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +rex.w vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +rex.w vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +rex.w vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +rex.w vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vzeroupper-,1.0833333333333333,None,"(1.0833333333333333,0.0,1.0833333333333333,0.0,0.0,0.0,1.0833333333333333,0.75,0.0)" +vandnps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandnps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vandnps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandnps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vandnpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandnpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vandnpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandnpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vblendpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vblendpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vblendps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vblendps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_ymm,2.5,None,"(2.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubd-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubd-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsrlw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2pd-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsadbw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-ymm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-ymm_ymm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-ymm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-ymm_ymm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpps-ymm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-ymm_ymm,2.5,None,"(2.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaskmovdqu-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddwd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubsw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpavgw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpavgw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpavgb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpavgb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaxsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrlvd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrlvd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpminsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpminsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxub-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxub-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendvb-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpblendvb-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsrad-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddd-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddd-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpmuldq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsignb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddusw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddusw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddusb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsignd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastw-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsravd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsravd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpabsw-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsw-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vphaddsw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddsw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpsubusb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubusb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubusw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpabsb-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsb-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vphsubw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vphsubd-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubd-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmulld-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxud-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaxuw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsrlw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaskmovq-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpmaskmovq-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaskmovd-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpmaskmovd-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpsadbw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsadbw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpblendd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpblendd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminuw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminub-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminud-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddwd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsd-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubsw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpsllvd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllvd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllvd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2ph-mem_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvtps2ph-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtps2ph-mem_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvtps2ph-xmm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vgatherqpd-ymm_mem_ymm,3.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,3.25,0.25,0.0)" +vgatherqpd-xmm_mem_xmm,3.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,3.25,0.25,0.0)" +vgatherqps-xmm_mem_xmm,5.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,5.25,0.25,0.0)" +vgatherqps-xmm_mem_xmm,5.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,5.25,0.25,0.0)" +vgatherdps-ymm_mem_ymm,4.25,None,"(0.25,0.0,0.25,4.0,4.0,1.0,4.25,0.25,0.0)" +vgatherdps-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,4.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,4.25,0.25,0.0)" +vpgatherqd-xmm_mem_xmm,4.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,4.25,0.25,0.0)" +vgatherdpd-ymm_mem_ymm,3.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,3.25,0.25,0.0)" +vgatherdpd-xmm_mem_xmm,3.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,3.25,0.25,0.0)" +vpgatherqq-ymm_mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherqq-xmm_mem_xmm,3.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,3.25,0.25,0.0)" +vpgatherdd-ymm_mem_ymm,4.25,None,"(0.25,0.0,0.25,4.0,4.0,1.0,4.25,0.25,0.0)" +vpgatherdd-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherdq-ymm_mem_ymm,3.25,None,"(0.25,0.0,0.25,2.0,2.0,1.0,3.25,0.25,0.0)" +vpgatherdq-xmm_mem_xmm,3.25,None,"(0.25,0.0,0.25,1.0,1.0,1.0,3.25,0.25,0.0)" +vaesdec-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaesdec-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaesdeclast-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaesdeclast-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vaesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vaesenc-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaesenc-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaesenclast-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaesenclast-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaeskeygenassist-xmm_xmm_imd,7.666666666666667,None,"(2.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,7.666666666666667,0.0,0.0)" +vaeskeygenassist-xmm_mem_imd,7.333333333333333,None,"(2.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,7.333333333333333,0.0,0.0)" +shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" diff --git a/osaca/data/hsw_data.csv b/osaca/data/hsw_data.csv index d5ffdba..6bcab5d 100644 --- a/osaca/data/hsw_data.csv +++ b/osaca/data/hsw_data.csv @@ -1,39 +1,3844 @@ instr,TP,LT,ports -jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0, 0, 0)" - +sldt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sldt-,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldt-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldtl-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldt-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldtq-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +lgdt-mem,10.0,None,"(2.0,0.0,4.0,0.0,0.0,1.0,0.0,10.0,0.0)" +call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-LBL,24.0,None,"(9.333333333333334,0.0,3.8333333333333335,1.0,1.0,2.0,10.833333333333334,24.0,0.0)" +mov-LBL,11.0,None,"(11.0,0.0,3.0,0.0,0.0,0.0,6.0,10.0,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wrmsr-,43.5,None,"(20.5,0.0,23.5,0.0,0.0,1.0,19.5,43.5,0.0)" +repe scasb-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lar-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +larl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +larq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +lar-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +larl-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +lar-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +larq-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-mem,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +cmovbe-mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovbe-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovle-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovle-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovlel-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovle-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovleq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovle-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovle-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovlel-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovle-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovleq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lsl-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lslq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-,6.5,None,"(1.5,0.0,3.5,1.0,1.0,0.0,1.5,6.5,0.0)" +lsl-r32_r32,6.5,None,"(1.5,0.0,3.5,1.0,1.0,0.0,1.5,6.5,0.0)" +lsl-r64_r32,6.5,None,"(1.5,0.0,3.5,1.0,1.0,0.0,1.5,6.5,0.0)" +lahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpsw-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock adc-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adcb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adcl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adcq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +cmpsd-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock dec-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +out-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +outb-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +outl-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-r16_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-r16_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +cmovnle-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnle-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnlel-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnle-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnleq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnle-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnle-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnlel-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnle-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnleq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-r8_r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r8_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +sbb-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +sbb-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +sbbl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +sbb-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +sbbq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbbq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lodsw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lodsd-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +std-,1.75,None,"(1.75,0.0,1.25,0.0,0.0,0.0,1.25,1.75,0.0)" +stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sar-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sarb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sar-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sarb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sar-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sarb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sar-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sar-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sti-,3.75,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,3.75,0.0)" +str-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rdmsr-,30.0,None,"(14.0,0.0,12.0,0.0,0.0,0.0,9.0,30.0,0.0)" +rep lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock not-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +idiv-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)" +idiv-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,2.5,1.5,0.0)" +idivb-r8,2.5,None,"(2.5,0.0,2.5,0.0,0.0,0.0,2.5,1.5,0.0)" +idiv-mem,3.0,None,"(2.5,0.0,3.0,0.5,0.5,0.0,3.0,0.5,0.0)" +idiv-mem,20.25,None,"(15.25,0.0,10.75,0.5,0.5,0.0,9.75,20.25,0.0)" +idiv-r32,24.75,None,"(24.75,0.0,15.25,0.0,0.0,0.0,13.75,12.25,0.0)" +idivl-r32,24.75,None,"(24.75,0.0,15.25,0.0,0.0,0.0,13.75,12.25,0.0)" +idiv-r64,24.75,None,"(24.75,0.0,15.25,0.0,0.0,0.0,13.75,12.25,0.0)" +idivq-r64,24.75,None,"(24.75,0.0,15.25,0.0,0.0,0.0,13.75,12.25,0.0)" +repne cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shr-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shr-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shrb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shr-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shr-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shr-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrdl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrdq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shrdb-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shrd-mem_r32_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shrd-mem_r64_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shrd-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shrdb-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shrd-r32_r32_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shrd-r64_r64_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +movsd-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsw-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shl-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shlb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shl-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shlb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +shl-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shlb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shl-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shl-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +mov-r64_r8,6.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.5,6.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +bts-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btsl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +bts-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btsq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btr-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btrl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btr-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btrq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sgdt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +loop-LBL,2.5,None,"(2.5,0.0,1.0,0.0,0.0,0.0,1.0,2.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btc-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btcl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btc-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btcq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wbinvd-,557552.0,None,"(138153.0,0.0,0.0,0.0,0.0,132837.0,56454.0,557552.0,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mul-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mulq-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cli-,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +cld-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +clc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lldt-mem,9.0,None,"(0.0,0.0,3.0,1.5,1.5,1.0,0.0,9.0,0.0)" +lldt-,7.0,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,1.0,0.3333333333333333,7.0,0.0)" +ret-imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +ret-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock subl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sub-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock subq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btc-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btc-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btc-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btcl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btc-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btcq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +setnbe-mem,1.0,None,"(0.75,0.0,0.25,0.5,0.5,1.0,0.25,0.75,0.0)" +setnbe-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +setnbeb-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +verr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +verr-,6.0,None,"(2.0,0.0,2.0,0.0,0.0,0.0,3.0,6.0,0.0)" +rep stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock andb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock andl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock and-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock andq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rdpmc-,11.75,None,"(10.083333333333334,0.0,5.083333333333334,0.0,0.0,0.0,7.083333333333334,11.75,0.0)" +lock cmpxchg-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchg-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchg-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock inc-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +cmovnp-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnp-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnpl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnp-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnpq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnp-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnp-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnpl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnp-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnpq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +ret far-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock orb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock orl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock or-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock orq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +enter-imd_imd,1.75,None,"(1.25,0.0,1.75,0.5,0.5,1.0,0.75,1.25,0.0)" +repne scasb-,10.166666666666666,None,"(10.166666666666666,0.0,6.166666666666666,1.5,1.5,0.0,6.166666666666666,6.5,0.0)" +leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xadd-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddb-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddl-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddq-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lidt-mem,10.0,None,"(2.0,0.0,4.0,0.0,0.0,1.0,0.0,10.0,0.0)" +xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xchg-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchgb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchgb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +lock xchg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchg-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchgl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchg-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xchgq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchgl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchgq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +xchg-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +smsw-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +smsw-,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)" +smsw-r32,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)" +smswl-r32,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)" +smsw-r64,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)" +smswq-r64,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,1.25,2.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cpuid-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)" +rdtsc-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock addb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock addl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock add-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock addq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +sidt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sbb-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock sbb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbbl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbbq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +insb-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +insd-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)" +imul-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)" +imulq-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcr-r8_r8,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,1.5,2.5,0.0)" +rcrb-r8_r8,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,1.5,2.5,0.0)" +rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcr-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcrb-mem_r8,3.0,None,"(2.0,0.0,3.0,1.0,1.0,1.0,1.0,2.0,0.0)" +rcr-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcrb-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcr-r32_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcr-r64_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcl-r8_r8,2.75,None,"(2.75,0.0,2.25,0.0,0.0,0.0,1.25,2.75,0.0)" +rclb-r8_r8,2.75,None,"(2.75,0.0,2.25,0.0,0.0,0.0,1.25,2.75,0.0)" +rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcl-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rclb-mem_r8,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcl-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rclb-r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcl-r32_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +rcl-r64_r8,2.75,None,"(1.75,0.0,2.75,0.0,0.0,0.0,0.75,1.75,0.0)" +insw-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +div-mem,2.25,None,"(2.25,0.0,2.25,0.5,0.5,0.0,2.25,0.25,0.0)" +div-r8,2.25,None,"(2.25,0.0,2.25,0.0,0.0,0.0,2.25,2.25,0.0)" +divb-r8,2.25,None,"(2.25,0.0,2.25,0.0,0.0,0.0,2.25,2.25,0.0)" +div-mem,3.0,None,"(3.0,0.0,3.0,0.5,0.5,0.0,3.0,1.0,0.0)" +div-mem,12.0,None,"(7.333333333333334,0.0,6.333333333333334,0.5,0.5,0.0,5.333333333333334,12.0,0.0)" +div-r32,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)" +divl-r32,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)" +div-r64,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)" +divq-r64,11.75,None,"(11.75,0.0,10.25,0.0,0.0,0.0,5.75,4.25,0.0)" +stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rep movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +in-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +inb-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +inl-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r8_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r32_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +cmovnz-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnz-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnzl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnz-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnzq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnz-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnz-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnzl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnz-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnzq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovns-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovns-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnsl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovns-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnsq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovns-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovns-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnsl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovns-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnsq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovno-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovno-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnol-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovno-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnoq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovno-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovno-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnol-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovno-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnoq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnl-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnl-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnlq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnl-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnl-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnlq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnb-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnb-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnbl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnb-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnbq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovnb-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnb-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnbl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnb-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovnbq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovo-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovo-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovol-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovo-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovoq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovo-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovo-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovol-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovo-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovoq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +bt-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +bt-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +btq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +shld-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shldl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shldq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shldb-mem_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shld-mem_r32_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shld-mem_r64_r8,1.25,None,"(0.75,0.0,1.25,1.0,1.0,1.0,0.25,0.75,0.0)" +shld-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shldb-r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shld-r32_r32_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +shld-r64_r64_r8,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +invlpg-mem,14.0,None,"(7.333333333333333,0.0,7.333333333333333,2.5,2.5,5.0,8.333333333333334,14.0,0.0)" +sahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovz-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovz-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovzl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovz-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovzq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovz-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovz-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovzl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovz-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovzq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovp-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovp-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovpl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovp-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovpq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovp-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovp-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovpl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovp-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovpq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovs-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovs-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovsl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovs-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovsq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovs-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovs-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovsl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovs-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovsq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovl-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovl-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovlq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovl-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovl-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovlq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovb-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovb-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovbl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovb-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovbq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +cmovb-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovb-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovbl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovb-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +cmovbq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lmsw-mem,11.0,None,"(2.0,0.0,4.5,1.0,1.0,1.0,5.5,11.0,0.0)" +lmsw-,9.5,None,"(1.8333333333333333,0.0,2.833333333333333,0.5,0.5,1.0,4.833333333333333,9.5,0.0)" +lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock bts-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock bts-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock bts-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btsl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock bts-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btsq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xorb-mem_r8,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xorl-mem_r32,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xor-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock xorq-mem_r64,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +repe cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +clts-,3.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,3.0,0.0)" +movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rol-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rolb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rol-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rolb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +rol-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rolb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rol-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rol-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +verw-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +verw-,6.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,4.0,6.0,0.0)" +jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rorb-r8_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +rorb-r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +ror-r32_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +ror-r64_r8,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,1.25,0.0)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbe-mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,1.0,0.0)" +cmovnbe-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +subl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +subq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmpxchg8b-mem,3.25,None,"(3.25,0.0,2.25,1.0,1.0,1.0,2.25,3.25,0.0)" +lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btr-mem_imd,1.0,None,"(1.0,0.0,0.5,1.0,1.0,1.0,0.5,1.0,0.0)" +lock btr-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btr-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btrl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btr-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +lock btrq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-r8_r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcl-r32_r32,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcq-r64_r64,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r8_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +adcb-r8_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +adc-mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +adc-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +adcl-r32_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +adc-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +adcq-r64_mem,0.75,None,"(0.75,0.0,0.25,0.5,0.5,0.0,0.25,0.75,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcl-r32_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcq-r64_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock cmpxchg8b-mem,3.75,None,"(3.75,0.0,2.75,1.0,1.0,1.0,2.75,3.75,0.0)" +cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lea-mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setbe-mem,1.0,None,"(0.75,0.0,0.25,0.5,0.5,1.0,0.25,0.75,0.0)" +setbe-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +setbeb-r8,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +lock neg-mem,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +bswap-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapl-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +jmp far-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +divps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxsave64-mem,38.0,None,"(11.0,0.0,14.0,20.0,20.0,38.0,20.0,17.0,0.0)" +andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,19.166666666666668,None,"(19.166666666666668,0.0,16.166666666666668,15.5,15.5,0.0,14.166666666666668,7.5,0.0)" +fxsave-mem,38.0,None,"(11.0,0.0,14.0,20.0,20.0,38.0,20.0,17.0,0.0)" +sqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fxrstor-mem,18.666666666666668,None,"(18.666666666666668,0.0,16.666666666666668,16.5,16.5,0.0,14.666666666666668,7.0,0.0)" +stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +comiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pcmpgtw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpgtb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpgtd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maskmovdqu-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psubd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psadbw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmullw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divsd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divsd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq2dq-xmm_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psubb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pslld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pslld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtsd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtsd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psllw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psllq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psllq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psubusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmulhw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtss2sd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtss2sd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psrlq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psrlw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psrld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +cvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,0.8333333333333333,None,"(0.8333333333333333,0.0,0.8333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pminub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pavgw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pavgw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psubsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pavgb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pavgb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psraw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psraw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +comisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psrad-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvttpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcomi-fpu,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fldl2t-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldl2e-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fyl2x-,4.5,None,"(4.5,0.0,4.5,0.0,0.0,0.0,0.5,1.5,0.0)" +fcmovnu-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +fcomip-fpu,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmovnb-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +fcmovne-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmovbe-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +fxtract-,2.5,None,"(0.5,0.0,2.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcompp-,1.5,None,"(0.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fyl2xp1-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +frndint-,7.75,None,"(7.75,0.0,6.75,0.0,0.0,0.0,1.75,1.75,0.0)" +fnclex-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,1.0,0.0)" +fptan-,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fcos-,9.5,None,"(9.5,0.0,6.0,0.0,0.0,0.0,3.0,2.5,0.0)" +fscale-,2.75,None,"(2.25,0.0,2.75,0.0,0.0,0.0,0.75,1.25,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fxam-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ffree-fpu,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fprem1-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-fpu,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fninit-,7.5,None,"(3.0,0.0,3.0,0.0,0.0,0.0,7.5,1.5,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fnop-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fldpi-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fnstsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fnstsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +fwait-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +fcmovnbe-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +f2xm1-,5.25,None,"(5.25,0.0,3.75,0.0,0.0,0.0,0.75,2.25,0.0)" +fprem-,2.25,None,"(2.25,0.0,2.25,0.0,0.0,0.0,0.25,0.25,0.0)" +fincstp-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldenv-mem,18.833333333333332,None,"(18.833333333333332,0.0,15.833333333333332,4.0,4.0,0.0,12.833333333333332,8.5,0.0)" +fldenv-mem,18.833333333333332,None,"(18.833333333333332,0.0,15.833333333333332,4.0,4.0,0.0,12.833333333333332,8.5,0.0)" +fpatan-,31.25,None,"(31.25,0.0,13.25,0.0,0.0,0.0,5.25,5.25,0.0)" +fst-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fst-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fst-fpu,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmovu-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +fsin-,10.75,None,"(10.75,0.0,5.75,0.0,0.0,0.0,2.75,2.75,0.0)" +fcmove-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +fldcw-mem,1.5,None,"(1.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +fcmovb-fpu_fpu,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldln2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxch-fpu,6.0,None,"(6.0,0.0,3.0,0.0,0.0,0.0,3.0,3.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fld-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucomi-fpu,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fdecstp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldlg2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldz-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fbstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fucompp-,1.5,None,"(0.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fnstenv-mem,28.833333333333332,None,"(28.833333333333332,0.0,18.833333333333332,5.5,5.5,11.0,17.333333333333332,13.0,0.0)" +fnstenv-mem,28.833333333333332,None,"(28.833333333333332,0.0,18.833333333333332,5.5,5.5,11.0,17.333333333333332,13.0,0.0)" +fld1-,1.5,None,"(1.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fsincos-,3.5,None,"(2.5,0.0,3.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fucomip-fpu,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fnstcw-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pcmpgtw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpgtb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpgtd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpgtd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packuswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +psubd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psadbw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packssdw-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pcmpeqd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pxor-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psubb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +paddb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pandn-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +paddsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +emms-,12.583333333333332,None,"(9.583333333333332,0.0,12.583333333333332,0.0,0.0,0.0,8.583333333333332,0.25,0.0)" +punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaxub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +psubsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pavgw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pavgw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psubsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psubsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pavgb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pavgb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +maskmovq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packsswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +repe scasq-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)" +cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +syscall-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +repne cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +pushfq-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rep movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +swapgs-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +repne scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +popfq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +repe cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +iretq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lock cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)" +bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +roundpd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundpd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +roundps-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundps-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mpsadbw-xmm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +mpsadbw-xmm_xmm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmulld-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulld-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pcmpeqq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pminsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +rex.w pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +rex.w pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +rex.w pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +rex.w pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +pmuldq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuldq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +dpps-xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +dpps-xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pmaxud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pminud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pminud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +blendvps-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +blendvps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +blendvpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +blendvpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +roundss-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundss-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +roundsd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +roundsd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendvb-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +pblendvb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +phsubd-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubd-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubd-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubd-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +psignw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +psignb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +psignb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +phaddsw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddsw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddsw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddsw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubsw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubsw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubsw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubsw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +pabsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +phaddd-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddd-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddd-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddd-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pabsd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +phaddw-mmx_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddw-mmx_mmx,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddw-xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddw-xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vmclear-mem,4.5,None,"(3.5,0.0,3.5,1.0,1.0,1.0,4.5,3.5,0.0)" +vmptrst-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +xsetbv-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)" +xgetbv-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +xrstor-mem,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,4.0,4.5,0.0)" +xrstor64-mem,5.5,None,"(5.5,0.0,4.0,0.5,0.5,0.0,4.0,4.5,0.0)" +xsave-mem,8.5,None,"(8.5,0.0,5.5,1.0,1.0,1.0,5.5,5.5,0.0)" +xsave64-mem,7.916666666666666,None,"(7.916666666666666,0.0,5.416666666666666,1.0,1.0,1.0,5.416666666666666,5.25,0.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +rdtscp-,7.333333333333333,None,"(5.333333333333333,0.0,5.333333333333333,0.0,0.0,0.0,7.333333333333333,4.0,0.0)" +aesdec-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +aesdec-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +aeskeygenassist-xmm_xmm_imd,7.666666666666667,None,"(2.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,7.666666666666667,0.0,0.0)" +aeskeygenassist-xmm_mem_imd,7.333333333333333,None,"(2.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,7.333333333333333,0.0,0.0)" +aesenclast-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +aesenclast-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +aesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +aesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +aesdeclast-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +aesdeclast-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +aesenc-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +aesenc-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +xsaveopt64-mem,9.75,None,"(9.75,0.0,6.75,1.0,1.0,1.0,6.75,5.75,0.0)" +xsaveopt-mem,8.5,None,"(8.5,0.0,5.5,1.0,1.0,1.0,5.5,5.5,0.0)" +mwait-,2.75,None,"(2.75,0.0,1.75,0.0,0.0,0.0,2.75,2.75,0.0)" +movbe-mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbeq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-mem,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbe-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbeq-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +prefetchwt1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pclmulqdq-xmm_xmm_imd,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pclmulqdq-xmm_mem_imd,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +clflush-mem,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +rdrand-,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)" +rdrand-r32,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)" +rdrandl-r32,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)" +rdrand-r64,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)" +rdrandq-r64,6.5,None,"(4.0,0.0,2.5,0.5,0.5,0.0,2.0,6.5,0.0)" +pause-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)" +vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vandpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vandps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vandps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vstmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vaddsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vsqrtsd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsqrtss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendvb-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpblendvb-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vzeroall-,16.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,16.0,0.0,0.0)" +vcomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,28,None,"(2.5,28,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_ymm,28,None,"(2.5,28,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,14,None,"(2.5,14,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_ymm,14,None,"(2.5,14,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +vpslld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvpd-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vblendvpd-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vblendvpd-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vblendvpd-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsllw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsubsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,14,None,"(2.5,14,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_ymm,14,None,"(2.5,14,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddd-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddd-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vsqrtpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,28,None,"(2.5,28,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_ymm,28,None,"(2.5,28,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdpps-xmm_xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdpps-ymm_ymm_ymm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaskmovpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmaskmovpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaskmovps-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmaskmovps-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsignb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsignd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vxorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vxorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vxorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vroundsd-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundsd-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vxorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vxorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vxorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vhsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddsw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vminsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendvps-xmm_xmm_mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vblendvps-xmm_xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vblendvps-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vblendvps-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +rex.w vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +rex.w vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +rex.w vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +rex.w vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vzeroupper-,1.0833333333333333,None,"(1.0833333333333333,0.0,1.0833333333333333,0.0,0.0,0.0,1.0833333333333333,0.75,0.0)" +vandnps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandnps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vandnps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandnps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vandnpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandnpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vandnpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandnpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vblendpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vblendpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vblendps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vblendps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_ymm,2.5,None,"(2.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubd-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubd-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsrlw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2pd-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsadbw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-ymm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-ymm_ymm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-xmm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-xmm_xmm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-ymm_mem_imd,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-ymm_ymm_imd,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_xmm_imd,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpps-ymm_mem,2.5,None,"(2.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-ymm_ymm,2.5,None,"(2.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaskmovdqu-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddwd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-xmm_xmm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubsw-xmm_xmm_xmm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpavgw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpavgw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpavgb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpavgb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaxsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrlvd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrlvd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpminsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpminsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxub-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxub-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendvb-ymm_ymm_mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpblendvb-ymm_ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsrad-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddd-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddd-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpmuldq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsignb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddusw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddusw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddusb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsignd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsignd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastw-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsravd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsravd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpabsw-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsw-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vphaddsw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphaddsw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpsubusb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubusb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubusw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpabsb-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsb-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vphsubw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vphsubd-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubd-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmulld-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxud-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaxuw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsrlw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaskmovq-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpmaskmovq-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaskmovd-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpmaskmovd-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +vpsadbw-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsadbw-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubsb-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubsw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpblendd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpblendd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminuw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminub-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminud-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddwd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsd-ymm_ymm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-ymm_ymm_mem,2.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,2.5,0.0,0.0)" +vphsubsw-ymm_ymm_ymm,2.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,2.5,0.0,0.0)" +vpsllvd-xmm_xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllvd-xmm_xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllvd-ymm_ymm_ymm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2ph-mem_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vcvtps2ph-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtps2ph-mem_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vcvtps2ph-xmm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vgatherqpd-ymm_mem_ymm,8.666666666666668,None,"(8.666666666666668,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)" +vgatherqpd-xmm_mem_xmm,5.0,None,"(5.0,0.0,1.5,1.0,1.0,0.0,4.5,1.0,0.0)" +vgatherqps-xmm_mem_xmm,6.0,None,"(6.0,0.0,3.0,1.0,1.0,0.0,0.0,1.0,0.0)" +vgatherqps-xmm_mem_xmm,6.0,None,"(6.0,0.0,3.0,1.0,1.0,0.0,0.0,1.0,0.0)" +vgatherdps-ymm_mem_ymm,12.0,None,"(12.0,0.0,3.5,4.0,4.0,0.0,6.5,4.0,0.0)" +vgatherdps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,8.666666666666668,None,"(8.666666666666668,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)" +vpgatherqd-xmm_mem_xmm,8.666666666666668,None,"(8.666666666666668,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)" +vgatherdpd-ymm_mem_ymm,6.666666666666667,None,"(6.666666666666667,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)" +vgatherdpd-xmm_mem_xmm,4.0,None,"(4.0,0.0,1.5,1.0,1.0,0.0,3.5,1.0,0.0)" +vpgatherqq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqq-xmm_mem_xmm,5.0,None,"(5.0,0.0,1.5,1.0,1.0,0.0,4.5,1.0,0.0)" +vpgatherdd-ymm_mem_ymm,12.0,None,"(12.0,0.0,3.5,4.0,4.0,0.0,6.5,4.0,0.0)" +vpgatherdd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdq-ymm_mem_ymm,6.666666666666667,None,"(6.666666666666667,0.0,2.166666666666667,2.0,2.0,0.0,5.166666666666667,2.0,0.0)" +vpgatherdq-xmm_mem_xmm,4.0,None,"(4.0,0.0,1.5,1.0,1.0,0.0,3.5,1.0,0.0)" +vaesdec-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaesdec-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaesdeclast-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaesdeclast-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vaesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vaesenc-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaesenc-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaesenclast-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaesenclast-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaeskeygenassist-xmm_xmm_imd,7.666666666666667,None,"(2.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,7.666666666666667,0.0,0.0)" +vaeskeygenassist-xmm_mem_imd,7.333333333333333,None,"(2.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,7.333333333333333,0.0,0.0)" +shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulx-r64_r64_r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mulxq-r64_r64_r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mulx-r64_r64_mem,1.0,None,"(0.5,0.0,1.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mulxq-r64_r64_mem,1.0,None,"(0.5,0.0,1.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" diff --git a/osaca/data/ivb_data.csv b/osaca/data/ivb_data.csv index f266c45..d50c253 100644 --- a/osaca/data/ivb_data.csv +++ b/osaca/data/ivb_data.csv @@ -1,88 +1,3179 @@ instr,TP,LT,ports -jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jmpq-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -lea-r64_mem,0.5,1.0,"(0.5, 0.5, 0.0, 0.0, 0.0, 0.0)" -lea-r32_mem,0.5,1.0,"(0.5, 0.5, 0.0, 0.0, 0.0, 0.0)" -vcvtsi2ss-xmm_xmm_r64,1.0,3.0,"(0, 1.0, 0, 0, 0, 1.0)" -vcvtsi2ss-xmm_xmm_r32,1.0,3.0,"(0, 1.0, 0, 0, 0, 1.0)" -vmulss-xmm_xmm_xmm,1.0,5.0,"(1.0, 0, 0, 0, 0, 0)" -vaddss-xmm_xmm_mem,1.0,3.0,"(0.0, 1.0, 0.5, 0.5, 0.0, 0.0)" -vaddss-xmm_xmm_xmm,1.0,3.0,"(0, 1.0, 0, 0, 0, 0)" -vxorps-xmm_xmm_xmm,1.0,1.0,"(0, 0, 0, 0, 0, 1.0)" -vmovss-xmm_mem,0.5,3.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -vmovss-mem_xmm,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -inc-r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -inc-r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmp-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmp-r32_mem,0.5,1.0,"(0.3333333333333333, 0.3333333333333333, 0.5, 0.5, 0.0, 0.3333333333333333)" -cmp-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmpq-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmpq-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -incq-r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -incq-r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmpq-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -mov-mem_r32,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -add-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -mov-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -movsx-r64_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -vmulsd-xmm_xmm_mem,1.0,5.0,"(1.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -mov-r64_mem,0.5,2.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -vmovsd-xmm_mem,0.5,3.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -vaddsd-xmm_xmm_xmm,1.0,3.0,"(0, 1.0, 0, 0, 0, 0)" -mov-r32_mem,0.5,2.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -vmovsd-mem_xmm,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -movslq-r64_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -add-mem_imd,1.0,6.0,"(0.3333333333333333, 0.3333333333333333, 1.0, 1.0, 1.0, 0.3333333333333333)" -addl-mem_imd,1.0,6.0,"(0.3333333333333333, 0.3333333333333333, 1.0, 1.0, 1.0, 0.3333333333333333)" -mov-mem_imd,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -movl-mem_imd,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -mov-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -mov-mem_r64,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -vmovupd-mem_ymm,2.0,2.0,"(0.0, 0.0, 0.5, 0.5, 2.0, 0.0)" -add-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -vaddsd-xmm_xmm_mem,1.0,3.0,"(0.0, 1.0, 0.5, 0.5, 0.0, 0.0)" -and-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -mov-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -sub-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -add-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -shl-r64_imd,0.5,1.0,"(0.5, 0.0, 0.0, 0.0, 0.0, 0.5)" -cmp-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmp-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -vmulsd-xmm_xmm_xmm,1.0,5.0,"(1.0, 0, 0, 0, 0, 0)" -xor-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +sldt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,1.0,3.3333333333333335)" +sldt-,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +sldt-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +sldtl-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +sldt-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +sldtq-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +lgdt-mem,11.0,None,"(2.0,0.0,2.0,0.0,0.0,1.0,11.0)" +call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +mov-LBL,24.0,None,"(15.5,0.0,6.5,0.0,0.0,1.0,24.0)" +mov-LBL,15.0,None,"(10.5,0.0,3.5,0.0,0.0,0.0,15.0)" +jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +wrmsr-,54.5,None,"(33.0,0.0,19.5,0.0,0.0,1.0,54.5)" +repe scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cmc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cmovbe-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbe-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbel-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbe-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbeq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbe-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovbe-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovbel-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovbe-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovbeq-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_r8,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpb-mem_r8,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_r32,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpl-mem_r32,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_r64,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpq-mem_r64,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmovle-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovle-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovlel-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovle-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovleq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lsl-mem,30.0,None,"(6.0,0.0,0.0,0.0,0.0,0.0,30.0)" +lsl-r32_mem,30.0,None,"(6.0,0.0,0.0,0.0,0.0,0.0,30.0)" +lsl-r64_mem,30.0,None,"(6.0,0.0,0.0,0.0,0.0,0.0,30.0)" +lslq-r64_mem,30.0,None,"(6.0,0.0,0.0,0.0,0.0,0.0,30.0)" +lsl-,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)" +lsl-r32_r32,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)" +lsl-r64_r32,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)" +lahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cbw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpsw-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adcb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adc-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adc-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adcl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adc-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adcq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +cmpsd-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +out-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +outb-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +outl-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-r16_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +out-r16_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +cmovnle-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnle-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnlel-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnle-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnleq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbb-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbb-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbbl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbb-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbbq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbb-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lodsb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)" +lodsw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)" +lodsd-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +std-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +stosd-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xorb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xor-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xor-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xorl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xor-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xorq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +stc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sti-,3.6666666666666665,None,"(0.6666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +str-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,1.0,3.3333333333333335)" +str-,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +str-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +strl-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +str-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +strq-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +stosb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +rdmsr-,44.5,None,"(20.0,0.0,11.5,0.0,0.0,0.0,44.5)" +rep lodsb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +idiv-mem,2.3333333333333335,None,"(2.3333333333333335,0.0,2.3333333333333335,0.5,0.5,0.0,2.3333333333333335)" +idiv-r8,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)" +idivb-r8,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)" +idiv-mem,3.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.5,0.5,0.0,3.333333333333333)" +idiv-mem,28.0,None,"(20.5,0.0,16.5,0.5,0.5,0.0,28.0)" +idiv-r32,3.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.0,0.0,0.0,3.333333333333333)" +idivl-r32,3.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.0,0.0,0.0,3.333333333333333)" +idiv-r64,28.0,None,"(20.5,0.0,15.5,0.0,0.0,0.0,28.0)" +idivq-r64,28.0,None,"(20.5,0.0,15.5,0.0,0.0,0.0,28.0)" +repne cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shrd-mem_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrd-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrdl-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrd-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrdq-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrd-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrd-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrdl-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrd-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrdq-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrd-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shrdb-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shrd-mem_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shrd-mem_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shrd-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shrdb-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shrd-r32_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shrd-r64_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +movsd-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsw-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +mov-r64_r8,4.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,4.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bts-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btsl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bts-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btsq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btr-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btrl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btr-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btrq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sgdt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,2.0,2.3333333333333335)" +loop-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btc-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btcl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btc-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btcq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +wbinvd-,294978.0,None,"(184405.0,0.0,0.0,0.0,0.0,135105.0,294978.0)" +jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +mul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +mul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +push-r16,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pushw-r16,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +push-r16,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +pushw-r16,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cli-,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +cld-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +clc-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lldt-mem,8.333333333333334,None,"(0.3333333333333333,0.0,3.3333333333333335,1.5,1.5,1.0,8.333333333333334)" +lldt-,6.666666666666667,None,"(0.6666666666666666,0.0,3.6666666666666665,1.0,1.0,1.0,6.666666666666667)" +ret-imd,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +ret-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btc-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btcl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btc-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btcq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cmpxchg-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchgb-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchg-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgb-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchg-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchgl-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchg-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchgq-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchg-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgl-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchg-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgq-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +verr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)" +verr-,8.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,8.0)" +rep stosb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +cwd-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +scasw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +scasd-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rdpmc-,13.833333333333332,None,"(13.333333333333334,0.0,7.833333333333333,0.0,0.0,0.0,13.833333333333332)" +lock cmpxchg-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchgb-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchg-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchgl-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchg-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchgq-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +cmovnp-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnp-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnpl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnp-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnpq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +ret far-,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +enter-imd_imd,16.0,None,"(10.0,0.0,0.0,0.0,0.0,2.0,16.0)" +repne scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +leave-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +lock xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lidt-mem,11.0,None,"(2.0,0.0,2.0,0.0,0.0,1.0,11.0)" +xlat-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)" +lock xchg-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lock xchgb-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgb-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r8_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgb-r8_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lock xchg-mem,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +lock xchg-mem_r32,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +lock xchgl-mem_r32,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +lock xchg-mem_r64,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +lock xchgq-mem_r64,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +xchg-mem,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +xchg-mem_r32,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +xchgl-mem_r32,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +xchg-mem_r64,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +xchgq-mem_r64,2.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,2.6666666666666665)" +xchg-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +smsw-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,0.5,0.5,1.0,3.3333333333333335)" +smsw-,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +smsw-r32,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +smswl-r32,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +smsw-r64,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +smswq-r64,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +andb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +and-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +and-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +andl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +and-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +andq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +mov-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +mov-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +mov-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +mov-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cpuid-,42.0,None,"(13.0,0.0,0.0,0.0,0.0,0.0,42.0)" +rdtsc-,9.0,None,"(6.5,0.0,5.5,0.0,0.0,0.0,9.0)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sidt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,2.0,1.3333333333333333)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbb-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbb-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbbl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbb-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbbq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem,1.3333333333333333,None,"(0.8333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +imul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r32,1.3333333333333333,None,"(0.8333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +imul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,4.333333333333334,None,"(4.333333333333334,0.0,1.8333333333333333,1.0,1.0,1.0,3.8333333333333335)" +rcr-r8_imd,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)" +rcrb-r8_imd,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)" +rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-imd,3.6666666666666665,None,"(2.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +rcr-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcrl-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcrq-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcrb-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcr-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcrl-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcr-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcrq-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcr-mem_r8,4.333333333333334,None,"(3.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,4.333333333333334)" +rcrb-mem_r8,4.333333333333334,None,"(3.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,4.333333333333334)" +rcr-r8_r8,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)" +rcrb-r8_r8,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)" +rcr-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)" +rcrb-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)" +rcr-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)" +rcrb-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)" +rcr-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)" +rcrb-mem_r8,3.333333333333333,None,"(2.833333333333333,0.0,1.8333333333333333,1.0,1.0,1.0,3.333333333333333)" +rcr-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcrb-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-r32_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-r64_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcl-mem_imd,4.5,None,"(4.0,0.0,1.5,1.0,1.0,1.0,4.5)" +rcl-r8_imd,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +rclb-r8_imd,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcl-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcl-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rclq-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rclb-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcl-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcl-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rclq-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcl-mem_r8,4.5,None,"(4.0,0.0,1.5,1.0,1.0,1.0,4.5)" +rclb-mem_r8,4.5,None,"(4.0,0.0,1.5,1.0,1.0,1.0,4.5)" +rcl-r8_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +rclb-r8_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rclb-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcl-r32_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcl-r64_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +div-mem,2.3333333333333335,None,"(2.3333333333333335,0.0,2.3333333333333335,0.5,0.5,0.0,2.3333333333333335)" +div-r8,3.6666666666666665,None,"(2.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +divb-r8,3.6666666666666665,None,"(2.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +div-mem,4.5,None,"(2.5,0.0,3.0,0.5,0.5,0.0,4.5)" +div-mem,15.0,None,"(9.0,0.0,7.0,0.5,0.5,0.0,15.0)" +div-r32,4.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.0,0.0,0.0,4.333333333333333)" +divl-r32,4.333333333333333,None,"(2.833333333333333,0.0,2.833333333333333,0.0,0.0,0.0,4.333333333333333)" +div-r64,15.333333333333332,None,"(9.333333333333334,0.0,7.333333333333333,0.0,0.0,0.0,15.333333333333332)" +divq-r64,15.333333333333332,None,"(9.333333333333334,0.0,7.333333333333333,0.0,0.0,0.0,15.333333333333332)" +stosw-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +rep movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +cmovnz-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnz-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnzl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnz-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnzq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovns-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnsl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovns-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnsq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovns-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovno-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnol-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovno-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnoq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovno-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnl-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnlq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovo-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovol-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovo-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovoq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovo-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bt-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bt-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +jrcxz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +shld-mem_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shld-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shldl-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shld-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shldq-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shld-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shld-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shldl-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shld-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shldq-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shld-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shldb-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shld-mem_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shld-mem_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shld-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shldb-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shld-r32_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shld-r64_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +invlpg-mem,19.333333333333332,None,"(10.333333333333334,0.0,10.333333333333334,2.0,2.0,4.0,19.333333333333332)" +sahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmovz-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovz-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovzl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovz-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovzq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovp-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovpl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovp-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovpq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovs-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovsl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovs-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovsq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovs-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovl-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovlq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lmsw-mem,10.666666666666666,None,"(3.6666666666666665,0.0,5.666666666666667,1.0,1.0,1.0,10.666666666666666)" +lmsw-,9.333333333333334,None,"(4.333333333333333,0.0,2.333333333333333,0.5,0.5,1.0,9.333333333333334)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock bts-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btsl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock bts-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btsq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +orb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +or-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +or-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +orl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +or-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +orq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +repe cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +clts-,5.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,5.0)" +movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rolb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-r8_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rolb-r8_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rolb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rolb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rolb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-r32_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-r64_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +verw-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)" +verw-,8.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,8.0)" +jmp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-r8_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorb-r8_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rorb-mem_r8,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-r32_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-r64_r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmovnbe-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbe-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbel-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbe-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbeq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbe-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovnbe-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovnbel-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovnbe-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovnbeq-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +sub-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +sub-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +subl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +sub-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +subq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmpxchg8b-mem,5.0,None,"(3.5,0.0,2.5,1.0,1.0,1.0,5.0)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btr-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btrl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btr-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btrq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +addb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +add-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +add-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +addl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +add-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +addq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcb-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adcb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adc-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcb-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adc-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adcl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adc-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adcq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adc-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adcb-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adc-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adc-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adcl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adc-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adcq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adc-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +adcb-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lock cmpxchg8b-mem,8.5,None,"(5.5,0.0,3.0,0.0,0.0,1.0,8.5)" +cwde-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lea-mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +lea-r32_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +leal-r32_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +lea-r64_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +leaq-r64_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +bswap-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +bswapl-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +bswap-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +bswapq-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +jmp far-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +divps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)" +divps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fxsave64-mem,38.0,None,"(14.0,0.0,15.0,20.0,20.0,38.0,28.0)" +andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +cvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ldmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)" +divss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +sqrtss-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)" +sqrtss-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtsi2ss-xmm_r32,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtsi2ss-xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +mulss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mulss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,43.833333333333336,None,"(16.333333333333336,0.0,13.833333333333334,19.5,19.5,0.0,43.833333333333336)" +fxsave-mem,38.0,None,"(14.0,0.0,15.0,20.0,20.0,38.0,28.0)" +sqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)" +sqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mulps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mulps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +fxrstor-mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,2.0)" +stmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +comiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +punpckhdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +divpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +divpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +pcmpgtw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpgtb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpgtd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +packuswb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +packuswb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +maskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.5,2.0,2.0,2.0,2.0)" +andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pslldq-xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +psadbw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +packssdw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +packssdw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmullw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmullw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divsd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +divsd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpeqb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpeqd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpcklqdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklqdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpcklwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movq2dq-xmm_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +psubb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +paddd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psrldq-xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpckhqdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhqdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pslld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pslld-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +sqrtsd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +sqrtsd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psllw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +psllq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psllq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckldq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +mulsd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mulsd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +sqrtpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmulhw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pminsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pshufd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +cvtss2sd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +cvtss2sd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psrlq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psrlw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psrlw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psrld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psrld-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +lfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mulpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mulpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +punpckhbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmuludq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmaddwd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmaxub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpckhwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvtpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +mfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pshuflw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshuflw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pminub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pinsrw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrw-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psubsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pavgw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pavgw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +psubsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pavgb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pavgb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psraw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psraw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +comisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psrad-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +packsswb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +packsswb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpcklbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +ucomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvttpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pshufhw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufhw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fchs-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomi-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fldl2t-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fldl2e-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcmovnu-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fcomip-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fcmovnb-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fcmovne-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcmovbe-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcompp-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fxam-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +ffree-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fninit-,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fnop-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fldpi-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fnstsw-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fnstsw-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +fwait-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fcmovnbe-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fincstp-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fst-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fabs-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fcmovu-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fcmove-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fldcw-mem,2.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,2.0)" +fcmovb-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivp-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,17,None,"(1.0,17,0.0,0.5,0.5,0.0,0.0)" +fdivr-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,17,None,"(1.0,17,0.0,0.5,0.5,0.0,0.0)" +fdivr-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,17,None,"(1.0,17,0.0,0.5,0.5,0.0,0.0)" +fdiv-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,17,None,"(1.0,17,0.0,0.5,0.5,0.0,0.0)" +fdiv-fpu,17,None,"(1.0,17,0.0,0.0,0.0,0.0,0.0)" +fldln2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fxch-fpu,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)" +fld-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)" +fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)" +fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fucomi-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fdecstp-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fldlg2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fldz-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fucompp-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fld1-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fucomip-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fnstcw-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +punpckhdq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhdq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +pcmpgtw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpgtb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpgtd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +packuswb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +packuswb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psadbw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +packssdw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +packssdw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpeqb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpeqd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpcklwd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklwd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pxor-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +psubb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckldq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pandn-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pminsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pshufw-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufw-mmx_mmx_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +emms-,18.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,18.0)" +punpckhbw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhbw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pand-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pmaxub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpckhwd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhwd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pinsrw-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrw-mmx_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +psubsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pavgw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pavgw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pavgb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pavgb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +maskmovq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)" +psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +packsswb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklbw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklbw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +repe scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +lodsq-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cdqe-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep lodsq-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +repne cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +pushfq-,1.0,None,"(0.5,0.0,1.0,0.5,0.5,1.0,0.5)" +rep movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxd-r64_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep stosq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +swapgs-,1.8333333333333333,None,"(0.3333333333333333,0.0,1.8333333333333333,0.0,0.0,0.0,0.8333333333333333)" +scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +repne scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +popfq-,2.6666666666666665,None,"(0.6666666666666666,0.0,1.6666666666666665,0.5,0.5,0.0,2.6666666666666665)" +stosq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +cmpxchg16b-mem,9.5,None,"(7.0,0.0,3.5,0.5,0.5,1.0,9.5)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +repe cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +lock cmpxchg16b-mem,11.0,None,"(7.5,0.0,4.5,0.0,0.0,1.0,11.0)" +bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovzxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovsxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +roundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +roundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +roundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +roundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pblendw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pblendw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +mpsadbw-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +mpsadbw-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)" +insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmovsxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmovsxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmulld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +packusdw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +packusdw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmaxsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +blendpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +blendpd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmovzxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +rex.w pcmpestri-xmm_mem_imd,14.333333333333334,None,"(11.333333333333334,0.0,6.333333333333333,0.5,0.5,0.0,14.333333333333334)" +rex.w pcmpestri-xmm_xmm_imd,21.0,None,"(12.0,0.0,0.0,0.0,0.0,0.0,21.0)" +pcmpestrm-xmm_mem_imd,4.0,None,"(4.0,0.0,1.5,0.0,0.0,0.0,2.5)" +pcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +rex.w pcmpestrm-xmm_mem_imd,14.333333333333334,None,"(11.333333333333334,0.0,6.333333333333333,0.5,0.5,0.0,14.333333333333334)" +rex.w pcmpestrm-xmm_xmm_imd,22.0,None,"(11.0,0.0,0.0,0.0,0.0,0.0,22.0)" +pmuldq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmuldq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovsxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovsxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovsxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +dpps-xmm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)" +dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)" +pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrd-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)" +pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +blendps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +blendps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pinsrq-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrq-xmm_r64_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +pinsrd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrd-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +pinsrb-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrb-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +blendvps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +blendvps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +blendvpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +blendvpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +roundss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +roundss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +roundsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +roundsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)" +pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovzxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pblendvb-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +pblendvb-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +pmovzxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +phsubd-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubd-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phsubd-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubd-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhrsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phsubw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +psignw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +phaddsw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddsw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phaddsw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddsw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmaddubsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubsw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubsw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phsubsw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubsw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +pabsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +phaddd-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddd-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phaddd-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddd-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +palignr-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +palignr-mmx_mmx_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +palignr-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +palignr-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pshufb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pshufb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +phaddw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phaddw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rdtscp-,10.333333333333334,None,"(5.333333333333333,0.0,7.333333333333333,0.0,0.0,0.0,10.333333333333334)" +aesdec-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesdec-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +aeskeygenassist-xmm_xmm_imd,7.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.0,0.0,0.0,7.833333333333333)" +aeskeygenassist-xmm_mem_imd,6.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.5,0.5,0.0,6.833333333333333)" +aesenclast-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesenclast-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +aesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +aesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)" +aesdeclast-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesdeclast-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +aesenc-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesenc-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +prefetchwt1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +clflush-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,1.0)" +rdrand-,5.0,None,"(2.5,0.0,4.5,0.5,0.5,0.0,5.0)" +rdrand-r32,4.666666666666666,None,"(2.6666666666666665,0.0,4.666666666666666,0.5,0.5,0.0,4.666666666666666)" +rdrandl-r32,4.666666666666666,None,"(2.6666666666666665,0.0,4.666666666666666,0.5,0.5,0.0,4.666666666666666)" +rdrand-r64,4.666666666666666,None,"(2.6666666666666665,0.0,4.666666666666666,0.5,0.5,0.0,4.666666666666666)" +rdrandq-r64,4.666666666666666,None,"(2.6666666666666665,0.0,4.666666666666666,0.5,0.5,0.0,4.666666666666666)" +pause-,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vpmuludq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vhaddpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhaddpd-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhaddpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhaddpd-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vpunpcklbw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpcklbw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpmovzxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmulss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vandpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vandpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vandps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vandps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmulsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpshufhw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshufhw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaxss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vstmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpackssdw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpackssdw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpinsrb-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpinsrb-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vaddsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vsqrtsd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vsqrtss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vcvtss2sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpblendvb-xmm_xmm_mem_xmm,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vpblendvb-xmm_xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vzeroall-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +vcomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsrad-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrad-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshufd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshufd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsraw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsraw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsraw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshufb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vdivpd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +vdivpd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,28,None,"(2.5,28,0.0,0.5,0.5,0.0,0.5)" +vdivpd-ymm_ymm_ymm,28,None,"(2.5,28,0.0,0.0,0.0,0.0,0.5)" +vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovdqu-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vdivps-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)" +vdivps-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,14,None,"(2.0,14,0.0,0.5,0.5,0.0,0.0)" +vdivps-ymm_ymm_ymm,14,None,"(2.0,14,0.0,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmpss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshuflw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vldmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +vpslld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpslld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpslld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmpsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsllq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsllq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvpd-xmm_xmm_mem_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vblendvpd-xmm_xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vblendvpd-ymm_ymm_mem_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vblendvpd-ymm_ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpsllw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsllw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsllw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vphaddw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphaddw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vsubsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)" +vsqrtps-xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,14,None,"(2.0,14,0.0,0.5,0.5,0.0,0.0)" +vsqrtps-ymm_ymm,14,None,"(2.0,14,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vphaddd-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphaddd-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vsqrtpd-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +vsqrtpd-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,28,None,"(2.5,28,0.0,0.5,0.5,0.0,0.5)" +vsqrtpd-ymm_ymm,28,None,"(2.5,28,0.0,0.0,0.0,0.0,0.5)" +vsubss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vdpps-xmm_xmm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)" +vdpps-xmm_xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)" +vdpps-ymm_ymm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)" +vdpps-ymm_ymm_ymm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vpunpckhdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmovzxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmovzxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaskmovpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmaskmovpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmaskmovpd-mem_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0)" +vmaskmovpd-mem_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,2.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpalignr-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpalignr-xmm_xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaskmovps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmaskmovps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmaskmovps-mem_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0)" +vmaskmovps-mem_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,2.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaxpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpackuswb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaxps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhqdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsignw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsignw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsignb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsignb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpunpcklwd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpcklwd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsignd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsignd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmulhw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vxorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vxorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vxorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vroundsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vxorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vxorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vxorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vhsubpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhsubpd-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhsubpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhsubpd-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vhsubps-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhsubps-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhsubps-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhsubps-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhaddps-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhaddps-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhaddps-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhaddps-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vcvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,7,None,"(1.0,7,0.0,0.5,0.5,0.0,0.0)" +vdivss-xmm_xmm_xmm,7,None,"(1.0,7,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +vdivsd-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovntdq-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vcmpps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmpps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmpps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmppd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmppd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vphaddsw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphaddsw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vminsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vblendvps-xmm_xmm_mem_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vblendvps-xmm_xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vblendvps-ymm_ymm_mem_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vblendvps-ymm_ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmpsadbw-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vmpsadbw-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +rex.w vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +rex.w vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +vpcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +rex.w vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +rex.w vpcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vzeroupper-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vandnps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandnps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vandnps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandnps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vandnpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandnpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vandnpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandnpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vblendpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vblendpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vblendps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vblendps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vblendps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vblendps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vrsqrtps-ymm_ymm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vphsubw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphsubw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vpextrq-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vphsubd-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphsubd-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpblendw-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpblendw-xmm_xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmullw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpmovsxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpackusdw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpackusdw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpinsrd-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpinsrd-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +vpinsrq-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpinsrq-xmm_xmm_r64_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +vpinsrw-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpinsrw-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrlw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrlw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrlq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpcklqdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsrld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vminpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtdq2ps-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckldq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vcvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtdq2pd-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vminps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vbroadcastf128-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsadbw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vroundpd-ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vroundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vroundps-ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundps-ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtsi2ss-xmm_xmm_r32,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vpclmulqdq-xmm_xmm_xmm_imd,6.833333333333334,None,"(5.333333333333334,0.0,5.833333333333333,0.0,0.0,0.0,6.833333333333334)" +vpclmulqdq-xmm_xmm_mem_imd,6.666666666666666,None,"(4.666666666666666,0.0,5.666666666666667,0.5,0.5,0.0,6.666666666666666)" +vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpps-ymm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vrcpps-ymm_ymm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpmovsxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpmovsxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmaskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.5,2.0,2.0,2.0,2.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovntpd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovntps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpunpckhbw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhbw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvttpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmaddwd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpcmpgtq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhwd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhwd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vphsubsw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphsubsw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtpd2ps-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vaddsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpacksswb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vaddss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vcvtps2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vcvtph2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vcvtph2ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vcvtps2ph-mem_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,1.0,1.0)" +vcvtps2ph-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtps2ph-mem_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,1.0,1.0)" +vcvtps2ph-xmm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vaesdec-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +vaesdec-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +vaesdeclast-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +vaesdeclast-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +vaesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +vaesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)" +vaesenc-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +vaesenc-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +vaesenclast-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +vaesenclast-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +vaeskeygenassist-xmm_xmm_imd,7.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.0,0.0,0.0,7.833333333333333)" +vaeskeygenassist-xmm_mem_imd,6.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.5,0.5,0.0,6.833333333333333)" +vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" diff --git a/osaca/data/model_importer.py b/osaca/data/model_importer.py new file mode 100755 index 0000000..08406f0 --- /dev/null +++ b/osaca/data/model_importer.py @@ -0,0 +1,223 @@ +#!/usr/bin/env python3 +from collections import defaultdict, OrderedDict +import xml.etree.ElementTree as ET +import re +import sys +import argparse +from distutils.version import StrictVersion + +from osaca.param import Parameter, Register +from osaca.eu_sched import Scheduler + + +def normalize_reg_name(reg_name): + # strip spaces + reg_name = reg_name.strip() + # masks are denoted with curly brackets in uops.info + reg_name = re.sub(r'{K([0-7])}', r'K\1', reg_name) + reg_name = re.sub(r'ST\(([0-7])\)', r'ST\1', reg_name) + return reg_name + + +def port_occupancy_from_tag_attributes(attrib, arch): + occupancy = defaultdict(int) + for k, v in attrib.items(): + m = re.match('^port([0-9]+)', k) + if not m: + continue + ports = m.group(1) + # Ignore Port7 on HSW, BDW, SKL and SKX if present in combination with ports 2 and 3. + # Port7 is only used for simple address generation, while 2 and 3 handle all addressing, + # but uops.info does not differentiate. + if arch in ['HSW', 'BDW', 'SKL', 'SKX'] and ports == '237': + ports = ports.replace('7', '') + potential_ports = list(ports) + per_port_occupancy = int(v) / len(potential_ports) + for pp in potential_ports: + occupancy[pp] += per_port_occupancy + + # Also consider DIV pipeline + if 'div_cycles' in attrib: + occupancy['0DV'] = int(attrib['div_cycles']) + + return dict(occupancy) + + +def extract_paramters(instruction_tag): + # Extract parameter components + parameters = [] # used to store string representations + parameter_tags = sorted(instruction_tag.findall("operand"), + key=lambda p: int(p.attrib['idx'])) + for parameter_tag in parameter_tags: + # Ignore parameters with suppressed=1 + if int(parameter_tag.attrib.get('suppressed', '0')): + continue + + p_type = parameter_tag.attrib['type'] + if p_type == 'imm': + parameters.append('imd') # Parameter('IMD') + elif p_type == 'mem': + parameters.append('mem') # Parameter('MEM') + elif p_type == 'reg': + possible_regs = [normalize_reg_name(r) + for r in parameter_tag.text.split(',')] + reg_groups = [Register.sizes.get(r, None) for r in possible_regs] + if reg_groups[1:] == reg_groups[:-1]: + if reg_groups[0] is None: + raise ValueError("Unknown register type for {} with {}.".format( + parameter_tag.attrib, parameter_tag.text)) + elif reg_groups[0][1] == 'GPR': + parameters.append('r{}'.format(reg_groups[0][0])) + # Register(possible_regs[0])) + elif '{' in parameter_tag.text: + # We have a mask + parameters[-1] += '{opmask}' + else: + parameters.append(reg_groups[0][1].lower()) + elif p_type == 'relbr': + parameters.append('LBL') + elif p_type == 'agen': + parameters.append('mem') + else: + raise ValueError("Unknown paramter type {}".format(parameter_tag.attrib)) + return parameters + + +def extract_model(tree, arch): + model_data = [] + for instruction_tag in tree.findall('//instruction'): + ignore = False + + mnemonic = instruction_tag.attrib['asm'] + + # Extract parameter components + try: + parameters = extract_paramters(instruction_tag) + except ValueError as e: + print(e, file=sys.stderr) + + # Extract port occupation, throughput and latency + port_occupancy, throughput, latency = [], 0.0, None + arch_tag = instruction_tag.find('architecture[@name="'+arch+'"]') + if arch_tag is None: + continue + # We collect all measurement and IACA information and compare them later + for measurement_tag in arch_tag.iter('measurement'): + port_occupancy.append(port_occupancy_from_tag_attributes(measurement_tag.attrib, arch)) + # FIXME handle min/max Latencies ('maxCycles' and 'minCycles') + latencies = [int(l_tag.attrib['cycles']) + for l_tag in measurement_tag.iter('latency') if 'latency' in l_tag.attrib] + + if latencies[1:] != latencies[:-1]: + print("Contradicting latencies found:", mnemonic, file=sys.stderr) + ignore = True + elif latencies: + latency = latencies[0] + # Ordered by IACA version (newest last) + for iaca_tag in sorted(arch_tag.iter('IACA'), + key=lambda i: StrictVersion(i.attrib['version'])): + port_occupancy.append(port_occupancy_from_tag_attributes(iaca_tag.attrib, arch)) + if ignore: continue + + # Check if all are equal + if port_occupancy: + if port_occupancy[1:] != port_occupancy[:-1]: + print("Contradicting port occupancies, using latest IACA:", mnemonic, + file=sys.stderr) + port_occupancy = port_occupancy[-1] + throughput = max(list(port_occupancy.values())+[0.0]) + else: + # print("No data available for this architecture:", mnemonic, file=sys.stderr) + continue + + for m, p in build_variants(mnemonic, parameters): + model_data.append((m.lower() + '-' + '_'.join(p), + throughput, latency, port_occupancy)) + + return model_data + + +def all_or_false(iterator): + if not iterator: + return False + else: + return all(iterator) + + +def build_variants(mnemonic, parameters): + """Yield all resonable variants of this instruction form.""" + # The one that was given + mnemonic = mnemonic.upper() + yield mnemonic, parameters + + # Without opmask + if any(['{opmask}' in p for p in parameters]): + yield mnemonic, list([p.replace('{opmask}', '') for p in parameters]) + + # With suffix (assuming suffix was not already present) + suffixes = {'Q': 'r64', + 'L': 'r32', + 'W': 'r16', + 'B': 'r8'} + for s, reg in suffixes.items(): + if not mnemonic.endswith(s) and all_or_false( + [p == reg for p in parameters if p not in ['mem', 'imd']]): + yield mnemonic+s, parameters + + +def architectures(tree): + return set([a.attrib['name'] for a in tree.findall('.//architecture')]) + + +def int_or_zero(s): + try: + return int(s) + except ValueError: + return 0 + + +def dump_csv(model_data, arch): + csv = 'instr,TP,LT,ports\n' + ports = set() + for mnemonic, throughput, latency, port_occupancy in model_data: + for p in port_occupancy: + ports.add(p) + ports = sorted(ports) + # If not all ports have been used (happens with port7 due to blacklist + # port_occupancy_from_tag_attributes), extend list accordingly: + while len(ports) < Scheduler.arch_dict[arch] + len(Scheduler.arch_pipeline_ports.get(arch, [])): + max_index = ports.index(str(max(map(int_or_zero, ports)))) + ports.insert(max_index + 1, str(max(map(int_or_zero, ports)) + 1)) + + for mnemonic, throughput, latency, port_occupancy in model_data: + for p in ports: + if p not in port_occupancy: + port_occupancy[p] = 0.0 + po_items = sorted(port_occupancy.items()) + csv_line = '{},{},{},"({})"\n'.format(mnemonic, throughput, latency, + ','.join([str(c) for p, c in po_items])) + csv += csv_line + return csv + + +def main(): + parser = argparse.ArgumentParser() + parser.add_argument('xml', help='path of instructions.xml from http://uops.info') + parser.add_argument('arch', nargs='?', + help='architecture to extract, use IACA abbreviations (e.g., SNB). ' + 'if not given, all will be extracted and saved to file in CWD.') + args = parser.parse_args() + + tree = ET.parse(args.xml) + if args.arch: + model_data = extract_model(tree, args.arch) + print(dump_csv(model_data, args.arch)) + else: + for arch in architectures(tree): + model_data = extract_model(tree, arch) + with open('{}_data.csv'.format(arch), 'w') as f: + f.write(dump_csv(model_data, arch)) + + +if __name__ == '__main__': + main() diff --git a/osaca/data/nhm_data.csv b/osaca/data/nhm_data.csv new file mode 100644 index 0000000..396093c --- /dev/null +++ b/osaca/data/nhm_data.csv @@ -0,0 +1,2434 @@ +instr,TP,LT,ports +sldt-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sldt-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sldt-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sldtl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sldt-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sldtq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +lgdt-mem,6.0,None,"(2.0,0.0,6.0,5.0,1.0,1.0,0.0)" +call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +call-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +callq-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +call-LBL,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +mov-LBL,24.166666666666664,None,"(11.166666666666666,0.0,8.666666666666666,0.0,1.0,1.0,24.166666666666664)" +mov-LBL,17.166666666666664,None,"(9.166666666666666,0.0,3.6666666666666665,0.0,0.0,0.0,17.166666666666664)" +jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +wrmsr-,45.33333333333333,None,"(45.33333333333333,0.0,28.333333333333332,6.0,1.0,1.0,29.333333333333332)" +repe scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cmc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cmovbe-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbe-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbe-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbeq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbe-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbe-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbe-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbeq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r32_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r64_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmovle-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovle-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovlel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovle-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovleq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lsl-mem,16.5,None,"(16.5,0.0,16.0,5.0,0.0,0.0,2.5)" +lsl-r32_mem,16.5,None,"(16.5,0.0,16.0,5.0,0.0,0.0,2.5)" +lsl-r64_mem,16.5,None,"(16.5,0.0,16.0,5.0,0.0,0.0,2.5)" +lslq-r64_mem,16.5,None,"(16.5,0.0,16.0,5.0,0.0,0.0,2.5)" +lsl-,4.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,4.0,0.0,0.0,4.833333333333333)" +lsl-r32_r32,4.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,4.0,0.0,0.0,4.833333333333333)" +lsl-r64_r32,4.833333333333333,None,"(2.833333333333333,0.0,2.333333333333333,4.0,0.0,0.0,4.833333333333333)" +lahf-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cbw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nopl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nopq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpsw-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adcb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adcl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adcq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +cmpsd-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +out-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +outb-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +outl-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-r16_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-r16_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +cmovnle-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnle-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnlel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnle-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnleq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbbl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbbq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbb-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbb-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbb-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +lodsb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +lodsw-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +lodsd-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +std-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +stosd-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +xorb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +xor-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xor-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xorl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xor-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xorq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +stc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sti-,5.166666666666666,None,"(1.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,5.166666666666666)" +str-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +stosb-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rdmsr-,36.83333333333333,None,"(20.833333333333332,0.0,13.333333333333332,1.0,0.0,0.0,36.83333333333333)" +rep lodsb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +idiv-mem,11,None,"(1.6666666666666665,11,2.6666666666666665,1.0,0.0,0.0,0.6666666666666666)" +idiv-r8,11,None,"(1.6666666666666665,11,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)" +idivb-r8,11,None,"(1.6666666666666665,11,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)" +idiv-mem,17,None,"(2.1666666666666665,17,2.6666666666666665,1.0,0.0,0.0,1.1666666666666665)" +idiv-mem,36,None,"(17.5,36,9.0,1.0,0.0,0.0,25.5)" +idiv-r32,17,None,"(2.5,17,3.0,0.0,0.0,0.0,1.5)" +idivl-r32,17,None,"(2.5,17,3.0,0.0,0.0,0.0,1.5)" +idiv-r64,36,None,"(17.5,36,9.0,0.0,0.0,0.0,26.5)" +idivq-r64,36,None,"(17.5,36,9.0,0.0,0.0,0.0,26.5)" +repne cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrd-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrdl-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrdq-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrdl-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrdq-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrdb-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-mem_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-mem_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrdb-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-r32_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-r64_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsd-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsx-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsw-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +mov-r64_r8,2.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,2.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bts-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btsl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bts-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btsq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btr-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btrl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btr-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btrq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sgdt-mem,2.0,None,"(1.1666666666666665,0.0,1.6666666666666665,2.0,2.0,2.0,1.1666666666666665)" +loop-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btc-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btcl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btc-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btcq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +wbinvd-,131105.0,None,"(65592.83333333333,0.0,65583.33333333333,0.0,131105.0,131105.0,131080.83333333334)" +jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +mul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +push-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pushw-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +push-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pushw-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cli-,4.333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,4.333333333333333)" +cld-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +clc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lldt-mem,6.833333333333333,None,"(1.8333333333333333,0.0,1.3333333333333333,4.0,1.0,1.0,6.833333333333333)" +lldt-,5.666666666666667,None,"(1.6666666666666667,0.0,1.6666666666666667,3.0,1.0,1.0,5.666666666666667)" +ret-imd,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +ret-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btc-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btcl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btc-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btcq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +setnbe-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnbe-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnbeb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmpxchg-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchgb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchg-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgb-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchg-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchgl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchg-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchgq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchg-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgl-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchg-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgq-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +verr-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +verr-,5.0,None,"(3.0,0.0,5.0,4.0,0.0,0.0,0.0)" +rep stosb-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cwd-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +scasw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +scasd-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rdpmc-,13.5,None,"(9.5,0.0,5.0,0.0,0.0,0.0,13.5)" +lock cmpxchg-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchgb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchg-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchgl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchg-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchgq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +cmovnp-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnp-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnpl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnp-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnpq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +ret far-,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +enter-imd_imd,7.666666666666667,None,"(4.166666666666666,0.0,7.666666666666667,5.0,5.0,5.0,1.1666666666666665)" +repne scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +leave-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +lock xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lidt-mem,5.0,None,"(3.0,0.0,5.0,5.0,1.0,1.0,0.0)" +xlat-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +lock xchg-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchgb-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchgb-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +lock xchg-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchg-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchgl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchg-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchgq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchgl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchgq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +smsw-mem,2.6666666666666665,None,"(1.1666666666666665,0.0,2.6666666666666665,0.0,1.0,1.0,2.1666666666666665)" +smsw-,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)" +smsw-r32,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)" +smswl-r32,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)" +smsw-r64,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)" +smswq-r64,3.333333333333333,None,"(1.8333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.8333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +andb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +and-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +and-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +andl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +and-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +andq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +mov-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +mov-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +mov-,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r32,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movl-r32,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cpuid-,14.0,None,"(11.5,0.0,14.0,0.0,2.0,2.0,13.5)" +rdtsc-,8.833333333333334,None,"(7.833333333333334,0.0,5.333333333333334,0.0,0.0,0.0,8.833333333333334)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sidt-mem,2.0,None,"(0.6666666666666666,0.0,1.6666666666666665,2.0,2.0,2.0,0.6666666666666666)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbbl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbbq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,4.0,None,"(2.5,0.0,4.0,1.0,1.0,1.0,2.5)" +rcr-r8_imd,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)" +rcrb-r8_imd,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)" +rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-imd,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.6666666666666665)" +rcr-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcrl-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcr-r64_imd,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.6666666666666665)" +rcrq-r64_imd,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.6666666666666665)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcrb-r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcr-r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcrl-r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcr-r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcrq-r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcr-mem_r8,4.0,None,"(2.5,0.0,4.0,1.0,1.0,1.0,2.5)" +rcrb-mem_r8,4.0,None,"(2.5,0.0,4.0,1.0,1.0,1.0,2.5)" +rcr-r8_r8,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)" +rcrb-r8_r8,3.0,None,"(3.0,0.0,3.0,0.0,0.0,0.0,3.0)" +rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcrb-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcr-r32_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcr-r64_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-r8_imd,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,3.0)" +rclb-r8_imd,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,3.0)" +rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcl-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcl-r64_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rclq-r64_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rclb-r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcl-r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcl-r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rclq-r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,3.0)" +rclb-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,3.0)" +rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rclb-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcl-r32_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcl-r64_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +div-mem,11,None,"(1.0,11,2.0,1.0,0.0,0.0,0.0)" +div-r8,11,None,"(1.3333333333333333,11,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)" +divb-r8,11,None,"(1.3333333333333333,11,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)" +div-mem,17,None,"(2.333333333333333,17,2.3333333333333335,1.0,0.0,0.0,1.3333333333333333)" +div-mem,36,None,"(8.5,36,6.0,1.0,0.0,0.0,13.5)" +div-r32,17,None,"(2.1666666666666665,17,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)" +divl-r32,17,None,"(2.1666666666666665,17,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)" +div-r64,36,None,"(8.5,36,6.0,0.0,0.0,0.0,14.5)" +divq-r64,36,None,"(8.5,36,6.0,0.0,0.0,0.0,14.5)" +stosw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +cmovnz-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnz-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnzl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnz-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnzq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovns-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnsl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovns-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnsq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovns-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovno-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnol-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovno-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnoq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovno-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnl-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnlq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnb-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnb-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovo-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovol-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovo-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovoq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovo-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bt-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bt-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +pop-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +popq-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +jrcxz-LBL,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +shld-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shldl-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shldq-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shldl-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shldq-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shldb-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-mem_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-mem_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shldb-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-r32_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-r64_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +invlpg-mem,17.333333333333332,None,"(9.333333333333334,0.0,12.333333333333334,1.0,4.0,4.0,17.333333333333332)" +sahf-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmovz-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovz-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovzl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovz-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovzq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovp-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovpl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovp-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovpq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovs-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovsl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovs-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovsq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovs-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovl-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovlq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovb-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovb-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lmsw-mem,9.666666666666666,None,"(4.666666666666667,0.0,5.666666666666667,2.0,1.0,1.0,9.666666666666666)" +lmsw-,8.833333333333334,None,"(4.833333333333334,0.0,3.3333333333333335,0.0,1.0,1.0,8.833333333333334)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock bts-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btsl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock bts-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btsq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +orb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +or-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +or-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +orl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +or-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +orq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +repe cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +clts-,3.5,None,"(1.5,0.0,2.0,0.0,0.0,0.0,3.5)" +movzx-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +verw-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +verw-,5.0,None,"(4.0,0.0,3.0,5.0,0.0,0.0,0.0)" +jmp-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmovnbe-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbe-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbe-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbeq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbe-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbe-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbe-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbeq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +sub-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +sub-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +subl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +sub-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +subq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmpxchg8b-mem,4.333333333333333,None,"(4.333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,4.333333333333333)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btr-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btrl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btr-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btrq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +addb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +add-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +add-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +addl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +add-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +addq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adcb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcb-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adcl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adcq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcl-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcq-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adcb-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adc-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adc-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adcl-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adc-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adcq-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adc-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +lock cmpxchg8b-mem,5.166666666666667,None,"(5.166666666666667,0.0,1.6666666666666667,1.0,1.0,1.0,5.166666666666667)" +cwde-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lea-mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lea-r32_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +leal-r32_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lea-r64_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +leaq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setbe-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setbe-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setbeb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +bswap-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bswapl-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bswap-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bswapq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +jmp far-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +divps-xmm_mem,14,None,"(1.0,14,0.0,1.0,0.0,0.0,0.0)" +divps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fxsave64-mem,38.0,None,"(16.0,0.0,18.0,5.0,38.0,38.0,26.0)" +andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +prefetcht2-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +prefetcht1-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +prefetcht0-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +cvttss2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttss2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttss2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttss2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttss2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttss2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ldmxcsr-mem,2.6666666666666665,None,"(1.6666666666666665,0.0,0.6666666666666666,1.0,0.0,0.0,2.6666666666666665)" +orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,14,None,"(1.0,14,0.0,1.0,0.0,0.0,0.0)" +divss-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +sqrtss-xmm_mem,18,None,"(1.0,18,0.0,1.0,0.0,0.0,0.0)" +sqrtss-xmm_xmm,18,None,"(1.0,18,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movss-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +mulss-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mulss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,42.0,None,"(25.166666666666668,0.0,16.666666666666668,42.0,0.0,0.0,28.166666666666668)" +fxsave-mem,38.0,None,"(16.0,0.0,18.0,5.0,38.0,38.0,26.0)" +sqrtps-xmm_mem,18,None,"(1.0,18,0.0,1.0,0.0,0.0,0.0)" +sqrtps-xmm_xmm,18,None,"(1.0,18,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movaps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movaps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mulps-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mulps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtss2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtss2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtss2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtss2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtss2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movups-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movups-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +fxrstor-mem,42.0,None,"(25.166666666666668,0.0,16.666666666666668,42.0,0.0,0.0,28.166666666666668)" +stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +prefetchnta-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +comiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +punpckhdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +divpd-xmm_mem,21,None,"(1.0,21,0.0,1.0,0.0,0.0,0.0)" +divpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +movsd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pcmpgtw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpgtb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpgtd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +packuswb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +packuswb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +maskmovdqu-xmm_xmm,2.333333333333333,None,"(2.333333333333333,0.0,0.3333333333333333,2.0,2.0,2.0,1.3333333333333333)" +andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pslldq-xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +psadbw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddusw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddusb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +packssdw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +packssdw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmullw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmullw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +divsd-xmm_mem,21,None,"(1.0,21,0.0,1.0,0.0,0.0,0.0)" +divsd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpeqb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpeqd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpcklqdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklqdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpcklwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pxor-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movq2dq-xmm_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqu-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +psubb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubusw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaxsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +paddd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psrldq-xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpckhqdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhqdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhuw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttsd2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttsd2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttsd2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttsd2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pslld-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +pslld-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +sqrtsd-xmm_mem,32,None,"(1.0,32,0.0,1.0,0.0,0.0,0.0)" +sqrtsd-xmm_xmm,32,None,"(1.0,32,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psllw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllq-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psllq-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +psubusb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckldq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +mulsd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mulsd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,32,None,"(1.0,32,0.0,1.0,0.0,0.0,0.0)" +sqrtpd-xmm_xmm,32,None,"(1.0,32,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmulhw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movq-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-xmm_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movq-r64_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pminsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pshufd-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +cvtss2sd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +cvtss2sd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psrlq-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +psrlw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psrlw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +psrld-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psrld-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lfence-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +cvtsd2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsd2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsd2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsd2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsd2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,1.0)" +cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movd-xmm_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movd-r32_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movapd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movapd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mulpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mulpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +punpckhbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movupd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movupd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pmuludq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmuludq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmaddwd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pextrw-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pand-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmaxub-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpckhwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvtpd2pi-mmx_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +cvtpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +mfence-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pshuflw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshuflw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pminub-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrw-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqa-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +psubsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pavgw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +psubsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pavgb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psraw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psraw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +comisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psrad-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +packsswb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +packsswb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpcklbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +cvttpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +pshufhw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufhw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomi-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fldl2t-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fldl2e-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fcmovnu-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcomip-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcmovnb-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmovne-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcmovbe-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcompp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fxam-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ffree-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fnop-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fldpi-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fnstsw-mem,2.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,2.0)" +fnstsw-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +fwait-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +fcmovnbe-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fincstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fst-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmovu-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmove-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldcw-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +fcmovb-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivp-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)" +fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)" +fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)" +fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)" +fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fldln2-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fxch-fpu,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fld-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fucomi-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fdecstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldlg2-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fldz-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucompp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fld1-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fucomip-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fnstcw-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +punpckhdq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhdq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pcmpgtw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpgtb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpgtd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +packuswb-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +packuswb-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psubd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psadbw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddusw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddusw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddusb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddusb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +packssdw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +packssdw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmullw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpeqb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpeqd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpcklwd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklwd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pxor-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +psubb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubusw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubusw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaxsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmulhuw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pslld-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubusb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckldq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pandn-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pmulhw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-mmx_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movq-r64_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pminsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pshufw-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufw-mmx_mmx_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psrlq-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movd-mmx_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movd-mmx_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movd-r32_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +emms-,3.6666666666666665,None,"(3.6666666666666665,0.0,3.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +punpckhbw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhbw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaddwd-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pand-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pmaxub-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxub-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpckhwd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhwd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pminub-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminub-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrw-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrw-mmx_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pavgw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pavgw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pavgb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pavgb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +maskmovq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)" +psraw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +packsswb-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +punpcklbw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklbw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +repe scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +lodsq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cdqe-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep lodsq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +repne cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +pushfq-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +rep movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsxd-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxdq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxd-r64_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep stosq-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +swapgs-,1.6666666666666665,None,"(1.6666666666666665,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +repne scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +popfq-,2.666666666666667,None,"(1.6666666666666667,0.0,2.666666666666667,1.0,0.0,0.0,2.666666666666667)" +stosq-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpxchg16b-mem,7.833333333333334,None,"(7.833333333333334,0.0,2.3333333333333335,1.0,1.0,1.0,7.833333333333334)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +repe cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +lock cmpxchg16b-mem,7.833333333333334,None,"(7.833333333333334,0.0,2.3333333333333335,1.0,1.0,1.0,7.833333333333334)" +bndmov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndmov-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndmov-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcn-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcn-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcnq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcu-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcu-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcuq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndstx-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcl-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcl-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndclq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndldx-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndmk-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxbq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovzxbd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxbd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovsxwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +roundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +roundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +roundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +roundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pblendw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pblendw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +mpsadbw-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,1.0)" +mpsadbw-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +phminposuw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +phminposuw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_mem_imd,2.6666666666666665,None,"(0.6666666666666666,0.0,2.6666666666666665,1.0,0.0,0.0,0.6666666666666666)" +pcmpistrm-xmm_xmm_imd,2.6666666666666665,None,"(0.6666666666666666,0.0,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)" +insertps-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmovsxdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movntdqa-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +pmovsxbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmulld-xmm_mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +pmulld-xmm_xmm,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pminsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +packusdw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +packusdw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +extractps-r32_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmaxsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaxsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +blendpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +blendpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ptest-xmm_mem,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.8333333333333333)" +ptest-xmm_xmm,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pmovzxbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpestri-xmm_mem_imd,4.333333333333333,None,"(1.8333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.8333333333333333)" +pcmpestri-xmm_xmm_imd,4.333333333333333,None,"(1.8333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,1.8333333333333333)" +rex.w pcmpestri-xmm_mem_imd,4.0,None,"(2.0,0.0,4.0,1.0,0.0,0.0,2.0)" +rex.w pcmpestri-xmm_xmm_imd,4.333333333333333,None,"(1.8333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,1.8333333333333333)" +pcmpestrm-xmm_mem_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,2.333333333333333)" +pcmpestrm-xmm_xmm_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,2.333333333333333)" +rex.w pcmpestrm-xmm_mem_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,2.333333333333333)" +rex.w pcmpestrm-xmm_xmm_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,2.333333333333333)" +pmuldq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmuldq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmovzxdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pminsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovsxbd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxbd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovsxwq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxwq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovsxbq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxbq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,1.0)" +dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +dpps-xmm_mem_imd,2.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,1.0,0.0,0.0,1.3333333333333333)" +dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)" +pcmpistri-xmm_mem_imd,2.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,1.0,0.0,0.0,0.3333333333333333)" +pcmpistri-xmm_xmm_imd,2.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)" +pextrd-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +pextrd-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pmaxuw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaxud-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +blendps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +blendps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pextrb-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +pextrb-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pminuw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pminud-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrq-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrq-xmm_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrd-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrd-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrb-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrb-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +blendvps-xmm_mem,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)" +blendvps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +blendvpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)" +blendvpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +roundss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +roundss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +roundsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +roundsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +pextrq-r64_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pmovzxwq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxwq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pblendvb-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,1.0)" +pblendvb-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmovzxwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +phsubd-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubd-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phsubd-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubd-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +pmulhrsw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhrsw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +phsubw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phsubw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +psignw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +phaddsw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddsw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phaddsw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddsw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +pmaddubsw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmaddubsw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +phsubsw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubsw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phsubsw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubsw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +pabsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +phaddd-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddd-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phaddd-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddd-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +palignr-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +palignr-mmx_mmx_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +palignr-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +palignr-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pshufb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pshufb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +phaddw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phaddw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)" +hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)" +hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)" +haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +movshdup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)" +haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +movsldup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)" +lddqu-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movddup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rdtscp-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,2.0)" +prefetchwt1-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +clflush-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +pause-,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" diff --git a/osaca/data/skl_data.csv b/osaca/data/skl_data.csv index 89493ce..49d89e2 100644 --- a/osaca/data/skl_data.csv +++ b/osaca/data/skl_data.csv @@ -1,153 +1,3847 @@ instr,TP,LT,ports -jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0, 0.0, 0, 0)" -addl-r32_mem,0.5,1.0,"(-1,)" -add-mem_imd,1.0,5.0,"(0.5, 0,0.5,0.6666666666666666,0.6666666666666666,1.0,0.5,0.5,0.6666666666666666)" -addpd-xmm_mem,1.0,4.0,"(-1,)" -addq-r64_imd,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -addq-r64_mem,0.5,1.0,"(-1,)" -add-r32_imd,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -addl-r32_imd,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -add-r32_r32,0.25,-1.0,"(-1,)" -add-r64_imd,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -add-r64_r64,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -addsd-xmm_mem,1.0,4.0,"(-1,)" -addsd-xmm_xmm,1.0,4.0,"(-1,)" -and-r32_imd,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -cmpl-r32_r32,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -cmpq-r64_r64,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -cmp-r32_imd,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -cmp-r32_mem,0.5,-1.0,"(0.25, 0, 0.25, 0.5, 0.5, 0, 0.25, 0.25, 0)" -cmpl-mem_r32,0.5,-1.0,"(0.25, 0, 0.25, 0.5, 0.5, 0, 0.25, 0.25, 0)" -cmp-r32_r32,0.25,1.0,"(-1,)" -cmp-r64_imd,0.25,1.0,"(-1,)" -cmp-r64_r64,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -imulq-r64_r64_imd,1.0,3.0,"(-1,)" -imul-r64_r64,1.0,3.0,"(-1,)" -incq-r64,0.25,1.0,"(0.25, 0, 0.25, 0, 0, 0, 0.25, 0.25, 0)" -incl-r32,0.25,1.0,"(0.25, 0, 0.25, 0, 0, 0, 0.25, 0.25, 0)" -inc-r64,0.25,1.0,"(-1,)" -lea-r32_mem,1.0,-1.0,"(-1,)" -lea-r64_mem-,1.0,-1.0,"(-1,)" -lea-r64_mem,1.0,1.0,"(-1,)" -movl-mem_r32,1.0,2.0,"(-1,)" -movl-r32_imd,0.25,1.0,"(-1,)" -movl-r32_mem,0.5,2.0,"(-1,)" -mov-mem_imd,1.0,2.0,"(0, 0,0,0.3333333333333333,0.3333333333333333,1.0,0,0,0.3333333333333333)" -mov-mem_r32,1.0,2.0,"(0, 0,0,0.3333333333333333,0.3333333333333333,1.0,0,0,0.3333333333333333)" -mov-mem_r64,1.0,2.0,"(0, 0,0,0.3333333333333333,0.3333333333333333,1.0,0,0,0.3333333333333333)" -movq-r64_xmm,1.0,-1.0,"(-1,)" -mov-r32_imd,0.25,1.0,"(-1,)" -mov-r32_mem,0.5,2.0,"(0, 0,0,0.5,0.5,0,0,0,0)" -mov-r32_r32,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -mov-r64_imd,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -mov-r64_mem,0.5,-1.0,"(-1,)" -mov-r64_mem,0.5,2.0,"(0, 0,0,0.5,0.5,0,0,0,0)" -mov-r64_r64,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -movsd-mem_xmm,1.0,3.0,"(-1,)" -movsd-xmm_mem,0.5,3.0,"(-1,)" -movslq-r64_r32,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -movsx-r64_r32,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -movups-mem_xmm,1.0,3.0,"(-1,)" -movups-xmm_mem,0.5,2.0,"(-1,)" -mulpd-xmm_mem,1.0,4.0,"(-1,)" -mulsd-xmm_mem,1.0,4.0,"(-1,)" -mulsd-xmm_xmm,1.0,4.0,"(-1,)" -prefetcht0-mem,0.5,-1.0,"(-1,)" -prefetchw-mem,1.0,-1.0,"(-1,)" -shl-r64_imd,0.5,1.0,"(0.5, 0,0,0,0,0,0,0.5,0)" -sub-r32_imd,0.25,1.0,"(-1,)" -sub-r64_r64,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -vaddpd-ymm_ymm_mem,0.5,4.0,"(-1,)" -vaddps-ymm_ymm_ymm,0.5,4.0,"(-1,)" -vaddsd-xmm_xmm_mem,0.5,4.0,"(0.5, 0,0.5,0.5,0.5,0,0,0,0)" -vaddsd-xmm_xmm_xmm,0.5,4.0,"(0.5, 0,0.5,0,0,0,0,0,0)" -vaddss-xmm_xmm_xmm,0.5,4.0,"(-1,)" -vcvtsi2ss-xmm_xmm_r32,1.0,-1.0,"(0.5, 0,0.5,0,0,0,1.0,0,0)" -vcvtss2si-r32_xmm,1.0,-1.0,"(-1,)" -vfmadd132pd-xmm_xmm_mem,0.5,4.0,"(0.5, 0, 0.5, 0.5, 0.5, 0, 0, 0, 0)" -vfmadd132sd-xmm_xmm_mem,0.5,4.0,"(0.5, 0, 0.5, 0.5, 0.5, 0, 0, 0, 0)" -vfmadd213pd-xmm_xmm_xmm,0.5,4.0,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vfmadd213pd-ymm_ymm_mem,0.5,4.0,"(0.5, 0, 0.5, 0.5, 0.5, 0, 0, 0, 0)" -vfmadd132pd-ymm_ymm_mem,0.5,4.0,"(0.5, 0, 0.5, 0.5, 0.5, 0, 0, 0, 0)" -vfmadd213pd-ymm_ymm_ymm,0.5,4.0,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vfmadd213ps-xmm_xmm_xmm,0.5,4.0,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vfmadd213sd,0.5,5.0,"(-1,)" -vfmadd213ss,0.5,5.0,"(-1,)" -vinsertf128-ymm_ymm_imd,1.0,3.0,"(-1,)" -vmovapd-mem_ymm,1.0,-1.0,"(0, 0, 0, 0.5, 0.5, 1.0, 0, 0, 0)" -vmovapd-ymm_mem,0.5,-1.0,"(0, 0, 0, 0.5, 0.5, 0, 0, 0, 0)" -vmovaps-mem_xmm,1.0,3.0,"(0, 0, 0, 0.5, 0.5, 1.0, 0, 0, 0)" -vmovaps-xmm_mem,0.5,2.0,"(0, 0, 0, 0.5, 0.5, 0, 0, 0, 0)" -vmovsd-mem_xmm,1.0,3.0,"(0, 0,0,0.5,0.5,1.0,0,0,0)" -vmovsd-xmm_mem,0.5,3.0,"(0, 0,0,0.5,0.5,0,0,0,0)" -vmovupd-mem_ymm,1.0,3.0,"(0, 0,0,0.5,0.5,1.0,0,0,0)" -vmovupd-ymm_mem,0.5,-1.0,"(-1,)" -vmulpd-ymm_ymm_ymm,0.5,4.0,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vmulps-ymm_ymm_ymm,0.5,4.0,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vmulsd-xmm_xmm_mem,0.5,4.0,"(0.5, 0,0.5,0.5,0.5,0,0,0,0)" -vmulsd-xmm_xmm_xmm,0.5,4.0,"(0.5, 0,0.5,0,0,0,0,0,0)" -vmulss-xmm_xmm_xmm,0.5,4.0,"(-1,)" -vrcpps-avx,1.0,4.0,"(-1,)" -vsqrtpd-avx,12.0,21.0,"(-1,)" -vsqrtps-avx,6.0,16.0,"(-1,)" -vsubpd-ymm_ymm_mem,0.5,4.0,"(-1,)" -vsubsd-xmm_xmm_mem,0.5,4.0,"(-1,)" -vsubsd-xmm_xmm_xmm,0.5,4.0,"(-1,)" -vsubss-xmm_xmm_xmm,0.5,4.0,"(-1,)" -vxorps-xmm_xmm_xmm,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -xor-r32_r32,0.25,1.0,"(0.25, 0,0.25,0,0,0,0.25,0.25,0)" -cmpl-r32_imd,0.25,1.0,"(0.25, 0, 0.25,0,0,0,0.25,0.25,0)" -vaddpd-xmm_xmm_xmm,0.5,4,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vaddpd-ymm_ymm_ymm,0.5,4,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vcvtdq2pd-xmm_xmm,1.0,5,"(1.0, 0, 0, 0, 0, 0, 1.0, 0, 0)" -vcvtdq2pd-ymm_xmm,1.0,7,"(1.0, 0, 0, 0, 0, 0, 1.0, 0, 0)" -vcvtsi2sd-xmm_xmm_r32,1.0,4,"(0.5, 0, 0.5, 0, 0, 0, 1.0, 0, 0)" -vextracti128-xmm_ymm_imd,1.0,3,"(0, 0, 0, 0, 0, 0, 1.0, 0, 0)" -vfmadd132pd-xmm_xmm_xmm,0.5,4,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vfmadd132pd-ymm_ymm_ymm,0.5,4,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vfmadd132sd-xmm_xmm_xmm,0.5,4,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vmulpd-xmm_xmm_xmm,0.5,4,"(0.5, 0, 0.5, 0, 0, 0, 0, 0, 0)" -vpaddd-xmm_xmm_xmm,0.3333333333333333,1,"(0.33, 0, 0.33, 0, 0, 0, 0.33, 0, 0)" -vpaddd-ymm_ymm_ymm,0.3333333333333333,1,"(0.33, 0, 0.33, 0, 0, 0, 0.33, 0, 0)" -vpshufd-xmm_xmm_imd,1.0,1,"(0, 0, 0, 0, 0, 0, 1.0, 0, 0)" -vxorpd-xmm_xmm_xmm,0.25,1,"(0.25, 0, 0.25, 0, 0, 0, 0.25, 0.25, 0)" -vdivpd-ymm_ymm_ymm,8.0,14.0,"(1.0, 8.0, 0, 0, 0, 0, 0, 0, 0)" -vdivps-ymm_ymm_ymm,5.0,11.0,"(1.0, 5.0, 0, 0, 0, 0, 0, 0, 0)" -vdivpd-xmm_xmm_xmm,4.0,13,"(1.0, 4.0, 0, 0, 0, 0, 0, 0, 0)" -vdivsd-xmm_xmm_xmm,4.0,13,"(1.0, 4.0, 0, 0, 0, 0, 0, 0, 0)" +sldt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sldt-,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldt-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldtl-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldt-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldtq-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +lgdt-mem,7.5,None,"(7.5,0.0,5.5,2.0,2.0,1.0,0.0,7.0,0.0)" +call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-LBL,19.5,None,"(19.5,0.0,9.0,0.0,0.0,2.0,12.5,11.0,0.0)" +mov-LBL,12.166666666666666,None,"(12.166666666666666,0.0,4.666666666666666,0.0,0.0,0.0,5.666666666666666,7.5,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wrmsr-,46.5,None,"(46.5,0.0,26.0,0.0,0.0,1.0,28.5,32.0,0.0)" +repe scasb-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lar-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +larl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +larq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +lar-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +larl-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +lar-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +larq-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-mem,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +cmovbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lsl-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lslq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-,4.833333333333333,None,"(4.833333333333333,0.0,4.333333333333333,1.0,1.0,0.0,1.3333333333333333,3.5,0.0)" +lsl-r32_r32,4.833333333333333,None,"(4.833333333333333,0.0,4.333333333333333,1.0,1.0,0.0,1.3333333333333333,3.5,0.0)" +lsl-r64_r32,4.833333333333333,None,"(4.833333333333333,0.0,4.333333333333333,1.0,1.0,0.0,1.3333333333333333,3.5,0.0)" +lahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpsw-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock adc-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adcb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adc-mem,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adc-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adcl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adc-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adcq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +cmpsb-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +cmpsd-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +out-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +outb-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +outl-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-r16_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-r16_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lodsb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lodsw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lodsd-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +std-,1.75,None,"(1.75,0.0,1.25,0.0,0.0,0.0,1.25,1.75,0.0)" +stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sti-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,0.25,2.25,0.0)" +str-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rdmsr-,26.0,None,"(26.0,0.0,18.5,0.0,0.0,0.0,18.0,16.5,0.0)" +rep lodsb-,5.416666666666667,None,"(5.416666666666667,0.0,4.916666666666667,1.5,1.5,0.0,3.416666666666667,3.25,0.0)" +lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)" +idiv-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)" +idivb-r8,5.25,None,"(3.25,3,1.25,0.0,0.0,0.0,5.25,1.25,0.0)" +idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)" +idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)" +idiv-r32,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)" +idivl-r32,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)" +idiv-r64,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)" +idivq-r64,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)" +repne cmpsb-,6.75,None,"(6.75,0.0,4.75,2.0,2.0,0.0,3.75,3.75,0.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrd-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrdl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrdq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shrdb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shrd-mem_r32_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shrd-mem_r64_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shrd-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrdb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +movsd-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsb-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsw-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +mov-r64_r8,4.083333333333333,None,"(4.083333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,1.5833333333333333,3.75,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +bts-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btsl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +bts-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btsq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btr-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btrl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btr-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btrq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sgdt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +loop-LBL,2.5,None,"(2.5,0.0,1.0,0.0,0.0,0.0,1.0,2.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-mem,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btc-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btcl-mem_r32,2.5,None,"(2.5,0.0,2.0,1.0,1.0,1.0,1.0,2.5,0.0)" +btc-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btcq-mem_r64,2.25,None,"(2.25,0.0,1.75,1.0,1.0,1.0,0.75,2.25,0.0)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +wbinvd-,370940.8333333334,None,"(370940.8333333334,1,206172.33333333334,113098.0,113098.0,202777.0,227630.33333333334,163445.5,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cli-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cld-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +clc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lldt-mem,4.5,None,"(4.5,0.0,3.0,1.5,1.5,1.0,0.0,4.5,0.0)" +lldt-,3.8333333333333335,None,"(3.8333333333333335,0.0,3.3333333333333335,1.0,1.0,1.0,0.3333333333333333,3.5,0.0)" +ret-imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +ret-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock subl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock subq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btc-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btc-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btcl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btc-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock btcq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,1.0,0.0)" +setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +verr-mem,24.5,None,"(24.5,0.0,12.5,1.5,1.5,0.0,12.0,15.0,0.0)" +verr-,5.5,None,"(5.5,0.0,4.0,2.0,2.0,0.0,4.0,4.5,0.0)" +rep stosb-,18.5,None,"(18.5,0.0,12.0,4.0,4.0,0.0,14.0,11.5,0.0)" +cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock andb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock andl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock andq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rdpmc-,12.333333333333332,None,"(12.333333333333332,0.0,6.833333333333333,0.0,0.0,0.0,6.833333333333333,9.0,0.0)" +lock cmpxchg-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchg-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchg-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ret far-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock orb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock orl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock orq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +enter-imd_imd,1.75,None,"(1.25,0.0,1.75,0.5,0.5,1.0,0.75,1.25,0.0)" +repne scasb-,10.166666666666666,None,"(10.166666666666666,0.0,6.166666666666666,1.5,1.5,0.0,6.166666666666666,6.5,0.0)" +leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xadd-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddb-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddl-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddq-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lidt-mem,7.5,None,"(7.5,0.0,5.5,1.5,1.5,1.0,0.0,7.0,0.0)" +xlat-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xchg-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchgb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchgb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +lock xchg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchg-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchgl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchg-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchgq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchgl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchgq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchg-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +smsw-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +smsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smsw-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smswl-r32,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smsw-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +smswq-r64,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,1.25,1.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64,1.25,None,"(0.25,0.0,1.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cpuid-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)" +rdtsc-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock addb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock addl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock addq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +sidt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sbb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbb-mem,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbb-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbbl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbb-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbbq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +insb-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +insd-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcr-r8_r8,3.25,None,"(2.75,0.0,3.25,0.0,0.0,0.0,1.25,2.75,0.0)" +rcrb-r8_r8,3.25,None,"(2.75,0.0,3.25,0.0,0.0,0.0,1.25,2.75,0.0)" +rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcr-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcrb-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcr-r32_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcr-r64_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,1.0,3.0,0.0)" +rclb-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,1.0,3.0,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rclb-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcl-r32_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcl-r64_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +insw-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +div-mem,4.75,None,"(2.75,3,0.75,0.5,0.5,0.0,4.75,0.75,0.0)" +div-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +divb-r8,5.0,None,"(3.0,3,1.0,0.0,0.0,0.0,5.0,1.0,0.0)" +div-mem,8,None,"(3.0,8,1.0,0.5,0.5,0.0,5.0,1.0,0.0)" +div-mem,18,None,"(12.0,18,5.5,0.5,0.5,0.0,7.5,7.0,0.0)" +div-r32,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)" +divl-r32,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)" +div-r64,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)" +divq-r64,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)" +stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +rep movsb-,16.5,None,"(16.5,0.0,14.5,5.0,5.0,0.0,11.5,9.5,0.0)" +in-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +inb-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +inl-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r8_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r32_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +bt-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +btl-mem_r32,2.75,None,"(2.75,0.0,2.25,0.5,0.5,0.0,1.25,2.75,0.0)" +bt-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)" +btq-mem_r64,2.5,None,"(2.5,0.0,2.0,0.5,0.5,0.0,1.0,2.5,0.0)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +shld-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shldl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shldq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shldb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shld-mem_r32_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shld-mem_r64_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shld-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shldb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shld-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shld-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +invlpg-mem,13.833333333333332,None,"(13.833333333333332,0.0,7.833333333333333,2.5,2.5,5.0,8.833333333333334,6.5,0.0)" +sahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lmsw-mem,7.5,None,"(7.5,0.0,5.0,1.0,1.0,2.0,5.0,5.5,0.0)" +lmsw-,6.0,None,"(6.0,0.0,2.5,0.5,0.5,1.0,4.5,4.0,0.0)" +lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock bts-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock bts-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)" +lock btsl-mem_r32,3.25,None,"(3.25,0.0,1.75,1.0,1.0,2.0,0.75,3.25,0.0)" +lock bts-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock btsq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xorb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xorl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xorq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +repe cmpsb-,6.75,None,"(6.75,0.0,4.75,2.0,2.0,0.0,3.75,3.75,0.0)" +clts-,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,2.0,2.0,0.0)" +movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +verw-mem,24.0,None,"(24.0,0.0,12.0,1.5,1.5,0.0,12.0,15.0,0.0)" +verw-,5.0,None,"(5.0,0.0,4.0,2.0,2.0,0.0,3.0,4.0,0.0)" +jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +subl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +subq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmpxchg8b-mem,3.25,None,"(3.25,0.0,2.25,1.0,1.0,1.0,2.25,3.25,0.0)" +lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btr-mem,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btr-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btrl-mem_r32,3.333333333333333,None,"(3.333333333333333,0.0,1.8333333333333333,1.0,1.0,2.0,0.8333333333333333,3.0,0.0)" +lock btr-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +lock btrq-mem_r64,3.0,None,"(3.0,0.0,1.5,1.0,1.0,2.0,0.5,3.0,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock cmpxchg8b-mem,4.75,None,"(4.75,0.0,2.75,1.0,1.0,1.0,2.75,4.75,0.0)" +cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lea-mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,1.0,0.0)" +setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +bswap-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapl-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +jmp far-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +divps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mmx,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cmpss-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +fxsave64-mem,38.0,None,"(21.25,0.0,13.25,20.0,20.0,38.0,13.25,9.25,0.0)" +andnps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andnps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +cvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +ldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +orps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cmpps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +xorps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +xorps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +subps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +minss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +minss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +addps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_r32,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtsi2ss-xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulss-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulss-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,19.833333333333332,None,"(19.833333333333332,0.0,14.833333333333332,15.5,15.5,0.0,14.833333333333332,7.5,0.0)" +fxsave-mem,38.0,None,"(21.25,0.0,13.25,20.0,20.0,38.0,13.25,9.25,0.0)" +sqrtps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttps2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +minps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtps2pi-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtps2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mulps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +andps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fxrstor-mem,19.333333333333332,None,"(19.333333333333332,0.0,15.333333333333332,16.5,16.5,0.0,15.333333333333332,7.0,0.0)" +stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +maxps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +maxps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +comiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +maxss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtdq2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvttps2dq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttps2dq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +divpd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divpd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pcmpgtw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maskmovdqu-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +andnpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andnpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psubd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psadbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2dq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtps2dq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmullw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmullw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +divsd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divsd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +orpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +orpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cmppd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cmppd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movq2dq-xmm_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psubb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psubusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psubw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaxsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpd2dq-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +paddd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cmpsd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cmpsd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmulhuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmulhuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +minsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +minsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +addpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtsd2ss-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvtsd2ss-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +pslld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtsd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtsd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r32,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +cvtsi2sd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r64,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +psllq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psubusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmulhw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmulhw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2dq-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtss2sd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2sd-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +xorpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +xorpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +maxsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +maxsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +minpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +minpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +addsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psrld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +subsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +subsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +lfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +cvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtps2pd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtps2pd-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mulpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +mulpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmuludq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaddwd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmaddwd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtdq2ps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtdq2ps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaxub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +cvtpd2pi-mmx_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvtpd2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +mfence-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maxpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +maxpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psubsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +comisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvttpd2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucom-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldl2t-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldl2e-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fyl2x-,4.5,None,"(4.5,0.0,0.5,0.0,0.0,0.0,4.5,1.5,0.0)" +faddp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fxtract-,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcompp-,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fcomp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fsubp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fyl2xp1-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +frndint-,7.75,None,"(7.75,0.0,0.75,0.0,0.0,0.0,7.75,1.75,0.0)" +fnclex-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,1.0,0.0)" +fptan-,4.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fcos-,9.5,None,"(9.5,0.0,1.0,0.0,0.0,0.0,8.0,2.5,0.0)" +fscale-,2.75,None,"(2.25,0.0,0.75,0.0,0.0,0.0,2.75,1.25,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fxam-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +fprem1-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fninit-,9.0,None,"(3.0,0.0,1.5,0.0,0.0,0.0,9.0,1.5,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fnop-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fldpi-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fnstsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fnstsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +fwait-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +f2xm1-,5.25,None,"(5.25,0.0,0.75,0.0,0.0,0.0,3.75,2.25,0.0)" +fprem-,2.25,None,"(2.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +fincstp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +ftst-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldenv-mem,19.833333333333336,None,"(19.833333333333336,0.0,13.833333333333334,4.0,4.0,0.0,13.833333333333334,8.5,0.0)" +fldenv-mem,19.833333333333336,None,"(19.833333333333336,0.0,13.833333333333334,4.0,4.0,0.0,13.833333333333334,8.5,0.0)" +fpatan-,32.0,None,"(32.0,0.0,2.5,0.0,0.0,0.0,15.5,5.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsubrp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsin-,10.75,None,"(10.75,0.0,0.75,0.0,0.0,0.0,7.75,2.75,0.0)" +fldcw-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldln2-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fxch-fpu,6.0,None,"(6.0,0.0,2.0,0.0,0.0,0.0,4.0,3.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fucomp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fdecstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldlg2-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +fbstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fucompp-,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +fnstenv-mem,30.166666666666668,None,"(30.166666666666668,0.0,12.166666666666666,5.5,5.5,11.0,22.666666666666664,13.0,0.0)" +fnstenv-mem,30.166666666666668,None,"(30.166666666666668,0.0,12.166666666666666,5.5,5.5,11.0,22.666666666666664,13.0,0.0)" +fld1-,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +fsincos-,3.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,3.5,0.0,0.0)" +fnstcw-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pcmpgtw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packuswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +psubd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psadbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packssdw-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pxor-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pxor-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +por-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pandn-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pandn-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pminsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +emms-,4.75,None,"(4.75,0.0,0.25,0.0,0.0,0.0,4.75,0.25,0.0)" +punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pand-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pminub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +psubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maskmovq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packsswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +repe scasq-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)" +cmpsq-,1.0,None,"(0.75,0.0,0.75,1.0,1.0,0.0,0.75,0.75,0.0)" +lodsq-,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep lodsq-,5.416666666666667,None,"(5.416666666666667,0.0,4.916666666666667,1.5,1.5,0.0,3.416666666666667,3.25,0.0)" +syscall-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +repne cmpsq-,6.416666666666667,None,"(6.416666666666667,0.0,4.916666666666667,2.0,2.0,0.0,3.916666666666667,3.75,0.0)" +movsq-,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +pushfq-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rep movsq-,15.0,None,"(15.0,0.0,10.5,2.0,2.0,0.0,10.5,10.0,0.0)" +movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +rep stosq-,18.0,None,"(18.0,0.0,13.0,4.0,4.0,0.0,14.5,10.5,0.0)" +swapgs-,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +repne scasq-,6.25,None,"(6.25,0.0,4.75,1.5,1.5,0.0,3.25,3.75,0.0)" +popfq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +repe cmpsq-,6.75,None,"(6.75,0.0,4.75,2.0,2.0,0.0,3.75,3.75,0.0)" +iretq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lock cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)" +bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +roundpd-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +roundpd-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +roundps-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +roundps-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mpsadbw-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +mpsadbw-xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phminposuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +phminposuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmulld-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +pmulld-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pcmpeqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +rex.w pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +rex.w pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +rex.w pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +rex.w pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +pmuldq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmuldq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,1.6666666666666665,0.0,0.0)" +dppd-xmm_xmm_imd,1.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,1.6666666666666665,0.0,0.0)" +dpps-xmm_mem_imd,2.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +blendvps-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +blendvps-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +blendvpd-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +blendvpd-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +roundss-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +roundss-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +roundsd-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +roundsd-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendvb-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +pblendvb-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +phsubd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phsubd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmulhrsw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +phsubw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phsubw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +psignw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psignw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psignw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psignd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psignd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psignd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psignb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psignb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psignb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +phaddsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phaddsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +phaddsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmaddubsw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +phsubsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +phsubsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phsubsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +phsubsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +pabsw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phaddd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pabsd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phaddw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vmclear-mem,4.5,None,"(3.5,0.0,3.5,1.0,1.0,1.0,4.5,3.5,0.0)" +vmptrst-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +addsubps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +addsubpd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +hsubpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +hsubpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +haddpd-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +haddpd-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +haddps-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +haddps-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +xsetbv-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)" +xgetbv-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +xrstor-mem,10.166666666666666,None,"(10.166666666666666,0.0,7.166666666666666,0.5,0.5,0.0,6.166666666666666,6.5,0.0)" +xrstor64-mem,10.166666666666666,None,"(10.166666666666666,0.0,7.166666666666666,0.5,0.5,0.0,6.166666666666666,6.5,0.0)" +xsave-mem,13.5,None,"(13.5,0.0,8.0,1.0,1.0,1.0,8.0,7.5,0.0)" +xsave64-mem,12.916666666666668,None,"(12.916666666666668,0.0,7.916666666666667,1.0,1.0,1.0,7.916666666666667,7.25,0.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +rdtscp-,7.333333333333333,None,"(5.333333333333333,0.0,5.333333333333333,0.0,0.0,0.0,7.333333333333333,4.0,0.0)" +aesdec-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesdec-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aeskeygenassist-xmm_xmm_imd,6.666666666666667,None,"(3.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,6.666666666666667,0.0,0.0)" +aeskeygenassist-xmm_mem_imd,6.333333333333333,None,"(3.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +aesenclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesenclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesdeclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesdeclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesenc-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesenc-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +clflushopt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0,0.0,0.0)" +xsaveopt64-mem,14.666666666666668,None,"(14.666666666666668,0.0,9.166666666666668,1.0,1.0,1.0,9.166666666666668,8.0,0.0)" +xsaveopt-mem,14.666666666666668,None,"(14.666666666666668,0.0,9.166666666666668,1.0,1.0,1.0,9.166666666666668,8.0,0.0)" +stac-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +clac-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mwait-,2.75,None,"(2.75,0.0,1.75,0.0,0.0,0.0,2.75,2.75,0.0)" +rdseed-,5.75,None,"(5.75,0.0,3.75,0.5,0.5,0.0,0.75,4.75,0.0)" +rdseed-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdseedl-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdseed-r64,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdseedq-r64,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +movbe-mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbeq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-mem,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbe-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbeq-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pclmulqdq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pclmulqdq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +clflush-mem,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +rdrand-,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdrand-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdrandl-r32,5.833333333333333,None,"(5.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,0.8333333333333333,4.5,0.0)" +rdrand-r64,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)" +rdrandq-r64,6.083333333333333,None,"(6.083333333333333,0.0,3.583333333333333,0.5,0.5,0.0,1.0833333333333333,4.25,0.0)" +pause-,1.25,None,"(1.25,0.0,0.75,0.0,0.0,0.0,0.75,1.25,0.0)" +vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovss-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vstmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vsqrtsd-xmm_xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsqrtss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendvb-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vpblendvb-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vzeroall-,4.166666666666667,None,"(4.166666666666667,0.0,4.166666666666667,0.0,0.0,0.0,4.166666666666667,3.5,0.0)" +vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_ymm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_ymm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvpd-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_ymm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vsqrtpd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_ymm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vdpps-xmm_xmm_mem_imd,1.5,None,"(1.5,0.0,1.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vdpps-xmm_xmm_xmm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vdpps-ymm_ymm_mem_imd,1.5,None,"(1.5,0.0,1.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vdpps-ymm_ymm_ymm_imd,1.5,None,"(1.5,0.0,1.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaskmovpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaskmovps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vroundsd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundsd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vhsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vhsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vhsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vhsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vhaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vhaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphaddsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvps-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +rex.w vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +rex.w vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +rex.w vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +rex.w vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vzeroupper-,1.0833333333333333,None,"(1.0833333333333333,0.0,1.0833333333333333,0.0,0.0,0.0,1.0833333333333333,0.75,0.0)" +vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendps-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendps-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendps-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendps-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vroundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundpd-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundps-ymm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vroundps-ymm_ymm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vcvtsd2ss-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vcvtsd2ss-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovdqu-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphminposuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vphminposuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphsubsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-ymm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendvb-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vpblendvb-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphaddsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphsubw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphsubsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtph2ps-ymm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2ph-mem_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-mem_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherqpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherqpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherqps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherqps-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherdps-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherdps-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherdpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherdpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherqq-ymm_mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherqq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherdd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdd-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherdq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vaesdec-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesdec-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesdeclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesdeclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesenc-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesenc-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesenclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesenclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaeskeygenassist-xmm_xmm_imd,6.666666666666667,None,"(3.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,6.666666666666667,0.0,0.0)" +vaeskeygenassist-xmm_mem_imd,6.333333333333333,None,"(3.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" diff --git a/osaca/data/skx_data.csv b/osaca/data/skx_data.csv new file mode 100644 index 0000000..785f6ae --- /dev/null +++ b/osaca/data/skx_data.csv @@ -0,0 +1,9664 @@ +instr,TP,LT,ports +sldt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sldt-,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldt-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldtl-r32,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldt-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sldtq-r64,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +repe scasb-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jns-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jno-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lar-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +larl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +larq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lar-,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +lar-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +larl-r32_r32,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +lar-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +larq-r64_r64,1.5,None,"(1.0,0.0,1.5,0.0,0.0,0.0,0.5,1.0,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnl-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xadd-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddb-mem_r8,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-mem,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddl-mem_r32,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xaddq-mem_r64,1.0,None,"(0.5,0.0,0.5,1.0,1.0,1.0,0.5,0.5,0.0)" +xadd-,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddl-r32_r32,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xadd-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xaddq-r64_r64,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +cmovbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmpq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +cmp-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmp-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmpq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lsl-mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-r32_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lsl-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lslq-r64_mem,1.25,None,"(1.25,0.0,1.25,0.5,0.5,0.0,0.25,1.25,0.0)" +lahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cbw-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +not-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +not-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +notq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +nop-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +inc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +inc-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +incq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +lock adc-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adcb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adc-mem,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adc-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adcl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adc-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock adcq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock dec-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +out-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +outb-imd_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +outl-imd_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-r16_r8,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +out-r16_r32,7.083333333333333,None,"(7.083333333333333,0.0,2.583333333333333,1.5,1.5,1.0,3.583333333333333,5.75,0.0)" +call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +cmovnle-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlel-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnleq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnle-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlel-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnle-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnleq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_imd,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbbl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbbq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +sbb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sbb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +sbb-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbb-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sbbq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jnbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +std-,1.75,None,"(1.75,0.0,1.25,0.0,0.0,0.0,1.25,1.75,0.0)" +stosd-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xorq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +xor-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xorq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +xor-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xor-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +xorq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +stc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +str-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0,1.0,0.0)" +stosb-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock not-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)" +idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)" +idiv-mem,4.25,None,"(2.25,0.0,0.25,0.5,0.5,0.0,4.25,0.25,0.0)" +idiv-r32,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)" +idivl-r32,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)" +idiv-r64,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)" +idivq-r64,25.583333333333336,None,"(25.583333333333336,0.0,13.583333333333334,0.0,0.0,0.0,14.583333333333334,12.25,0.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shrd-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrdl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrdq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shrd-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrdq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shrd-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shrdb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shrd-mem_r32_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shrd-mem_r64_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shrd-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrdb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shrd-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsx-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsx-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movsxq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sgdt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +loop-LBL,2.5,None,"(2.5,0.0,1.0,0.0,0.0,0.0,1.0,2.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.0,0.5,0.0)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jbe-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +push-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pushw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cld-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +clc-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ret-imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +ret-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock subl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock sub-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock subq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btc-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,1.0,0.0)" +setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmpxchg-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgb-r8_r8,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchgq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +cmpxchg-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgl-r32_r32,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchg-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cmpxchgq-r64_r64,1.75,None,"(1.75,0.0,0.75,0.0,0.0,0.0,0.75,1.75,0.0)" +cwd-,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock andb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock andl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock and-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock andq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_imd,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testb-mem_r8,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testl-mem_r32,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +testq-mem_r64,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +test-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +test-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +testq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jz-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasw-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +js-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jo-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +scasd-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +scasb-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jb-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock cmpxchg-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchg-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchg-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock cmpxchgq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock inc-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +cmovnp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ret far-,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock orb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock orl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock or-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock orq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +enter-imd_imd,1.75,None,"(1.25,0.0,1.75,0.5,0.5,1.0,0.75,1.25,0.0)" +repne scasb-,10.166666666666666,None,"(10.166666666666666,0.0,6.166666666666666,1.5,1.5,0.0,6.166666666666666,6.5,0.0)" +leave-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +lock xadd-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddb-mem_r8,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddl-mem_r32,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xadd-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xaddq-mem_r64,2.0,None,"(2.0,0.0,1.0,1.0,1.0,1.0,1.0,2.0,0.0)" +lock xchg-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchgb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchgb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +xchgb-r8_r8,0.75,None,"(0.75,0.0,0.75,0.0,0.0,0.0,0.75,0.75,0.0)" +lock xchg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchg-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchgl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchg-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xchgq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchgl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchg-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +xchgq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +smsw-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +andq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +and-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +andq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +and-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +and-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +andq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mov-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jle-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cpuid-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)" +rdtsc-,2.25,None,"(2.25,0.0,1.25,0.0,0.0,0.0,2.25,2.25,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock addb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock addl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock add-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock addq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +sidt-mem,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock sbb-mem_r8,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbb-mem,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbb-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbbl-mem_r32,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbb-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +lock sbbq-mem_r64,2.75,None,"(2.75,0.0,0.75,1.0,1.0,1.0,0.75,2.75,0.0)" +insb-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +insd-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imul-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imulq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcr-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcrq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcr-r8_r8,3.25,None,"(2.75,0.0,3.25,0.0,0.0,0.0,1.25,2.75,0.0)" +rcrb-r8_r8,3.25,None,"(2.75,0.0,3.25,0.0,0.0,0.0,1.25,2.75,0.0)" +rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcr-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcrb-mem_r8,2.75,None,"(2.25,0.0,2.75,1.0,1.0,1.0,0.75,2.25,0.0)" +rcr-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcrb-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcr-r32_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcr-r64_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclb-r8_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem_imd,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r32_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclq-r64_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclb-r8,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-mem,1.0,None,"(0.75,0.0,0.25,1.0,1.0,1.0,0.25,0.75,0.0)" +rcl-,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rclq-r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,1.0,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,1.0,3.0,0.0)" +rclb-r8_r8,3.0,None,"(3.0,0.0,2.0,0.0,0.0,0.0,1.0,3.0,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rclb-mem_r8,2.5,None,"(2.5,0.0,1.5,1.0,1.0,1.0,0.5,2.5,0.0)" +rcl-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rclb-r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcl-r32_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +rcl-r64_r8,2.5,None,"(2.0,0.0,2.5,0.0,0.0,0.0,0.5,2.0,0.0)" +insw-,1.5,None,"(1.5,0.0,0.5,1.0,1.0,1.0,1.5,1.5,0.0)" +div-r32,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)" +divl-r32,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)" +div-r64,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)" +divq-r64,11.75,None,"(11.75,0.0,4.75,0.0,0.0,0.0,11.25,4.25,0.0)" +stosw-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +in-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +inb-r8_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +inl-r32_imd,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r8_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +in-r32_r16,7.333333333333333,None,"(7.333333333333333,0.0,2.833333333333333,1.5,1.5,0.0,3.833333333333333,6.0,0.0)" +cmovnz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovns-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovns-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovno-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovno-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovnb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovol-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovoq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovol-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovo-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovoq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0,0.0,0.0)" +pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pop-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popw-r16,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +jrcxz-LBL,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +shld-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shldl-mem_r32_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shldq-mem_r64_imd,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0,0.0,0.0)" +shld-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldl-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shldq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +shld-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shldb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shld-mem_r32_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shld-mem_r64_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,0.0,1.0,0.0)" +shld-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shldb-r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shld-r32_r32_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +shld-r64_r64_r8,1.25,None,"(1.25,0.0,1.25,0.0,0.0,0.0,0.25,1.25,0.0)" +sahf-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +cmovz-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovzq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovz-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovzq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovpq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovp-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovpq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovsq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovs-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovs-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovlq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovl-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovlq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovbq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +cmovb-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovb-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovbq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock bts-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_imd,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xorb-mem_r8,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xorl-mem_r32,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xor-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock xorq-mem_r64,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +orq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +or-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +or-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +or-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +orq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxb-r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movzx-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzx-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movzxq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,0.0,1.5,0.0)" +rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +jmp-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +jmp-LBL,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0,1.0,0.0)" +ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,0.5,0.5,1.0,0.0,1.5,0.0)" +ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.0,1.5,0.0)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmovnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbel-r32_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbeq-r64_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,1.0,0.0)" +cmovnbe-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbe-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbel-r32_r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbe-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +cmovnbeq-r64_r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +subl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +subq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +sub-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +subq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +sub-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +sub-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +subq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +neg-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +neg-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +negq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +cmpxchg8b-mem,3.25,None,"(3.25,0.0,2.25,1.0,1.0,1.0,2.25,3.25,0.0)" +lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +lock btr-mem_imd,2.0,None,"(2.0,0.0,0.5,1.0,1.0,1.0,0.5,2.0,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_imd,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addb-mem_r8,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addl-mem_r32,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +addq-mem_r64,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +add-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addb-r8_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addl-r32_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +addq-r64_mem,0.5,None,"(0.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +add-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addb-r8_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addl-r32_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +add-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +addq-r64_imd,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-mem_imd,1.0,None,"(0.75,0.0,0.75,1.0,1.0,1.0,0.75,0.75,0.0)" +adc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcb-mem_r8,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-mem,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcl-mem_r32,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adcq-mem_r64,1.25,None,"(1.25,0.0,0.25,1.0,1.0,1.0,0.25,1.25,0.0)" +adc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcb-r8_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adc-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adcb-r8_imd,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +adc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +lock cmpxchg8b-mem,4.75,None,"(4.75,0.0,2.75,1.0,1.0,1.0,2.75,4.75,0.0)" +cwde-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lea-mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leal-r32_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +lea-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +leaq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decb-r8,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-mem,1.0,None,"(0.25,0.0,0.25,1.0,1.0,1.0,0.25,0.25,0.0)" +dec-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decl-r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +dec-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +decq-r64,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +setbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,1.0,0.0)" +setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0)" +lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +lock neg-mem,1.75,None,"(1.75,0.0,0.75,1.0,1.0,1.0,0.75,1.75,0.0)" +bswap-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapl-r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswap-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bswapq-r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +jmp far-mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +divps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +addss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtpi2ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mmx,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cmpss-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +andnps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andnps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +cvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +cvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +ldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +orps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +orps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtss-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtss-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +subss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cmpps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cmpps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +xorps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +xorps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +subps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +subps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +minss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +minss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +addps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +addps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtsi2ss-xmm_r32,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +cvtsi2ss-xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +mulss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +fxrstor64-mem,19.833333333333332,None,"(19.833333333333332,0.0,14.833333333333332,15.5,15.5,0.0,14.833333333333332,7.5,0.0)" +sqrtps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttps2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +minps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtps2pi-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtps2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mulps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +mulps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +andps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fxrstor-mem,19.333333333333332,None,"(19.333333333333332,0.0,15.333333333333332,16.5,16.5,0.0,15.333333333333332,7.0,0.0)" +stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +maxps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +maxps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +comiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +maxss-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtdq2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvttps2dq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttps2dq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +divpd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divpd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pcmpgtw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpi2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +packuswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packuswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maskmovdqu-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +andnpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andnpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pslldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psubd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psadbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtps2dq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtps2dq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +packssdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packssdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmullw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmullw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +divsd-xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +divsd-xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +orpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +orpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cmppd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cmppd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movq2dq-xmm_mmx,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psubb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psubusw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psubw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaxsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtpd2dq-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +paddd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddb-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddb-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psrldq-xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +paddq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +punpckhqdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhqdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cmpsd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cmpsd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmulhuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmulhuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +minsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +minsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +addpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +addpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtsd2ss-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvtsd2ss-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +pslld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +sqrtsd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtsd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtsi2sd-xmm_r32,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +cvtsi2sd-xmm_r64,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +psllq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psubusb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +mulsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +subpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +subpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +sqrtpd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +andpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmulhw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmulhw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2dq-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +pshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +cvtss2sd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtss2sd-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +xorpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +xorpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +maxsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +maxsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +minpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +minpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +addsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +addsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +psrlq-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +psrld-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +subsd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +subsd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +paddsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +lfence-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +cvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtps2pd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtps2pd-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +mulpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +mulpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movdq2q-mmx_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +psubq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +punpckhbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmuludq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaddwd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmaddwd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +cvtdq2ps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +cvtdq2ps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmaxub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckhwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +cvtpd2ps-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +cvtpd2pi-mmx_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvtpd2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +mfence-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +pshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +maxpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +maxpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pminub-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +psubsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +comisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +packsswb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packsswb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +cvttpd2pi-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +pshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucom-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldl2t-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldl2e-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fyl2x-,4.5,None,"(4.5,0.0,0.5,0.0,0.0,0.0,4.5,1.5,0.0)" +faddp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fxtract-,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcompp-,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fcomp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fsubp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fyl2xp1-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +frndint-,7.75,None,"(7.75,0.0,0.75,0.0,0.0,0.0,7.75,1.75,0.0)" +fnclex-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,1.0,0.0)" +fptan-,4.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fcos-,9.5,None,"(9.5,0.0,1.0,0.0,0.0,0.0,8.0,2.5,0.0)" +fscale-,2.75,None,"(2.25,0.0,0.75,0.0,0.0,0.0,2.75,1.25,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fxam-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +fprem1-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fninit-,9.0,None,"(3.0,0.0,1.5,0.0,0.0,0.0,9.0,1.5,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fnop-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +fldpi-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fnstsw-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fnstsw-,1.25,None,"(1.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +fwait-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +f2xm1-,5.25,None,"(5.25,0.0,0.75,0.0,0.0,0.0,3.75,2.25,0.0)" +fprem-,2.25,None,"(2.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +fincstp-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +ftst-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldenv-mem,19.833333333333336,None,"(19.833333333333336,0.0,13.833333333333334,4.0,4.0,0.0,13.833333333333334,8.5,0.0)" +fldenv-mem,19.833333333333336,None,"(19.833333333333336,0.0,13.833333333333334,4.0,4.0,0.0,13.833333333333334,8.5,0.0)" +fpatan-,32.0,None,"(32.0,0.0,2.5,0.0,0.0,0.0,15.5,5.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +fsubrp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsin-,10.75,None,"(10.75,0.0,0.75,0.0,0.0,0.0,7.75,2.75,0.0)" +fldcw-mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdivr-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fdiv-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldln2-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fxch-fpu,6.0,None,"(6.0,0.0,2.0,0.0,0.0,0.0,4.0,3.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fld-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +fucomp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fdecstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldlg2-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fldz-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +fbstp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +fucompp-,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +fnstenv-mem,30.166666666666668,None,"(30.166666666666668,0.0,12.166666666666666,5.5,5.5,11.0,22.666666666666664,13.0,0.0)" +fnstenv-mem,30.166666666666668,None,"(30.166666666666668,0.0,12.166666666666666,5.5,5.5,11.0,22.666666666666664,13.0,0.0)" +fld1-,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +fsincos-,3.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,3.5,0.0,0.0)" +fnstcw-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.0,0.5,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +punpckhdq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhdq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +pcmpgtw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpgtd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpgtd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packuswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packuswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +psubd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psadbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packssdw-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packssdw-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +paddsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pxor-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pxor-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psubusw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +paddb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +por-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubusb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckldq-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pandn-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pandn-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pminsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pshufw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufw-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +paddsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +emms-,4.75,None,"(4.75,0.0,0.25,0.0,0.0,0.0,4.75,0.25,0.0)" +punpckhbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pand-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pand-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pmaxub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckhwd-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpckhwd-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminub-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pminub-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrw-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrw-mmx_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +psubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubsb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psubsb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pavgb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pavgb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maskmovq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +packsswb-mmx_mmx,2.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,2.25,0.25,0.0)" +punpcklbw-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +punpcklbw-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +repe scasq-,5.416666666666666,None,"(5.416666666666666,0.0,3.4166666666666665,0.5,0.5,0.0,3.4166666666666665,4.75,0.0)" +cdqe-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +syscall-,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +pushfq-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsxd-r64_r32,0.25,None,"(0.25,0.0,0.25,0.0,0.0,0.0,0.25,0.25,0.0)" +scasq-,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +popfq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +stosq-,1.0,None,"(0.25,0.0,0.25,0.5,0.5,1.0,0.25,0.25,0.0)" +cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +iretq-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lock cmpxchg16b-mem,5.5,None,"(5.5,0.0,1.5,1.0,1.0,1.0,5.5,3.5,0.0)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +roundpd-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +roundpd-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +roundps-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +roundps-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pblendw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mpsadbw-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +mpsadbw-xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phminposuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +phminposuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmulld-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +pmulld-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pcmpeqq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +packusdw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +packusdw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +blendpd-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendpd-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +rex.w pcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +rex.w pcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +rex.w pcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +rex.w pcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +pmuldq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmuldq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +dppd-xmm_mem_imd,1.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,1.6666666666666665,0.0,0.0)" +dppd-xmm_xmm_imd,1.6666666666666665,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,1.6666666666666665,0.0,0.0)" +dpps-xmm_mem_imd,2.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,2.0,0.0,0.0)" +dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmaxuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaxud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +blendps-xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +blendps-xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pminuw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pminud-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pinsrq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrq-xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrd-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +pinsrb-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pinsrb-xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +blendvps-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +blendvps-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +blendvpd-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +blendvpd-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +roundss-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +roundss-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +roundsd-xmm_mem_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +roundsd-xmm_xmm_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pblendvb-xmm_mem,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +pblendvb-xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +pmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +phsubd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phsubd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmulhrsw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +phsubw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phsubw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phsubw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phsubw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +psignw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psignw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psignw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psignd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psignd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psignd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +psignb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +psignb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +psignb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +phaddsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phaddsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +phaddsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +pmaddubsw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +phsubsw-mmx_mem,2.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +phsubsw-mmx_mmx,2.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +phsubsw-xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +phsubsw-xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +pabsw-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddd-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddd-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phaddd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +palignr-mmx_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-mmx_mmx_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +palignr-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +palignr-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-mmx_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-mmx_mmx,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pshufb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +pshufb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pabsd-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +pabsb-mmx_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +pabsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +pabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +phaddw-mmx_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +phaddw-mmx_mmx,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +phaddw-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +phaddw-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vmclear-mem,4.5,None,"(3.5,0.0,3.5,1.0,1.0,1.0,4.5,3.5,0.0)" +vmptrst-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +addsubps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +addsubps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +addsubpd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +addsubpd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +hsubps-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +hsubps-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +hsubpd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +hsubpd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +haddpd-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +haddpd-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +haddps-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +haddps-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +xsetbv-,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.0,1.5,0.0)" +xgetbv-,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +xrstor-mem,10.166666666666666,None,"(10.166666666666666,0.0,7.166666666666666,0.5,0.5,0.0,6.166666666666666,6.5,0.0)" +xrstor64-mem,10.166666666666666,None,"(10.166666666666666,0.0,7.166666666666666,0.5,0.5,0.0,6.166666666666666,6.5,0.0)" +xsave-mem,13.5,None,"(13.5,0.0,8.0,1.0,1.0,1.0,8.0,7.5,0.0)" +xsave64-mem,12.916666666666668,None,"(12.916666666666668,0.0,7.916666666666667,1.0,1.0,1.0,7.916666666666667,7.25,0.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +blsmsk-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmsk-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmskq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsmsk-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsmskq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnl-r32_r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnl-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andn-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andnq-r64_r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +andn-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +andnq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bextr-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrl-r32_mem_r32,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrl-r32_r32_r32,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextr-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextrq-r64_mem_r64,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.5,0.5,0.0)" +bextr-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +bextrq-r64_r64_r64,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.5,0.5,0.0)" +blsi-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsil-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsil-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsi-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsiq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsi-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsiq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrl-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrl-r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsr-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsrq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +blsr-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +blsrq-r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +rdtscp-,7.333333333333333,None,"(5.333333333333333,0.0,5.333333333333333,0.0,0.0,0.0,7.333333333333333,4.0,0.0)" +aesdec-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesdec-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aeskeygenassist-xmm_xmm_imd,6.666666666666667,None,"(3.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,6.666666666666667,0.0,0.0)" +aeskeygenassist-xmm_mem_imd,6.333333333333333,None,"(3.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +aesenclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesenclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesdeclast-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesdeclast-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +aesenc-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +aesenc-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +xsaveopt64-mem,14.666666666666668,None,"(14.666666666666668,0.0,9.166666666666668,1.0,1.0,1.0,9.166666666666668,8.0,0.0)" +xsaveopt-mem,14.666666666666668,None,"(14.666666666666668,0.0,9.166666666666668,1.0,1.0,1.0,9.166666666666668,8.0,0.0)" +stac-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +clac-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adox-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adoxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adox-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adoxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxl-r32_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcx-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcxq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +adcx-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +adcxq-r64_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mwait-,2.75,None,"(2.75,0.0,1.75,0.0,0.0,0.0,2.75,2.75,0.0)" +movbe-mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbel-r32_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbeq-r64_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +movbe-mem,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbe-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbel-mem_r32,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbe-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +movbeq-mem_r64,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5,0.0,0.0)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pclmulqdq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +pclmulqdq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +clflush-mem,0.75,None,"(0.75,0.0,0.25,0.0,0.0,0.0,0.25,0.75,0.0)" +pause-,1.25,None,"(1.25,0.0,0.75,0.0,0.0,0.0,0.75,1.25,0.0)" +vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovss-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhaddpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vhaddpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vhaddpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vhaddpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vstmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vsqrtsd-xmm_xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsqrtss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendvb-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vpblendvb-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vzeroall-,4.166666666666667,None,"(4.166666666666667,0.0,4.166666666666667,0.0,0.0,0.0,4.166666666666667,3.5,0.0)" +vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqa-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqa-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_ymm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovdqu-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_ymm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcmpss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vldmxcsr-mem,1.25,None,"(1.25,0.0,0.25,0.5,0.5,0.0,0.25,0.25,0.0)" +vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcmpsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvpd-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvpd-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_ymm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vsqrtpd-xmm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_xmm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,12,None,"(1.0,12,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_ymm,12,None,"(1.0,12,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_mem_imd,1.5,None,"(1.5,0.0,1.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdppd-xmm_xmm_xmm_imd,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vdpps-xmm_xmm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdpps-xmm_xmm_xmm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdpps-ymm_ymm_mem_imd,2.0,None,"(2.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdpps-ymm_ymm_ymm_imd,2.0,None,"(2.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaskmovpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovpd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vmaskmovpd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaskmovps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovps-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vmaskmovps-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vroundsd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vroundsd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vroundss-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vroundss-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vhsubpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vhsubpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vhsubpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vhsubpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovups-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vhsubps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vhsubps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vhsubps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vhsubps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vhaddps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vhaddps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vhaddps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vhaddps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovupd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,3,None,"(1.0,3,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_xmm,3,None,"(1.0,3,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,4,None,"(1.0,4,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_xmm,4,None,"(1.0,4,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcmpps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcmpps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcmpps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcmppd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcmppd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphaddsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvps-xmm_xmm_mem_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-xmm_xmm_xmm_xmm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vblendvps-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vmpsadbw-xmm_xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-xmm_xmm_xmm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +rex.w vpcmpestri-xmm_mem_imd,4.25,None,"(4.25,0.0,0.25,0.5,0.5,0.0,3.25,0.25,0.0)" +rex.w vpcmpestri-xmm_xmm_imd,4.25,None,"(4.25,0.0,0.25,0.0,0.0,0.0,3.25,0.25,0.0)" +vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +rex.w vpcmpestrm-xmm_mem_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.5,0.5,0.0,3.583333333333333,0.25,0.0)" +rex.w vpcmpestrm-xmm_xmm_imd,4.583333333333333,None,"(4.583333333333333,0.0,0.5833333333333333,0.0,0.0,0.0,3.583333333333333,0.25,0.0)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vzeroupper-,1.0833333333333333,None,"(1.0833333333333333,0.0,1.0833333333333333,0.0,0.0,0.0,1.0833333333333333,0.75,0.0)" +vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendpd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendps-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendps-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendps-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendps-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubw-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubw-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubd-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpblendw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovaps-ymm_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtdq2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vroundpd-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vroundpd-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vroundpd-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vroundpd-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vroundps-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vroundps-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vroundps-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vroundps-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vcvtsd2ss-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333,0.0,0.0)" +vcvtsd2ss-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vpclmulqdq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpclmulqdq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcpps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmaskmovdqu-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphminposuw-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vphminposuw-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-xmm_xmm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphsubsw-xmm_xmm_xmm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpeqb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpeqb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovntdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpxor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendvb-ymm_ymm_mem_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666,0.0,0.0)" +vpblendvb-ymm_ymm_ymm_ymm,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666,0.0,0.0)" +vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpand-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpandn-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandn-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vphaddd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphaddd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsignw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsignd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsignd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphaddsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphaddsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmpsadbw-ymm_ymm_mem_imd,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmpsadbw-ymm_ymm_ymm_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vphsubw-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubw-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vphsubd-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpblendw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpor-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpor-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2i128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vperm2i128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovq-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpmaskmovq-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaskmovd-mem_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpmaskmovd-mem_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vinserti128-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti128-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpblendd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpgtw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vphsubsw-ymm_ymm_mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,2.0,0.0,0.0)" +vphsubsw-ymm_ymm_ymm,2.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,2.0,0.0,0.0)" +vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +kmovb-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kmovb-k_mem,1.25,None,"(0.25,0.0,0.25,0.5,0.5,0.0,1.25,0.25,0.0)" +kmovb-mem_k,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +kmovb-k_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kmovb-r32_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kxnorq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kxnorw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kxnorb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kxnord-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kxorq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kunpckdq-k_k_k,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kord-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +korq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kmovd-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kmovd-k_mem,1.25,None,"(0.25,0.0,0.25,0.5,0.5,0.0,1.25,0.25,0.0)" +kmovd-mem_k,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +kmovd-k_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kmovd-r32_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kmovq-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kmovq-k_mem,1.25,None,"(0.25,0.0,0.25,0.5,0.5,0.0,1.25,0.25,0.0)" +kmovq-mem_k,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +kmovq-k_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kmovq-r64_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kmovw-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kmovw-k_mem,1.25,None,"(0.25,0.0,0.25,0.5,0.5,0.0,1.25,0.25,0.0)" +kmovw-mem_k,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +kmovw-k_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kmovw-r32_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kshiftrq-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kortestw-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kortestq-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kortestd-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kortestb-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kandnb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kaddw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kaddq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kandb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kandnd-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kandw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kaddd-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kandnq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kandnw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kandq-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kaddb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ktestw-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ktestq-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +knotq-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +knotw-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +knotb-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +knotd-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kunpckwd-k_k_k,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kunpckbw-k_k_k,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +ktestb-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kshiftlq-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kxorb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kandd-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kxorw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ktestd-k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kshiftrw-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kshiftrb-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kshiftrd-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +korb-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kxord-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +kshiftld-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kshiftlb-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +kshiftlw-k_k_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +korw-k_k_k,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2ph-mem_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-mem_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherqpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherqpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherqps-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherqps-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherdps-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherdps-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherqd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vgatherdpd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vgatherdpd-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherqq-ymm_mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherqq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherdd-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdd-xmm_mem_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherdq-ymm_mem_ymm,1.5,None,"(1.0,0.0,0.0,1.5,1.5,0.0,1.0,0.0,0.0)" +vpgatherdq-xmm_mem_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,0.0,1.3333333333333333,0.0,0.0)" +vaesdec-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesdec-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesdeclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesdeclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesenc-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesenc-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaesenclast-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vaesenclast-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaeskeygenassist-xmm_xmm_imd,6.666666666666667,None,"(3.6666666666666665,0.0,0.6666666666666666,0.0,0.0,0.0,6.666666666666667,0.0,0.0)" +vaeskeygenassist-xmm_mem_imd,6.333333333333333,None,"(3.3333333333333335,0.0,0.3333333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +shrx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shrx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shrxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +sarx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +sarxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +bzhi-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhil-r32_mem_r32,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhil-r32_r32_r32,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhi-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhiq-r64_mem_r64,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +bzhi-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +bzhiq-r64_r64_r64,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +pdep-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdep-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pdep-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pdepq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +rorx-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxl-r32_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxl-r32_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorx-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorxq-r64_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +rorx-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +rorxq-r64_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +mulx-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_r32,1.25,None,"(0.75,0.0,1.25,0.0,0.0,0.0,0.25,0.75,0.0)" +mulx-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulxl-r32_r32_mem,1.25,None,"(0.75,0.0,1.25,0.5,0.5,0.0,0.25,0.75,0.0)" +mulx-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +mulx-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +mulxq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +shlx-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxl-r32_mem_r32,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxl-r32_r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlx-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlxq-r64_mem_r64,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.0,0.5,0.0)" +shlx-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +shlxq-r64_r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.0,0.5,0.0)" +pext-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextl-r32_r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextl-r32_r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pext-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pextq-r64_r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0,0.0,0.0)" +pext-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextq-r64_r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vfpclassss-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassss-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassss-k{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfpclassss-k_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovsd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovsd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovsd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovsd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasssd-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasssd-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasssd-k{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfpclasssd-k_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmw-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmulhuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhuw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhuw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhuw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovss-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovss-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovss-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovss-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vrsqrt14ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14sd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vptestnmq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vprolvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vreducepd-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducepd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducepd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducepd-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducepd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vreducepd-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vreducepd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducepd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmuludq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmuludq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuludq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuludq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vprolq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprolq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprolq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslldq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpslldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslldq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpslldq-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslldq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpternlogq-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpternlogq-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpternlogq-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogq-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogq-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogq-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogq-xmm{opmask}_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm{opmask}_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogq-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vrangesd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangesd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangesd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangesd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2uqq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2uqq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vpternlogd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpternlogd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpternlogd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpternlogd-xmm{opmask}_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-xmm_xmm_xmm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-xmm_xmm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm{opmask}_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm_ymm_ymm_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpternlogd-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vrangess-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangess-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangess-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangess-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmulhrsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhrsw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhrsw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhrsw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmovdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vfmsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf64x2-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x2-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x2-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf64x2-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf64x2-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x2-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x2-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf64x2-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpunpcklbw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklbw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklbw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vinsertf64x4-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x4-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf64x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf64x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2uqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2uqq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti32x4-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x4-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti32x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti32x4-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x4-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x4-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti32x4-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpermd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vplzcntd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vplzcntd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vplzcntd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmovdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovdw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcvtph2ps-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtph2ps-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtph2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtph2ps-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtph2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtph2ps-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtph2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtph2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpermq-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermw-xmm{opmask}_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-xmm_xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-xmm{opmask}_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpermw-xmm_xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpermw-ymm{opmask}_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-ymm_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-ymm{opmask}_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpermw-ymm_ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpermw-zmm{opmask}_zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-zmm_zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpermw-zmm{opmask}_zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpermw-zmm_zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vmovshdup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovshdup-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovshdup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovshdup-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovshdup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovshdup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovshdup-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmovsdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsdw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vplzcntq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vplzcntq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vplzcntq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vplzcntq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vplzcntq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2qq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttps2qq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vextractf64x4-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x4-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf64x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpermilps-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vgatherqpd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherqpd-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherqpd-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vgatherqpd-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vgatherqpd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherqpd-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgatherqps-ymm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vgatherqps-ymm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vgatherqps-xmm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherqps-xmm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherqps-xmm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherqps-xmm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vscalefpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vscalefpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpavgw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmovusqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcmpeqd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vscalefps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vscalefps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vscalefps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpeqb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqb-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovusqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqd-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqd-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqd-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqd-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusqd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusqd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpblendmq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxdq-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxdq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpblendmw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti64x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti64x2-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti64x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti64x2-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovddup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovddup-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovddup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovddup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovddup-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmaxsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpblendmb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu32-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu32-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu32-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu32-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu32-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu32-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu32-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu32-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu32-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu32-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu32-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpblendmd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpblendmd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpblendmd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpblendmd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsrlvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxsq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vandps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpinsrd-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmulps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmulps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmulps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsrldq-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrldq-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrldq-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrldq-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsrldq-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrldq-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovntdqa-zmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovntdqa-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovntdqa-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovaps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovaps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovaps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovaps-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovaps-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovaps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vgetmantsd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantsd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2udq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttpd2udq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2udq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2udq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2udq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2udq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vpshufhw-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufhw-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufhw-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vgetmantss-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantss-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandnd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandnd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpconflictq-zmm{opmask}_zmm,11.5,None,"(9.5,0.0,0.0,0.0,0.0,0.0,11.5,0.0,0.0)" +vpconflictq-zmm_zmm,11.5,None,"(9.5,0.0,0.0,0.0,0.0,0.0,11.5,0.0,0.0)" +vpconflictq-zmm{opmask}_mem,11.5,None,"(9.5,0.0,0.0,0.5,0.5,0.0,11.5,0.0,0.0)" +vpconflictq-zmm_mem,11.5,None,"(9.5,0.0,0.0,0.5,0.5,0.0,11.5,0.0,0.0)" +vpconflictq-zmm{opmask}_mem,11.5,None,"(9.5,0.0,0.0,0.5,0.5,0.0,11.5,0.0,0.0)" +vpconflictq-zmm_mem,11.5,None,"(9.5,0.0,0.0,0.5,0.5,0.0,11.5,0.0,0.0)" +vpconflictq-xmm{opmask}_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-xmm{opmask}_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-xmm{opmask}_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpconflictq-ymm{opmask}_ymm,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)" +vpconflictq-ymm_ymm,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)" +vpconflictq-ymm{opmask}_mem,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +vpconflictq-ymm_mem,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +vpconflictq-ymm{opmask}_mem,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +vpconflictq-ymm_mem,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.5,0.5,0.0,6.333333333333333,0.0,0.0)" +vorpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vorpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpconflictd-zmm{opmask}_zmm,20.5,None,"(14.5,0.0,0.0,0.0,0.0,0.0,20.5,0.0,0.0)" +vpconflictd-zmm_zmm,20.5,None,"(14.5,0.0,0.0,0.0,0.0,0.0,20.5,0.0,0.0)" +vpconflictd-zmm{opmask}_mem,20.5,None,"(14.5,0.0,0.0,0.5,0.5,0.0,20.5,0.0,0.0)" +vpconflictd-zmm_mem,20.5,None,"(14.5,0.0,0.0,0.5,0.5,0.0,20.5,0.0,0.0)" +vpconflictd-zmm{opmask}_mem,20.5,None,"(14.5,0.0,0.0,0.5,0.5,0.0,20.5,0.0,0.0)" +vpconflictd-zmm_mem,20.5,None,"(14.5,0.0,0.0,0.5,0.5,0.0,20.5,0.0,0.0)" +vpconflictd-xmm{opmask}_xmm,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)" +vpconflictd-xmm_xmm,6.333333333333333,None,"(3.833333333333333,0.0,3.833333333333333,0.0,0.0,0.0,6.333333333333333,0.0,0.0)" +vpconflictd-xmm{opmask}_mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)" +vpconflictd-xmm_mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)" +vpconflictd-xmm{opmask}_mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)" +vpconflictd-xmm_mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.5,0.5,0.0,2.6666666666666665,0.0,0.0)" +vpconflictd-ymm{opmask}_ymm,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.0,0.0,0.0,10.666666666666666,0.0,0.0)" +vpconflictd-ymm_ymm,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.0,0.0,0.0,10.666666666666666,0.0,0.0)" +vpconflictd-ymm{opmask}_mem,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)" +vpconflictd-ymm_mem,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)" +vpconflictd-ymm{opmask}_mem,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)" +vpconflictd-ymm_mem,10.666666666666666,None,"(5.166666666666667,0.0,5.166666666666667,0.5,0.5,0.0,10.666666666666666,0.0,0.0)" +vpandnq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandnq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandnq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandnq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandnq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmaxsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpminsd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2qq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2qq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2qq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtps2qq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vpminsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminsq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminsq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti32x2-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti32x2-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti32x2-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti32x2-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcasti32x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti32x2-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpackssdw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackssdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackssdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2udq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2udq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2udq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2udq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2udq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2udq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2udq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2udq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vfpclassps-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassps-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassps-k{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassps-k_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassps-k{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclassps-k_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovd2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovd2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovd2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vfpclasspd-k{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasspd-k_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasspd-k{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasspd-k_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasspd-k{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfpclasspd-k_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vsqrtsd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vorps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vorps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vorps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmovsxbq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vshuff32x4-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff32x4-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vsqrtss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vunpckhpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtss2sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtss2sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtss2sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmovzxbd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbd-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrad-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrad-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrad-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtusi2ss-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtusi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpmovb2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovb2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovb2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpinsrq-xmm_xmm_r64_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsraw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtusi2sd-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtusi2sd-xmm_xmm_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpshufb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshufb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshufb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vbroadcastf32x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x4-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x4-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf32x4-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovsldup-zmm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovsldup-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovsldup-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovsldup-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovsldup-ymm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovsldup-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovsldup-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpcmpgtb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtb-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbw-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdivps-zmm{opmask}_zmm_zmm,10,None,"(2.5,10,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vdivps-zmm_zmm_zmm,10,None,"(2.5,10,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vdivps-zmm{opmask}_zmm_mem,10,None,"(2.5,10,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivps-zmm_zmm_mem,10,None,"(2.5,10,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivps-zmm{opmask}_zmm_mem,10,None,"(2.5,10,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivps-zmm_zmm_mem,10,None,"(2.5,10,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivps-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm{opmask}_ymm_ymm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_ymm,5,None,"(1.0,5,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm{opmask}_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm{opmask}_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,5,None,"(1.0,5,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcmpss-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpss-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpss-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpss-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpshuflw-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpshuflw-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfmsub132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcmpsd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpsd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpsd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpsd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsllq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmovzxbq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfmsubadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsllw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsllw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpermi2pd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfmsub231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vshufpd-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufpd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vsubsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtps-zmm{opmask}_zmm,12,None,"(2.5,12,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsqrtps-zmm_zmm,12,None,"(2.5,12,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsqrtps-zmm{opmask}_mem,12,None,"(2.5,12,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtps-zmm_mem,12,None,"(2.5,12,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtps-zmm{opmask}_mem,12,None,"(2.5,12,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtps-zmm_mem,12,None,"(2.5,12,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm{opmask}_ymm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_ymm,6,None,"(1.0,6,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm{opmask}_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm{opmask}_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,6,None,"(1.0,6,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpandd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtps2dq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2dq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmovw2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovw2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovw2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermi2ps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpandq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpandq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpandq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpandq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vsqrtpd-zmm{opmask}_zmm,24,None,"(2.5,24,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsqrtpd-zmm_zmm,24,None,"(2.5,24,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsqrtpd-zmm{opmask}_mem,24,None,"(2.5,24,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtpd-zmm_mem,24,None,"(2.5,24,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtpd-zmm{opmask}_mem,24,None,"(2.5,24,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtpd-zmm_mem,24,None,"(2.5,24,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsqrtpd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vsubss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vshufps-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufps-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfnmadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdbpsadbw-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdbpsadbw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdbpsadbw-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdbpsadbw-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdbpsadbw-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vdbpsadbw-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vdbpsadbw-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vprold-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprold-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprold-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vexpandpd-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandpd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandpd-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandpd-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandpd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandpd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vfmsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vexpandps-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandps-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandps-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandps-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vexpandps-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vexpandps-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmuldq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmuldq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmuldq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuldq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuldq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmuldq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmuldq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgatherdps-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherdps-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherdps-xmm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vgatherdps-xmm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vgatherdps-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherdps-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherqd-ymm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherqd-ymm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherqd-xmm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherqd-xmm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherqd-xmm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherqd-xmm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vgatherdpd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherdpd-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vgatherdpd-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vgatherdpd-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vgatherdpd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vgatherdpd-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpunpckhdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtpd2dq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2dq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2dq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2dq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vpgatherqq-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherqq-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherqq-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vpgatherqq-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vpgatherqq-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherqq-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtqq2pd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtqq2pd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtqq2pd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf64x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf64x4-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtqq2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtqq2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtqq2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtqq2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtqq2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtqq2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vbroadcastf64x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf64x2-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf64x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf64x2-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmulpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmulpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmulpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcompressd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressd-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressd-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovzxbw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxbw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxbw-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttps2udq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2udq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2udq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2udq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcompressq-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressq-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressq-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressq-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressq-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressq-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressq-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressq-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressq-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressq-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpcompressq-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcompressq-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpaddsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmovsqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vgetmantpd-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetmantpd-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetmantpd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantpd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantpd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantpd-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantpd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantpd-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpalignr-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpalignr-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsqd-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqd-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqd-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqd-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovsqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovsqb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpaddsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmovwb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovwb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovwb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovwb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovwb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovwb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovwb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vgetmantps-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetmantps-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetmantps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantps-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetmantps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetmantps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaxpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaxpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpackuswb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackuswb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackuswb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmaxps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaxps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmaxps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmaxps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpunpckhqdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpabsw-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsw-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsw-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsq-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14sd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14sd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsub213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vextractf32x4-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x4-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf32x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf32x4-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x4-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x4-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf32x4-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpabsb-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsb-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsb-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vextractf32x8-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x8-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf32x8-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf32x8-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpcmpuw-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuw-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuw-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuw-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuw-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuw-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuw-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsd2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2usil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2usiq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddusw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpaddusb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddusb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vunpckhps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpckhps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpbroadcastd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpbroadcastd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastd-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastd-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vfmadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu8-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu8-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu8-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu8-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu8-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu8-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu8-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu8-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu8-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,1.0,1.0,2.0,1.0,0.0,0.0)" +vmovdqu8-mem_zmm,2.0,None,"(0.0,0.0,0.0,1.0,1.0,2.0,1.0,0.0,0.0)" +vshufi32x4-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi32x4-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi32x4-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovusdb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmulhw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulhw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulhw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vxorpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vxorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpermilpd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm{opmask}_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermilpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovusdw-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovusdw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovusdw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpbroadcastq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpbroadcastq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpbroadcastq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-zmm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-zmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastq-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastq-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpbroadcastq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm{opmask}_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastq-ymm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaddubsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddubsw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddubsw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddubsw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vxorps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vxorps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vxorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vxorps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaless-xmm{opmask}_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaless-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaless-xmm{opmask}_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaless-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandnps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandnps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovups-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovups-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovups-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovups-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovups-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovups-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovups-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovups-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovups-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovups-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovups-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpsravq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vinserti32x8-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x8-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti32x8-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti32x8-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtuqq2pd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtuqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtuqq2pd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtuqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtuqq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalesd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalesd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalesd-xmm{opmask}_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalesd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovupd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovupd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovupd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovupd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovupd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovupd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovupd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpsravd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsravd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsravd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvttps2dq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2dq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2dq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivsd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovntdq-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntdq-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vcvtuqq2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtuqq2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtuqq2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtuqq2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtuqq2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtuqq2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtuqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtuqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtuqq2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtuqq2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vfnmadd231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcmpps-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmpps-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmpps-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcmppd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vbroadcasti32x8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti32x8-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsubpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsubpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vandnpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandnpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vandnpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vandnpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtss2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vminss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti32x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti32x4-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti32x4-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcasti32x4-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vfixupimmps-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfixupimmps-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfixupimmps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x8-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x8-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsubps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vsubps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vsubps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vsubps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmpd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmpd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x2-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastf32x2-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastf32x2-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf32x2-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastf32x2-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastf32x2-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastf32x2-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastf32x2-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpw-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpw-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpw-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpw-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpw-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpw-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpw-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vscatterqps-mem{opmask}_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vscatterqps-mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vscatterqps-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vscatterqps-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vscatterqps-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vscatterqps-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vpsubusb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpcmpd-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpd-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpb-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpb-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsubusw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubusw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubusw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vshufi64x2-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi64x2-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshufi64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscaleps-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscaleps-xmm{opmask}_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaleps-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaleps-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm{opmask}_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscaleps-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetexpps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetexpps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vfmadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vgetexppd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetexppd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vgetexppd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexppd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexppd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexppd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexppd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexppd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vrndscalepd-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vrndscalepd-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscalepd-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscalepd-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscalepd-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrndscalepd-xmm{opmask}_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalepd-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalepd-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-xmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-xmm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm{opmask}_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm_ymm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vrndscalepd-ymm_mem_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpabsd-zmm{opmask}_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-zmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpabsd-ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpaddq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpcmpuq-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpuq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpuq-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpexpandd-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandd-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandd-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpcmpub-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpub-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpub-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpub-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpub-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpub-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpub-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpud-k{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpud-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpud-k_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpaddd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpaddd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpaddd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpaddd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpexpandq-zmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-zmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandq-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandq-xmm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandq-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandq-ymm{opmask}_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-ymm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0,0.0,0.0)" +vpexpandq-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpexpandq-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcvttsd2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2usil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2usiq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vshuff64x2-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff64x2-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vshuff64x2-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmb-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovq2m-k_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovq2m-k_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovq2m-k_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vprord-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprord-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprord-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpextrq-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vcvtpd2qq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2qq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2qq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14pd-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vaddpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vaddpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14ps-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrcp14ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrcp14ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vaddps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vaddps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsraq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsraq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsraq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsraq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vptestmw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmw-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmw-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmw-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmulld-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulld-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmulld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmulld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmulld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmulld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmulld-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulld-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-ymm{opmask}_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulld-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmulld-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmulld-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vptestnmd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestnmb-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestnmb-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmullq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmullq-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-xmm_xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-ymm{opmask}_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmullq-ymm_ymm_ymm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmullq-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-ymm{opmask}_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-ymm_ymm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmullq-zmm{opmask}_zmm_zmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vpmullq-zmm_zmm_zmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vpmullq-zmm{opmask}_zmm_mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vpmullq-zmm_zmm_mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vpmullq-zmm{opmask}_zmm_mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vpmullq-zmm_zmm_mem,1.5,None,"(1.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vpmullw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmullw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmullw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmullw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vextractf64x2-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x2-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x2-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf64x2-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf64x2-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x2-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextractf64x2-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextractf64x2-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcompresspd-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompresspd-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompresspd-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompresspd-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompresspd-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompresspd-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompresspd-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompresspd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompresspd-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompresspd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompresspd-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompresspd-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpunpcklwd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklwd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklwd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfnmsub213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcompressps-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompressps-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompressps-zmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompressps-zmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompressps-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompressps-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompressps-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompressps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompressps-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompressps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcompressps-ymm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vcompressps-ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vinserti64x2-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x2-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x2-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti64x2-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinserti64x2-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x2-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x2-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti64x2-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti64x4-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x4-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinserti64x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinserti64x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +valignq-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignq-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignq-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vreducesd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducesd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducesd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducesd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +valignd-zmm{opmask}_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-zmm_zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-zmm{opmask}_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-zmm_zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-xmm{opmask}_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-xmm{opmask}_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-ymm{opmask}_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +valignd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-ymm{opmask}_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +valignd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vreducess-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducess-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreducess-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreducess-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpermi2w-xmm{opmask}_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-xmm{opmask}_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-ymm{opmask}_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-ymm{opmask}_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermi2w-zmm{opmask}_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +vpermi2w-zmm_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +vpermi2w-zmm{opmask}_zmm_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +vpermi2w-zmm_zmm_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +vpinsrb-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrb-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfmadd213sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpackusdw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpackusdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpackusdw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxud-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpermi2q-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovdqu16-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu16-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu16-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu16-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu16-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu16-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu16-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu16-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu16-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu16-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu16-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmaxuq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmaxuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxbd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermi2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermi2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpinsrw-xmm_xmm_r32_imd,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpinsrw-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfmadd213ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaxuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxuw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxuw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-zmm{opmask}_zmm_zmm,16,None,"(2.5,16,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vdivpd-zmm_zmm_zmm,16,None,"(2.5,16,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vdivpd-zmm{opmask}_zmm_mem,16,None,"(2.5,16,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivpd-zmm_zmm_mem,16,None,"(2.5,16,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivpd-zmm{opmask}_zmm_mem,16,None,"(2.5,16,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivpd-zmm_zmm_mem,16,None,"(2.5,16,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vdivpd-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm{opmask}_ymm_ymm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_ymm,8,None,"(1.0,8,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm{opmask}_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm{opmask}_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,8,None,"(1.0,8,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlw-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlw-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrlq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrlq-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovapd-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovapd-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovapd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovapd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovapd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovapd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovapd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpbroadcastb-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastb-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpcklqdq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfnmadd132sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsrld-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsrld-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsrld-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmovzxwd-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwd-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfnmadd132ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu64-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu64-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqu64-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu64-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqu64-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu64-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu64-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu64-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu64-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqu64-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqu64-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vfixupimmss-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmss-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmss-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmss-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscatterqpd-mem{opmask}_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vscatterqpd-mem_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vscatterqpd-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vscatterqpd-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vscatterqpd-mem{opmask}_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vscatterqpd-mem_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vcvtudq2ps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2ps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtudq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtudq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtudq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtudq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastsd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastsd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastsd-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastsd-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastsd-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastsd-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastsd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastsd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vmovdqa64-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqa64-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqa64-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqa64-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqa64-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa64-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa64-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa64-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa64-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa64-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa64-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpcmpeqw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpeqw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpeqw-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfixupimmsd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmsd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfixupimmsd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfixupimmsd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttps2uqq-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttps2uqq-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2uqq-zmm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttps2uqq-zmm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vbroadcastss-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastss-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcastss-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastss-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vbroadcastss-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vbroadcastss-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vcvtudq2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtudq2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtudq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtudq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vminpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vminpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminpd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2ps-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vprorvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vptestmd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfnmsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpbroadcastw-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-ymm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm{opmask}_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpbroadcastw-zmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckldq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vptestmq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtdq2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtdq2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtdq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtdq2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vprorvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vprorvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vprorvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vminps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vminps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vminps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vminps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vminps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubb-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubb-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubb-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubb-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubb-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsubw-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubw-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpsubw-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsubw-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsadbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsadbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsadbw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpsadbw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtss2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2usil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtss2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtss2usiq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vfmsubadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxorq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpxorq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpxorq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxorq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxorq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxorq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxorq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxorq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vextracti64x4-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x4-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti64x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vinsertf32x8-zmm{opmask}_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x8-zmm_zmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x8-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf32x8-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vextracti64x2-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x2-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x2-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti64x2-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti64x2-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x2-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti64x2-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti64x2-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vinsertf32x4-zmm{opmask}_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x4-zmm_zmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x4-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf32x4-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vinsertf32x4-ymm{opmask}_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x4-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vinsertf32x4-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vinsertf32x4-ymm_ymm_mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpslld-zmm{opmask}_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-zmm_zmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-zmm{opmask}_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-zmm_zmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-zmm{opmask}_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-zmm_mem_imd,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm{opmask}_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-xmm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm{opmask}_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm_ymm_xmm,1.0,None,"(0.5,0.0,0.5,0.0,0.0,0.0,1.0,0.0,0.0)" +vpslld-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpslld-ymm_mem_imd,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vextracti32x4-xmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x4-xmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x4-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti32x4-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti32x4-xmm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x4-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x4-mem{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti32x4-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpxord-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpxord-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpxord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpxord-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxord-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpxord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpermt2ps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2ps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vextracti32x8-ymm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x8-ymm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vextracti32x8-mem{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vextracti32x8-mem_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpmovzxdq-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxdq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxdq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovzxdq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtsi2ss-xmm_xmm_r64,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vrangepd-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangepd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangepd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangepd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangepd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrangepd-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrangepd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangepd-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-xmm{opmask}_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreduceps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreduceps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-xmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-ymm{opmask}_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreduceps-ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vreduceps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-ymm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-zmm{opmask}_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vreduceps-zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vreduceps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-zmm{opmask}_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vreduceps-zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtsd2ss-xmm{opmask}_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtsd2ss-xmm{opmask}_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtsd2ss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmovuswb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovuswb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovuswb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovuswb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovuswb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovuswb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovuswb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpavgb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpavgb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpavgb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrangeps-xmm{opmask}_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangeps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangeps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-xmm{opmask}_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-ymm{opmask}_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangeps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vrangeps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-ymm{opmask}_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-zmm{opmask}_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrangeps-zmm_zmm_zmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrangeps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-zmm{opmask}_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrangeps-zmm_zmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmovswb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovswb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovswb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovswb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovswb-ymm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-ymm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovswb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovswb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vcvtsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvtsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpscatterqq-mem{opmask}_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vpscatterqq-mem_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vpscatterqq-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vpscatterqq-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vpscatterqq-mem{opmask}_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vpscatterqq-mem_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vbroadcasti64x4-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vbroadcasti64x4-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttss2usi-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2usi-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2usil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2usi-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttss2usi-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttss2usiq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmovsxwd-zmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-zmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwd-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpscatterqd-mem{opmask}_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpscatterqd-mem_ymm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpscatterqd-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vpscatterqd-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vpscatterqd-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vpscatterqd-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,1.5,0.5,0.0)" +vfmsubadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmsubadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmsubadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmovsxwq-zmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-zmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-zmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm{opmask}_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpmovsxwq-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vfnmadd231pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd231pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd231pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscatterdps-mem{opmask}_zmm,16.0,None,"(1.5,0.0,0.5,8.0,8.0,16.0,1.5,0.5,0.0)" +vscatterdps-mem_zmm,16.0,None,"(1.5,0.0,0.5,8.0,8.0,16.0,1.5,0.5,0.0)" +vscatterdps-mem{opmask}_xmm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,1.5,0.5,0.0)" +vscatterdps-mem_xmm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,1.5,0.5,0.0)" +vscatterdps-mem{opmask}_ymm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,1.5,0.5,0.0)" +vscatterdps-mem_ymm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,1.5,0.5,0.0)" +vcvtpd2uqq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2uqq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2uqq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtpd2uqq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscatterdpd-mem{opmask}_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vscatterdpd-mem_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vscatterdpd-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vscatterdpd-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vscatterdpd-mem{opmask}_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vscatterdpd-mem_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vpsubsb-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsb-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsb-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231ss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231ss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpermt2d-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2d-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vrsqrt14pd-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrsqrt14pd-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrsqrt14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14pd-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14pd-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14pd-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmsub231sd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmsub231sd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm{opmask}_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm_zmm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm{opmask}_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14ps-zmm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vrsqrt14ps-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-xmm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm{opmask}_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm{opmask}_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vrsqrt14ps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpermt2w-xmm{opmask}_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-xmm_xmm_xmm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-xmm{opmask}_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-xmm_xmm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-ymm{opmask}_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-ymm_ymm_ymm,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-ymm{opmask}_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-ymm_ymm_mem,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,2.3333333333333335,0.0,0.0)" +vpermt2w-zmm{opmask}_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +vpermt2w-zmm_zmm_zmm,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5,0.0,0.0)" +vpermt2w-zmm{opmask}_zmm_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +vpermt2w-zmm_zmm_mem,2.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,2.5,0.0,0.0)" +vcvtps2udq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2udq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2udq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2udq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvtps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2udq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpermt2q-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2q-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vmovntpd-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntpd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminuq-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpminuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuq-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminuw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminuw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminuw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpermps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpminub-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminub-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminub-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vmovntps-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovntps-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vpminud-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpminud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpminud-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vunpcklpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm{opmask}_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-zmm_zmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm{opmask}_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm{opmask}_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vscalefsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vgetexpss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vgetexpss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendmps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendmps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmps-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmps-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vfmaddsub213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vscalefss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vscalefss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqa32-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqa32-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vmovdqa32-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqa32-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vmovdqa32-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa32-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa32-xmm{opmask}_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-xmm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa32-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa32-ymm{opmask}_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-ymm{opmask}_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vmovdqa32-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vmovdqa32-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0,0.0,0.0)" +vblendmpd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendmpd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vblendmpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmpd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmpd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vblendmpd-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vblendmpd-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpunpckhbw-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhbw-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhbw-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpermt2pd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vcvttpd2qq-xmm{opmask}_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2qq-xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-ymm{opmask}_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2qq-ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vcvttpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm{opmask}_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2qq-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvttpd2dq-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttpd2dq-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvttpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2dq-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2dq-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvttpd2dq-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2dq-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2dq-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvttpd2dq-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vfmadd213pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd213pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtd-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtd-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpscatterdd-mem{opmask}_zmm,16.0,None,"(1.5,0.0,0.5,8.0,8.0,16.0,1.5,0.5,0.0)" +vpscatterdd-mem_zmm,16.0,None,"(1.5,0.0,0.5,8.0,8.0,16.0,1.5,0.5,0.0)" +vpscatterdd-mem{opmask}_xmm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,1.5,0.5,0.0)" +vpscatterdd-mem_xmm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,1.5,0.5,0.0)" +vpscatterdd-mem{opmask}_ymm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,1.5,0.5,0.0)" +vpscatterdd-mem_ymm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,1.5,0.5,0.0)" +vpmaddwd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaddwd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddwd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpmaddwd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmaddwd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtq-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtq-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpscatterdq-mem{opmask}_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vpscatterdq-mem_zmm,8.0,None,"(1.5,0.0,0.5,4.0,4.0,8.0,0.5,0.5,0.0)" +vpscatterdq-mem{opmask}_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vpscatterdq-mem_xmm,2.0,None,"(1.5,0.0,0.5,1.0,1.0,2.0,0.5,0.5,0.0)" +vpscatterdq-mem{opmask}_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vpscatterdq-mem_ymm,4.0,None,"(1.5,0.0,0.5,2.0,2.0,4.0,0.5,0.5,0.0)" +vfmadd213ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd213ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmadd213ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpcmpgtw-k{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtw-k{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtw-k{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpcmpgtw-k{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpcmpgtw-k_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpsubsw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsubsw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsubsw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmaxub-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpmaxub-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfmaddsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfmaddsub132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132pd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpgatherdd-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherdd-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherdd-xmm{opmask}_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherdd-xmm_mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpgatherdd-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherdd-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpunpckhwd-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpunpckhwd-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpunpckhwd-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpord-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpord-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vpord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpord-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpord-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpord-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpord-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpord-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpmovqw-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqw-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqw-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqw-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqw-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqw-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqw-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpgatherdq-zmm{opmask}_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherdq-zmm_mem,1.5,None,"(1.5,0.0,0.0,1.5,1.5,0.0,0.5,0.0,0.0)" +vpgatherdq-xmm{opmask}_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vpgatherdq-xmm_mem,1.5833333333333333,None,"(1.5833333333333333,0.0,0.5833333333333333,1.0,1.0,0.0,0.5833333333333333,0.25,0.0)" +vpgatherdq-ymm{opmask}_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vpgatherdq-ymm_mem,2.0,None,"(1.0,0.0,0.0,2.0,2.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd132ps-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vfnmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vfnmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vfnmadd132ps-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpmovqb-xmm{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-xmm_zmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-mem{opmask}_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqb-mem_zmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqb-xmm{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-mem{opmask}_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqb-mem_xmm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqb-xmm{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-xmm_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0,0.0,0.0)" +vpmovqb-mem{opmask}_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqb-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,2.0,0.0,0.0)" +vpmovqd-ymm{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-ymm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-mem{opmask}_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpmovqd-mem_zmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpmovqd-xmm{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-mem{opmask}_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpmovqd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpmovqd-xmm{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-xmm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpmovqd-mem{opmask}_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vpmovqd-mem_ymm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0,0.0,0.0)" +vporq-zmm{opmask}_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vporq-zmm_zmm_zmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5,0.0,0.0)" +vporq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vporq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vporq-zmm{opmask}_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vporq-zmm_zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vporq-xmm{opmask}_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vporq-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vporq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-xmm{opmask}_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm{opmask}_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm_ymm_ymm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm{opmask}_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vporq-ymm_ymm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r32_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2sil-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r64_xmm,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2si-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vcvttsd2siq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333,0.0,0.0)" +vpsllvw-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvw-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvw-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvw-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvw-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvw-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvw-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtpd2ps-ymm{opmask}_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2ps-ymm_zmm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtpd2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2ps-ymm{opmask}_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2ps-ymm_mem,1.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,1.5,0.0,0.0)" +vcvtpd2ps-xmm{opmask}_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm{opmask}_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtpd2ps-xmm_ymm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vpsllvd-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvd-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vaddsd-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsd-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddsd-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddsd-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2ph-ymm{opmask}_zmm_imd,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2ph-ymm_zmm_imd,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2ph-mem{opmask}_zmm_imd,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5,0.0,0.0)" +vcvtps2ph-mem_zmm_imd,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5,0.0,0.0)" +vcvtps2ph-xmm{opmask}_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm_xmm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-mem{opmask}_xmm_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333,0.0,0.0)" +vcvtps2ph-mem_xmm_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm{opmask}_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-xmm_ymm_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333,0.0,0.0)" +vcvtps2ph-mem{opmask}_ymm_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333,0.0,0.0)" +vcvtps2ph-mem_ymm_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333,0.0,0.0)" +vpacksswb-xmm{opmask}_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-xmm{opmask}_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm{opmask}_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-ymm{opmask}_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-zmm{opmask}_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-zmm_zmm_zmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0,0.0,0.0)" +vpacksswb-zmm{opmask}_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vpacksswb-zmm_zmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0,0.0,0.0)" +vaddss-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddss-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vaddss-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vaddss-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vpsllvq-zmm{opmask}_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-zmm_zmm_zmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-zmm{opmask}_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-zmm_zmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm{opmask}_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_xmm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm{opmask}_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-xmm_xmm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm{opmask}_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_ymm,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsllvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm{opmask}_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vpsllvq-ymm_ymm_mem,0.5,None,"(0.5,0.0,0.5,0.5,0.5,0.0,0.0,0.0,0.0)" +vcvtps2pd-zmm{opmask}_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2pd-zmm_ymm,1.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,1.5,0.0,0.0)" +vcvtps2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-zmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-zmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-xmm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm{opmask}_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm{opmask}_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" +vcvtps2pd-ymm_mem,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5,0.0,0.0)" diff --git a/osaca/data/snb_data.csv b/osaca/data/snb_data.csv index 3ac3595..a948dde 100644 --- a/osaca/data/snb_data.csv +++ b/osaca/data/snb_data.csv @@ -1,88 +1,3166 @@ instr,TP,LT,ports -jae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -ja-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jcxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jecxz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -je-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jg-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jmp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jmpq-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnae-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jna-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnbe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnb-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnc-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jne-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnge-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jng-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnle-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnl-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jno-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jns-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jnz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jpe-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jp-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jpo-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -js-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -jz-lbl,0.0,0.0,"(0, 0, 0, 0, 0, 0.0)" -addl-mem_imd,1.0,6.0,"(0.3333333333333333, 0.3333333333333333, 1.0, 1.0, 1.0, 0.3333333333333333)" -add-mem_imd,1.0,6.0,"(0.3333333333333333, 0.3333333333333333, 1.0, 1.0, 1.0, 0.3333333333333333)" -add-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -add-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -add-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -and-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmpq-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmpq-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmpq-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmp-r32_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmp-r32_mem,0.5,1.0,"(0.3333333333333333, 0.3333333333333333, 0.5, 0.5, 0.0, 0.3333333333333333)" -cmp-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmp-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -cmp-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -incq-r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -incq-r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -inc-r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -inc-r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -lea-r32_mem,0.5,1.0,"(0.5, 0.5, 0.0, 0.0, 0.0, 0.0)" -lea-r64_mem,0.5,1.0,"(0.5, 0.5, 0.0, 0.0, 0.0, 0.0)" - -movl-mem_imd,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -mov-mem_imd,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -mov-mem_r32,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -mov-mem_r64,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -mov-r32_mem,0.5,2.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -mov-r64_mem,0.5,2.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -mov-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -mov-r64_imd,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -mov-r64_mem,0.5,2.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -mov-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -movslq-r64_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -movsx-r64_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -shl-r64_imd,0.5,1.0,"(0.5, 0.0, 0.0, 0.0, 0.0, 0.5)" -sub-r64_r64,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" -vaddsd-xmm_xmm_mem,1.0,3.0,"(0.0, 1.0, 0.5, 0.5, 0.0, 0.0)" -vaddsd-xmm_xmm_xmm,1.0,3.0,"(0, 1.0, 0, 0, 0, 0)" -vaddss-xmm_xmm_mem,1.0,3.0,"(0.0, 1.0, 0.5, 0.5, 0.0, 0.0)" -vaddss-xmm_xmm_xmm,1.0,3.0,"(0, 1.0, 0, 0, 0, 0)" -vmovsd-mem_xmm,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -vmovsd-xmm_mem,0.5,3.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -vmovss-mem_xmm,1.0,3.0,"(0.0, 0.0, 0.5, 0.5, 1.0, 0.0)" -vmovss-xmm_mem,0.5,3.0,"(0.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -vmulsd-xmm_xmm_mem,1.0,5.0,"(1.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -vmulsd-xmm_xmm_xmm,1.0,5.0,"(1.0, 0, 0, 0, 0, 0)" -vmulss-xmm_xmm_xmm,1.0,5.0,"(1.0, 0, 0, 0, 0, 0)" -vmulss-xmm_xmm_mem,1.0,5.0,"(1.0, 0.0, 0.5, 0.5, 0.0, 0.0)" -vxorps-xmm_xmm_xmm,1.0,1.0,"(0, 0, 0, 0, 0, 1.0)" -xor-r32_r32,0.3333333333333333,1.0,"(0.3333333333333333, 0.3333333333333333, 0.0, 0.0, 0.0, 0.3333333333333333)" +sldt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,1.0,3.3333333333333335)" +sldt-,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +sldt-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +sldtl-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +sldt-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +sldtq-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +lgdt-mem,11.0,None,"(2.0,0.0,2.0,0.0,0.0,1.0,11.0)" +call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +call-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +callq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +call-LBL,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +mov-LBL,22.666666666666668,None,"(14.666666666666666,0.0,7.666666666666667,0.5,0.5,1.0,22.666666666666668)" +mov-LBL,12.666666666666668,None,"(11.666666666666666,0.0,4.666666666666667,0.0,0.0,0.0,12.666666666666668)" +jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +wrmsr-,53.0,None,"(32.0,0.0,24.0,0.0,0.0,1.0,53.0)" +repe scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cmc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cmovbe-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbe-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbel-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbe-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbeq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovbe-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovbe-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovbel-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovbe-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovbeq-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_imd,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_r8,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpb-mem_r8,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_r32,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpl-mem_r32,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem_r64,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpq-mem_r64,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmpq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmovle-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovle-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovlel-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovle-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovleq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lsl-mem,32.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,32.0)" +lsl-r32_mem,32.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,32.0)" +lsl-r64_mem,32.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,32.0)" +lslq-r64_mem,32.0,None,"(4.0,0.0,0.0,0.0,0.0,0.0,32.0)" +lsl-,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)" +lsl-r32_r32,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)" +lsl-r64_r32,6.0,None,"(3.0,0.0,4.0,1.0,1.0,0.0,6.0)" +lahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cbw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopl-r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nopq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +nop-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpsw-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adcb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adc-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adc-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adcl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adc-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock adcq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +cmpsd-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +out-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +outb-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +outl-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-r16_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +out-r16_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +cmovnle-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnle-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnlel-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnle-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnleq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbb-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbb-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbbl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbb-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbbq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sbb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +sbb-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sbb-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbbq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lodsb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)" +lodsw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)" +lodsd-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +std-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +stosd-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xorb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xor-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xor-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xorl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xor-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xorq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sar-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sarb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sar-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sarb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +sar-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sarb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sar-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +sar-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +stc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sti-,3.6666666666666665,None,"(0.6666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +str-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,1.0,3.3333333333333335)" +str-,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +str-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +strl-r32,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +str-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +strq-r64,2.3333333333333335,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +stosb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +rdmsr-,41.5,None,"(21.0,0.0,14.5,0.0,0.0,0.0,41.5)" +rep lodsb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +idiv-mem,6,None,"(2.3333333333333335,6,2.3333333333333335,0.5,0.5,0.0,2.3333333333333335)" +idiv-r8,6,None,"(3.0,6,3.0,0.0,0.0,0.0,3.0)" +idivb-r8,6,None,"(3.0,6,3.0,0.0,0.0,0.0,3.0)" +idiv-mem,10,None,"(3.1666666666666665,10,2.6666666666666665,0.5,0.5,0.0,3.1666666666666665)" +idiv-mem,23.166666666666668,None,"(18.166666666666664,21,14.666666666666668,0.5,0.5,0.0,23.166666666666668)" +idiv-r32,10,None,"(2.833333333333333,10,2.833333333333333,0.0,0.0,0.0,3.333333333333333)" +idivl-r32,10,None,"(2.833333333333333,10,2.833333333333333,0.0,0.0,0.0,3.333333333333333)" +idiv-r64,23.333333333333332,None,"(18.333333333333336,21,15.333333333333332,0.0,0.0,0.0,23.333333333333332)" +idivq-r64,23.333333333333332,None,"(18.333333333333336,21,15.333333333333332,0.0,0.0,0.0,23.333333333333332)" +repne cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shr-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shrb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shr-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shrb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shr-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shrb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shr-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shr-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shrd-mem_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrd-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrdl-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrd-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrdq-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shrd-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrd-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrdl-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrd-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrdq-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shrd-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shrdb-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shrd-mem_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shrd-mem_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shrd-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shrdb-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shrd-r32_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shrd-r64_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +movsd-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsw-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shl-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shlb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shl-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shlb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +shl-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shlb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shl-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +shl-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +mov-r64_r8,4.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,4.0)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bts-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btsl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bts-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btsq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btr-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btrl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btr-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btrq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sgdt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,2.0,2.3333333333333335)" +loop-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btc-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btcl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btc-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btcq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +wbinvd-,397375.0,None,"(237582.0,0.0,0.0,0.0,0.0,184337.0,397375.0)" +jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +mul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +mul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +push-r16,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pushw-r16,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +push-r16,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +pushw-r16,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cli-,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +cld-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +clc-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lldt-mem,8.0,None,"(0.0,0.0,3.0,1.5,1.5,1.0,8.0)" +lldt-,6.666666666666667,None,"(0.6666666666666666,0.0,3.6666666666666665,1.0,1.0,1.0,6.666666666666667)" +ret-imd,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +ret-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btc-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btcl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btc-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btcq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +setnbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +setnbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +setnbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cmpxchg-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchgb-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchg-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgb-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchg-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchgl-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchg-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchgq-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cmpxchg-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgl-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchg-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgq-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +verr-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)" +verr-,8.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,8.0)" +rep stosb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +cwd-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +scasw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +scasd-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rdpmc-,13.666666666666666,None,"(13.666666666666666,0.0,7.666666666666666,0.0,0.0,0.0,13.666666666666666)" +lock cmpxchg-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchgb-mem_r8,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchg-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchgl-mem_r32,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchg-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock cmpxchgq-mem_r64,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +cmovnp-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnp-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnpl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnp-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnpq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +ret far-,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +enter-imd_imd,16.0,None,"(10.0,0.0,0.0,0.0,0.0,2.0,16.0)" +repne scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +leave-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +lock xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lidt-mem,11.0,None,"(2.0,0.0,2.0,0.0,0.0,1.0,11.0)" +xlat-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.5,0.5,0.0,0.6666666666666666)" +lock xchg-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lock xchgb-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgb-mem_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r8_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgb-r8_r8,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +lock xchg-mem,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)" +lock xchg-mem_r32,2.5,None,"(1.0,0.0,1.5,1.0,1.0,1.0,2.5)" +lock xchgl-mem_r32,2.5,None,"(1.0,0.0,1.5,1.0,1.0,1.0,2.5)" +lock xchg-mem_r64,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)" +lock xchgq-mem_r64,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)" +xchg-mem,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)" +xchg-mem_r32,2.5,None,"(1.0,0.0,1.5,1.0,1.0,1.0,2.5)" +xchgl-mem_r32,2.5,None,"(1.0,0.0,1.5,1.0,1.0,1.0,2.5)" +xchg-mem_r64,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)" +xchgq-mem_r64,2.3333333333333335,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.3333333333333335)" +xchg-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgl-r32_r32,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchg-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xchgq-r64_r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +smsw-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,0.5,0.5,1.0,3.3333333333333335)" +smsw-,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +smsw-r32,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +smswl-r32,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +smsw-r64,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +smswq-r64,3.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,3.3333333333333335)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +andb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +and-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +and-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +andl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +and-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +andq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +mov-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +mov-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +mov-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +mov-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movb-r8_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cpuid-,38.0,None,"(10.0,0.0,0.0,0.0,0.0,0.0,38.0)" +rdtsc-,9.0,None,"(6.5,0.0,5.5,0.0,0.0,0.0,9.0)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sidt-mem,3.3333333333333335,None,"(0.3333333333333333,0.0,3.3333333333333335,1.0,1.0,2.0,1.3333333333333333)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbb-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbb-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbbl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbb-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +lock sbbq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem,1.3333333333333333,None,"(0.8333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +imul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r32,1.3333333333333333,None,"(0.8333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +imul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,3.6666666666666665)" +rcr-r8_imd,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)" +rcrb-r8_imd,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)" +rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcrl-r32_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcrq-r64_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcrb-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcr-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcr-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcrl-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcr-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcrq-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcr-mem_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,3.6666666666666665)" +rcrb-mem_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,3.6666666666666665)" +rcr-r8_r8,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)" +rcrb-r8_r8,5.0,None,"(5.0,0.0,2.0,0.0,0.0,0.0,4.0)" +rcr-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcrb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcrb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcrb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcr-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcrb-r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-r32_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcr-r64_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,3.1666666666666665)" +rcl-mem_imd,4.333333333333334,None,"(4.333333333333334,0.0,1.3333333333333333,1.0,1.0,1.0,3.3333333333333335)" +rcl-r8_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,4.166666666666666)" +rclb-r8_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,4.166666666666666)" +rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-mem_imd,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-imd,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +rcl-r32_imd,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +rcl-r64_imd,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +rclq-r64_imd,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rclb-r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcl-r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcl-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rclq-r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rcl-mem_r8,4.333333333333334,None,"(4.333333333333334,0.0,1.3333333333333333,1.0,1.0,1.0,3.3333333333333335)" +rclb-mem_r8,4.333333333333334,None,"(4.333333333333334,0.0,1.3333333333333333,1.0,1.0,1.0,3.3333333333333335)" +rcl-r8_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +rclb-r8_r8,4.666666666666666,None,"(4.666666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +rcl-mem_r8,2.833333333333333,None,"(2.833333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.833333333333333)" +rclb-mem_r8,2.833333333333333,None,"(2.833333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.833333333333333)" +rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rclb-mem_r8,3.1666666666666665,None,"(3.1666666666666665,0.0,1.6666666666666665,1.0,1.0,1.0,3.1666666666666665)" +rcl-r8,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +rclb-r8,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +rcl-r32_r8,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +rcl-r64_r8,3.6666666666666665,None,"(3.6666666666666665,0.0,1.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +div-mem,6,None,"(2.3333333333333335,6,2.3333333333333335,0.5,0.5,0.0,2.3333333333333335)" +div-r8,6,None,"(2.6666666666666665,6,2.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +divb-r8,6,None,"(2.6666666666666665,6,2.6666666666666665,0.0,0.0,0.0,3.6666666666666665)" +div-mem,10,None,"(2.833333333333333,10,2.833333333333333,0.5,0.5,0.0,4.333333333333333)" +div-mem,21,None,"(10.0,21,7.0,0.5,0.5,0.0,14.0)" +div-r32,10,None,"(2.833333333333333,10,2.833333333333333,0.0,0.0,0.0,4.333333333333333)" +divl-r32,10,None,"(2.833333333333333,10,2.833333333333333,0.0,0.0,0.0,4.333333333333333)" +div-r64,21,None,"(10.0,21,8.0,0.0,0.0,0.0,14.0)" +divq-r64,21,None,"(10.0,21,8.0,0.0,0.0,0.0,14.0)" +stosw-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +rep movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +cmovnz-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnz-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnzl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnz-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnzq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovns-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnsl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovns-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnsq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovns-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovno-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnol-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovno-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnoq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovno-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnl-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnlq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovnb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovo-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovol-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovo-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovoq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovo-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +bt-mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bt-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bt-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +btq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +pop-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +popq-r64,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +jrcxz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +shld-mem_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shld-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shldl-mem_r32_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shld-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shldq-mem_r64_imd,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.8333333333333333)" +shld-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shld-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shldl-r32_r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shld-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shldq-r64_r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +shld-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shldb-mem_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shld-mem_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shld-mem_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +shld-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shldb-r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shld-r32_r32_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +shld-r64_r64_r8,1.8333333333333333,None,"(1.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.8333333333333333)" +invlpg-mem,18.333333333333332,None,"(11.333333333333334,0.0,10.333333333333334,2.0,2.0,4.0,18.333333333333332)" +sahf-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmovz-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovz-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovzl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovz-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovzq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovp-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovpl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovp-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovpq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovs-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovsl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovs-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovsq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovs-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovl-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovlq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovb-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovbl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovb-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovbq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +cmovb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lmsw-mem,10.333333333333334,None,"(3.3333333333333335,0.0,5.333333333333333,1.0,1.0,1.0,10.333333333333334)" +lmsw-,9.333333333333334,None,"(4.333333333333333,0.0,2.333333333333333,0.5,0.5,1.0,9.333333333333334)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock bts-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btsl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock bts-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btsq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +orb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +or-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +or-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +orl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +or-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +orq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +repe cmpsb-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +clts-,5.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,5.0)" +movzx-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzxl-r32_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzxq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movzx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rolb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rolq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rolb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +rol-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rolq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rol-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +rolb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rol-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rolb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rol-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +rolb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +rol-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +rol-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +verw-mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)" +verw-,8.0,None,"(4.0,0.0,1.0,0.0,0.0,0.0,8.0)" +jmp-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorb-r8_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorl-r32_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorq-r64_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem_imd,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,1.0)" +ror-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorl-r32,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rorq-r64,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +ror-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +rorb-r8_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +ror-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +rorb-mem_r8,1.5,None,"(1.5,0.0,0.0,1.0,1.0,1.0,1.5)" +ror-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +rorb-r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +ror-r32_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +ror-r64_r8,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmovnbe-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbe-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbel-r32_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbe-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbeq-r64_mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +cmovnbe-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovnbe-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovnbel-r32_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovnbe-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +cmovnbeq-r64_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +sub-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +sub-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +subl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +sub-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +subq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmpxchg8b-mem,4.666666666666667,None,"(4.666666666666667,0.0,1.6666666666666667,1.0,1.0,1.0,4.666666666666667)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btr-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btrl-mem_r32,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btr-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +lock btrq-mem_r64,1.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.8333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +addb-r8_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +add-mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +add-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +addl-r32_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +add-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +addq-r64_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcb-r8_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adcb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adc-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcb-r8_r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adc-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adcl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adc-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adcq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +adc-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adcb-r8_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adc-mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adc-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adcl-r32_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adc-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adcq-r64_mem,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.8333333333333333)" +adc-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +adcb-r8_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +adc-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcl-r32_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adc-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +adcq-r64_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lock cmpxchg8b-mem,6.833333333333333,None,"(6.833333333333333,0.0,4.333333333333333,1.0,1.0,1.0,4.833333333333334)" +cwde-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lea-mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +lea-r32_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +leal-r32_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +lea-r64_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +leaq-r64_mem,0.5,None,"(0.5,0.0,0.5,0.0,0.0,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.5,0.5,1.0,0.5)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setbe-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +setbe-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +setbeb-r8,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +bswap-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +bswapl-r32,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +bswap-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +bswapq-r64,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +jmp far-mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +divps-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +divps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fxsave64-mem,38.0,None,"(14.166666666666666,0.0,14.666666666666666,20.0,20.0,38.0,28.166666666666668)" +andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +prefetcht2-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +prefetcht1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +prefetcht0-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +cvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ldmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +divss-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +sqrtss-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +sqrtss-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtsi2ss-xmm_r32,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtsi2ss-xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +mulss-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mulss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,43.333333333333336,None,"(16.833333333333332,0.0,13.833333333333334,19.5,19.5,0.0,43.333333333333336)" +fxsave-mem,38.0,None,"(14.166666666666666,0.0,14.666666666666666,20.0,20.0,38.0,28.166666666666668)" +sqrtps-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +sqrtps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movaps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mulps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mulps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movups-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +fxrstor-mem,2.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,2.0)" +stmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +prefetchnta-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +comiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +punpckhdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +divpd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)" +divpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +movsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +pcmpgtw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpgtb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpgtd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +packuswb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +packuswb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +maskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.5,2.0,2.0,2.0,2.0)" +andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pslldq-xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +psadbw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +packssdw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +packssdw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmullw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmullw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divsd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)" +divsd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpeqb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpeqd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpcklqdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklqdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpcklwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pxor-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movq2dq-xmm_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +psubb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubusw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubusw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +paddd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psrldq-xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpckhqdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhqdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pslld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pslld-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +sqrtsd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)" +sqrtsd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psllw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +psllq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psllq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubusb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubusb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckldq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +mulsd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mulsd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)" +sqrtpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmulhw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pminsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pshufd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +cvtss2sd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +cvtss2sd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psrlq-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psrlw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psrlw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psrld-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psrld-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +lfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movapd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +mulpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +mulpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +punpckhbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movupd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +pmuludq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmuludq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmaddwd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pand-xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmaxub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpckhwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvtpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvtpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +mfence-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pshuflw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshuflw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pminub-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminub-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pinsrw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrw-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psubsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pavgw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pavgw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +psubsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pavgb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pavgb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psraw-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psraw-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +comisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psrad-xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +packsswb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +packsswb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpcklbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +ucomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +cvttpd2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pshufhw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufhw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fchs-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomi-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fldl2t-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fldl2e-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcmovnu-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fcomip-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fcmovnb-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fcmovne-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcmovbe-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcompp-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fxam-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +ffree-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fninit-,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fnop-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,0.5,0.5,0.0,0.0)" +fldpi-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fnstsw-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fnstsw-,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +fwait-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fcmovnbe-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fincstp-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fst-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fabs-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fcmovu-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fcmove-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fldcw-mem,2.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,2.0)" +fcmovb-fpu_fpu,2.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,2.5)" +fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivp-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0)" +fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0)" +fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0)" +fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,24,None,"(1.0,24,0.0,0.5,0.5,0.0,0.0)" +fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fldln2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fxch-fpu,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)" +fld-fpu,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)" +fld-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,0.0,1.0)" +fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fucomi-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fdecstp-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fldlg2-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fldz-,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fucompp-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fld1-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fucomip-fpu,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +fnstcw-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +punpckhdq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhdq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +pcmpgtw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpgtb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpgtd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpgtd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +packuswb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +packuswb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psadbw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +packssdw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +packssdw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmullw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpeqb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpeqd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpcklwd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklwd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pxor-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +psubb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubusw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubusw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +paddb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmulhuw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pslld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubusb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckldq-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pandn-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pmulhw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movq-mmx_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movq-r64_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pminsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pshufw-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufw-mmx_mmx_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psrlq-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +paddsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movd-mmx_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movd-mmx_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +movd-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +emms-,18.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,18.0)" +punpckhbw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhbw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaddwd-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pand-mmx_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pmaxub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +punpckhwd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpckhwd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminub-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminub-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pinsrw-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrw-mmx_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +psubsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pavgw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pavgw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psubsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psubsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pavgb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pavgb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +maskmovq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)" +psraw-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +packsswb-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpcklbw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +punpcklbw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +repe scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +lodsq-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +cdqe-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep lodsq-,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +repne cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +pushfq-,1.0,None,"(0.5,0.0,1.0,0.5,0.5,1.0,0.5)" +rep movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsxd-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxdq-r64_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsxd-r64_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep stosq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +swapgs-,1.8333333333333333,None,"(0.3333333333333333,0.0,1.8333333333333333,0.0,0.0,0.0,0.8333333333333333)" +scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +repne scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +popfq-,2.6666666666666665,None,"(0.6666666666666666,0.0,1.6666666666666665,0.5,0.5,0.0,2.6666666666666665)" +stosq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,1.0,0.3333333333333333)" +cmpxchg16b-mem,8.333333333333332,None,"(8.333333333333332,0.0,3.333333333333333,1.0,1.0,1.0,7.333333333333333)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +repe cmpsq-,1.0,None,"(1.0,0.0,1.0,1.0,1.0,0.0,1.0)" +lock cmpxchg16b-mem,9.0,None,"(9.0,0.0,6.0,1.0,1.0,1.0,7.0)" +bndmov-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmov-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcn-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcnq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcu-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcuq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndstx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndcl-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndclq-r64,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndldx-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +bndmk-mem,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovzxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovsxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +roundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +roundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +roundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +roundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pblendw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pblendw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +mpsadbw-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +mpsadbw-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +phminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +phminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)" +insertps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmovsxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +movntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmovsxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmulld-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulld-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pcmpeqq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +packusdw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +packusdw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +extractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmaxsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +blendpd-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +blendpd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +ptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmovzxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +pcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +rex.w pcmpestri-xmm_mem_imd,13.333333333333334,None,"(11.333333333333334,0.0,6.333333333333333,0.5,0.5,0.0,13.333333333333334)" +rex.w pcmpestri-xmm_xmm_imd,19.0,None,"(14.0,0.0,0.0,0.0,0.0,0.0,19.0)" +pcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +pcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +rex.w pcmpestrm-xmm_mem_imd,13.333333333333334,None,"(11.333333333333334,0.0,6.333333333333333,0.5,0.5,0.0,13.333333333333334)" +rex.w pcmpestrm-xmm_xmm_imd,19.0,None,"(14.0,0.0,0.0,0.0,0.0,0.0,19.0)" +pmuldq-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmuldq-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmovzxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovsxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovsxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovsxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovsxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +dpps-xmm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)" +dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)" +pcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pextrd-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)" +pextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmaxud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmaxud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +blendps-xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +blendps-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +pextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminuw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminuw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pminud-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pminud-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pinsrq-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrq-xmm_r64_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +pinsrd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrd-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +pinsrb-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pinsrb-xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +blendvps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +blendvps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +blendvpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +blendvpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +roundss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +roundss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +roundsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +roundsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)" +pextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pmovzxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pblendvb-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +pblendvb-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +pmovzxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pmovzxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +phsubd-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubd-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phsubd-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubd-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +pmulhrsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmulhrsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phsubw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +psignw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +psignb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +psignb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +phaddsw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddsw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phaddsw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddsw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +pmaddubsw-mmx_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +pmaddubsw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +phsubsw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubsw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phsubsw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phsubsw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +pabsw-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsw-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +phaddd-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddd-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phaddd-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddd-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +palignr-mmx_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +palignr-mmx_mmx_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +palignr-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +palignr-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pshufb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pshufb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pshufb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsd-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsd-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsb-mmx_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsb-mmx_mmx,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +pabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +pabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +phaddw-mmx_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddw-mmx_mmx,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +phaddw-xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +phaddw-xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +movshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +movsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,1.0,0.0)" +lddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rdtscp-,10.0,None,"(5.5,0.0,7.5,0.0,0.0,0.0,10.0)" +aesdec-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesdec-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +aeskeygenassist-xmm_xmm_imd,7.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.0,0.0,0.0,7.833333333333333)" +aeskeygenassist-xmm_mem_imd,6.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.5,0.5,0.0,6.833333333333333)" +aesenclast-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesenclast-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +aesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +aesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)" +aesdeclast-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesdeclast-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +aesenc-xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesenc-xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +prefetchwt1-mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +clflush-mem,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,1.0)" +pause-,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vmovmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskpd-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovsd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovmskps-r32_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhuw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmulhuw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vpmuludq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmuludq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vrcpss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpslldq-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovq-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovq-xmm_r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovq-r64_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vmovd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovd-xmm_r32,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmulhrsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmulhrsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vperm2f128-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vperm2f128-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vhaddpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhaddpd-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhaddpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhaddpd-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vpunpcklbw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpcklbw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovshdup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovshdup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovshdup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilps-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilps-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpmovzxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpcmpeqq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpavgw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpavgw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpcmpeqd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpcmpeqb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpeqb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpavgb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpavgb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmaxsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmulss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vandpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vandpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovddup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovddup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovddup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpmaxsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vandps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vandps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmulsd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulsd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulps-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulps-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrldq-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovntdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpshufhw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshufhw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaxss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vmaxsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpminsd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminsd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vstmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +vpminsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpminsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vptest-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vptest-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vptest-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vptest-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpackssdw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpackssdw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpinsrb-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpinsrb-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +vpmaxub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vaddsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpxor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +vpxor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vsqrtsd-xmm_xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)" +vsqrtsd-xmm_xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vextractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,1.0)" +vextractps-r32_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vsqrtss-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +vsqrtss-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +vunpckhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpckhpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vunpckhpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpckhpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vcvtss2sd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vcvtss2sd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpblendvb-xmm_xmm_mem_xmm,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vpblendvb-xmm_xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vzeroall-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +vcomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsrad-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsrad-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrad-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtss-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vrsqrtss-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovsxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshufd-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshufd-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsraw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsraw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsraw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpshufb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshufb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovdqa-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovdqa-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vmovdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovdqa-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovdqa-ymm_ymm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vmovdqa-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vmovsldup-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovsldup-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovsldup-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vdivpd-xmm_xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)" +vdivpd-xmm_xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +vdivpd-ymm_ymm_mem,42,None,"(2.5,42,0.0,0.5,0.5,0.0,0.5)" +vdivpd-ymm_ymm_ymm,42,None,"(2.5,42,0.0,0.0,0.0,0.0,0.5)" +vmovdqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovdqu-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vmovdqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovdqu-ymm_ymm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vmovdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovdqu-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vdivps-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +vdivps-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +vdivps-ymm_ymm_mem,28,None,"(2.5,28,0.0,0.5,0.5,0.0,0.5)" +vdivps-ymm_ymm_ymm,28,None,"(2.5,28,0.0,0.0,0.0,0.0,0.5)" +vcmpss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmpss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpshuflw-xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpshuflw-xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vldmxcsr-mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,1.0,1.0)" +vpslld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpslld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpslld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vcmpsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmpsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsllq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsllq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsllq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vblendvpd-xmm_xmm_mem_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vblendvpd-xmm_xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vblendvpd-ymm_ymm_mem_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vblendvpd-ymm_ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpsllw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsllw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsllw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpand-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +vpand-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vphaddw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphaddw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vpandn-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +vpandn-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vshufpd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vshufpd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vshufpd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vshufpd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vsubsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vsqrtps-xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +vsqrtps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +vsqrtps-ymm_mem,28,None,"(2.5,28,0.0,0.5,0.5,0.0,0.5)" +vsqrtps-ymm_ymm,28,None,"(2.5,28,0.0,0.0,0.0,0.0,0.5)" +vcvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vphaddd-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphaddd-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vsqrtpd-xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)" +vsqrtpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +vsqrtpd-ymm_mem,42,None,"(2.5,42,0.0,0.5,0.5,0.0,0.5)" +vsqrtpd-ymm_ymm,42,None,"(2.5,42,0.0,0.0,0.0,0.0,0.5)" +vsubss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vshufps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vshufps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vshufps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vshufps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vlddqu-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vlddqu-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmuldq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdppd-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vdppd-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vmovlpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmovlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vdpps-xmm_xmm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)" +vdpps-xmm_xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)" +vdpps-ymm_ymm_mem_imd,2.0,None,"(1.0,0.0,2.0,0.5,0.5,0.0,2.0)" +vdpps-ymm_ymm_ymm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)" +vmovlhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovlps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmovlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vpunpckhdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vmulpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulpd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmulpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmulpd-ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmovzxbd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxbd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmovzxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmovzxbq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxbq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaskmovpd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmaskmovpd-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmaskmovpd-mem_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0)" +vmaskmovpd-mem_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,2.0,0.0)" +vinsertps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vinsertps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpalignr-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpalignr-xmm_xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaskmovps-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmaskmovps-ymm_ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmaskmovps-mem_xmm_xmm,1.0,None,"(0.5,0.0,0.5,0.5,0.5,1.0,0.0)" +vmaskmovps-mem_ymm_ymm,2.0,None,"(0.0,0.0,0.0,0.5,0.5,2.0,0.0)" +vpaddsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaxpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vmaxpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpackuswb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpackuswb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmaxps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vmaxps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vmaxps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpunpckhqdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhqdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsignw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsignw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsignb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsignb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vunpckhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpckhps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vunpckhps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpckhps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpaddusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpunpcklwd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpcklwd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpaddusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsignd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsignd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmulhw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmulhw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vxorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vxorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vxorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vroundsd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundsd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vroundss-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundss-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpmaddubsw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmaddubsw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vxorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vxorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vxorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vxorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vinsertf128-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vinsertf128-ymm_ymm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vhsubpd-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhsubpd-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhsubpd-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhsubpd-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vmovups-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovups-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovups-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovups-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovups-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vhsubps-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhsubps-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhsubps-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhsubps-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhaddps-xmm_xmm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhaddps-xmm_xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vhaddps-ymm_ymm_mem,2.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,2.0)" +vhaddps-ymm_ymm_ymm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vmovupd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovupd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovupd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovupd-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovupd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vcvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvttps2dq-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttps2dq-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vtestpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vtestpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestpd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vtestpd-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vdivss-xmm_xmm_mem,14,None,"(1.0,14,0.0,0.5,0.5,0.0,0.0)" +vdivss-xmm_xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +vdivsd-xmm_xmm_mem,21,None,"(1.0,21,0.0,0.5,0.5,0.0,0.0)" +vdivsd-xmm_xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +vtestps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vtestps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vtestps-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vtestps-ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovntdq-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vcmpps-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmpps-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcmpps-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmpps-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcmppd-xmm_xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmppd-xmm_xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcmppd-ymm_ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcmppd-ymm_ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vsubpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vsubpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vminss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpabsw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpabsw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vsubps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vsubps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vsubps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vphaddsw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphaddsw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vminsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsubusb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubusb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vblendvps-xmm_xmm_mem_xmm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vblendvps-xmm_xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vblendvps-ymm_ymm_mem_ymm,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vblendvps-ymm_ymm_ymm_ymm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmpsadbw-xmm_xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vmpsadbw-xmm_xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vpsubusw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubusw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpcmpgtb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpgtb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovhpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmovhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +rex.w vpcmpestri-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +rex.w vpcmpestri-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +vpcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +rex.w vpcmpestrm-xmm_mem_imd,3.5,None,"(3.5,0.0,1.0,0.5,0.5,0.0,2.5)" +rex.w vpcmpestrm-xmm_xmm_imd,3.5,None,"(3.5,0.0,1.0,0.0,0.0,0.0,3.5)" +vmovhps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vmovhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vzeroupper-,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vandnps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandnps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vandnps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandnps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpaddq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpaddw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpaddb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vandnpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandnpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vandnpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vandnpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpaddd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpaddd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpabsb-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpabsb-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vblendpd-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vblendpd-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vblendpd-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vblendpd-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vblendps-xmm_xmm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vblendps-xmm_xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vblendps-ymm_ymm_mem_imd,0.5,None,"(0.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vblendps-ymm_ymm_ymm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vrsqrtps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vrsqrtps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrsqrtps-ymm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vrsqrtps-ymm_ymm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vpextrb-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +vpextrb-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpextrd-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +vpextrd-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vphsubw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphsubw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vpextrq-mem_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.5,0.5,1.0,0.5)" +vpextrq-r64_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpextrw-mem_xmm_imd,1.0,None,"(0.0,0.0,0.5,0.5,0.5,1.0,0.5)" +vpextrw-r32_xmm_imd,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vphsubd-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphsubd-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vaddpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpblendw-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpblendw-xmm_xmm_xmm_imd,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpor-xmm_xmm_mem,0.5,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,0.3333333333333333)" +vpor-xmm_xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +vaddps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vaddps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpmulld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmulld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomiss-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vucomiss-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpcmpistrm-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpcmpistrm-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpistri-xmm_mem_imd,3.0,None,"(3.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpcmpistri-xmm_xmm_imd,3.0,None,"(3.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpmullw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmullw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vucomisd-xmm_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vucomisd-xmm_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vextractf128-mem_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vextractf128-xmm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpmovsxbw-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxbw-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpackusdw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpackusdw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmaxud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpinsrd-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpinsrd-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +vpinsrq-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpinsrq-xmm_xmm_r64_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +vpinsrw-xmm_xmm_mem_imd,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpinsrw-xmm_xmm_r32_imd,1.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,1.5)" +vpmaxuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpmaxuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrlw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsrlw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrlw-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpsrlq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsrlq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrlq-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vmovapd-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovapd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovapd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovapd-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovapd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vpunpcklqdq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpcklqdq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrld-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsrld-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsrld-xmm_xmm_imd,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpermilpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpermilpd-ymm_mem_imd,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpermilpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovaps-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovaps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovaps-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vmovaps-ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmovaps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vbroadcastsd-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vbroadcastss-xmm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vbroadcastss-ymm_mem,0.5,None,"(0.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vminpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vminpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtdq2ps-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtdq2ps-ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpunpckldq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckldq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vcvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtdq2pd-ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtdq2pd-ymm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vminps-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vminps-ymm_ymm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vminps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsubb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsubd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vbroadcastf128-ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vpsubq-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubq-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsubw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsadbw-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpsadbw-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vroundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vroundpd-ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundpd-ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vroundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vroundps-ymm_mem_imd,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vroundps-ymm_ymm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpsubsb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubsb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpsubsw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpsubsw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxdq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxdq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtsi2ss-xmm_xmm_r32,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vcvtsi2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtsi2ss-xmm_xmm_r64,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +vcvtsd2ss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtsd2ss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vpclmulqdq-xmm_xmm_xmm_imd,6.833333333333334,None,"(5.333333333333334,0.0,5.833333333333333,0.0,0.0,0.0,6.833333333333334)" +vpclmulqdq-xmm_xmm_mem_imd,6.833333333333334,None,"(4.833333333333334,0.0,5.333333333333333,0.5,0.5,0.0,6.833333333333334)" +vrcpps-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vrcpps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vrcpps-ymm_mem,2.5,None,"(2.5,0.0,0.0,0.5,0.5,0.0,0.5)" +vrcpps-ymm_ymm,2.5,None,"(2.5,0.0,0.0,0.0,0.0,0.0,0.5)" +vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtsi2sd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsi2sd-xmm_xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpmovsxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vmovhlps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpmovsxwq-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovsxwq-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vorpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vorpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vorpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vorpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vorps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vorps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vorps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vorps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vmaskmovdqu-xmm_xmm,2.0,None,"(1.5,0.0,0.5,2.0,2.0,2.0,2.0)" +vmovntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovntpd-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vpminuw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminuw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vunpcklps-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpcklps-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vunpcklps-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpcklps-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpminub-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminub-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vmovntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.5,0.5,1.0,0.0)" +vmovntps-mem_ymm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,2.0,0.0)" +vpminud-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpminud-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vunpcklpd-xmm_xmm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpcklpd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vunpcklpd-ymm_ymm_mem,1.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,1.0)" +vunpcklpd-ymm_ymm_ymm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vpunpckhbw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhbw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvttpd2dq-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vpcmpgtd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpgtd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmaddwd-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpmaddwd-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtq-xmm_xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vpcmpgtq-xmm_xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpcmpgtw-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpcmpgtw-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vphminposuw-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vphminposuw-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +vpabsd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpabsd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxwd-xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vpmovzxwd-xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhwd-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpunpckhwd-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vphsubsw-xmm_xmm_mem,1.5,None,"(0.0,0.0,1.5,0.5,0.5,0.0,1.5)" +vphsubsw-xmm_xmm_xmm,1.5,None,"(0.0,0.0,1.5,0.0,0.0,0.0,1.5)" +vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2si-r32_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2si-r64_xmm,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vcvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,1.0)" +vcvtpd2ps-xmm_ymm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +vaddsd-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddsd-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vpacksswb-xmm_xmm_mem,0.5,None,"(0.0,0.0,0.5,0.5,0.5,0.0,0.5)" +vpacksswb-xmm_xmm_xmm,0.5,None,"(0.0,0.0,0.5,0.0,0.0,0.0,0.5)" +vaddss-xmm_xmm_mem,1.0,None,"(0.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vaddss-xmm_xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +vcvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vcvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vcvtps2pd-ymm_mem,1.0,None,"(1.0,0.0,0.0,0.5,0.5,0.0,0.0)" +vcvtps2pd-ymm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +vaesdec-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +vaesdec-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +vaesdeclast-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +vaesdeclast-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +vaesimc-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +vaesimc-xmm_mem,2.0,None,"(0.0,0.0,0.0,0.5,0.5,0.0,2.0)" +vaesenc-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +vaesenc-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +vaesenclast-xmm_xmm_xmm,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +vaesenclast-xmm_xmm_mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.5,0.5,0.0,1.3333333333333333)" +vaeskeygenassist-xmm_xmm_imd,7.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.0,0.0,0.0,7.833333333333333)" +vaeskeygenassist-xmm_mem_imd,6.833333333333333,None,"(2.3333333333333335,0.0,0.8333333333333333,0.5,0.5,0.0,6.833333333333333)" +vcvttss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtss2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvtsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2si-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2sil-r32_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2si-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" +vcvttsd2siq-r64_mem,1.0,None,"(1.0,0.0,1.0,0.5,0.5,0.0,0.0)" diff --git a/osaca/data/wsm_data.csv b/osaca/data/wsm_data.csv new file mode 100644 index 0000000..09cbecc --- /dev/null +++ b/osaca/data/wsm_data.csv @@ -0,0 +1,2446 @@ +instr,TP,LT,ports +sldt-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +sldt-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sldt-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sldtl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sldt-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +sldtq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +lgdt-mem,6.0,None,"(3.0,0.0,6.0,5.0,1.0,1.0,0.0)" +call-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +call-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +callq-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +call-LBL,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +mov-LBL,20.666666666666668,None,"(13.666666666666666,0.0,7.666666666666666,0.0,1.0,1.0,20.666666666666668)" +mov-LBL,12.166666666666668,None,"(12.166666666666668,0.0,4.666666666666667,0.0,0.0,0.0,12.166666666666668)" +jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +wrmsr-,42.5,None,"(42.5,0.0,27.0,6.0,1.0,1.0,18.5)" +repe scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jns-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jno-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnl-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cmc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +xadd-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xadd-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xaddq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cmovbe-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbe-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbe-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbeq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbe-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbe-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbe-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbeq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r32_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r64_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cmp-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmp-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmovle-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovle-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovlel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovle-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovleq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lsl-mem,15.333333333333334,None,"(15.333333333333334,0.0,14.333333333333334,5.0,0.0,0.0,1.3333333333333333)" +lsl-r32_mem,15.333333333333334,None,"(15.333333333333334,0.0,14.333333333333334,5.0,0.0,0.0,1.3333333333333333)" +lsl-r64_mem,15.333333333333334,None,"(15.333333333333334,0.0,14.333333333333334,5.0,0.0,0.0,1.3333333333333333)" +lslq-r64_mem,15.333333333333334,None,"(15.333333333333334,0.0,14.333333333333334,5.0,0.0,0.0,1.3333333333333333)" +lsl-,4.0,None,"(3.666666666666667,0.0,2.666666666666667,4.0,0.0,0.0,3.666666666666667)" +lsl-r32_r32,4.0,None,"(3.666666666666667,0.0,2.666666666666667,4.0,0.0,0.0,3.666666666666667)" +lsl-r64_r32,4.0,None,"(3.666666666666667,0.0,2.666666666666667,4.0,0.0,0.0,3.666666666666667)" +lahf-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cbw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +not-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +not-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +notq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nopl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nopq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +nop-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +inc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +inc-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +incq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpsw-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adcb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adcl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adc-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock adcq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +cmpsd-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +setb-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setl-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +seto-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +seto-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bsr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsr-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsrl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsr-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsrq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsr-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsr-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsrl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsr-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsrq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +setp-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +out-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +outb-imd_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +outl-imd_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-r16_r8,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +out-r16_r32,2.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,2.0)" +call far-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,1.0)" +cmovnle-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnle-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnlel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnle-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnleq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnle-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnle-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnlel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnle-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnleq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbbl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbbq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +sbb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbb-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbb-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbb-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +sbb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbb-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +sbbq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +lodsb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +lodsw-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +lodsd-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jnbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +std-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +stosd-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +xor-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xorb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xor-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xor-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xorl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xor-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xorq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +xor-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xor-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +xorq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sarb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +sar-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sarb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sar-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +stc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sti-,5.333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,5.333333333333333)" +str-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +str-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +str-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +strl-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +str-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +strq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +stosb-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rdmsr-,26.5,None,"(24.5,0.0,14.0,1.0,0.0,0.0,26.5)" +rep lodsb-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock not-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +idiv-mem,6,None,"(1.6666666666666665,6,2.6666666666666665,1.0,0.0,0.0,0.6666666666666666)" +idiv-r8,6,None,"(1.6666666666666665,6,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)" +idivb-r8,6,None,"(1.6666666666666665,6,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)" +idiv-mem,12,None,"(2.1666666666666665,12,2.6666666666666665,1.0,0.0,0.0,1.1666666666666665)" +idiv-mem,26,None,"(22.5,26,10.0,1.0,0.0,0.0,18.5)" +idiv-r32,12,None,"(2.5,12,3.0,0.0,0.0,0.0,1.5)" +idivl-r32,12,None,"(2.5,12,3.0,0.0,0.0,0.0,1.5)" +idiv-r64,26,None,"(22.333333333333332,26,10.333333333333332,0.0,0.0,0.0,19.333333333333332)" +idivq-r64,26,None,"(22.333333333333332,26,10.333333333333332,0.0,0.0,0.0,19.333333333333332)" +repne cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +sets-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +sets-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shrb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shr-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shr-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shrd-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrdl-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrdq-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrdl-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrdq-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrdb-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-mem_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-mem_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shrd-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrdb-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-r32_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shrd-r64_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsd-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsx-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movsw-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shlb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +shl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +shl-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +mov-r64_r8,2.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,2.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bts-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bts-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btsl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bts-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btsq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bts-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bts-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btsq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btr-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btr-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btrl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btr-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btrq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btr-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btr-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btrq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +sgdt-mem,2.0,None,"(1.1666666666666665,0.0,1.6666666666666665,2.0,2.0,2.0,1.1666666666666665)" +loop-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +btc-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btc-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btcl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btc-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btcq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btc-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btc-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btcq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +wbinvd-,65571.0,None,"(32627.0,0.0,33007.0,0.0,65571.0,65568.0,65561.0)" +jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jbe-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +mul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +mul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +mul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +mul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +mulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +push-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +push-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pushq-r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +push-imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +push-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pushw-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +push-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pushw-r16,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +setno-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setno-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnob-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnl-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnl-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnlb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cli-,4.5,None,"(0.5,0.0,1.0,0.0,0.0,0.0,4.5)" +cld-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +setnb-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +clc-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setnz-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setns-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setns-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnsb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnp-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnp-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnpb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lldt-mem,6.666666666666667,None,"(1.6666666666666667,0.0,1.6666666666666667,4.0,1.0,1.0,6.666666666666667)" +lldt-,5.666666666666667,None,"(1.6666666666666667,0.0,1.6666666666666667,3.0,1.0,1.0,5.666666666666667)" +ret-imd,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +ret-,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btc-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btc-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btcl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btc-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btcq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +setnbe-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnbe-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnbeb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmpxchg-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchgb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchg-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgb-r8_r8,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchg-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchgl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchg-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchgq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +cmpxchg-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgl-r32_r32,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchg-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +cmpxchgq-r64_r64,1.5,None,"(1.5,0.0,1.0,0.0,0.0,0.0,1.5)" +verr-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +verr-,5.0,None,"(2.0,0.0,5.0,5.0,0.0,0.0,0.0)" +rep stosb-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cwd-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +testq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +test-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +test-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +testq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jz-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +scasw-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +js-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jo-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +scasd-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jb-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +rdpmc-,12.166666666666666,None,"(8.166666666666666,0.0,4.666666666666666,0.0,0.0,0.0,12.166666666666666)" +lock cmpxchg-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchgb-mem_r8,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchg-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchgl-mem_r32,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchg-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock cmpxchgq-mem_r64,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock inc-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +cmovnp-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnp-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnpl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnp-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnpq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +ret far-,2.3333333333333335,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,2.3333333333333335)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +enter-imd_imd,7.0,None,"(7.0,0.0,7.0,2.0,6.0,6.0,0.0)" +repne scasb-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +leave-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +lock xadd-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddb-mem_r8,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddl-mem_r32,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xadd-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lock xaddq-mem_r64,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +lidt-mem,6.0,None,"(4.0,0.0,4.0,6.0,1.0,1.0,0.0)" +xlat-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +lock xchg-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchgb-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchgb-mem_r8,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgb-r8_r8,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +lock xchg-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchg-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchgl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchg-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +lock xchgq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchgl-mem_r32,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchgq-mem_r64,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +xchg-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgl-r32_r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchg-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +xchgq-r64_r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +smsw-mem,2.6666666666666665,None,"(1.6666666666666665,0.0,2.6666666666666665,0.0,1.0,1.0,1.6666666666666665)" +smsw-,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)" +smsw-r32,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)" +smswl-r32,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)" +smsw-r64,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)" +smswq-r64,3.333333333333333,None,"(2.333333333333333,0.0,3.333333333333333,0.0,0.0,0.0,1.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +andq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +and-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +andb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +and-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +and-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +andl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +and-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +andq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +and-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +and-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +andq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +mov-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +mov-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +mov-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +mov-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +mov-,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r32,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movl-r32,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mov-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movb-mem_r8,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movl-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mov-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jle-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +cpuid-,17.333333333333332,None,"(9.833333333333334,0.0,17.333333333333332,0.0,2.0,2.0,12.833333333333334)" +rdtsc-,9.833333333333334,None,"(9.833333333333334,0.0,5.333333333333334,0.0,0.0,0.0,5.833333333333334)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sidt-mem,2.0,None,"(0.6666666666666666,0.0,1.6666666666666665,2.0,2.0,2.0,0.6666666666666666)" +cdq-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbbl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbb-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +lock sbbq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulb-r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r32,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_mem_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_r32_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imulq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +imul-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imul-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +imulq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rcr-mem_imd,4.0,None,"(3.0,0.0,4.0,1.0,1.0,1.0,2.0)" +rcr-r8_imd,3.5,None,"(3.5,0.0,3.0,0.0,0.0,0.0,2.5)" +rcrb-r8_imd,3.5,None,"(3.5,0.0,3.0,0.0,0.0,0.0,2.5)" +rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcr-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcrl-r32_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcr-r64_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcrq-r64_imd,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcrb-r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcr-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcr-r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcrl-r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcr-r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcrq-r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcr-mem_r8,4.0,None,"(3.0,0.0,4.0,1.0,1.0,1.0,2.0)" +rcrb-mem_r8,4.0,None,"(3.0,0.0,4.0,1.0,1.0,1.0,2.0)" +rcr-r8_r8,3.5,None,"(3.5,0.0,3.0,0.0,0.0,0.0,2.5)" +rcrb-r8_r8,3.5,None,"(3.5,0.0,3.0,0.0,0.0,0.0,2.5)" +rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcrb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcr-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcrb-r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcr-r32_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcr-r64_r8,3.0,None,"(1.5,0.0,3.0,0.0,0.0,0.0,1.5)" +rcl-mem_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,2.1666666666666665)" +rcl-r8_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,2.1666666666666665)" +rclb-r8_imd,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,2.1666666666666665)" +rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-mem_imd,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-imd,2.6666666666666665,None,"(2.1666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)" +rcl-r32_imd,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)" +rcl-r64_imd,2.6666666666666665,None,"(2.1666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)" +rclq-r64_imd,2.6666666666666665,None,"(2.1666666666666665,0.0,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rclb-r8,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,1.3333333333333333)" +rcl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcl-r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcl-r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rclq-r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +rcl-mem_r8,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,2.1666666666666665)" +rclb-mem_r8,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,1.0,1.0,1.0,2.1666666666666665)" +rcl-r8_r8,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,2.1666666666666665)" +rclb-r8_r8,4.166666666666666,None,"(4.166666666666666,0.0,1.6666666666666665,0.0,0.0,0.0,2.1666666666666665)" +rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rclb-mem_r8,4.0,None,"(1.5,0.0,4.0,1.0,1.0,1.0,1.5)" +rcl-r8,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)" +rclb-r8,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)" +rcl-r32_r8,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)" +rcl-r64_r8,3.0,None,"(2.0,0.0,3.0,0.0,0.0,0.0,1.0)" +div-mem,6,None,"(1.0,6,2.0,1.0,0.0,0.0,0.0)" +div-r8,6,None,"(1.3333333333333333,6,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)" +divb-r8,6,None,"(1.3333333333333333,6,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)" +div-mem,12,None,"(2.333333333333333,12,2.3333333333333335,1.0,0.0,0.0,1.3333333333333333)" +div-mem,26,None,"(12.0,26,8.0,1.0,0.0,0.0,11.0)" +div-r32,12,None,"(2.1666666666666665,12,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)" +divl-r32,12,None,"(2.1666666666666665,12,2.6666666666666665,0.0,0.0,0.0,1.1666666666666665)" +div-r64,26,None,"(12.0,26,8.0,0.0,0.0,0.0,12.0)" +divq-r64,26,None,"(12.0,26,8.0,0.0,0.0,0.0,12.0)" +stosw-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep movsb-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +cmovnz-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnz-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnzl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnz-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnzq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovns-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnsl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovns-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnsq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovns-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovns-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovno-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnol-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovno-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnoq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovno-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovno-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnl-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnlq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnb-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnb-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovo-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovol-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovo-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovoq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovo-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovol-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovo-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovoq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bt-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +bt-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bt-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bt-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +btq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +bt-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btl-r32_r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +bt-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +btq-r64_r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pop-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +pop-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +popq-r64,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +jrcxz-LBL,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +shld-mem_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shldl-mem_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shldq-mem_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shldl-r32_r32_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shldq-r64_r64_imd,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shldb-mem_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-mem_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-mem_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +shld-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shldb-r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-r32_r32_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shld-r64_r64_r8,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +invlpg-mem,17.0,None,"(13.0,0.0,10.0,1.0,3.0,3.0,17.0)" +sahf-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmovz-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovz-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovzl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovz-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovzq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovz-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovz-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovzl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovz-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovzq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovp-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovpl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovp-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovpq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovp-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovpl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovp-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovpq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovs-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovsl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovs-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovsq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovs-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovsl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovs-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovsq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovl-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovlq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovl-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovl-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovlq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovb-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbl-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovb-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovbq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovb-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbl-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovb-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovbq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +lmsw-mem,8.333333333333334,None,"(5.333333333333333,0.0,5.333333333333333,2.0,1.0,1.0,8.333333333333334)" +lmsw-,7.666666666666667,None,"(5.666666666666667,0.0,2.666666666666667,0.0,1.0,1.0,7.666666666666667)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock bts-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock bts-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btsl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock bts-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btsq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xor-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock xorq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +orq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +or-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +orb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +or-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +or-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +orl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +or-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +orq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +or-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +or-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +orq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +repe cmpsb-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +clts-,2.333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,2.333333333333333)" +movzx-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r32_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r64_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzxl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzxq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movzx-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzx-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movzxq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rolb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rol-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rolb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rol-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +verw-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +verw-,5.0,None,"(3.0,0.0,5.0,4.0,0.0,0.0,0.0)" +jmp-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +jmp-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmpq-r64,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +jmp-LBL,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorl-r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorq-r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorl-r32,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorq-r64,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +rorb-mem_r8,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +ror-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +rorb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r32_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ror-r64_r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setle-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmovnbe-mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbe-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbel-r32_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbe-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbeq-r64_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +cmovnbe-,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbe-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbel-r32_r32,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbe-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +cmovnbeq-r64_r64,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +subl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +subq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +sub-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +sub-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +sub-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +subl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +sub-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +subq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +sub-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +sub-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +subq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +neg-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +neg-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +negq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setnle-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setnle-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setnleb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmpxchg8b-mem,5.833333333333333,None,"(5.833333333333333,0.0,1.3333333333333333,1.0,1.0,1.0,2.833333333333333)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,1.0,1.0,0.5)" +lock btr-mem,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btr-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btrl-mem_r32,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btr-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +lock btrq-mem_r64,1.1666666666666665,None,"(1.1666666666666665,0.0,0.6666666666666666,1.0,1.0,1.0,1.1666666666666665)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_imd,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addb-mem_r8,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addl-mem_r32,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +addq-mem_r64,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +add-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +addb-r8_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +add-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +add-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +addl-r32_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +add-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +addq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +add-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addb-r8_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addl-r32_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +add-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +addq-r64_imd,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adcb-mem_r8,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcb-r8_r8,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-mem,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adcl-mem_r32,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adcq-mem_r64,1.0,None,"(1.0,0.0,1.0,1.0,1.0,1.0,1.0)" +adc-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcl-r32_r32,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcq-r64_r64,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adcb-r8_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adc-mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adc-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adcl-r32_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adc-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adcq-r64_mem,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +adc-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcb-r8_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcl-r32_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adc-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +adcq-r64_imd,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +lock cmpxchg8b-mem,6.833333333333334,None,"(6.833333333333334,0.0,2.3333333333333335,1.0,1.0,1.0,2.8333333333333335)" +cwde-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bsf-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsf-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsfl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsf-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsfq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +bsf-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsf-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsfl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsf-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bsfq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lea-mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lea-r32_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +leal-r32_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lea-r64_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +leaq-r64_mem,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +setz-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setz-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setzb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decb-r8,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +dec-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decl-r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +dec-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +decq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +setbe-mem,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +setbe-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +setbeb-r8,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +lock neg-mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +bswap-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bswapl-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bswap-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +bswapq-r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +jmp far-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpckhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpckhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +divps-xmm_mem,14,None,"(1.0,14,0.0,1.0,0.0,0.0,0.0)" +divps-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +addss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtpi2ps-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cmpss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cmpss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fxsave64-mem,38.0,None,"(14.333333333333334,0.0,15.333333333333334,5.0,38.0,38.0,19.333333333333332)" +andnps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +andnps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +prefetcht2-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +prefetcht1-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +prefetcht0-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +cvttss2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttss2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttss2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttss2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttss2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttss2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ldmxcsr-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +orps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +orps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movmskps-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +divss-xmm_mem,14,None,"(1.0,14,0.0,1.0,0.0,0.0,0.0)" +divss-xmm_xmm,14,None,"(1.0,14,0.0,0.0,0.0,0.0,0.0)" +rcpss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +rcpss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movlhps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +sqrtss-xmm_mem,18,None,"(1.0,18,0.0,1.0,0.0,0.0,0.0)" +sqrtss-xmm_xmm,18,None,"(1.0,18,0.0,0.0,0.0,0.0,0.0)" +subss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +subss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cmpps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cmpps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movss-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movss-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movss-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +xorps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +xorps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +subps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +subps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +shufps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +shufps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +minss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +minss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movlps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +movlps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +addps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsi2ss-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +sfence-,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +rsqrtss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +rsqrtss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +unpcklps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpcklps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +mulss-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mulss-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fxrstor64-mem,42.0,None,"(26.0,0.0,16.0,42.0,0.0,0.0,25.0)" +fxsave-mem,38.0,None,"(14.333333333333334,0.0,15.333333333333334,5.0,38.0,38.0,19.333333333333332)" +sqrtps-xmm_mem,18,None,"(1.0,18,0.0,1.0,0.0,0.0,0.0)" +sqrtps-xmm_xmm,18,None,"(1.0,18,0.0,0.0,0.0,0.0,0.0)" +cvttps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rsqrtps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +rsqrtps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +minps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +minps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtps2pi-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtps2pi-mmx_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movaps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movaps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movaps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mulps-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mulps-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +cvtss2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtss2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtss2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtss2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtss2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtss2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movhps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +movhps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +andps-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +andps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movups-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movups-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movups-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +fxrstor-mem,42.0,None,"(26.0,0.0,16.0,42.0,0.0,0.0,25.0)" +stmxcsr-mem,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +maxps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +maxps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +prefetchnta-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movntps-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movhlps-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +comiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +comiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rcpps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +rcpps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +maxss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +maxss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ucomiss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +ucomiss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +unpckhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpckhpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +punpckhdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movnti-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movntil-mem_r32,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movnti-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movntiq-mem_r64,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +cvtdq2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtdq2pd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvttps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +divpd-xmm_mem,21,None,"(1.0,21,0.0,1.0,0.0,0.0,0.0)" +divpd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +movsd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movsd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pcmpgtw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpgtb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpgtd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvtpi2pd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtpi2pd-xmm_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +packuswb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +packuswb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +maskmovdqu-xmm_xmm,2.333333333333333,None,"(2.333333333333333,0.0,0.3333333333333333,2.0,2.0,2.0,1.3333333333333333)" +andnpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +andnpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pslldq-xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +unpcklpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +unpcklpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +psadbw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psadbw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddusw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddusw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddusb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddusb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvtps2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtps2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +packssdw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +packssdw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmullw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmullw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +divsd-xmm_mem,21,None,"(1.0,21,0.0,1.0,0.0,0.0,0.0)" +divsd-xmm_xmm,21,None,"(1.0,21,0.0,0.0,0.0,0.0,0.0)" +pcmpeqw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpeqb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpeqd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpcklqdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklqdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpcklwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +orpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +orpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pxor-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pxor-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmppd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cmppd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movq2dq-xmm_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqu-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movdqu-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqu-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +psubb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubusw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubusw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaxsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvtpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +paddd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psrldq-xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpckhqdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhqdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cmpsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cmpsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmulhuw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhuw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +minsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +minsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttsd2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttsd2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttsd2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttsd2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvttsd2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +por-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +por-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movntdq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +cvtsd2ss-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtsd2ss-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pslld-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pslld-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +pslld-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +sqrtsd-xmm_mem,32,None,"(1.0,32,0.0,1.0,0.0,0.0,0.0)" +sqrtsd-xmm_xmm,32,None,"(1.0,32,0.0,0.0,0.0,0.0,0.0)" +psllw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psllw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsi2sd-xmm_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllq-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllq-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psllq-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +psubusb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubusb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovmskb-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckldq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +mulsd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mulsd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +pandn-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pandn-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +shufpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +shufpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +subpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +subpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +sqrtpd-xmm_mem,32,None,"(1.0,32,0.0,1.0,0.0,0.0,0.0)" +sqrtpd-xmm_xmm,32,None,"(1.0,32,0.0,0.0,0.0,0.0,0.0)" +andpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +andpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmulhw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movq-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-xmm_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movq-r64_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pminsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvttpd2dq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvttpd2dq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +pshufd-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufd-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movlpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +movlpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +cvtss2sd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +cvtss2sd-xmm_xmm,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +xorpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +xorpd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +maxsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +maxsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +minpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +minpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlq-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psrlq-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +psrlw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psrlw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +psrld-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrld-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psrld-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +subsd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +subsd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +lfence-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +cvtsd2si-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsd2sil-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsd2si-r32_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtsd2si-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsd2siq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtsd2si-r64_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvtps2pd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,1.0)" +cvtps2pd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movd-xmm_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movd-r32_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movapd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movapd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movapd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +mulpd-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +mulpd-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +movdq2q-mmx_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movmskpd-r32_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +psubq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movhpd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +movhpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +punpckhbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movupd-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movupd-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +movupd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pmuludq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmuludq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmuludq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmuludq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmaddwd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmaddwd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pextrw-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pand-xmm_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pand-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cvtdq2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +cvtdq2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmaxub-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxub-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpckhwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +cvtpd2ps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,1.0)" +cvtpd2ps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,1.0)" +cvtpd2pi-mmx_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +cvtpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +mfence-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pshuflw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshuflw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +maxpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +maxpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pminub-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminub-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrw-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movdqa-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movdqa-xmm_xmm,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movdqa-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +psubsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pavgw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pavgw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movntpd-mem_xmm,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +psubsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pavgb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pavgb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psraw-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psraw-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psraw-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +comisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +comisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-xmm_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +psrad-xmm_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +packsswb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +packsswb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpcklbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ucomisd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +ucomisd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +cvttpd2pi-mmx_mem,1.0,None,"(0.5,0.0,1.0,1.0,0.0,0.0,0.5)" +cvttpd2pi-mmx_xmm,1.0,None,"(0.5,0.0,1.0,0.0,0.0,0.0,0.5)" +pshufhw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufhw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +ficomp-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fchs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucom-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomi-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fldl2t-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsub-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsub-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fldl2e-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fcmovnu-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcomip-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcmovnb-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmovne-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +faddp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcmovbe-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmul-mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,0.0)" +fmul-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcompp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fcomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fcomp-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fisubr-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fisub-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fsubp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fsubr-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsubr-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fild-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fadd-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fadd-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fidiv-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fcom-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fxam-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +ffree-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fimul-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fstp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fiadd-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fnop-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +ficom-mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +fldpi-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fnstsw-mem,2.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,2.0)" +fnstsw-,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +fwait-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +fcmovnbe-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fincstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +ftst-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fst-mem,1.0,None,"(0.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fst-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fist-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fdivrp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fidivr-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fsubrp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fabs-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmovu-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fcmove-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldcw-mem,1.3333333333333333,None,"(1.3333333333333333,0.0,0.3333333333333333,1.0,1.0,1.0,0.3333333333333333)" +fcmovb-fpu_fpu,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fmulp-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fsqrt-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fdivp-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)" +fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdivr-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)" +fdivr-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)" +fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fdiv-mem,24,None,"(1.0,24,0.0,1.0,0.0,0.0,0.0)" +fdiv-fpu,24,None,"(1.0,24,0.0,0.0,0.0,0.0,0.0)" +fldln2-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fxch-fpu,0.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fld-fpu,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fld-mem,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,0.0)" +fucomp-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fucomi-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fdecstp-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fldlg2-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +fldz-,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +fucompp-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fld1-,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fucomip-fpu,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +fnstcw-mem,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +fistp-mem,1.0,None,"(0.0,0.0,1.0,1.0,1.0,1.0,0.0)" +punpckhdq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhdq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movntq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +pcmpgtw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpgtb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpgtd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpgtd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +packuswb-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +packuswb-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psubd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psadbw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psadbw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddusw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddusw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddusb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddusb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +packssdw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +packssdw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmullw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmullw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pcmpeqw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpeqb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpeqd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpcklwd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklwd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pxor-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pxor-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +psubb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubusw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubusw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaxsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +paddb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmulhuw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhuw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +por-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +por-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pslld-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pslld-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pslld-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psllw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllq-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psllq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psllq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psubusb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubusb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovmskb-r32_mmx,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,0.0)" +punpckldq-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckldq-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pandn-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pandn-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pmulhw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +movq-mmx_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movq-mmx_r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movq-r64_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movq-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pminsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pshufw-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufw-mmx_mmx_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psrlq-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlq-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psrlq-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrlw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psrlw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrld-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrld-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psrld-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +paddsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +paddsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movd-mmx_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movd-mmx_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +movd-mem_mmx,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,0.0)" +movd-r32_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +emms-,5.666666666666666,None,"(5.666666666666666,0.0,2.6666666666666665,0.0,0.0,0.0,2.6666666666666665)" +punpckhbw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhbw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaddwd-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmaddwd-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pextrw-r32_mmx_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pand-mmx_mem,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +pand-mmx_mmx,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +pmaxub-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxub-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +punpckhwd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpckhwd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pminub-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminub-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrw-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrw-mmx_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pavgw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pavgw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psubsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psubsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pavgb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pavgb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +maskmovq-mmx_mmx,1.0,None,"(1.0,0.0,0.0,1.0,1.0,1.0,0.0)" +psraw-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psraw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psraw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-mmx_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +psrad-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +psrad-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +packsswb-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +packsswb-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +punpcklbw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +punpcklbw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +repe scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +lodsq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +cdqe-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep lodsq-,1.0,None,"(0.3333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.3333333333333333)" +repne cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +pushfq-,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +rep movsq-,1.0,None,"(0.6666666666666666,0.0,0.6666666666666666,1.0,1.0,1.0,0.6666666666666666)" +movsxd-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxdq-r64_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsxd-r64_r32,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +rep stosq-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +swapgs-,1.6666666666666665,None,"(1.6666666666666665,0.0,0.6666666666666666,1.0,0.0,0.0,0.6666666666666666)" +scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +repne scasq-,0.6666666666666666,None,"(0.6666666666666666,0.0,0.6666666666666666,0.0,0.0,0.0,0.6666666666666666)" +popfq-,2.666666666666667,None,"(1.6666666666666667,0.0,2.666666666666667,1.0,0.0,0.0,2.666666666666667)" +stosq-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +cmpxchg16b-mem,9.666666666666666,None,"(9.666666666666666,0.0,3.6666666666666665,1.0,1.0,1.0,4.666666666666666)" +cqo-,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +repe cmpsq-,2.0,None,"(1.0,0.0,1.0,2.0,0.0,0.0,1.0)" +lock cmpxchg16b-mem,9.5,None,"(9.5,0.0,4.0,1.0,1.0,1.0,4.5)" +bndmov-,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndmov-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndmov-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcn-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcn-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcnq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcu-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcu-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcuq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndstx-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcl-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndcl-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndclq-r64,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndldx-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +bndmk-mem,0.3333333333333333,None,"(0.3333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.3333333333333333)" +popcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +popcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +popcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmovzxbq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxbq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovzxbd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxbd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovsxwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +roundpd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +roundpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +roundps-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +roundps-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pcmpgtq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pcmpgtq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pblendw-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pblendw-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +mpsadbw-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,1.0)" +mpsadbw-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +phminposuw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +phminposuw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pcmpistrm-xmm_mem_imd,2.6666666666666665,None,"(0.6666666666666666,0.0,2.6666666666666665,1.0,0.0,0.0,0.6666666666666666)" +pcmpistrm-xmm_xmm_imd,2.6666666666666665,None,"(0.6666666666666666,0.0,2.6666666666666665,0.0,0.0,0.0,0.6666666666666666)" +insertps-xmm_mem_imd,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)" +insertps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmovsxdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +movntdqa-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +pmovsxbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmulld-xmm_mem,2.0,None,"(0.0,0.0,2.0,1.0,0.0,0.0,0.0)" +pmulld-xmm_xmm,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,0.0)" +pcmpeqq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pcmpeqq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pminsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +packusdw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +packusdw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +extractps-mem_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,1.0,1.0,1.0)" +extractps-r32_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmaxsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaxsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +blendpd-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +blendpd-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +ptest-xmm_mem,1.0,None,"(0.8333333333333333,0.0,0.3333333333333333,1.0,0.0,0.0,0.8333333333333333)" +ptest-xmm_xmm,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pmovzxbw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxbw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pcmpestri-xmm_mem_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.3333333333333333)" +pcmpestri-xmm_xmm_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,1.3333333333333333)" +rex.w pcmpestri-xmm_mem_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.3333333333333333)" +rex.w pcmpestri-xmm_xmm_imd,4.333333333333333,None,"(2.333333333333333,0.0,4.333333333333333,0.0,0.0,0.0,1.3333333333333333)" +pcmpestrm-xmm_mem_imd,4.333333333333333,None,"(3.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.3333333333333333)" +pcmpestrm-xmm_xmm_imd,4.666666666666667,None,"(2.666666666666667,0.0,4.666666666666667,0.0,0.0,0.0,1.6666666666666667)" +rex.w pcmpestrm-xmm_mem_imd,4.333333333333333,None,"(3.333333333333333,0.0,4.333333333333333,1.0,0.0,0.0,1.3333333333333333)" +rex.w pcmpestrm-xmm_xmm_imd,4.666666666666667,None,"(2.666666666666667,0.0,4.666666666666667,0.0,0.0,0.0,1.6666666666666667)" +pmuldq-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmuldq-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmovzxdq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxdq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pminsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovsxbd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxbd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovsxwq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxwq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmovsxbq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovsxbq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r32_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r64_r8,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32l-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32q-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +crc32-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32l-r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32l-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +crc32q-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +dppd-xmm_mem_imd,1.0,None,"(1.0,0.0,1.0,1.0,0.0,0.0,1.0)" +dppd-xmm_xmm_imd,1.0,None,"(1.0,0.0,1.0,0.0,0.0,0.0,1.0)" +dpps-xmm_mem_imd,2.3333333333333335,None,"(1.3333333333333333,0.0,2.3333333333333335,1.0,0.0,0.0,1.3333333333333333)" +dpps-xmm_xmm_imd,2.0,None,"(1.0,0.0,2.0,0.0,0.0,0.0,1.0)" +pcmpistri-xmm_mem_imd,2.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,1.0,0.0,0.0,0.3333333333333333)" +pcmpistri-xmm_xmm_imd,2.3333333333333335,None,"(0.3333333333333333,0.0,2.3333333333333335,0.0,0.0,0.0,0.3333333333333333)" +pextrd-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +pextrd-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pmaxuw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxuw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pmaxud-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmaxud-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +blendps-xmm_mem_imd,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,1.0)" +blendps-xmm_xmm_imd,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pextrb-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +pextrb-r32_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pminuw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminuw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pminud-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pminud-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrq-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrq-xmm_r64_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrd-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrd-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pinsrb-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pinsrb-xmm_r32_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +blendvps-xmm_mem,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)" +blendvps-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +blendvpd-xmm_mem,2.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,2.0)" +blendvpd-xmm_xmm,2.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,2.0)" +pextrw-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +roundss-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +roundss-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +roundsd-xmm_mem_imd,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +roundsd-xmm_xmm_imd,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pextrq-mem_xmm_imd,1.0,None,"(0.5,0.0,0.0,0.0,1.0,1.0,0.5)" +pextrq-r64_xmm_imd,0.8333333333333333,None,"(0.8333333333333333,0.0,0.3333333333333333,0.0,0.0,0.0,0.8333333333333333)" +pmovzxwq-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxwq-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pblendvb-xmm_mem,1.0,None,"(1.0,0.0,0.0,1.0,0.0,0.0,1.0)" +pblendvb-xmm_xmm,1.0,None,"(1.0,0.0,0.0,0.0,0.0,0.0,1.0)" +pmovzxwd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pmovzxwd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +phsubd-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubd-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phsubd-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubd-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +pmulhrsw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhrsw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmulhrsw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmulhrsw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +phsubw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phsubw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +psignw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +psignb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +psignb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +phaddsw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddsw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phaddsw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddsw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +pmaddubsw-mmx_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmaddubsw-mmx_mmx,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +pmaddubsw-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +pmaddubsw-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +phsubsw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubsw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phsubsw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phsubsw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +pabsw-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsw-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsw-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsw-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +phaddd-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddd-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phaddd-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddd-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +palignr-mmx_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +palignr-mmx_mmx_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +palignr-xmm_mem_imd,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +palignr-xmm_xmm_imd,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pshufb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pshufb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pshufb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsd-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsd-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsd-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsd-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsb-mmx_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsb-mmx_mmx,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +pabsb-xmm_mem,1.0,None,"(0.5,0.0,0.0,1.0,0.0,0.0,0.5)" +pabsb-xmm_xmm,0.5,None,"(0.5,0.0,0.0,0.0,0.0,0.0,0.5)" +phaddw-mmx_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddw-mmx_mmx,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +phaddw-xmm_mem,1.5,None,"(1.5,0.0,0.0,1.0,0.0,0.0,1.5)" +phaddw-xmm_xmm,1.5,None,"(1.5,0.0,0.0,0.0,0.0,0.0,1.5)" +addsubps-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addsubps-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +addsubpd-xmm_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +addsubpd-xmm_xmm,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +hsubps-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)" +hsubps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +hsubpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)" +hsubpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +haddpd-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)" +haddpd-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +movshdup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movshdup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +haddps-xmm_mem,2.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,2.0)" +haddps-xmm_xmm,2.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,2.0)" +movsldup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movsldup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)" +fisttp-mem,1.0,None,"(0.0,0.0,1.0,0.0,1.0,1.0,0.0)" +lddqu-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movddup-xmm_mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +movddup-xmm_xmm,1.0,None,"(0.0,0.0,0.0,0.0,0.0,0.0,1.0)" +tzcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +tzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +tzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +rdtscp-,2.0,None,"(0.0,0.0,2.0,0.0,0.0,0.0,2.0)" +aesdec-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)" +aesdec-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)" +aeskeygenassist-xmm_xmm_imd,2.3333333333333335,None,"(2.3333333333333335,0.0,0.3333333333333333,1.0,0.0,0.0,1.3333333333333333)" +aeskeygenassist-xmm_mem_imd,2.3333333333333335,None,"(2.3333333333333335,0.0,0.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" +aesenclast-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)" +aesenclast-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)" +aesimc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)" +aesimc-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)" +aesdeclast-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)" +aesdeclast-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)" +aesenc-xmm_xmm,2.0,None,"(2.0,0.0,0.0,0.0,0.0,0.0,1.0)" +aesenc-xmm_mem,2.0,None,"(2.0,0.0,0.0,1.0,0.0,0.0,1.0)" +prefetchwt1-mem,1.0,None,"(0.0,0.0,0.0,1.0,0.0,0.0,0.0)" +lzcnt-mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcnt-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcntl-r32_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcnt-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcntq-r64_mem,1.0,None,"(0.0,0.0,1.0,1.0,0.0,0.0,0.0)" +lzcnt-,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcnt-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcntl-r32_r32,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcnt-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +lzcntq-r64_r64,1.0,None,"(0.0,0.0,1.0,0.0,0.0,0.0,0.0)" +clflush-mem,1.3333333333333333,None,"(0.3333333333333333,0.0,1.3333333333333333,0.0,1.0,1.0,0.3333333333333333)" +pause-,1.3333333333333333,None,"(1.3333333333333333,0.0,1.3333333333333333,0.0,0.0,0.0,1.3333333333333333)" diff --git a/osaca/eu_sched.py b/osaca/eu_sched.py index aba6dd2..765d7ab 100755 --- a/osaca/eu_sched.py +++ b/osaca/eu_sched.py @@ -12,8 +12,23 @@ from osaca.param import Register, MemAddr class Scheduler(object): - arch_dict = {'SNB': 6, 'IVB': 6, 'HSW': 8, 'BDW': 8, 'SKL': 8, 'ZEN': 10} - dv_ports_dict = {'SKL': [0], 'ZEN': [3]} + arch_dict = { + # Intel + 'NHM': 5, 'WSM': 5, # Nehalem, Westmere + 'SNB': 6, 'IVB': 6, # Sandy Bridge, Ivy Bridge + 'HSW': 8, 'BDW': 8, # Haswell, Broadwell + 'SKL': 8, 'SKX': 8, # Skylake(-X) + 'KBL': 8, 'CFL': 8, # Kaby Lake, Coffee Lake + # AMD + 'ZEN': 10, # Zen/Ryzen/EPYC + } + arch_pipeline_ports = { + 'NHM': ['0DV'], 'WSM': ['0DV'], + 'SNB': ['0DV'], 'IVB': ['0DV'], + 'HSW': ['0DV'], 'BDW': ['0DV'], + 'SKL': ['0DV'], 'SKX': ['0DV'], + 'KBL': ['0DV'], 'CFL': ['0DV'], + 'ZEN': ['3DV'],} # content of most inner list in instrList: instr, operand(s), instr form df = None # type: DataFrame # for parallel ld/st in archs with 1 st/cy and >1 ld/cy, able to do 1 st and 1 ld in 1cy @@ -33,7 +48,7 @@ class Scheduler(object): self.en_par_ldst = True self.ld_ports = [9, 10] # check for DV port - self.dv_ports = self.dv_ports_dict.get(arch, []) + self.pipeline_ports = self.arch_pipeline_ports.get(arch, []) self.instrList = instruction_list # curr_dir = os.path.realpath(__file__)[:-11] osaca_dir = os.path.expanduser('~/.osaca/') @@ -60,8 +75,8 @@ class Scheduler(object): sched = self.get_head() # Initialize ports # Add DV port, if it is existing - occ_ports = [[0] * (self.ports + len(self.dv_ports)) for x in range(len(self.instrList))] - port_bndgs = [0] * (self.ports + len(self.dv_ports)) + occ_ports = [[0] * (self.ports + len(self.pipeline_ports)) for x in range(len(self.instrList))] + port_bndgs = [0] * (self.ports + len(self.pipeline_ports)) # Store instruction counter for parallel ld/st par_ldst = 0 # Count the number of store instr if we schedule for an architecture with par ld/st @@ -74,8 +89,8 @@ class Scheduler(object): # Check if there's a port occupation stored in the CSV, otherwise leave the # occ_port list item empty for i, instrForm in enumerate(self.instrList): + search_string = instrForm[0] + '-' + self.get_operand_suffix(instrForm) try: - search_string = instrForm[0] + '-' + self.get_operand_suffix(instrForm) entry = self.df.loc[lambda df, sStr=search_string: df.instr == sStr] tup = entry.ports.values[0] if len(tup) == 1 and tup[0] == -1: @@ -92,13 +107,14 @@ class Scheduler(object): p_flg = '' if self.en_par_ldst: # Check for ld + # FIXME remove special load handling from here and place in machine model if (isinstance(instrForm[-2], MemAddr) or (len(instrForm) > 4 and isinstance(instrForm[2], MemAddr))): if par_ldst > 0: par_ldst -= 1 p_flg = 'P ' for port in self.ld_ports: - occ_ports[i][port] = '(' + str(occ_ports[i][port]) + ')' + occ_ports[i][port] = 0.0 # '(' + str(occ_ports[i][port]) + ')' # Write schedule line if len(p_flg) > 0: sched += self.format_port_occupation_line(occ_ports[i], p_flg + instrForm[-1]) @@ -361,14 +377,7 @@ class Scheduler(object): :return: list of strings """ - port_names = [] - dv_ports_appended = 0 - for i in range(self.ports): - port_names.append(str(i)) - if i in self.dv_ports: - dv_ports_appended += 1 - port_names.append(str(i)+'DV') - return port_names + return sorted([str(i) for i in range(self.ports)] + self.pipeline_ports) def get_port_binding(self, port_bndg): """ diff --git a/osaca/osaca.py b/osaca/osaca.py index 40c2077..56012d0 100755 --- a/osaca/osaca.py +++ b/osaca/osaca.py @@ -364,7 +364,7 @@ class OSACA(object): longestInstr = 30 machine_readable = False - VALID_ARCHS = ['SNB', 'IVB', 'HSW', 'BDW', 'SKL', 'ZEN'] + VALID_ARCHS = Scheduler.arch_dict def __init__(self, arch, assembly, extract_with_markers=True): """ @@ -574,6 +574,15 @@ class OSACA(object): (port_name, port_binding[i]) for i, port_name in enumerate(self.schedule.get_port_naming())]) + def get_unmatched_instruction_ratio(self): + """ + Calculate ratio of unmatched vs total instructions + + :return: float + """ + sched_output, port_binding = self.schedule.new_schedule() + return sched_output.count('| X ') / len(self.instr_forms) + def get_total_throughput(self): """ Return total cycles estimated per block execution. Including (potential) penalties. diff --git a/tests/test_osaca.py b/tests/test_osaca.py index 946a465..3040fe0 100755 --- a/tests/test_osaca.py +++ b/tests/test_osaca.py @@ -13,35 +13,57 @@ from osaca import osaca class TestOsaca(unittest.TestCase): maxDiff = None + def setUp(self): + self.curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1]) + @unittest.skip("Binary analysis is error prone and currently not working with FSF's objdump") def testIACABinary(self): - curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1]) - assembly = osaca.get_assembly_from_binary(curr_dir + '/testfiles/taxCalc-ivb-iaca') + assembly = osaca.get_assembly_from_binary(self.curr_dir + '/testfiles/taxCalc-ivb-iaca') osa = osaca.OSACA('IVB', assembly) result = osa.generate_text_output() result = result[result.find('Port Binding in Cycles Per Iteration:'):] - with open(curr_dir + '/test_osaca_iaca.out', encoding='utf-8') as f: + with open(self.curr_dir + '/test_osaca_iaca.out', encoding='utf-8') as f: assertion = f.read() self.assertEqual(assertion.replace(' ', ''), result.replace(' ', '')) # Test ASM file with IACA marker in two lines def testIACAasm1(self): - curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1]) - with open(curr_dir + '/testfiles/taxCalc-ivb-iaca.S') as f: + with open(self.curr_dir + '/testfiles/taxCalc-ivb-iaca.S') as f: osa = osaca.OSACA('IVB', f.read()) result = osa.generate_text_output() result = result[result.find('Port Binding in Cycles Per Iteration:'):] - with open(curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f: + with open(self.curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f: assertion = f.read() self.assertEqual(assertion.replace(' ', ''), result.replace(' ', '')) # Test ASM file with IACA marker in four lines def testIACAasm2(self): - curr_dir = '/'.join(os.path.realpath(__file__).split('/')[:-1]) - with open(curr_dir + '/testfiles/taxCalc-ivb-iaca2.S') as f: + with open(self.curr_dir + '/testfiles/taxCalc-ivb-iaca2.S') as f: osa = osaca.OSACA('IVB', f.read()) result = osa.generate_text_output() result = result[result.find('Port Binding in Cycles Per Iteration:'):] - with open(curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f: + with open(self.curr_dir + '/test_osaca_iaca_asm.out', encoding='utf-8') as f: assertion = f.read() self.assertEqual(assertion.replace(' ', ''), result.replace(' ', '')) + + #@unittest.skip("Skip until required instructions are supported.") + def test_asm_API(self): + with open(self.curr_dir + '/testfiles/3d-7pt.icc.skx.avx512.iaca_marked.s') as f: + osa = osaca.OSACA('SKX', f.read()) + + text_output = osa.create_output() + print(text_output) + # Derived from IACA (and manually considering OSACAs equal distribution to ports) + self.assertEqual(dict(osa.get_port_occupation_cycles()), + {'0': 4.0, + '0DV': 0.0, + '1': 3.5, + '2': 3.5, + '3': 3.5, + '4': 1.0, + '5': 4.5, + '6': 3.5, + '7': 0.0}) + # TODO consider frontend bottleneck -> 6.25 cy + self.assertEqual(osa.get_total_throughput(), + 4.5) diff --git a/tests/testfiles/3d-7pt.icc.skx.avx512.iaca_marked.s b/tests/testfiles/3d-7pt.icc.skx.avx512.iaca_marked.s new file mode 100644 index 0000000..aa04c4e --- /dev/null +++ b/tests/testfiles/3d-7pt.icc.skx.avx512.iaca_marked.s @@ -0,0 +1,653 @@ + .section __TEXT,__text,regular,pure_instructions + .macosx_version_min 10, 14 + .globl _main ## -- Begin function main + .p2align 4, 0x90 +_main: ## @main + .cfi_startproc +## %bb.0: + pushq %rbp + .cfi_def_cfa_offset 16 + .cfi_offset %rbp, -16 + movq %rsp, %rbp + .cfi_def_cfa_register %rbp + pushq %r15 + pushq %r14 + pushq %r13 + pushq %r12 + pushq %rbx + subq $408, %rsp ## imm = 0x198 + .cfi_offset %rbx, -56 + .cfi_offset %r12, -48 + .cfi_offset %r13, -40 + .cfi_offset %r14, -32 + .cfi_offset %r15, -24 + movq %rsi, %rbx + movq 16(%rsi), %rdi + callq _atoi + movl %eax, %r14d + movq 24(%rbx), %rdi + callq _atoi + ## kill: def $eax killed $eax def $rax + movq %r14, -96(%rbp) ## 8-byte Spill + movl %r14d, %ecx + imull %r14d, %ecx + movl %ecx, -88(%rbp) ## 4-byte Spill + movq %rax, -72(%rbp) ## 8-byte Spill + imull %eax, %ecx + movslq %ecx, %r13 + shlq $3, %r13 + leaq -56(%rbp), %rdi + movl $32, %esi + movq %r13, %rdx + callq _posix_memalign + testl %eax, %eax + je LBB0_2 +## %bb.1: + movq $0, -56(%rbp) + xorl %ebx, %ebx + jmp LBB0_3 +LBB0_2: + movq -56(%rbp), %rbx +LBB0_3: + leaq -56(%rbp), %rdi + movl $32, %esi + movq %r13, %rdx + callq _posix_memalign + testl %eax, %eax + je LBB0_5 +## %bb.4: + movq $0, -56(%rbp) + xorl %eax, %eax + jmp LBB0_6 +LBB0_5: + movq -56(%rbp), %rax +LBB0_6: + movq %rax, -80(%rbp) ## 8-byte Spill + movq -96(%rbp), %r9 ## 8-byte Reload + movabsq $4602641980904887326, %rax ## imm = 0x3FDFDE7EEC22D41E + movq %rax, -56(%rbp) + cmpl $3, -72(%rbp) ## 4-byte Folded Reload + jl LBB0_15 +## %bb.7: + movabsq $4294967296, %r12 ## imm = 0x100000000 + leal -1(%r9), %ecx + movslq %r9d, %rax + movslq -88(%rbp), %rdx ## 4-byte Folded Reload + movq %rdx, -160(%rbp) ## 8-byte Spill + movq -72(%rbp), %rsi ## 8-byte Reload + leal -1(%rsi), %edx + leaq 8(%rbx,%rax,8), %rsi + movq %rsi, -152(%rbp) ## 8-byte Spill + movq -80(%rbp), %rsi ## 8-byte Reload + leaq 8(%rsi,%rax,8), %rsi + movq %rsi, -144(%rbp) ## 8-byte Spill + leaq (,%rax,8), %rsi + movq %rsi, -104(%rbp) ## 8-byte Spill + leaq 2(%rax), %rsi + movq %rsi, -136(%rbp) ## 8-byte Spill + shlq $32, %rax + movq %rax, -184(%rbp) ## 8-byte Spill + addq $-1, %rcx + movl %r9d, %eax + movq %rax, -176(%rbp) ## 8-byte Spill + movl $1, %eax + movabsq $4601149042440805838, %rdi ## imm = 0x3FDA90AD19501DCE + movq %rdx, -208(%rbp) ## 8-byte Spill + .p2align 4, 0x90 +LBB0_8: ## =>This Loop Header: Depth=1 + ## Child Loop BB0_10 Depth 2 + ## Child Loop BB0_11 Depth 3 + cmpl $2, %r9d + jle LBB0_14 +## %bb.9: ## in Loop: Header=BB0_8 Depth=1 + movl %eax, %r14d + imull -88(%rbp), %r14d ## 4-byte Folded Reload + leaq 1(%rax), %r8 + movq -160(%rbp), %rdx ## 8-byte Reload + movq %rdx, %rsi + movq %r8, -168(%rbp) ## 8-byte Spill + imulq %r8, %rsi + movq -152(%rbp), %r10 ## 8-byte Reload + leaq (%r10,%rsi,8), %r8 + leaq -1(%rax), %rsi + imulq %rdx, %rsi + leaq (%r10,%rsi,8), %r10 + movq %rax, %rsi + imulq %rdx, %rsi + movq -144(%rbp), %rdx ## 8-byte Reload + leaq (%rdx,%rsi,8), %r11 + addl -136(%rbp), %esi ## 4-byte Folded Reload + shlq $32, %rsi + movl %r9d, %r15d + imull %eax, %r15d + leal 2(%r15), %r13d + imull %r9d, %r13d + addl $1, %r13d + addq $1, %r14 + addl $1, %r15d + imull %r9d, %r15d + movl $1, %eax + .p2align 4, 0x90 +LBB0_10: ## Parent Loop BB0_8 Depth=1 + ## => This Loop Header: Depth=2 + ## Child Loop BB0_11 Depth 3 + movq %rax, -112(%rbp) ## 8-byte Spill + leaq 1(%rax), %rax + movq %rax, -192(%rbp) ## 8-byte Spill + movq %rsi, -120(%rbp) ## 8-byte Spill + xorl %edx, %edx + .p2align 4, 0x90 +LBB0_11: ## Parent Loop BB0_8 Depth=1 + ## Parent Loop BB0_10 Depth=2 + ## => This Inner Loop Header: Depth=3 + movq %rdi, (%r11,%rdx,8) + leal (%r15,%rdx), %r9d + movslq %r9d, %rax + movq %rdi, (%rbx,%rax,8) + movq %rsi, %rax + sarq $29, %rax + movq %rdi, (%rbx,%rax) + leal (%r14,%rdx), %eax + cltq + movq %rdi, (%rbx,%rax,8) + leal (%r13,%rdx), %eax + cltq + movq %rdi, (%rbx,%rax,8) + movq %rdi, (%r10,%rdx,8) + movq %rdi, (%r8,%rdx,8) + addq $1, %rdx + addq %r12, %rsi + cmpq %rdx, %rcx + jne LBB0_11 +## %bb.12: ## in Loop: Header=BB0_10 Depth=2 + movq -104(%rbp), %rax ## 8-byte Reload + addq %rax, %r8 + addq %rax, %r10 + addq %rax, %r11 + movq -120(%rbp), %rsi ## 8-byte Reload + addq -184(%rbp), %rsi ## 8-byte Folded Reload + movq -176(%rbp), %rax ## 8-byte Reload + addq %rax, %r13 + addq %rax, %r14 + addq %rax, %r15 + cmpq %rdx, -112(%rbp) ## 8-byte Folded Reload + movq -192(%rbp), %rax ## 8-byte Reload + jne LBB0_10 +## %bb.13: ## in Loop: Header=BB0_8 Depth=1 + movq -168(%rbp), %rsi ## 8-byte Reload + movq %rsi, %rax + movq -96(%rbp), %r9 ## 8-byte Reload + movq -208(%rbp), %rdx ## 8-byte Reload + cmpq %rdx, %rsi + jne LBB0_8 + jmp LBB0_15 + .p2align 4, 0x90 +LBB0_14: ## in Loop: Header=BB0_8 Depth=1 + addq $1, %rax + movq %rax, %rsi + cmpq %rdx, %rsi + jne LBB0_8 +LBB0_15: + movq _var_false@GOTPCREL(%rip), %rax + cmpl $0, (%rax) + je LBB0_17 +## %bb.16: + movq %rbx, %rdi + callq _dummy + movq -80(%rbp), %rdi ## 8-byte Reload + callq _dummy + leaq -56(%rbp), %rdi + callq _dummy + movq -96(%rbp), %r9 ## 8-byte Reload +LBB0_17: + cmpl $3, -72(%rbp) ## 4-byte Folded Reload + jl LBB0_59 +## %bb.18: + movabsq $4294967296, %r14 ## imm = 0x100000000 + leal -1(%r9), %ecx + movslq %r9d, %rsi + movslq -88(%rbp), %rax ## 4-byte Folded Reload + movq %rax, -312(%rbp) ## 8-byte Spill + movq -72(%rbp), %rax ## 8-byte Reload + addl $-1, %eax + movq %rax, -72(%rbp) ## 8-byte Spill + leaq -1(%rcx), %rax + leaq -2(%rcx), %rdi + movq %rdi, -424(%rbp) ## 8-byte Spill + leaq 1(%rsi), %rdi + movq %rdi, -224(%rbp) ## 8-byte Spill + leaq (%rsi,%rcx), %rdi + movq %rdi, -304(%rbp) ## 8-byte Spill + movl %r9d, %edi + movq %rdi, -256(%rbp) ## 8-byte Spill + movq %rcx, -264(%rbp) ## 8-byte Spill + leaq (%rbx,%rcx,8), %rcx + addq $-8, %rcx + movq %rcx, -352(%rbp) ## 8-byte Spill + leal 6(%r9), %ecx + andl $7, %ecx + movq %rax, -448(%rbp) ## 8-byte Spill + movq %rcx, -344(%rbp) ## 8-byte Spill + subq %rcx, %rax + movq %rsi, %rcx + shlq $32, %rcx + movq %rcx, -440(%rbp) ## 8-byte Spill + leaq 1(%rax), %rcx + movq %rcx, -328(%rbp) ## 8-byte Spill + movq %rax, -336(%rbp) ## 8-byte Spill + leal 1(%rax), %eax + movl %eax, -212(%rbp) ## 4-byte Spill + leaq 2(%rsi), %rax + movq %rax, -296(%rbp) ## 8-byte Spill + movq -80(%rbp), %rax ## 8-byte Reload + leaq 8(%rax,%rsi,8), %rax + movq %rax, -288(%rbp) ## 8-byte Spill + leaq (,%rsi,8), %rax + movq %rax, -432(%rbp) ## 8-byte Spill + movq %rsi, -200(%rbp) ## 8-byte Spill + leaq (%rbx,%rsi,8), %rax + addq $8, %rax + movq %rax, -280(%rbp) ## 8-byte Spill + movl $1, %eax + .p2align 4, 0x90 +LBB0_19: ## =>This Loop Header: Depth=1 + ## Child Loop BB0_52 Depth 2 + ## Child Loop BB0_37 Depth 3 + ## Child Loop BB0_55 Depth 3 + cmpl $2, %r9d + jle LBB0_58 +## %bb.20: ## in Loop: Header=BB0_19 Depth=1 + movq %rax, %rcx + movq %rax, %r12 + movq -312(%rbp), %r15 ## 8-byte Reload + imulq %r15, %r12 + leaq 1(%rax), %rax + movl %r9d, %edi + imull %ecx, %edi + leal 1(%rdi), %r8d + imull %r9d, %r8d + addl $2, %edi + imull %r9d, %edi + movq %rax, -320(%rbp) ## 8-byte Spill + movq %rax, %r13 + imulq %r15, %r13 + movq -224(%rbp), %rdx ## 8-byte Reload + leaq (%rdx,%r13), %rax + movq %rax, -408(%rbp) ## 8-byte Spill + movq -304(%rbp), %rsi ## 8-byte Reload + leaq (%rsi,%r13), %rax + movq %rax, -400(%rbp) ## 8-byte Spill + addq $-1, %rcx + imulq %r15, %rcx + leaq (%rdx,%rcx), %rax + movq %rax, -392(%rbp) ## 8-byte Spill + leaq (%rsi,%rcx), %rax + movq %rax, -384(%rbp) ## 8-byte Spill + movq -296(%rbp), %rax ## 8-byte Reload + leal (%rax,%r12), %eax + shlq $32, %rax + movq %rax, -104(%rbp) ## 8-byte Spill + movq -280(%rbp), %rax ## 8-byte Reload + leaq (%rax,%r13,8), %r10 + leaq (%rax,%rcx,8), %r11 + movl %r12d, %edx + addq $1, %rdx + movq -200(%rbp), %rax ## 8-byte Reload + addq %rax, %r13 + movq %r13, -144(%rbp) ## 8-byte Spill + addq %rax, %rcx + movq %rcx, -152(%rbp) ## 8-byte Spill + leal 2(%r8), %eax + movq %rax, -240(%rbp) ## 8-byte Spill + leal 1(%r12), %eax + movq %rax, -416(%rbp) ## 8-byte Spill + movq %rdi, %rax + movq %rdi, -112(%rbp) ## 8-byte Spill + leal 1(%rdi), %r15d + movq -224(%rbp), %rax ## 8-byte Reload + leaq (%rax,%r12), %rcx + leaq (%rsi,%r12), %rax + movq %rax, -368(%rbp) ## 8-byte Spill + movq -288(%rbp), %rax ## 8-byte Reload + leaq (%rax,%r12,8), %rsi + leaq -8(%rax,%r12,8), %rax + movq %rax, -136(%rbp) ## 8-byte Spill + movq %r12, -120(%rbp) ## 8-byte Spill + leaq 1(%r12), %rax + movq %rax, -360(%rbp) ## 8-byte Spill + leal -1(%r8), %eax + movl %eax, -124(%rbp) ## 4-byte Spill + movq %rcx, -376(%rbp) ## 8-byte Spill + movq %rcx, -272(%rbp) ## 8-byte Spill + movq %r8, -248(%rbp) ## 8-byte Spill + movq %r8, %rdi + movq %r15, -232(%rbp) ## 8-byte Spill + movq %r15, %r8 + xorl %r12d, %r12d + movl $1, %eax + jmp LBB0_52 + .p2align 4, 0x90 +LBB0_21: ## in Loop: Header=BB0_52 Depth=2 + movl %r9d, %edx + imull %r12d, %edx + movq -248(%rbp), %rax ## 8-byte Reload + leal (%rax,%rdx), %ecx + movq -424(%rbp), %rax ## 8-byte Reload + leal (%rcx,%rax), %esi + cmpl %ecx, %esi + jl LBB0_53 +## %bb.22: ## in Loop: Header=BB0_52 Depth=2 + movq %rax, %rcx + shrq $32, %rcx + jne LBB0_53 +## %bb.23: ## in Loop: Header=BB0_52 Depth=2 + movq -240(%rbp), %rsi ## 8-byte Reload + leal (%rsi,%rdx), %esi + leal (%rsi,%rax), %edi + cmpl %esi, %edi + jl LBB0_53 +## %bb.24: ## in Loop: Header=BB0_52 Depth=2 + testq %rcx, %rcx + jne LBB0_53 +## %bb.25: ## in Loop: Header=BB0_52 Depth=2 + movq -416(%rbp), %rsi ## 8-byte Reload + leal (%rsi,%rdx), %esi + leal (%rsi,%rax), %edi + cmpl %esi, %edi + jl LBB0_53 +## %bb.26: ## in Loop: Header=BB0_52 Depth=2 + testq %rcx, %rcx + jne LBB0_53 +## %bb.27: ## in Loop: Header=BB0_52 Depth=2 + addl -232(%rbp), %edx ## 4-byte Folded Reload + leal (%rdx,%rax), %esi + cmpl %edx, %esi + jl LBB0_53 +## %bb.28: ## in Loop: Header=BB0_52 Depth=2 + testq %rcx, %rcx + jne LBB0_53 +## %bb.29: ## in Loop: Header=BB0_52 Depth=2 + movq -192(%rbp), %rdx ## 8-byte Reload + movq %rdx, %rsi + imulq -200(%rbp), %rsi ## 8-byte Folded Reload + movq -376(%rbp), %rax ## 8-byte Reload + leaq (%rax,%rsi), %rdi + movq -368(%rbp), %rax ## 8-byte Reload + leaq (%rax,%rsi), %r13 + movq -408(%rbp), %rax ## 8-byte Reload + leaq (%rax,%rsi), %r11 + movq -400(%rbp), %rax ## 8-byte Reload + leaq (%rax,%rsi), %rcx + movq -392(%rbp), %rax ## 8-byte Reload + leaq (%rax,%rsi), %r10 + addq -384(%rbp), %rsi ## 8-byte Folded Reload + ## kill: def $edx killed $edx killed $rdx def $rdx + imull -256(%rbp), %edx ## 4-byte Folded Reload + movq -232(%rbp), %rax ## 8-byte Reload + leal (%rax,%rdx), %r12d + movq -360(%rbp), %rax ## 8-byte Reload + leal (%rax,%rdx), %r9d + movq -240(%rbp), %rax ## 8-byte Reload + leal (%rax,%rdx), %eax + movl %eax, -60(%rbp) ## 4-byte Spill + addl -248(%rbp), %edx ## 4-byte Folded Reload + movq -80(%rbp), %rax ## 8-byte Reload + leaq (%rax,%rdi,8), %rdi + leaq (%rbx,%rcx,8), %rcx + cmpq %rcx, %rdi + leaq (%rax,%r13,8), %rcx + leaq (%rbx,%r11,8), %r11 + setb -45(%rbp) ## 1-byte Folded Spill + cmpq %rcx, %r11 + leaq (%rbx,%r10,8), %r10 + leaq (%rbx,%rsi,8), %r11 + movslq %r12d, %rsi + setb -44(%rbp) ## 1-byte Folded Spill + cmpq %r11, %rdi + setb %r12b + cmpq %rcx, %r10 + leaq (%rbx,%rsi,8), %r10 + movq -352(%rbp), %rax ## 8-byte Reload + leaq (%rax,%rsi,8), %rsi + movslq %r9d, %r9 + setb -43(%rbp) ## 1-byte Folded Spill + cmpq %rsi, %rdi + setb %r11b + cmpq %rcx, %r10 + leaq (%rbx,%r9,8), %r10 + leaq (%rax,%r9,8), %rsi + movslq -60(%rbp), %r9 ## 4-byte Folded Reload + setb -60(%rbp) ## 1-byte Folded Spill + cmpq %rsi, %rdi + setb %r13b + cmpq %rcx, %r10 + leaq (%rbx,%r9,8), %r10 + leaq (%rax,%r9,8), %rsi + movslq %edx, %rdx + setb -42(%rbp) ## 1-byte Folded Spill + cmpq %rsi, %rdi + setb %r9b + cmpq %rcx, %r10 + leaq (%rax,%rdx,8), %rsi + setb -41(%rbp) ## 1-byte Folded Spill + cmpq %rsi, %rdi + leaq (%rbx,%rdx,8), %rdx + setb %r10b + cmpq %rcx, %rdx + setb %dl + leaq -55(%rbp), %rax + cmpq %rdi, %rax + seta %dil + leaq -56(%rbp), %rax + cmpq %rcx, %rax + setb %al + movb -44(%rbp), %cl ## 1-byte Reload + testb %cl, -45(%rbp) ## 1-byte Folded Reload + jne LBB0_53 +## %bb.30: ## in Loop: Header=BB0_52 Depth=2 + andb -43(%rbp), %r12b ## 1-byte Folded Reload + jne LBB0_53 +## %bb.31: ## in Loop: Header=BB0_52 Depth=2 + andb -60(%rbp), %r11b ## 1-byte Folded Reload + jne LBB0_53 +## %bb.32: ## in Loop: Header=BB0_52 Depth=2 + andb -42(%rbp), %r13b ## 1-byte Folded Reload + jne LBB0_53 +## %bb.33: ## in Loop: Header=BB0_52 Depth=2 + andb -41(%rbp), %r9b ## 1-byte Folded Reload + jne LBB0_53 +## %bb.34: ## in Loop: Header=BB0_52 Depth=2 + movl $1, %r9d + andb %dl, %r10b + jne LBB0_54 +## %bb.35: ## in Loop: Header=BB0_52 Depth=2 + andb %al, %dil + jne LBB0_54 +## %bb.36: ## in Loop: Header=BB0_52 Depth=2 + vbroadcastsd -56(%rbp), %zmm0 + movq -104(%rbp), %rdx ## 8-byte Reload + xorl %esi, %esi + movq -336(%rbp), %r9 ## 8-byte Reload + movabsq $34359738368, %rdi ## imm = 0x800000000 + movq %rdi, %r10 + movq -184(%rbp), %r11 ## 8-byte Reload + movq -176(%rbp), %r15 ## 8-byte Reload + movq -168(%rbp), %r12 ## 8-byte Reload + movq -88(%rbp), %rdi ## 8-byte Reload + movq -160(%rbp), %rax ## 8-byte Reload + .p2align 4, 0x90 + movl $111, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY + .byte 100 # INSERTED BY KERNCRAFT IACA MARKER UTILITY + .byte 103 # INSERTED BY KERNCRAFT IACA MARKER UTILITY + .byte 144 # INSERTED BY KERNCRAFT IACA MARKER UTILITY +LBB0_37: ## Parent Loop BB0_19 Depth=1 + ## Parent Loop BB0_52 Depth=2 + ## => This Inner Loop Header: Depth=3 + leal (%rax,%rsi), %ecx + movslq %ecx, %rcx + vmovupd (%rbx,%rcx,8), %zmm1 + movq %rdx, %rcx + sarq $29, %rcx + vaddpd (%rbx,%rcx), %zmm1, %zmm1 + leal (%r12,%rsi), %ecx + movslq %ecx, %rcx + vaddpd (%rbx,%rcx,8), %zmm1, %zmm1 + leal (%r8,%rsi), %ecx + movslq %ecx, %rcx + vaddpd (%rbx,%rcx,8), %zmm1, %zmm1 + vaddpd (%r15,%rsi,8), %zmm1, %zmm1 + vaddpd (%r11,%rsi,8), %zmm1, %zmm1 + vmulpd %zmm0, %zmm1, %zmm1 + vmovupd %zmm1, (%rdi,%rsi,8) + addq $8, %rsi + addq %r10, %rdx + cmpq %rsi, %r9 + jne LBB0_37 + movl $222, %ebx # INSERTED BY KERNCRAFT IACA MARKER UTILITY + .byte 100 # INSERTED BY KERNCRAFT IACA MARKER UTILITY + .byte 103 # INSERTED BY KERNCRAFT IACA MARKER UTILITY + .byte 144 # INSERTED BY KERNCRAFT IACA MARKER UTILITY +## %bb.38: ## in Loop: Header=BB0_52 Depth=2 + movq -328(%rbp), %r9 ## 8-byte Reload + movl -212(%rbp), %eax ## 4-byte Reload + movl %eax, %r15d + cmpl $0, -344(%rbp) ## 4-byte Folded Reload + jne LBB0_54 + jmp LBB0_56 + .p2align 4, 0x90 +LBB0_52: ## Parent Loop BB0_19 Depth=1 + ## => This Loop Header: Depth=2 + ## Child Loop BB0_37 Depth 3 + ## Child Loop BB0_55 Depth 3 + movq %rdx, -168(%rbp) ## 8-byte Spill + addq $1, %rax + movl $1, %r15d + cmpq $8, -448(%rbp) ## 8-byte Folded Reload + movq %r10, -184(%rbp) ## 8-byte Spill + movq %r11, -176(%rbp) ## 8-byte Spill + movq %rsi, -88(%rbp) ## 8-byte Spill + movq %rdi, -160(%rbp) ## 8-byte Spill + movq %r12, -192(%rbp) ## 8-byte Spill + movq %rax, -208(%rbp) ## 8-byte Spill + jae LBB0_21 +LBB0_53: ## in Loop: Header=BB0_52 Depth=2 + movl $1, %r9d +LBB0_54: ## in Loop: Header=BB0_52 Depth=2 + movq -136(%rbp), %rax ## 8-byte Reload + leaq (%rax,%r9,8), %rdx + movq -144(%rbp), %rax ## 8-byte Reload + leaq (%r9,%rax), %rcx + leaq (%rbx,%rcx,8), %r11 + movq -152(%rbp), %rax ## 8-byte Reload + leaq (%r9,%rax), %rcx + leaq (%rbx,%rcx,8), %r10 + movq -272(%rbp), %rax ## 8-byte Reload + leal (%r9,%rax), %r12d + shlq $32, %r12 + movq -264(%rbp), %r13 ## 8-byte Reload + subq %r9, %r13 + movq -112(%rbp), %rax ## 8-byte Reload + leal (%r15,%rax), %esi + movq -120(%rbp), %rax ## 8-byte Reload + leal (%r15,%rax), %edi + addl -124(%rbp), %r15d ## 4-byte Folded Reload + xorl %ecx, %ecx + .p2align 4, 0x90 +LBB0_55: ## Parent Loop BB0_19 Depth=1 + ## Parent Loop BB0_52 Depth=2 + ## => This Inner Loop Header: Depth=3 + leal (%r15,%rcx), %eax + cltq + vmovsd (%rbx,%rax,8), %xmm0 ## xmm0 = mem[0],zero + movq %r12, %rax + sarq $29, %rax + vaddsd (%rbx,%rax), %xmm0, %xmm0 + leal (%rdi,%rcx), %eax + cltq + vaddsd (%rbx,%rax,8), %xmm0, %xmm0 + leal (%rsi,%rcx), %eax + cltq + vaddsd (%rbx,%rax,8), %xmm0, %xmm0 + vaddsd (%r10,%rcx,8), %xmm0, %xmm0 + vaddsd (%r11,%rcx,8), %xmm0, %xmm0 + vmulsd -56(%rbp), %xmm0, %xmm0 + vmovsd %xmm0, (%rdx,%rcx,8) + addq $1, %rcx + addq %r14, %r12 + cmpq %rcx, %r13 + jne LBB0_55 +LBB0_56: ## in Loop: Header=BB0_52 Depth=2 + movq -192(%rbp), %r12 ## 8-byte Reload + addq $1, %r12 + movq -104(%rbp), %rax ## 8-byte Reload + addq -440(%rbp), %rax ## 8-byte Folded Reload + movq %rax, -104(%rbp) ## 8-byte Spill + movq -432(%rbp), %rcx ## 8-byte Reload + movq -88(%rbp), %rsi ## 8-byte Reload + addq %rcx, %rsi + movq -184(%rbp), %r10 ## 8-byte Reload + addq %rcx, %r10 + movq -176(%rbp), %r11 ## 8-byte Reload + addq %rcx, %r11 + movq -256(%rbp), %rax ## 8-byte Reload + addq %rax, %r8 + movq -168(%rbp), %rdx ## 8-byte Reload + addq %rax, %rdx + movq -160(%rbp), %rdi ## 8-byte Reload + addq %rax, %rdi + addq %rcx, -136(%rbp) ## 8-byte Folded Spill + movq -200(%rbp), %rax ## 8-byte Reload + addq %rax, -144(%rbp) ## 8-byte Folded Spill + addq %rax, -152(%rbp) ## 8-byte Folded Spill + addq %rax, -272(%rbp) ## 8-byte Folded Spill + movq -96(%rbp), %r9 ## 8-byte Reload + movq -112(%rbp), %rax ## 8-byte Reload + addl %r9d, %eax + movq %rax, -112(%rbp) ## 8-byte Spill + movq -120(%rbp), %rax ## 8-byte Reload + addl %r9d, %eax + movq %rax, -120(%rbp) ## 8-byte Spill + addl %r9d, -124(%rbp) ## 4-byte Folded Spill + movq -208(%rbp), %rax ## 8-byte Reload + cmpq -264(%rbp), %rax ## 8-byte Folded Reload + jne LBB0_52 +## %bb.57: ## in Loop: Header=BB0_19 Depth=1 + movq -320(%rbp), %rcx ## 8-byte Reload + movq %rcx, %rax + cmpq -72(%rbp), %rcx ## 8-byte Folded Reload + jne LBB0_19 + jmp LBB0_59 + .p2align 4, 0x90 +LBB0_58: ## in Loop: Header=BB0_19 Depth=1 + movq %rax, %rcx + addq $1, %rcx + movq %rcx, %rax + cmpq -72(%rbp), %rcx ## 8-byte Folded Reload + jne LBB0_19 +LBB0_59: + movq _var_false@GOTPCREL(%rip), %rax + cmpl $0, (%rax) + je LBB0_61 +## %bb.60: + movq %rbx, %rdi + vzeroupper + callq _dummy + movq -80(%rbp), %rdi ## 8-byte Reload + callq _dummy + leaq -56(%rbp), %rdi + callq _dummy +LBB0_61: + xorl %eax, %eax + addq $408, %rsp ## imm = 0x198 + popq %rbx + popq %r12 + popq %r13 + popq %r14 + popq %r15 + popq %rbp + vzeroupper + retq + .cfi_endproc + ## -- End function + +.subsections_via_symbols