From d2a4749c3966263260908eabf76b13d6d66497be Mon Sep 17 00:00:00 2001 From: JanLJL Date: Wed, 26 Jan 2022 14:24:48 +0100 Subject: [PATCH] added lane comparison for AArch64 reg operands --- osaca/semantics/hw_model.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/osaca/semantics/hw_model.py b/osaca/semantics/hw_model.py index c4c9d90..fc80a84 100755 --- a/osaca/semantics/hw_model.py +++ b/osaca/semantics/hw_model.py @@ -639,6 +639,12 @@ class MachineModel(object): ): return True return False + if "lanes" in reg: + if "lanes" in i_reg and ( + reg["lanes"] == i_reg["lanes"] or self.WILDCARD in (reg["lanes"] + i_reg["lanes"]) + ): + return True + return False return True def _is_x86_reg_type(self, i_reg, reg, consider_masking=False):