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changed DBs to new port_pressure structure

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This commit is contained in:
JanLJL
2019-10-16 10:06:47 +02:00
parent cb7cec20a8
commit d92523e133
15 changed files with 2497 additions and 2608 deletions
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94
tests/test_db_interface.py
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@@ -3,12 +3,9 @@
Unit tests for DB interface
"""
import copy
import os
import sys
import unittest
from osaca.db_interface import add_entries_to_db, add_entry_to_db, sanity_check
from osaca.db_interface import sanity_check
from osaca.semantics import MachineModel
@@ -26,90 +23,57 @@ class TestDBInterface(unittest.TestCase):
'uops': 6,
}
self.entry_csx = sample_entry.copy()
self.entry_vulcan = sample_entry.copy()
self.entry_tx2 = sample_entry.copy()
self.entry_zen1 = sample_entry.copy()
self.entry_csx['port_pressure'] = [1.25, 0, 1.25, 0.5, 0.5, 0.5, 0.5, 0, 1.25, 1.25, 0]
self.entry_vulcan['port_pressure'] = [2.5, 2.5, 0, 0, 0.5, 0.5]
del self.entry_vulcan['operands'][1]['name']
self.entry_vulcan['operands'][1]['prefix'] = 'x'
self.entry_zen1['port_pressure'] = [1, 1, 1, 1, 0, 1, 0, 0, 0, 0.5, 1, 0.5, 1]
@classmethod
def tearDownClass(self):
if sys.exc_info() == (None, None, None):
# Test successful, remove DB entries
test_archs = {'csx': 54, 'vulcan': 57, 'zen1': 58}
for arch in test_archs:
lines = []
with open(os.path.expanduser('~/.osaca/data/' + arch + '.yml'), 'r') as f:
lines = f.readlines()
with open(os.path.expanduser('~/.osaca/data/' + arch + '.yml'), 'w') as f:
f.writelines([line for line in lines[:-1 * test_archs[arch]]])
# self.entry_csx['port_pressure'] = [1.25, 0, 1.25, 0.5, 0.5, 0.5, 0.5, 0, 1.25, 1.25, 0]
self.entry_csx['port_pressure'] = [[5, '0156'], [1, '23'], [1, ['2D', '3D']]]
# self.entry_tx2['port_pressure'] = [2.5, 2.5, 0, 0, 0.5, 0.5]
self.entry_tx2['port_pressure'] = [[5, '01'], [1, '45']]
del self.entry_tx2['operands'][1]['name']
self.entry_tx2['operands'][1]['prefix'] = 'x'
# self.entry_zen1['port_pressure'] = [1, 1, 1, 1, 0, 1, 0, 0, 0, 0.5, 1, 0.5, 1]
self.entry_zen1['port_pressure'] = [[4, '0123'], [1, '4'], [1, '89'], [2, ['8D', '9D']]]
###########
# Tests
###########
def test_add_single_entry(self):
num_entries_csx = len(MachineModel('csx')['instruction_forms'])
num_entries_vulcan = len(MachineModel('vulcan')['instruction_forms'])
num_entries_zen1 = len(MachineModel('zen1')['instruction_forms'])
mm_csx = MachineModel('csx')
mm_tx2 = MachineModel('tx2')
mm_zen1 = MachineModel('zen1')
num_entries_csx = len(mm_csx['instruction_forms'])
num_entries_tx2 = len(mm_tx2['instruction_forms'])
num_entries_zen1 = len(mm_zen1['instruction_forms'])
add_entry_to_db('csx', self.entry_csx)
add_entry_to_db('vulcan', self.entry_vulcan)
add_entry_to_db('zen1', {'name': 'empty_operation'})
mm_csx.set_instruction_entry(self.entry_csx)
mm_tx2.set_instruction_entry(self.entry_tx2)
mm_zen1.set_instruction_entry({'name': 'empty_operation'})
num_entries_csx = len(MachineModel('csx')['instruction_forms']) - num_entries_csx
num_entries_vulcan = len(MachineModel('vulcan')['instruction_forms']) - num_entries_vulcan
num_entries_zen1 = len(MachineModel('zen1')['instruction_forms']) - num_entries_zen1
num_entries_csx = len(mm_csx['instruction_forms']) - num_entries_csx
num_entries_tx2 = len(mm_tx2['instruction_forms']) - num_entries_tx2
num_entries_zen1 = len(mm_zen1['instruction_forms']) - num_entries_zen1
self.assertEqual(num_entries_csx, 1)
self.assertEqual(num_entries_vulcan, 1)
self.assertEqual(num_entries_tx2, 1)
self.assertEqual(num_entries_zen1, 1)
def test_invalid_add(self):
entry = {}
with self.assertRaises(ValueError):
add_entry_to_db('csx', entry)
add_entries_to_db('csx', [entry])
def test_add_multiple_entries(self):
num_entries_csx = len(MachineModel('csx')['instruction_forms'])
num_entries_vulcan = len(MachineModel('vulcan')['instruction_forms'])
num_entries_zen1 = len(MachineModel('zen1')['instruction_forms'])
entries_csx, entries_vulcan, entries_zen1 = [], [], []
for i in range(2):
self.entry_csx['name'] += '-'
self.entry_vulcan['name'] += '-'
self.entry_zen1['name'] += '-'
entries_csx.append(copy.deepcopy(self.entry_csx))
entries_vulcan.append(copy.deepcopy(self.entry_vulcan))
entries_zen1.append(copy.deepcopy(self.entry_zen1))
entries_csx[1] = {'name': entries_csx[1]['name']}
add_entries_to_db('csx', entries_csx)
add_entries_to_db('vulcan', entries_vulcan)
add_entries_to_db('zen1', entries_zen1)
num_entries_csx = len(MachineModel('csx')['instruction_forms']) - num_entries_csx
num_entries_vulcan = len(MachineModel('vulcan')['instruction_forms']) - num_entries_vulcan
num_entries_zen1 = len(MachineModel('zen1')['instruction_forms']) - num_entries_zen1
self.assertEqual(num_entries_csx, 2)
self.assertEqual(num_entries_vulcan, 2)
self.assertEqual(num_entries_zen1, 2)
with self.assertRaises(KeyError):
MachineModel('csx').set_instruction_entry(entry)
with self.assertRaises(TypeError):
MachineModel('csx').set_instruction()
def test_sanity_check(self):
# non-verbose
sanity_check('csx', verbose=False)
sanity_check('vulcan', verbose=False)
sanity_check('tx2', verbose=False)
sanity_check('zen1', verbose=False)
# verbose
sanity_check('csx', verbose=True)
sanity_check('vulcan', verbose=True)
sanity_check('tx2', verbose=True)
sanity_check('zen1', verbose=True)
##################

1113
tests/test_files/hidden_load_machine_model.yml
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4
tests/test_frontend.py
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@@ -35,7 +35,7 @@ class TestFrontend(unittest.TestCase):
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'csx.yml')
)
self.machine_model_tx2 = MachineModel(
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'vulcan.yml')
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'tx2.yml')
)
self.semantics_csx = SemanticsAppender(
self.machine_model_csx, path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/x86.yml')
@@ -74,7 +74,7 @@ class TestFrontend(unittest.TestCase):
def test_frontend_AArch64(self):
dg = KernelDG(self.kernel_AArch64, self.parser_AArch64, self.machine_model_tx2)
fe = Frontend(path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'vulcan.yml'))
fe = Frontend(path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'tx2.yml'))
fe.print_full_analysis(self.kernel_AArch64, dg, verbose=True)
##################

2
tests/test_kerncraftAPI.py
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@@ -52,7 +52,7 @@ class TestKerncraftAPI(unittest.TestCase):
self.assertEqual(kapi.get_latency(), (1.0, 13.0))
def test_kerncraft_API_AArch64(self):
kapi = KerncraftAPI('vulcan', self.code_AArch64)
kapi = KerncraftAPI('tx2', self.code_AArch64)
kapi.create_output()
self.assertEqual(kapi.get_unmatched_instruction_ratio(), 0.0)

16
tests/test_semantics.py
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@@ -41,7 +41,7 @@ class TestSemanticTools(unittest.TestCase):
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'csx.yml')
)
self.machine_model_tx2 = MachineModel(
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'vulcan.yml')
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'tx2.yml')
)
self.semantics_csx = SemanticsAppender(
self.machine_model_csx, path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/x86.yml')
@@ -204,7 +204,8 @@ class TestSemanticTools(unittest.TestCase):
)
self.assertEqual(len(lc_deps[lcd_id2]['dependencies']), 1)
self.assertEqual(
lc_deps[lcd_id2]['dependencies'][0], dg.dg.nodes(data=True)[lcd_id2]['instruction_form']
lc_deps[lcd_id2]['dependencies'][0],
dg.dg.nodes(data=True)[lcd_id2]['instruction_form'],
)
def test_is_read_is_written_x86(self):
@@ -323,11 +324,11 @@ class TestSemanticTools(unittest.TestCase):
self.assertIsNone(self.machine_model_csx.get_instruction('GETRESULT', sample_operands))
self.assertIsNone(self.machine_model_tx2.get_instruction('GETRESULT', sample_operands))
self.assertEqual(self.machine_model_csx.get_arch(), 'CSX')
self.assertEqual(self.machine_model_tx2.get_arch(), 'Vulcan')
self.assertEqual(self.machine_model_csx.get_arch(), 'csx')
self.assertEqual(self.machine_model_tx2.get_arch(), 'tx2')
self.assertEqual(self.machine_model_csx.get_ISA(), 'x86')
self.assertEqual(self.machine_model_tx2.get_ISA(), 'AArch64')
self.assertEqual(self.machine_model_tx2.get_ISA(), 'aarch64')
ports_csx = ['0', '0DV', '1', '2', '2D', '3', '3D', '4', '5', '6', '7']
data_ports_csx = ['2D', '3D']
@@ -337,8 +338,9 @@ class TestSemanticTools(unittest.TestCase):
self.assertFalse(self.machine_model_tx2.has_hidden_loads())
self.assertEqual(MachineModel.get_isa_for_arch('CSX'), 'x86')
self.assertEqual(MachineModel.get_isa_for_arch('VuLcAn'), 'aarch64')
self.assertIsNone(MachineModel.get_isa_for_arch('THE_MACHINE'))
self.assertEqual(MachineModel.get_isa_for_arch('tX2'), 'aarch64')
with self.assertRaises(ValueError):
self.assertIsNone(MachineModel.get_isa_for_arch('THE_MACHINE'))
##################
# Helper functions