mirror of
https://github.com/RRZE-HPC/OSACA.git
synced 2026-01-04 18:20:09 +01:00
Changing operand matching for class operand style
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@@ -125,7 +125,7 @@ class TestSemanticTools(unittest.TestCase):
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ArchSemantics(tmp_mm)
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except ValueError:
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self.fail()
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"""
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def test_machine_model_various_functions(self):
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# check dummy MachineModel creation
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try:
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@@ -173,7 +173,7 @@ class TestSemanticTools(unittest.TestCase):
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test_mm_arm.get_instruction("b.someNameThatDoesNotExist", [{"class": "identifier"}]),
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test_mm_arm.get_instruction("b.someOtherName", [{"class": "identifier"}]),
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)
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# test full instruction name
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self.assertEqual(
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MachineModel.get_full_instruction_name(instr_form_x86_1),
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@@ -185,14 +185,12 @@ class TestSemanticTools(unittest.TestCase):
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"fadd register(prefix:v,shape:s),register(prefix:v,shape:s),"
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+ "register(prefix:v,shape:s)",
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)
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"""
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"""
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# test get_store_tp
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self.assertEqual(
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test_mm_x86.get_store_throughput(
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MemoryOperand(BASE_ID=RegisterOperand(NAME_ID="x"), OFFSET_ID=None,INDEX_ID=None,SCALE_ID="1")
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)[0]["port_pressure"],
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)[0].port_pressure,
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[[2, "237"], [2, "4"]],
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)
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@@ -248,7 +246,7 @@ class TestSemanticTools(unittest.TestCase):
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with open("/dev/null", "w") as dev_null:
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test_mm_x86.dump(stream=dev_null)
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test_mm_arm.dump(stream=dev_null)
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"""
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def test_src_dst_assignment_x86(self):
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for instruction_form in self.kernel_x86:
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@@ -286,7 +284,6 @@ class TestSemanticTools(unittest.TestCase):
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self.assertIsInstance(instruction_form.port_pressure, list)
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self.assertEqual(len(instruction_form.port_pressure), port_num)
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"""
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def test_optimal_throughput_assignment(self):
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# x86
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kernel_fixed = deepcopy(self.kernel_x86)
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@@ -396,7 +393,7 @@ class TestSemanticTools(unittest.TestCase):
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dg.get_dependent_instruction_forms()
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# test dot creation
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dg.export_graph(filepath="/dev/null")
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"""
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def test_kernelDG_SVE(self):
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KernelDG(
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@@ -438,7 +435,7 @@ class TestSemanticTools(unittest.TestCase):
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with self.assertRaises(NotImplementedError):
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dg.get_loopcarried_dependencies()
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"""
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def test_loop_carried_dependency_aarch64(self):
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dg = KernelDG(
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self.kernel_aarch64_memdep,
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@@ -540,7 +537,7 @@ class TestSemanticTools(unittest.TestCase):
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self.assertTrue(time_10 > 10)
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self.assertTrue(2 < time_2)
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self.assertTrue(time_2 < (time_10 - 7))
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"""
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def test_is_read_is_written_x86(self):
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# independent form HW model
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