refactoring from AArch64 to aarch64

This commit is contained in:
JanLJL
2019-08-13 18:26:48 +02:00
parent 866397d6ae
commit e468db4a0d
6 changed files with 11 additions and 10 deletions

View File

@@ -76,9 +76,9 @@ def sanity_check(arch: str, verbose=False):
def _check_sanity_arch_db(arch_mm, isa_mm):
suspicious_prefixes_x86 = ['vfm', 'fm']
suspicious_prefixes_arm = ['fml', 'ldp', 'stp', 'str']
if arch_mm.get_ISA() == 'AArch64':
if arch_mm.get_ISA().lower() == 'aarch64':
suspicious_prefixes = suspicious_prefixes_arm
if arch_mm.get_ISA() == 'x86':
if arch_mm.get_ISA().lower() == 'x86':
suspicious_prefixes = suspicious_prefixes_x86
port_num = len(arch_mm['ports'])

View File

@@ -12,8 +12,8 @@ class KerncraftAPI(object):
def __init__(self, arch):
self.machine_model = MachineModel(arch=arch)
self.semantics = SemanticsAppender(self.machine_model)
isa = self.machine_model.get_ISA()
if isa == 'AArch64':
isa = self.machine_model.get_ISA().lower()
if isa == 'aarch64':
self.parser = ParserAArch64v81()
elif isa == 'x86':
self.parser = ParserX86ATT()

View File

@@ -4,9 +4,10 @@ from osaca.parser import ParserAArch64v81, ParserX86ATT
def reduce_to_section(kernel, isa):
isa = isa.lower()
if isa == 'x86':
start, end = find_marked_kernel_x86ATT(kernel)
elif isa == 'AArch64':
elif isa == 'aarch64':
start, end = find_marked_kernel_AArch64(kernel)
else:
raise ValueError('ISA not supported.')

View File

@@ -23,7 +23,7 @@ class INSTR_FLAGS:
class SemanticsAppender(object):
def __init__(self, machine_model: MachineModel, path_to_yaml=None):
self._machine_model = machine_model
self._isa = machine_model.get_ISA()
self._isa = machine_model.get_ISA().lower()
if path_to_yaml:
path = path_to_yaml
else:
@@ -129,13 +129,13 @@ class SemanticsAppender(object):
def _get_regular_source_operands(self, instruction_form):
if self._isa == 'x86':
return self._get_regular_source_x86ATT(instruction_form)
if self._isa == 'AArch64':
if self._isa == 'aarch64':
return self._get_regular_source_AArch64(instruction_form)
def _get_regular_destination_operands(self, instruction_form):
if self._isa == 'x86':
return self._get_regular_destination_x86ATT(instruction_form)
if self._isa == 'AArch64':
if self._isa == 'aarch64':
return self._get_regular_destination_AArch64(instruction_form)
def _get_regular_source_x86ATT(self, instruction_form):

View File

@@ -41,7 +41,7 @@ class TestFrontend(unittest.TestCase):
)
self.semantics_tx2 = SemanticsAppender(
self.machine_model_tx2,
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/AArch64.yml'),
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/aarch64.yml'),
)
for i in range(len(self.kernel_x86)):
self.semantics_csx.assign_src_dst(self.kernel_x86[i])

View File

@@ -48,7 +48,7 @@ class TestSemanticTools(unittest.TestCase):
)
self.semantics_tx2 = SemanticsAppender(
self.machine_model_tx2,
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/AArch64.yml'),
path_to_yaml=os.path.join(self.MODULE_DATA_DIR, 'isa/aarch64.yml'),
)
for i in range(len(self.kernel_x86)):
self.semantics_csx.assign_src_dst(self.kernel_x86[i])