diff --git a/osaca/data/isa/aarch64.yml b/osaca/data/isa/aarch64.yml
index 2957a28..44fb2f8 100644
--- a/osaca/data/isa/aarch64.yml
+++ b/osaca/data/isa/aarch64.yml
@@ -37,48 +37,10 @@ instruction_forms:
           offset: "*"
           index: "*"
           scale: "*"
-          pre-indexed: false
-          post-indexed: false
+          pre-indexed: "*"
+          post-indexed: "*"
           source: true
           destination: false
-    - name: ldp
-      operands:
-        - class: "register"
-          prefix: "*"
-          source: false
-          destination: true
-        - class: "register"
-          prefix: "*"
-          source: false
-          destination: true
-        - class: "memory"
-          base: "*"
-          offset: "*"
-          index: "*"
-          scale: "*"
-          pre-indexed: false
-          post-indexed: true
-          source: true
-          destination: true
-    - name: ldp
-      operands:
-        - class: "register"
-          prefix: "*"
-          source: false
-          destination: true
-        - class: "register"
-          prefix: "*"
-          source: false
-          destination: true
-        - class: "memory"
-          base: "*"
-          offset: "*"
-          index: "*"
-          scale: "*"
-          pre-indexed: true
-          post-indexed: false
-          source: true
-          destination: true
     - name: [ldr, ldur]
       operands:
         - class: "register"
@@ -90,25 +52,10 @@ instruction_forms:
           offset: "*"
           index: "*"
           scale: "*"
-          pre-indexed: false
-          post-indexed: true
+          pre-indexed: "*"
+          post-indexed: "*"
           source: true
-          destination: true
-    - name: [ldr, ldur]
-      operands:
-        - class: "register"
-          prefix: "*"
-          source: false
-          destination: true
-        - class: "memory"
-          base: "*"
-          offset: "*"
-          index: "*"
-          scale: "*"
-          pre-indexed: true
-          post-indexed: false
-          source: true
-          destination: true
+          destination: false
     - name: stp
       operands:
         - class: "register"
@@ -124,46 +71,8 @@ instruction_forms:
           offset: "*"
           index: "*"
           scale: "*"
-          pre-indexed: false
-          post-indexed: false
-          source: false
-          destination: true   
-    - name: stp
-      operands:
-        - class: "register"
-          prefix: "*"
-          source: true
-          destination: false
-        - class: "register"
-          prefix: "*"
-          source: true
-          destination: false
-        - class: "memory"
-          base: "*"
-          offset: "*"
-          index: "*"
-          scale: "*"
-          pre-indexed: true
-          post-indexed: false
-          source: false
-          destination: true
-    - name: stp
-      operands:
-        - class: "register"
-          prefix: "*"
-          source: true
-          destination: false
-        - class: "register"
-          prefix: "*"
-          source: true
-          destination: false
-        - class: "memory"
-          base: "*"
-          offset: "*"
-          index: "*"
-          scale: "*"
-          pre-indexed: false
-          post-indexed: true
+          pre-indexed: "*"
+          post-indexed: "*"
           source: false
           destination: true
     - name: [str, stur]
diff --git a/osaca/semantics/isa_semantics.py b/osaca/semantics/isa_semantics.py
index dea3873..64ff02c 100755
--- a/osaca/semantics/isa_semantics.py
+++ b/osaca/semantics/isa_semantics.py
@@ -103,14 +103,14 @@ class ISASemantics(object):
                 if ('post_indexed' in operand['memory'] and operand['memory']['post_indexed']) or (
                     'pre_indexed' in operand['memory'] and operand['memory']['pre_indexed']
                 ):
-                    op_dict['source'].remove(operand)
-                    op_dict['src_dst'].append(operand)
+                    op_dict['src_dst'].append(AttrDict.convert_dict(
+                        {'register': operand['memory']['base']}))
             for operand in [op for op in op_dict['destination'] if 'memory' in op]:
                 if ('post_indexed' in operand['memory'] and operand['memory']['post_indexed']) or (
                     'pre_indexed' in operand['memory'] and operand['memory']['pre_indexed']
                 ):
-                    op_dict['destination'].remove(operand)
-                    op_dict['src_dst'].append(operand)
+                    op_dict['src_dst'].append(AttrDict.convert_dict(
+                        {'register': operand['memory']['base']}))
         # store operand list in dict and reassign operand key/value pair
         instruction_form['semantic_operands'] = AttrDict.convert_dict(op_dict)
         # assign LD/ST flags