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added branch instructions and data for ADD

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JanLJL
2021-11-29 18:48:13 +01:00
parent ea0576e8ce
commit f7579e83a9
1 changed files with 12 additions and 6 deletions
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18
osaca/data/tsv110.yml
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@@ -23,6 +23,12 @@ port_model_scheme: |
+---------+ | BRU | | BRU | +-------------+ | ASIMD | | ASIMD | +-------+ +-------+ +---------+ | BRU | | BRU | +-------------+ | ASIMD | | ASIMD | +-------+ +-------+
+---------+ +---------+ +-------+ +-------+ +---------+ +---------+ +-------+ +-------+
instruction_forms: instruction_forms:
- name: [b, bl, bcc, bcs, bgt, bhi, b.lo, b.ne, b.any, b.none, b.lt, b.eq, b.hs, b.gt, b.hi, bne, beq]
operands:
- class: identifier
throughput: 0.5
latency: 0.0
port_pressure: [[1, '12']]
- name: add - name: add
operands: operands:
- class: register - class: register
@@ -116,10 +122,10 @@ instruction_forms:
prefix: x prefix: x
- class: immediate - class: immediate
imd: int imd: int
latency: ~ latency: 1
port_pressure: ~ port_pressure: [[1, '012']]
throughput: 0.33333 throughput: 0.33333
uops: ~ uops: 1
- name: fsub - name: fsub
operands: operands:
- class: register - class: register
@@ -425,10 +431,10 @@ instruction_forms:
prefix: x prefix: x
- class: register - class: register
prefix: x prefix: x
latency: ~ latency: 1
port_pressure: ~ port_pressure: [[1, '012']]
throughput: 0.33333 throughput: 0.33333
uops: ~ uops: 1
- name: mov - name: mov
operands: operands:
- class: register - class: register