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Update README.rst
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244
README.rst
244
README.rst
@@ -52,8 +52,7 @@ Dependencies:
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Additional requirements are:
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- `Python3 <https://www.python.org/>`_
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- `pandas <http://pandas.pydata.org/>`_
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- `NumPy <http://www.numpy.org/>`_
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- `Graphviz <https://www.graphviz.org/>` for dependency graph creation (minimal dependency is `libgraphviz-dev` on Ubuntu)
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- `Kerncraft <https://github.com/RRZE-HPC/kerncraft>`_ for marker insertion
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- `ibench <https://github.com/hofm/ibench>`_ for throughput/latency measurements
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@@ -72,71 +71,79 @@ The usage of OSACA can be listed as:
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.. code:: bash
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osaca [-h] [-V] [--arch ARCH] [--tp-list] [-i | --iaca | -m] FILEPATH
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osaca [-h] [-V] [--arch ARCH] [--export-graph GRAPHNAME] FILEPATH
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- ``-h`` or ``--help`` prints out the help message.
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- ``-V`` or ``--version`` shows the program’s version number.
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- ``ARCH`` needs to be replaced with the wished architecture abbreviation. This flag is necessary for the throughput analysis (default function) and the inclusion of an ibench output (``-i``). Possible options are ``SNB``, ``IVB``, ``HSW``, ``BDW`` and ``SKL`` for the latest Intel micro architectures starting from Intel Sandy Bridge and ``ZEN`` for AMD Zen (17h family) architecture .
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- While in the throughput analysis mode, one can add ``--tp-list`` for printing the additional throughput list of the kernel or ``--iaca`` for letting OSACA to know it has to search for IACA binary markers.
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- ``-i`` or ``--include-ibench`` starts the integration of ibench output into the CSV data file determined by ``ARCH``.
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- With the flag ``-m`` or ``--insert-marker`` OSACA calls the Kerncraft module for the interactively insertion of `IACA <https://software.intel.com/en-us/articles/intel-architecture-code-analyzer>`_ marker in suggested assembly blocks.
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- ``FILEPATH`` describes the filepath to the file to work with and is always necessary
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-h, --help
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prints out the help message.
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-V, --version
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shows the program’s version number.
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--arch ARCH
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needs to be replaced with the wished architecture abbreviation.
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This flag is necessary for the throughput analysis (default function) and the inclusion of an ibench output (``-i``).
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Possible options are ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKX`` and ``CSX`` for the latest Intel micro architectures starting from Intel Sandy Bridge and ``ZEN1`` for AMD Zen (17h family) architecture.
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Furthermore, `VULCAN` for Marvell`s ARM-based ThunderX2 architecture is available.
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--insert-marker
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OSACA calls the Kerncraft module for the interactively insertion of `IACA <https://software.intel.com/en-us/articles/intel-architecture-code-analyzer>`_ marker in suggested assembly blocks.
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--db-check
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Run a sanity check on the by "--arch" specified database.
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The output depends on the verbosity level.
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Keep in mind you have to provide a (dummy) filename in anyway.
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--export-graph EXPORT_PATH
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Output path for .dot file export. If "." is given, the file will be stored as "./osaca_dg.dot".
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After the file was created, you can convert it to a PDF file using dot: `dot -Tpdf osaca_dg.dot -o osaca_dependency_graph.pdf`
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FILEPATH
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describes the filepath to the file to work with and is always necessary
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______________________
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Hereinafter OSACA's scope of function will be described.
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Throughput analysis
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Throughput & Latency analysis
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~~~~~~~~~~~~~~~~~~~
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As main functionality of OSACA this process starts by default. It is always necessary to specify the core architecture by the flag ``--arch ARCH``, where ``ARCH`` can stand for ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKL`` or ``ZEN``.
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As main functionality of OSACA this process starts by default. It is always necessary to specify the core architecture by the flag ``--arch ARCH``, where ``ARCH`` can stand for ``SNB``, ``IVB``, ``HSW``, ``BDW``, ``SKX``, ``CSX``, ``ZEN`` or ``VULCAN``.
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For extracting the right kernel, one has to mark it beforehand. For this there are two different approaches:
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| **High level code**
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The OSACA marker is ``//STARTLOOP`` and must be put in one line in front of the loop head, and the loop code must be indented consistently. This means the marker and the head must have the same indentation level while the whole loop body needs to be more indented than the code before and after. For instance, this is a valid OSACA marker:
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.. code-block:: c
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int i = 0;
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//STARTLOOP
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while(i < N){
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// do something...
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i++;
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}
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For extracting the right kernel, one has to mark it beforehand.
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Currently, only markers in the assembly code are supported by OSACA.
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| **Assembly code**
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Another way for marking a kernel is to insert the IACA byte markers in the assembly file in before and after the loop.
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Marking a kernel means to insert the byte markers in the assembly file in before and after the loop.
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For this, the start marker has to be inserted right in front of the loop label and the end marker directly after the jump instruction.
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Start and end marker can be seen in the example below:
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For the convience of the user, in x86 assembly IACA byte markers are used.
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**x86 Byte Markers**
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.. code-block:: gas
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movl $111,%ebx ;IACA START MARKER
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.byte 100,103,144 ;IACA START MARKER
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; LABEL
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; do something
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; ...
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; conditional jump to LABEL
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movl $222,%ebx ;IACA END MARKER
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.byte 100,103,144 ;IACA END MARKER
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movl $111,%ebx #IACA/OSACA START MARKER
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.byte 100,103,144 #IACA/OSACA START MARKER
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Loop:
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# ...
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movl $222,%ebx #IACA/OSACA END MARKER
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.byte 100,103,144 #IACA/OSACA END MARKER
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The optional flag ``--iaca`` defines if OSACA needs to search for the IACA byte markers or the OSACA marker in the chosen file.
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**AArch64 Byte Markers**
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With an additional, optional ``--tp-list``, OSACA adds a simple list of all kernel instruction forms together with their reciprocal throughput to the output. This is helpful in case of no further information about the port binding of the single instruction forms.
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.. code-block:: asm
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Include new measurements into the data file
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Running OSACA with the flag ``-i`` or ``--include-ibench`` and a specified micro architecture ``ARCH``, it
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takes the values given in an ibench output file and checks them for reasonability. If a value is not in the data file already, it will be added, otherwise OSACA prints out a warning message and keeps the old value in the data file. If a value does not pass the validation, a warning message is shown, however, OSACA will keep working with the new value.
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The handling of ibench is shortly described in the example section below.
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mov x1, #111 // OSACA START
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.byte 213,3,32,31 // OSACA START
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...
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mov x1, #222 // OSACA END
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.byte 213,3,32,31 // OSACA END
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.. Include new measurements into the data file
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.. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. Running OSACA with the flag ``-i`` or ``--include-ibench`` and a specified micro architecture ``ARCH``, it takes the values given in an ibench output file and checks them for reasonability. If a value is not in the data file already, it will be added, otherwise OSACA prints out a warning message and keeps the old value in the data file. If a value does not pass the validation, a warning message is shown, however, OSACA will keep working with the new value. The handling of ibench is shortly described in the example section below.
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Insert IACA markers
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~~~~~~~~~~~~~~~~~~~
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Using the ``-m`` or ``--insert-marker`` flags for a given file, OSACA calls the implemented Kerncraft module for identifying and marking the inner-loop block in *manual mode*. More information about how this is done can be found in the `Kerncraft repository <https://github.com/RRZE-HPC/kerncraft>`_.
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Using the ``--insert-marker`` flags for a given file, OSACA calls the implemented Kerncraft module for identifying and marking the inner-loop block in *manual mode*. More information about how this is done can be found in the `Kerncraft repository <https://github.com/RRZE-HPC/kerncraft>`_.
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Note that this currrently only works for x86 loop kernels
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Example
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=======
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For clarifying the functionality of OSACA a sample kernel is analyzed for an Intel IVB core hereafter:
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For clarifying the functionality of OSACA a sample kernel is analyzed for an Intel CSX core hereafter:
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.. code-block:: c
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@@ -147,136 +154,87 @@ For clarifying the functionality of OSACA a sample kernel is analyzed for an Int
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for(int i = 0; i < N; ++i)
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a[i] = s * b[i];
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The code shows a simple scalar multiplication of a vector ``b`` and a floating-point number ``s``. The result is
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written in vector ``a``.
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After including the OSACA marker ``//STARTLOOP`` and compiling the source, one can
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start the analysis typing
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The code shows a simple scalar multiplication of a vector ``b`` and a floating-point number ``s``.
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The result is written in vector ``a``.
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After including the OSACA byte marker into the assembly, one can start the analysis typing
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.. code:: bash
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osaca --arch IVB PATH/TO/FILE
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osaca --arch CSX PATH/TO/FILE
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in the command line. Optionally, one can create the assembly code out of the file, identify and mark the kernel of interest and run OSACA with the additional ``--iaca`` flag.
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in the command line.
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The output is:
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.. code-block::
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Open Source Architecture Code Analyzer (OSACA) - v0.3
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Analyzed file: scale.s.csx.O3.s
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Architecture: csx
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Timestamp: 2019-10-03 23:36:21
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P - Throughput of LOAD operation can be hidden behind a past or future STORE instruction
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* - Instruction micro-ops not bound to a port
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X - No throughput/latency information for this instruction in data file
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Throughput Analysis Report
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--------------------------
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X - No information for this instruction in database
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* - Instruction micro-ops not bound to a port
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Port Binding in Cycles Per Iteration:
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-------------------------------------------------
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| Port | 0 | 1 | 2 | 3 | 4 | 5 |
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-------------------------------------------------
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| Cycles | 2.33 | 1.33 | 5.0 | 5.0 | 2.0 | 1.33 |
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-------------------------------------------------
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Ports Pressure in cycles
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| 0 | 1 | 2 | 3 | 4 | 5 |
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-------------------------------------------
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| | | 0.50 | 0.50 | 1.00 | | movl $0x0,-0x24(%rbp)
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| | | | | | | jmp 10b <scale+0x10b>
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| | | 0.50 | 0.50 | | | mov -0x48(%rbp),%rax
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| | | 0.50 | 0.50 | | | mov -0x24(%rbp),%edx
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| 0.33 | 0.33 | | | | 0.33 | movslq %edx,%rdx
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| | | 0.50 | 0.50 | | | vmovsd (%rax,%rdx,8),%xmm0
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| 1.00 | | 0.50 | 0.50 | | | vmulsd -0x50(%rbp),%xmm0,%xmm0
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| | | 0.50 | 0.50 | | | mov -0x38(%rbp),%rax
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| | | 0.50 | 0.50 | | | mov -0x24(%rbp),%edx
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| 0.33 | 0.33 | | | | 0.33 | movslq %edx,%rdx
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| | | 0.50 | 0.50 | 1.00 | | vmovsd %xmm0,(%rax,%rdx,8)
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| | | | | | | X addl $0x1,-0x24(%rbp)
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| | | 0.50 | 0.50 | | | mov -0x24(%rbp),%eax
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| 0.33 | 0.33 | 0.50 | 0.50 | | 0.33 | cmp -0x54(%rbp),%eax
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| | | | | | | jl e4 <scale+0xe4>
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| 0.33 | 0.33 | | | | 0.33 | mov %rcx,%rsp
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Total number of estimated throughput: 5.0
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Port pressure in cycles
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| 0 - 0DV | 1 | 2 - 2D | 3 - 3D | 4 | 5 | 6 | 7 |
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-----------------------------------------------------------------------------------
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170 | | | | | | | | | .L22:
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171 | 0.50 | 0.50 | 0.50 0.50 | 0.50 0.50 | | | | | vmulpd (%r12,%rax), %ymm1, %ymm0
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172 | | | 0.50 | 0.50 | 1.00 | | | | vmovapd %ymm0, 0(%r13,%rax)
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173 | 0.25 | 0.25 | | | | 0.25 | 0.25 | | addq $32, %rax
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174 | 0.25 | 0.25 | | | | 0.25 | 0.25 | | cmpq %rax, %r14
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175 | | | | | | | | | * jne .L22
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1.00 1.00 1.00 0.50 1.00 0.50 1.00 0.50 0.50
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Latency Analysis Report
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-----------------------
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171 | 8.0 | | vmulpd (%r12,%rax), %ymm1, %ymm0
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172 | 5.0 | | vmovapd %ymm0, 0(%r13,%rax)
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13.0
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Loop-Carried Dependencies Analysis Report
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-----------------------------------------
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173 | 1.0 | addq $32, %rax | [173]
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It shows the whole kernel together with the average port pressure of each instruction form and the overall port binding.
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In the fifth to last line containing ``addl $0x1, -0x24(%rbp)`` one can see an ``X`` in front of the instruction form and no port occupation.
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This means either there are no measured values for this instruction form or no port binding is provided in the
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data file.
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In the first case, OSACA automatically creates two benchmark assembly files (``add-mem_imd.S`` for latency and ``add-mem_imd-TP.S`` for throughput) in the benchmark folder, if it not already exists there.
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Furthermore, the critical path of the loop kernel and all loop-carried dependencies, each with a list of line numbers being part of this dependency chain on the right.
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One can now run ibench to get the throughput value for addl with the given file. Mind that the assembly
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file, which is used for ibench, is implemented in Intel syntax. So for a valid run instruction ``addl`` must be
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changed to ``add`` manually.
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.. For measuring the instruction forms with ibench we highly recommend to use an exclusively allocated node, so there is no other workload falsifying the results. For the correct function of ibench the benchmark files from OSACA need to be placed in a subdirectory of src in root so ibench can create the a folder with the subdirectory’s name and the shared objects. For running the tests the frequencies of all cores must set to a constant value and this has to be given as an argument together with the directory of the shared objects to ibench, e.g.:
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For measuring the instruction forms with ibench we highly recommend to use an exclusively allocated node,
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so there is no other workload falsifying the results. For the correct function of ibench the benchmark files
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from OSACA need to be placed in a subdirectory of src in root so ibench can create the a folder with the
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subdirectory’s name and the shared objects. For running the tests the frequencies of all cores must set to a
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constant value and this has to be given as an argument together with the directory of the shared objects to
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ibench, e.g.:
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.. code:: bash
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.. .. code:: bash
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./ibench ./AVX 2.2
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for running ibench in the directory ``AVX`` with a core frequency of 2.2 GHz.
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We get an output like:
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.. for running ibench in the directory ``AVX`` with a core frequency of 2.2 GHz. We get an output like:
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.. code:: bash
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.. .. code:: bash
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Using frequency 2.20GHz.
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add-mem_imd-TP: 1.023 (clock cycles) [DEBUG - result: 1.000000]
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add-mem_imd: 6.050 (clock cycles) [DEBUG - result: 1.000000]
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The debug output as resulting value of register ``xmm0`` is additional validation information depending on
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the executed instruction form meant for the user and is not considered by OSACA.
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The ibench output information can be included by OSACA running the program with the flag ``--include-ibench`` or just
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``-i`` and the specify micro architecture:
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.. The debug output as resulting value of register ``xmm0`` is additional validation information depending on the executed instruction form meant for the user and is not considered by OSACA. The ibench output information can be included by OSACA running the program with the flag ``--include-ibench`` or just ``-i`` and the specify micro architecture:
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.. code-block:: bash
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.. .. code-block:: bash
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osaca --arch IVB -i PATH/TO/IBENCH-OUTPUTFILE
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For now no automatic allocation of ports for a instruction form is implemented, so for getting an output in the Ports Pressure table, one must add the port occupation by hand.
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We know that the inserted instruction form must be assigned always to Port 2, 3 and 4 and additionally to either 0, 1 or 5, a valid data file therefore would look like this:
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.. For now no automatic allocation of ports for a instruction form is implemented, so for getting an output in the Ports Pressure table, one must add the port occupation by hand. We know that the inserted instruction form must be assigned always to Port 2, 3 and 4 and additionally to either 0, 1 or 5, a valid data file therefore would look like this:
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.. code:: bash
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.. .. code:: bash
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addl-mem_imd,1.0,6.0,"(0.33,0.33,1.00,1.00,1.00,0.33)"
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Another thorughput analysis with OSACA now returns all information for the kernel:
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.. code-block::
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Throughput Analysis Report
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--------------------------
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X - No information for this instruction in database
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* - Instruction micro-ops not bound to a port
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Port Binding in Cycles Per Iteration:
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-------------------------------------------------
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| Port | 0 | 1 | 2 | 3 | 4 | 5 |
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-------------------------------------------------
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| Cycles | 2.67 | 1.67 | 6.0 | 6.0 | 3.0 | 1.67 |
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-------------------------------------------------
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Ports Pressure in cycles
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| 0 | 1 | 2 | 3 | 4 | 5 |
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-------------------------------------------
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| | | 0.50 | 0.50 | 1.00 | | movl $0x0,-0x24(%rbp)
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| | | | | | | jmp 10b <scale+0x10b>
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| | | 0.50 | 0.50 | | | mov -0x48(%rbp),%rax
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| | | 0.50 | 0.50 | | | mov -0x24(%rbp),%edx
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| 0.33 | 0.33 | | | | 0.33 | movslq %edx,%rdx
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| | | 0.50 | 0.50 | | | vmovsd (%rax,%rdx,8),%xmm0
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| 1.00 | | 0.50 | 0.50 | | | vmulsd -0x50(%rbp),%xmm0,%xmm0
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| | | 0.50 | 0.50 | | | mov -0x38(%rbp),%rax
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| | | 0.50 | 0.50 | | | mov -0x24(%rbp),%edx
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| 0.33 | 0.33 | | | | 0.33 | movslq %edx,%rdx
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| | | 0.50 | 0.50 | 1.00 | | vmovsd %xmm0,(%rax,%rdx,8)
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| 0.33 | 0.33 | 1.00 | 1.00 | 1.00 | 0.33 | addl $0x1,-0x24(%rbp)
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| | | 0.50 | 0.50 | | | mov -0x24(%rbp),%eax
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| 0.33 | 0.33 | 0.50 | 0.50 | | 0.33 | cmp -0x54(%rbp),%eax
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| | | | | | | jl e4 <scale+0xe4>
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| 0.33 | 0.33 | | | | 0.33 | mov %rcx,%rsp
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Total number of estimated throughput: 6.0
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Credits
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=======
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