add tests for GCC Intel syntax

osaca/osaca.py

@@ -244,10 +244,12 @@ def check_arguments(args, parser):
         )
     if args.syntax and args.arch and MachineModel.get_isa_for_arch(args.arch) != "x86":
         parser.error("Syntax can only be explicitly specified for an x86 microarchitecture")
-    if args.syntax and args.syntax.upper() not in SUPPORTED_SYNTAXES:
-        parser.error(
-            "Assembly syntax not supported. Please see --help for all valid assembly syntaxes."
-        )
+    if args.syntax:
+        args.syntax = args.syntax.upper()
+        if args.syntax not in SUPPORTED_SYNTAXES:
+            parser.error(
+                "Assembly syntax not supported. Please see --help for all valid assembly syntaxes."
+            )
     if "import_data" in args and args.import_data not in supported_import_files:
         parser.error(
             "Microbenchmark not supported for data import. Please see --help for all valid "
@@ -339,7 +341,9 @@ def inspect(args, output_file=sys.stdout):
     if args.arch:
         archs_to_try = [args.arch]
     else:
-        archs_to_try = [detected_arch]
+        archs_to_try = list(DEFAULT_ARCHS.values())
+        archs_to_try.remove(detected_arch)
+        archs_to_try.append(detected_arch)
     if args.syntax:
         syntaxes_to_try = [args.syntax]
     else:

tests/test_files/gs_x86_gcc.s

@@ -0,0 +1,103 @@
+.LC3:
+        .string "%f\n"
+main:
+        push    r14
+        xor     edi, edi
+        push    r13
+        push    r12
+        push    rbp
+        push    rbx
+        call    time
+        mov     edi, eax
+        call    srand
+        mov     edi, 1600
+        call    malloc
+        mov     r12, rax
+        mov     rbp, rax
+        lea     r13, [rax+1600]
+        mov     rbx, rax
+.L2:
+        mov     edi, 1600
+        add     rbx, 8
+        call    malloc
+        mov     QWORD PTR [rbx-8], rax
+        cmp     r13, rbx
+        jne     .L2
+        lea     rbx, [r12+8]
+        lea     r13, [r12+1592]
+.L5:
+        mov     r14d, 8
+.L4:
+        call    rand
+        vxorpd  xmm2, xmm2, xmm2
+        mov     rcx, QWORD PTR [rbx]
+        movsx   rdx, eax
+        mov     esi, eax
+        imul    rdx, rdx, 351843721
+        sar     esi, 31
+        sar     rdx, 45
+        sub     edx, esi
+        imul    edx, edx, 100000
+        sub     eax, edx
+        vcvtsi2sd       xmm0, xmm2, eax
+        vdivsd  xmm0, xmm0, QWORD PTR .LC0[rip]
+        vmovsd  QWORD PTR [rcx+r14], xmm0
+        add     r14, 8
+        cmp     r14, 1592
+        jne     .L4
+        add     rbx, 8
+        cmp     r13, rbx
+        jne     .L5
+        vmovsd  xmm1, QWORD PTR .LC1[rip]
+        lea     rdi, [r12+1584]
+.L6:
+        mov     rdx, QWORD PTR [rbp+8]
+        mov     rcx, QWORD PTR [rbp+16]
+        mov     eax, 1
+        mov     rsi, QWORD PTR [rbp+0]
+        vmovsd  xmm0, QWORD PTR [rdx]
+# OSACA-BEGIN
+.L7:
+        vaddsd  xmm0, xmm0, QWORD PTR [rcx+rax*8]
+        vaddsd  xmm0, xmm0, QWORD PTR [rdx+8+rax*8]
+        vaddsd  xmm0, xmm0, QWORD PTR [rsi+rax*8]
+        vmulsd  xmm0, xmm0, xmm1
+        vmovsd  QWORD PTR [rdx+rax*8], xmm0
+        inc     rax
+        cmp     rax, 199
+        jne     .L7
+# OSACA-END
+        vmovsd  xmm0, QWORD PTR [rdx+1592]
+        add     rbp, 8
+        vmovsd  QWORD PTR [rcx+8], xmm0
+        cmp     rdi, rbp
+        jne     .L6
+        mov     rax, QWORD PTR [r12+1584]
+        vmovsd  xmm0, QWORD PTR .LC2[rip]
+        vucomisd        xmm0, QWORD PTR [rax+1584]
+        jp      .L9
+        je      .L19
+.L9:
+        pop     rbx
+        xor     eax, eax
+        pop     rbp
+        pop     r12
+        pop     r13
+        pop     r14
+        ret
+.L19:
+        mov     rax, QWORD PTR [r12]
+        mov     edi, OFFSET FLAT:.LC3
+        vmovsd  xmm0, QWORD PTR [rax]
+        mov     eax, 1
+        call    printf
+        jmp     .L9
+.LC0:
+        .long   0
+        .long   1083129856
+.LC1:
+        .long   2061584302
+        .long   1072934420
+.LC2:
+        .long   -57724360
+        .long   1072939201

tests/test_parser_x86intel.py

@@ -25,6 +25,8 @@ class TestParserX86Intel(unittest.TestCase):
             self.triad_iaca_code = f.read()
         with open(self._find_file("gs_x86_icc.s")) as f:
             self.gs_icc_code = f.read()
+        with open(self._find_file("gs_x86_gcc.s")) as f:
+            self.gs_gcc_code = f.read()
 
     ##################
     # Test
@@ -344,6 +346,40 @@ class TestParserX86Intel(unittest.TestCase):
         )
         self.assertEqual(len(parsed), 227)
 
+    def test_parse_file4(self):
+        parsed = self.parser.parse_file(self.gs_gcc_code)
+        self.assertEqual(parsed[0].line_number, 1)
+        # Check a few lines to make sure that we produced something reasonable.
+        self.assertEqual(
+            parsed[61],
+            InstructionForm(
+                mnemonic="vaddsd",
+                operands=[
+                    RegisterOperand("XMM0"),
+                    RegisterOperand("XMM0"),
+                    MemoryOperand(
+                        base=RegisterOperand("RDX"),
+                        index=RegisterOperand("RAX"),
+                        scale=8,
+                        offset=ImmediateOperand(value=8),
+                    ),
+                ],
+                comment_id=None,
+                line="        vaddsd  xmm0, xmm0, QWORD PTR [rdx+8+rax*8]",
+                line_number=62,
+            ),
+        )
+        self.assertEqual(
+            parsed[95],
+            InstructionForm(
+                directive_id=DirectiveOperand(name=".long", parameters=["0"]),
+                line="        .long   0",
+                line_number=96,
+            ),
+        )
+        self.assertEqual(len(parsed), 103)
+
+
     def test_normalize_imd(self):
         imd_binary = ImmediateOperand(value="1001111B")
         imd_octal = ImmediateOperand(value="117O")