formatting for black

osaca/parser/parser_x86intel.py

@@ -160,12 +160,18 @@ class ParserX86Intel(ParserX86):
         binary_number = pp.Combine(pp.Word("01") + pp.CaselessLiteral("B"))
         octal_number = pp.Combine(pp.Word("01234567") + pp.CaselessLiteral("O"))
         decimal_number = pp.Combine(pp.Optional(pp.Literal("-")) + pp.Word(pp.nums))
-        hex_number = pp.Combine(pp.Word(pp.hexnums) + pp.CaselessLiteral("H"))
+        hex_number_suffix = pp.Combine(
+            pp.Word(pp.hexnums) + (pp.CaselessLiteral("H") ^ pp.CaselessLiteral("R"))
+        )
+        hex_number_0x = pp.Combine(
+            pp.Optional(pp.Literal("-")) + pp.Literal("0x") + pp.Word(pp.hexnums)
+        )
+        hex_number = hex_number_0x ^ hex_number_suffix
         float_number = pp.Combine(
             pp.Optional(pp.Literal("-")) + pp.Word(pp.nums) + pp.Word(".", pp.nums)
         ).setResultsName("value")
         integer_number = (
-            binary_number ^ octal_number ^ decimal_number ^ hex_number
+            hex_number ^ binary_number ^ octal_number ^ decimal_number
         ).setResultsName("value")
 
         # Comment.
@@ -793,8 +799,10 @@ class ParserX86Intel(ParserX86):
         if isinstance(imd.value, str):
             if "." in imd.value:
                 return float(imd.value)
+            if imd.value.startswith("0x"):
+                return int(imd.value, 0)
             # Now parse depending on the base.
-            base = {"B": 2, "O": 8, "H": 16}.get(imd.value[-1], 10)
+            base = {"B": 2, "O": 8, "H": 16, "R": 16}.get(imd.value[-1], 10)
             value = 0
             negative = imd.value[0] == "-"
             positive = imd.value[0] == "+"

osaca/semantics/kernel_dg.py

@@ -67,9 +67,7 @@ class KernelDG(nx.DiGraph):
     @staticmethod
     def get_real_line_number(line_number):
         return (
-            int(line_number + 0.125)
+            int(line_number + 0.125) if KernelDG.is_load_line_number(line_number) else line_number
-            if KernelDG.is_load_line_number(line_number)
-            else line_number
         )
 
     def create_DG(self, kernel, flag_dependencies=False):
@@ -100,9 +98,7 @@ class KernelDG(nx.DiGraph):
                 loads[instruction_form.line_number] = load_line_number
                 dg.add_node(load_line_number)
                 dg.nodes[load_line_number]["instruction_form"] = InstructionForm(
-                    mnemonic="_LOAD_",
+                    mnemonic="_LOAD_", line=instruction_form.line, line_number=load_line_number
-                    line=instruction_form.line,
-                    line_number=load_line_number
                 )
                 # and set LD latency as edge weight
                 dg.add_edge(
@@ -423,8 +419,7 @@ class KernelDG(nx.DiGraph):
                     is_memory_read = self.parser.is_reg_dependend_of(register, src.base)
                 if src.index is not None and isinstance(src.index, RegisterOperand):
                     is_memory_read = (
-                        self.parser.is_reg_dependend_of(register, src.index)
+                        self.parser.is_reg_dependend_of(register, src.index) or is_memory_read
-                        or is_memory_read
                     )
                 for_load = is_memory_read
                 is_read = is_read or is_memory_read
@@ -614,7 +609,7 @@ class KernelDG(nx.DiGraph):
                 (latency, list(deps))
                 for latency, deps in groupby(lcd, lambda dep: lcd[dep]["latency"])
             ),
-            reverse=True
+            reverse=True,
         )
         node_colors = {}
         edge_colors = {}
@@ -637,17 +632,16 @@ class KernelDG(nx.DiGraph):
                         edge_colors[u, v] = color
         max_color = min(11, colors_used)
         colorscheme = f"spectral{max(3, max_color)}"
-        graph.graph["node"] = {"colorscheme" : colorscheme}
+        graph.graph["node"] = {"colorscheme": colorscheme}
-        graph.graph["edge"] = {"colorscheme" : colorscheme}
+        graph.graph["edge"] = {"colorscheme": colorscheme}
         for n, color in node_colors.items():
             if "style" not in graph.nodes[n]:
                 graph.nodes[n]["style"] = "filled"
             else:
                 graph.nodes[n]["style"] += ",filled"
             graph.nodes[n]["fillcolor"] = color
-            if (
+            if (max_color >= 4 and color in (1, max_color)) or (
-                (max_color >= 4 and color in (1, max_color))
+                max_color >= 10 and color in (1, 2, max_color - 1, max_color)
-                or (max_color >= 10 and color in (1, 2, max_color - 1 , max_color))
             ):
                 graph.nodes[n]["fontcolor"] = "white"
         for (u, v), color in edge_colors.items():

tests/test_parser_x86intel.py

@@ -103,6 +103,8 @@ class TestParserX86Intel(unittest.TestCase):
         instr12 = "\tvfmadd213sd xmm0, xmm1, QWORD PTR __real@bfc5555555555555"
         instr13 = "\tjmp\t$LN18@operator"
         instr14 = "vaddsd  xmm0, xmm0, QWORD PTR [rdx+8+rax*8]"
+        instr15 = "vextractf128 xmm1, ymm2, 0x2"
+        instr16 = "vmovupd xmm0, [rax+123R]"
 
         parsed_1 = self.parser.parse_instruction(instr1)
         parsed_2 = self.parser.parse_instruction(instr2)
@@ -118,6 +120,8 @@ class TestParserX86Intel(unittest.TestCase):
         parsed_12 = self.parser.parse_instruction(instr12)
         parsed_13 = self.parser.parse_instruction(instr13)
         parsed_14 = self.parser.parse_instruction(instr14)
+        parsed_15 = self.parser.parse_instruction(instr15)
+        parsed_16 = self.parser.parse_instruction(instr16)
 
         self.assertEqual(parsed_1.mnemonic, "sub")
         self.assertEqual(parsed_1.operands[0], RegisterOperand(name="RSP"))
@@ -221,6 +225,18 @@ class TestParserX86Intel(unittest.TestCase):
             ),
         )
 
+        self.assertEqual(parsed_15.mnemonic, "vextractf128")
+        self.assertEqual(parsed_15.operands[0], RegisterOperand(name="XMM1"))
+        self.assertEqual(parsed_15.operands[1], RegisterOperand(name="YMM2"))
+        self.assertEqual(parsed_15.operands[2], ImmediateOperand(value=2))
+
+        self.assertEqual(parsed_16.mnemonic, "vmovupd")
+        self.assertEqual(parsed_16.operands[0], RegisterOperand(name="XMM0"))
+        self.assertEqual(
+            parsed_16.operands[1],
+            MemoryOperand(base=RegisterOperand(name="RAX"), offset=ImmediateOperand(value=291)),
+        )
+
     def test_parse_line(self):
         line_comment = "; -- Begin  main"
         line_instruction = "\tret\t0"