mirror of
https://github.com/RRZE-HPC/OSACA.git
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479 lines
21 KiB
Python
Executable File
479 lines
21 KiB
Python
Executable File
#!/usr/bin/env python3
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"""
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Unit tests for ARMv8 AArch64 assembly parser
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"""
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import os
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import unittest
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from pyparsing import ParseException
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from osaca.parser import ParserAArch64, instructionForm
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from osaca.parser.operand import Operand
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from osaca.parser.directive import DirectiveOperand
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from osaca.parser.memory import MemoryOperand
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from osaca.parser.register import RegisterOperand
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from osaca.parser.immediate import ImmediateOperand
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from osaca.parser.identifier import IdentifierOperand
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class TestParserAArch64(unittest.TestCase):
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@classmethod
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def setUpClass(self):
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self.parser = ParserAArch64()
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with open(self._find_file("triad_arm_iaca.s")) as f:
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self.triad_code = f.read()
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##################
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# Test
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##################
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def test_comment_parser(self):
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self.assertEqual(self._get_comment(self.parser, "// some comments"), "some comments")
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self.assertEqual(
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self._get_comment(self.parser, "\t\t//AA BB CC \t end \t"), "AA BB CC end"
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)
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self.assertEqual(
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self._get_comment(self.parser, "\t//// comment //// comment"),
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"// comment //// comment",
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)
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def test_label_parser(self):
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self.assertEqual(self._get_label(self.parser, "main:").name, "main")
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self.assertEqual(self._get_label(self.parser, "..B1.10:").name, "..B1.10")
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self.assertEqual(self._get_label(self.parser, ".2.3_2_pack.3:").name, ".2.3_2_pack.3")
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self.assertEqual(self._get_label(self.parser, ".L1:\t\t\t//label1").name, ".L1")
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self.assertEqual(
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" ".join(self._get_label(self.parser, ".L1:\t\t\t//label1").comment),
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"label1",
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)
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with self.assertRaises(ParseException):
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self._get_label(self.parser, "\t.cfi_startproc")
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def test_directive_parser(self):
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self.assertEqual(self._get_directive(self.parser, "\t.text").name, "text")
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self.assertEqual(len(self._get_directive(self.parser, "\t.text").parameters), 0)
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self.assertEqual(self._get_directive(self.parser, "\t.align\t16,0x90").name, "align")
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self.assertEqual(len(self._get_directive(self.parser, "\t.align\t16,0x90").parameters), 2)
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self.assertEqual(
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self._get_directive(self.parser, "\t.align\t16,0x90").parameters[1], "0x90"
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)
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self.assertEqual(
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self._get_directive(self.parser, " .byte 100,103,144 //IACA START").name,
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"byte",
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)
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self.assertEqual(
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self._get_directive(
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self.parser, " .byte 100,103,144 //IACA START"
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).parameters[2],
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"144",
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)
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self.assertEqual(
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" ".join(
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self._get_directive(
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self.parser, " .byte 100,103,144 //IACA START"
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).comment
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),
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"IACA START",
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)
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def test_condition_parser(self):
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self.assertEqual(self._get_condition(self.parser, "EQ"), "EQ")
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self.assertEqual(self._get_condition(self.parser, "ne"), "NE")
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self.assertEqual(self._get_condition(self.parser, "Lt"), "LT")
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self.assertEqual(self._get_condition(self.parser, "Gt"), "GT")
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with self.assertRaises(ParseException):
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self._get_condition(self.parser, "LOcondition")
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def test_parse_instruction(self):
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instr1 = "\t\tvcvt.F32.S32 w1, w2\t\t\t//12.27"
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instr2 = "b.lo ..B1.4 \t"
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instr3 = " mov x2,#0x222 //NOT IACA END"
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instr4 = "str x28, [sp, x1, lsl #4] //12.9"
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instr5 = "ldr x0, [x0, #:got_lo12:q2c]"
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instr6 = "adrp x0, :got:visited"
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instr7 = "fadd v17.2d, v16.2d, v1.2d"
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instr8 = "mov.d x0, v16.d[1]"
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instr9 = "ccmp x0, x1, #4, cc"
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parsed_1 = self.parser.parse_instruction(instr1)
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parsed_2 = self.parser.parse_instruction(instr2)
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parsed_3 = self.parser.parse_instruction(instr3)
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parsed_4 = self.parser.parse_instruction(instr4)
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parsed_5 = self.parser.parse_instruction(instr5)
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parsed_6 = self.parser.parse_instruction(instr6)
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parsed_7 = self.parser.parse_instruction(instr7)
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parsed_8 = self.parser.parse_instruction(instr8)
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parsed_9 = self.parser.parse_instruction(instr9)
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self.assertEqual(parsed_1.instruction, "vcvt.F32.S32")
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self.assertEqual(parsed_1.operands[0].name, "1")
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self.assertEqual(parsed_1.operands[0].prefix, "w")
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self.assertEqual(parsed_1.operands[1].name, "2")
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self.assertEqual(parsed_1.operands[1].prefix, "w")
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self.assertEqual(parsed_1.comment, "12.27")
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self.assertEqual(parsed_2.instruction, "b.lo")
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self.assertEqual(parsed_2.operands[0].name, "..B1.4")
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self.assertEqual(len(parsed_2.operands), 1)
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self.assertIsNone(parsed_2.comment)
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self.assertEqual(parsed_3.instruction, "mov")
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self.assertEqual(parsed_3.operands[0].name, "2")
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self.assertEqual(parsed_3.operands[0].prefix, "x")
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self.assertEqual(parsed_3.operands[1].value, int("0x222", 0))
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self.assertEqual(parsed_3.comment, "NOT IACA END")
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self.assertEqual(parsed_4.instruction, "str")
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self.assertIsNone(parsed_4.operands[1].offset)
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self.assertEqual(parsed_4.operands[1].base.name, "sp")
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self.assertEqual(parsed_4.operands[1].base.prefix, "x")
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self.assertEqual(parsed_4.operands[1].index["name"], "1")
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self.assertEqual(parsed_4.operands[1].index["prefix"], "x")
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self.assertEqual(parsed_4.operands[1].scale, 16)
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self.assertEqual(parsed_4.operands[0].name, "28")
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self.assertEqual(parsed_4.operands[0].prefix, "x")
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self.assertEqual(parsed_4.comment, "12.9")
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self.assertEqual(parsed_5.instruction, "ldr")
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self.assertEqual(parsed_5.operands[0].name, "0")
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self.assertEqual(parsed_5.operands[0].prefix, "x")
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self.assertEqual(parsed_5.operands[1].offset.name, "q2c")
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self.assertEqual(parsed_5.operands[1].offset.relocation, ":got_lo12:")
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self.assertEqual(parsed_5.operands[1].base.name, "0")
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self.assertEqual(parsed_5.operands[1].base.prefix, "x")
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self.assertIsNone(parsed_5.operands[1].index)
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self.assertEqual(parsed_5.operands[1].scale, 1)
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self.assertEqual(parsed_6.instruction, "adrp")
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self.assertEqual(parsed_6.operands[0].name, "0")
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self.assertEqual(parsed_6.operands[0].prefix, "x")
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self.assertEqual(parsed_6.operands[1].relocation, ":got:")
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self.assertEqual(parsed_6.operands[1].name, "visited")
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self.assertEqual(parsed_7.instruction, "fadd")
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self.assertEqual(parsed_7.operands[0].name, "17")
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self.assertEqual(parsed_7.operands[0].prefix, "v")
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self.assertEqual(parsed_7.operands[0].lanes, "2")
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self.assertEqual(parsed_7.operands[0].shape, "d")
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self.assertEqual(self.parser.get_full_reg_name(parsed_7.operands[2]), "v1.2d")
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self.assertEqual(parsed_8.instruction, "mov.d")
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self.assertEqual(parsed_8.operands[0].name, "0")
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self.assertEqual(parsed_8.operands[0].prefix, "x")
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self.assertEqual(parsed_8.operands[1].name, "16")
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self.assertEqual(parsed_8.operands[1].prefix, "v")
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self.assertEqual(parsed_8.operands[1].index, "1")
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self.assertEqual(self.parser.get_full_reg_name(parsed_8.operands[1]), "v16.d[1]")
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self.assertEqual(parsed_9.instruction, "ccmp")
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self.assertEqual(parsed_9.operands[0].name, "0")
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self.assertEqual(parsed_9.operands[0].prefix, "x")
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self.assertEqual(parsed_9.operands[3]["condition"], "CC")
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def test_parse_line(self):
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line_comment = "// -- Begin main"
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line_label = ".LBB0_1: // =>This Inner Loop Header: Depth=1"
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line_directive = ".cfi_def_cfa w29, -16"
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line_instruction = "ldr s0, [x11, w10, sxtw #2] // = <<2"
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line_prefetch = "prfm pldl1keep, [x26, #2048] //HPL"
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line_preindexed = "stp x29, x30, [sp, #-16]!"
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line_postindexed = "ldp q2, q3, [x11], #64"
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line_5_operands = "fcmla z26.d, p0/m, z29.d, z21.d, #90"
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line_conditions = "ccmn x11, #1, #3, eq"
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instruction_form_1 = instructionForm(
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instruction_id=None,
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operands_id=[],
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directive_id=None,
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comment_id="-- Begin main",
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label_id=None,
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line="// -- Begin main",
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line_number=1,
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)
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instruction_form_2 = instructionForm(
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instruction_id=None,
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operands_id=[],
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directive_id=None,
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comment_id="=>This Inner Loop Header: Depth=1",
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label_id=".LBB0_1",
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line=".LBB0_1: // =>This Inner Loop Header: Depth=1",
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line_number=2,
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)
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instruction_form_3 = instructionForm(
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instruction_id=None,
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operands_id=[],
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directive_id=DirectiveOperand(name_id="cfi_def_cfa", parameter_id=["w29", "-16"]),
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comment_id=None,
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label_id=None,
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line=".cfi_def_cfa w29, -16",
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line_number=3,
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)
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instruction_form_4 = instructionForm(
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instruction_id="ldr",
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operands_id=[
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RegisterOperand(prefix_id="s", name_id="0"),
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MemoryOperand(
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offset_ID=None,
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base_id=RegisterOperand(prefix_id="x", name_id="11"),
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index_id={
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"prefix": "w",
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"name": "10",
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"shift_op": "sxtw",
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"immediate": {"value": "2"},
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"shift": [{"value": "2"}],
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},
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scale_id=4,
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),
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],
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directive_id=None,
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comment_id="= <<2",
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label_id=None,
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line="ldr s0, [x11, w10, sxtw #2] // = <<2",
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line_number=4,
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)
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instruction_form_5 = instructionForm(
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instruction_id="prfm",
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operands_id=[
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{"prfop": {"type": ["PLD"], "target": ["L1"], "policy": ["KEEP"]}},
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MemoryOperand(
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offset_ID=ImmediateOperand(value_id=2048),
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base_id=RegisterOperand(prefix_id="x", name_id="26"),
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index_id=None,
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scale_id=1,
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),
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],
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directive_id=None,
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comment_id="HPL",
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label_id=None,
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line="prfm pldl1keep, [x26, #2048] //HPL",
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line_number=5,
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)
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instruction_form_6 = instructionForm(
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instruction_id="stp",
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operands_id=[
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RegisterOperand(prefix_id="x", name_id="29"),
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RegisterOperand(prefix_id="x", name_id="30"),
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MemoryOperand(
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offset_ID=ImmediateOperand(value_id=-16),
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base_id=RegisterOperand(name_id="sp", prefix_id="x"),
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index_id=None,
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scale_id=1,
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pre_indexed=True,
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),
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],
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directive_id=None,
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comment_id=None,
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label_id=None,
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line="stp x29, x30, [sp, #-16]!",
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line_number=6,
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)
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instruction_form_7 = instructionForm(
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instruction_id="ldp",
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operands_id=[
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RegisterOperand(prefix_id="q", name_id="2"),
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RegisterOperand(prefix_id="q", name_id="3"),
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MemoryOperand(
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offset_ID=None,
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base_id=RegisterOperand(name_id="11", prefix_id="x"),
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index_id=None,
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scale_id=1,
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post_indexed={"value": 64},
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),
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],
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directive_id=None,
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comment_id=None,
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label_id=None,
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line="ldp q2, q3, [x11], #64",
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line_number=7,
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)
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instruction_form_8 = instructionForm(
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instruction_id="fcmla",
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operands_id=[
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RegisterOperand(prefix_id="z", name_id="26", shape="d"),
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RegisterOperand(prefix_id="p", name_id="0", predication="m"),
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RegisterOperand(prefix_id="z", name_id="29", shape="d"),
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RegisterOperand(prefix_id="z", name_id="21", shape="d"),
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ImmediateOperand(value_id=90, type_id="int"),
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],
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directive_id=None,
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comment_id=None,
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label_id=None,
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line="fcmla z26.d, p0/m, z29.d, z21.d, #90",
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line_number=8,
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)
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instruction_form_9 = instructionForm(
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instruction_id="ccmn",
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operands_id=[
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RegisterOperand(prefix_id="x", name_id="11"),
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ImmediateOperand(value_id=1, type_id="int"),
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ImmediateOperand(value_id=3, type_id="int"),
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{"condition": "EQ"},
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],
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directive_id=None,
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comment_id=None,
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label_id=None,
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line="ccmn x11, #1, #3, eq",
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line_number=9,
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)
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parsed_1 = self.parser.parse_line(line_comment, 1)
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parsed_2 = self.parser.parse_line(line_label, 2)
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parsed_3 = self.parser.parse_line(line_directive, 3)
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parsed_4 = self.parser.parse_line(line_instruction, 4)
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parsed_5 = self.parser.parse_line(line_prefetch, 5)
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parsed_6 = self.parser.parse_line(line_preindexed, 6)
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parsed_7 = self.parser.parse_line(line_postindexed, 7)
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parsed_8 = self.parser.parse_line(line_5_operands, 8)
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parsed_9 = self.parser.parse_line(line_conditions, 9)
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self.assertEqual(parsed_1, instruction_form_1)
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self.assertEqual(parsed_2, instruction_form_2)
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self.assertEqual(parsed_3, instruction_form_3)
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self.assertEqual(parsed_4, instruction_form_4)
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self.assertEqual(parsed_5, instruction_form_5)
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self.assertEqual(parsed_6, instruction_form_6)
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self.assertEqual(parsed_7, instruction_form_7)
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self.assertEqual(parsed_8, instruction_form_8)
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self.assertEqual(parsed_9, instruction_form_9)
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def test_parse_file(self):
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parsed = self.parser.parse_file(self.triad_code)
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self.assertEqual(parsed[0].line_number, 1)
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self.assertEqual(len(parsed), 645)
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def test_normalize_imd(self):
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imd_decimal_1 = ImmediateOperand(value_id="79")
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imd_hex_1 = ImmediateOperand(value_id="0x4f")
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imd_decimal_2 = ImmediateOperand(value_id="8")
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imd_hex_2 = ImmediateOperand(value_id="0x8")
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imd_float_11 = ImmediateOperand(type_id="float",value_id={"mantissa": "0.79", "e_sign": "+", "exponent": "2"})
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imd_float_12 = ImmediateOperand(type_id="float",value_id={"mantissa": "790.0", "e_sign": "-", "exponent": "1"})
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imd_double_11 = ImmediateOperand(type_id="double",value_id={"mantissa": "0.79", "e_sign": "+", "exponent": "2"})
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imd_double_12 = ImmediateOperand(type_id="double",value_id={"mantissa": "790.0", "e_sign": "-", "exponent": "1"})
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identifier = IdentifierOperand(name="..B1.4")
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value1 = self.parser.normalize_imd(imd_decimal_1)
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self.assertEqual(value1, self.parser.normalize_imd(imd_hex_1))
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self.assertEqual(
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self.parser.normalize_imd(imd_decimal_2),
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self.parser.normalize_imd(imd_hex_2),
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)
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self.assertEqual(self.parser.normalize_imd(imd_float_11), value1)
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self.assertEqual(self.parser.normalize_imd(imd_float_12), value1)
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self.assertEqual(self.parser.normalize_imd(imd_double_11), value1)
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self.assertEqual(self.parser.normalize_imd(imd_double_12), value1)
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self.assertEqual(self.parser.normalize_imd(identifier), identifier)
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def test_multiple_regs(self):
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instr_range = "PUSH {x5-x7}"
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instr_list = "POP {x5, x6, x7}"
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instr_range_with_index = "ld4 {v0.S - v3.S}[2]"
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instr_list_with_index = "ld4 {v0.S, v1.S, v2.S, v3.S}[2]"
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instr_range_single = "dummy { z1.d }"
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reg_list = [
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RegisterOperand(prefix_id="x", name_id="5"),
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RegisterOperand(prefix_id="x", name_id="6"),
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RegisterOperand(prefix_id="x", name_id="7"),
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]
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reg_list_idx = [
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RegisterOperand(prefix_id="v", name_id="0", shape="S", index=2),
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RegisterOperand(prefix_id="v", name_id="1", shape="S", index=2),
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RegisterOperand(prefix_id="v", name_id="2", shape="S", index=2),
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RegisterOperand(prefix_id="v", name_id="3", shape="S", index=2),
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]
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reg_list_single = [RegisterOperand(prefix_id="z", name_id="1", shape="d")]
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prange = self.parser.parse_line(instr_range)
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plist = self.parser.parse_line(instr_list)
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p_idx_range = self.parser.parse_line(instr_range_with_index)
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p_idx_list = self.parser.parse_line(instr_list_with_index)
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p_single = self.parser.parse_line(instr_range_single)
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self.assertEqual(prange.operands, reg_list)
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self.assertEqual(plist.operands, reg_list)
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self.assertEqual(p_idx_range.operands, reg_list_idx)
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self.assertEqual(p_idx_list.operands, reg_list_idx)
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# self.assertEqual(p_single.operands, reg_list_single)
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def test_reg_dependency(self):
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reg_1_1 = RegisterOperand(prefix_id="b", name_id="1")
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reg_1_2 = RegisterOperand(prefix_id="h", name_id="1")
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reg_1_3 = RegisterOperand(prefix_id="s", name_id="1")
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reg_1_4 = RegisterOperand(prefix_id="d", name_id="1")
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reg_1_4 = RegisterOperand(prefix_id="q", name_id="1")
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reg_2_1 = RegisterOperand(prefix_id="w", name_id="2")
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reg_2_2 = RegisterOperand(prefix_id="x", name_id="2")
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reg_v1_1 = RegisterOperand(prefix_id="v", name_id="11", lanes="16", shape="b")
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reg_v1_2 = RegisterOperand(prefix_id="v", name_id="11", lanes="8", shape="h")
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reg_v1_3 = RegisterOperand(prefix_id="v", name_id="11", lanes="4", shape="s")
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reg_v1_4 = RegisterOperand(prefix_id="v", name_id="11", lanes="2", shape="d")
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|
|
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reg_b5 = RegisterOperand(prefix_id="b", name_id="5")
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reg_q15 = RegisterOperand(prefix_id="q", name_id="15")
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reg_v10 = RegisterOperand(prefix_id="v", name_id="10", lanes="2", shape="s")
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reg_v20 = RegisterOperand(prefix_id="v", name_id="20", lanes="2", shape="d")
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|
|
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reg_1 = [reg_1_1, reg_1_2, reg_1_3, reg_1_4]
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reg_2 = [reg_2_1, reg_2_2]
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reg_v = [reg_v1_1, reg_v1_2, reg_v1_3, reg_v1_4]
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reg_others = [reg_b5, reg_q15, reg_v10, reg_v20]
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regs = reg_1 + reg_2 + reg_v + reg_others
|
|
|
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# test each register against each other
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for ri in reg_1:
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for rj in regs:
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assert_value = True if rj in reg_1 else False
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with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
|
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self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
|
|
for ri in reg_2:
|
|
for rj in regs:
|
|
assert_value = True if rj in reg_2 else False
|
|
with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
|
|
self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
|
|
for ri in reg_v:
|
|
for rj in regs:
|
|
assert_value = True if rj in reg_v else False
|
|
with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
|
|
self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
|
|
for ri in reg_others:
|
|
for rj in regs:
|
|
assert_value = True if rj == ri else False
|
|
with self.subTest(reg_a=ri, reg_b=rj, assert_val=assert_value):
|
|
self.assertEqual(self.parser.is_reg_dependend_of(ri, rj), assert_value)
|
|
|
|
##################
|
|
# Helper functions
|
|
##################
|
|
def _get_comment(self, parser, comment):
|
|
return " ".join(
|
|
parser.process_operand(parser.comment.parseString(comment, parseAll=True).asDict())[
|
|
"comment"
|
|
]
|
|
)
|
|
|
|
def _get_label(self, parser, label):
|
|
return parser.process_operand(parser.label.parseString(label, parseAll=True).asDict())
|
|
|
|
def _get_directive(self, parser, directive):
|
|
return parser.process_operand(
|
|
parser.directive.parseString(directive, parseAll=True).asDict()
|
|
)
|
|
|
|
def _get_condition(self, parser, condition):
|
|
return parser.process_operand(
|
|
parser.condition.parseString(condition, parseAll=True).asDict()
|
|
)["condition"]
|
|
|
|
@staticmethod
|
|
def _find_file(name):
|
|
testdir = os.path.dirname(__file__)
|
|
name = os.path.join(testdir, "test_files", name)
|
|
assert os.path.exists(name)
|
|
return name
|
|
|
|
|
|
if __name__ == "__main__":
|
|
suite = unittest.TestLoader().loadTestsFromTestCase(TestParserAArch64)
|
|
unittest.TextTestRunner(verbosity=2).run(suite)
|