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mirror of https://github.com/RRZE-HPC/OSACA.git synced 2026-01-07 03:30:06 +01:00
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400be352e10ba35e8657a914f2d95d5239a76018
OSACA/tests
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pleroy 1a7c1588f6 Add support for the Intel syntax supported by MSVC and ICC
2025-02-02 14:02:16 +01:00
..
test_files
Add support for the Intel syntax supported by MSVC and ICC
2025-02-02 14:02:16 +01:00
__init__.py
made tests a module
2019-10-25 14:49:21 +02:00
all_tests.py
Validation (#71)
2021-04-15 14:42:37 +02:00
test_base_parser.py
Add support for the Intel syntax supported by MSVC and ICC
2025-02-02 14:02:16 +01:00
test_cli.py
Uncommented tests
2024-03-05 00:19:29 +01:00
test_db_interface.py
moved get_full_instruction_name() from HardwareModel to DBInterface
2024-05-02 16:25:41 +02:00
test_frontend.py
Add support for the Intel syntax supported by MSVC and ICC
2025-02-02 14:02:16 +01:00
test_marker_utils.py
Add support for the Intel syntax supported by MSVC and ICC
2025-02-02 14:02:16 +01:00
test_parser_AArch64.py
formattign
2024-05-02 16:30:11 +02:00
test_parser_x86att.py
formatting
2024-08-19 15:52:28 +02:00
test_parser_x86intel.py
Add support for the Intel syntax supported by MSVC and ICC
2025-02-02 14:02:16 +01:00
test_semantics.py
Add support for the Intel syntax supported by MSVC and ICC
2025-02-02 14:02:16 +01:00
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