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https://github.com/RRZE-HPC/OSACA.git
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67 lines
1.5 KiB
ArmAsm
67 lines
1.5 KiB
ArmAsm
#define INSTR vsubpd
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#define NINST 24
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#define N edi
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#define i r8d
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.intel_syntax noprefix
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.globl ninst
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.data
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ninst:
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.long NINST
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.text
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.globl latency
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.type latency, @function
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.align 32
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latency:
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push rbp
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mov rbp, rsp
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xor i, i
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test N, N
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jle done
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# create DP 1.0
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vpcmpeqw xmm0, xmm0, xmm0 # all ones
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vpsllq xmm0, xmm0, 54 # logical left shift: 11111110..0 (54=64-(10-1))
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vpsrlq xmm0, xmm0, 2 # logical right shift: 1 bit for sign; leading mantissa bit is zero
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# expand from SSE to AVX
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vinsertf128 ymm0, ymm0, xmm0, 0x1
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# copy DP 1.0
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vmovaps ymm0, ymm0
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vmovaps ymm1, ymm0
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# Create DP 2.0
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vaddpd ymm1, ymm1, ymm1
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# Create DP 0.5
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vdivpd ymm2, ymm0, ymm1
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loop:
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inc i
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INSTR ymm3, ymm0, ymm0
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INSTR ymm4, ymm1, ymm1
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INSTR ymm5, ymm2, ymm2
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INSTR ymm3, ymm0, ymm0
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INSTR ymm4, ymm1, ymm1
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INSTR ymm5, ymm2, ymm2
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INSTR ymm6, ymm0, ymm0
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INSTR ymm7, ymm1, ymm1
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INSTR ymm8, ymm2, ymm2
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INSTR ymm9, ymm0, ymm0
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INSTR ymm10, ymm1, ymm1
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INSTR ymm11, ymm2, ymm2
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INSTR ymm12, ymm0, ymm0
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INSTR ymm13, ymm1, ymm1
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INSTR ymm14, ymm2, ymm2
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INSTR ymm15, ymm0, ymm0
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INSTR ymm16, ymm1, ymm1
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INSTR ymm17, ymm2, ymm2
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INSTR ymm18, ymm0, ymm0
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INSTR ymm19, ymm1, ymm1
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INSTR ymm20, ymm2, ymm2
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INSTR ymm21, ymm0, ymm0
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INSTR ymm22, ymm1, ymm1
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INSTR ymm23, ymm2, ymm2
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cmp i, N
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jl loop
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done:
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mov rsp, rbp
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pop rbp
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ret
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.size latency, .-latency |