stefandesouza 14a2aa0b52 Changed style to conform to PEP-8 conventions; Added source and destination attributes to parent Operand class

2023-10-29 13:52:49 +01:00

..

a72

Changes for operand matching, instruction loading

2023-09-11 18:23:57 +02:00

isa

Changed style to conform to PEP-8 conventions; Added source and destination attributes to parent Operand class

2023-10-29 13:52:49 +01:00

_build_cache.py

migrate code style to Black

2021-03-11 12:02:45 +01:00

a64fx.yml

add missing instruction for test

2023-03-14 17:51:20 +01:00

a72.yml

added p-indexing latency values for Arm architectures

2023-03-24 17:05:45 +01:00

bdw.yml

sanity check validity of operand entries

2021-03-11 11:38:25 +01:00

csx.yml

added more and refined instruction measurements

2023-02-15 14:24:16 +01:00

hsw.yml

added new instructions

2023-08-02 11:04:56 +02:00

icl.yml

a few more instructions

2022-04-08 12:02:05 +02:00

icx.yml

changed TP/LT for reg renaming moves

2023-08-02 11:03:31 +02:00

ivb.yml

Validation (#71)

2021-04-15 14:42:37 +02:00

n1.yml

added p-indexing latency values for Arm architectures

2023-03-24 17:05:45 +01:00

skx.yml

added shift instructions

2023-07-05 16:42:34 +02:00

snb.yml

Validation (#71)

2021-04-15 14:42:37 +02:00

tsv110.yml

added p-indexing latency values for Arm architectures

2023-03-24 17:05:45 +01:00

tx2.yml

added p-indexing latency values for Arm architectures

2023-03-24 17:05:45 +01:00

zen1.yml

Validation (#71)

2021-04-15 14:42:37 +02:00

zen2.yml

Validation (#71)

2021-04-15 14:42:37 +02:00

zen3.yml

Add IMUL instruction for Zen 3 architectures

2023-08-12 19:40:44 +02:00