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ebf76caa18
- Enhanced ImmediateOperand with reloc_type and symbol attributes for better RISC-V support - Updated RISC-V parser with relocation type support (%hi, %lo, %pcrel_hi, etc.) - Renamed example files from rv6 to rv64 for consistency - Updated related configuration and test files - All 115 tests pass successfully
7 lines
94 B
ArmAsm
7 lines
94 B
ArmAsm
sum_reduction_riscv:
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.L3:
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fld fa5,0(a0)
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addi a0,a0,8
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fadd.d fa0,fa0,fa5
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bne a1,a0,.L3
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ret |