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  • cec6d5cbf2 Merge pull request #3 from Tobi29/aarch64 master Julian 2020-10-26 10:14:45 +01:00
  • d18b4d2004 Add explicit support for AArch64 Git out :V 2020-10-20 17:15:54 +02:00
  • 9143ac609e Merge branch 'master' of github.com:RRZE-HPC/asmbench JanLJL 2020-06-08 16:08:14 +02:00
  • 50d585c758 adjusted for non latency mode JanLJL 2020-06-08 16:06:07 +02:00
  • ba91c9ff02 Revert "fixed up to work with latest kerncraft" Julian Hammer 2020-05-27 14:39:02 +02:00
  • 4447e8eec9 Merge branch 'master' of github.com:RRZE-HPC/asmbench Julian Hammer 2020-05-27 14:21:37 +02:00
  • 966d91531f typos Jan 2020-05-27 14:11:01 +02:00
  • 6e5b808bd7 fixed typos Jan 2020-05-27 14:09:23 +02:00
  • 9c511f9ddf Revert "fixed up to work with latest kerncraft" Julian Hammer 2020-05-27 14:09:13 +02:00
  • 2ccfb0c9ea fixed up to work with latest kerncraft Julian Hammer 2020-02-14 16:57:29 +01:00
  • 201227563e throughput benchmark will work if code can not be serialized Julian Hammer 2020-01-15 12:46:37 +01:00
  • 8fe6aa2097 Update README.rst Julian 2020-01-14 10:27:47 +01:00
  • 6f62086187 now using max frequency! new version Julian Hammer 2020-01-10 15:26:58 +01:00
  • c739acab7e fixed #2. updated help text Julian Hammer 2019-10-16 15:00:30 +02:00
  • 513f7b9504 Merge branch 'master' of github.com:RRZE-HPC/asmbench Julian Hammer 2019-07-17 17:26:03 +02:00
  • a509ce3be0 fix for hypothetical uneven parallel sequence lengths Julian Hammer 2019-07-17 17:25:14 +02:00
  • 3f63e2c3bb version bump Julian Hammer 2019-07-17 17:04:46 +02:00
  • 7241bfc722 improved tp benchmarks by interleaving serial sequences Julian Hammer 2019-07-17 17:02:41 +02:00
  • f422cbd1e6 passing frequency also to TP benchmark Julian Hammer 2019-07-17 14:50:24 +02:00
  • 80ae3a6036 Merge branch 'master' of github.com:RRZE-HPC/asmbench Julian Hammer 2019-07-17 11:53:08 +02:00
  • 242daeead3 increased parallel factor for load tp benchmark Julian Hammer 2019-07-17 11:52:31 +02:00
  • 79544033f0 graceful failing IACA analysis errors with -vvv Julian Hammer 2019-07-16 13:22:08 +02:00
  • a89a96046f some frequency fixes Julian Hammer 2019-07-16 10:20:24 +02:00
  • 164eb03bf4 added (-f|--frequency) argument to cli of oldjit and asmbench Julian Hammer 2019-07-16 09:38:42 +02:00
  • 0e8157c594 fixed LD LAT result metric problem Julian Hammer 2019-07-15 18:02:20 +02:00
  • 7961659d85 adde console script asmbench Julian Hammer 2019-02-01 13:49:18 +01:00
  • d218b55a50 better error message Julian Hammer 2019-02-01 10:50:44 +01:00
  • f3ed5a0695 added sc18 src poster and summary Julian Hammer 2019-01-17 13:41:20 +01:00
  • dd882088da removed irrelevant test files v0.1.2 Julian Hammer 2018-09-25 12:34:37 +02:00
  • 54c485576f readded lost folder Julian Hammer 2018-09-25 12:33:27 +02:00
  • 5f3217c59f final commit for poster publication Julian Hammer 2018-09-25 10:55:07 +02:00
  • 21fb4d1c4d changed to rst readme Julian Hammer 2018-09-25 10:37:09 +02:00
  • 2cd25b4bcd added manifest file Julian Hammer 2018-09-25 10:31:23 +02:00
  • dbbd37585a renamed to asmbench Julian Hammer 2018-09-25 10:23:40 +02:00
  • 3033246d4e Create sc18src_artifact_appendix.md Julian 2018-09-17 16:04:33 +02:00
  • 515b28cb4e added src extras Julian Hammer 2018-08-02 10:49:49 +02:00
  • c5f82d8ec2 reordered instructions Julian Hammer 2018-07-30 10:04:03 +02:00
  • 0f6c440421 added div to benchmark Julian Hammer 2018-07-30 10:02:07 +02:00
  • 6172203aaf made repeat and elapstime configurable Julian Hammer 2018-07-30 09:53:13 +02:00
  • cc51b232c2 workaround from ryzen / xen - llvm bug Julian Hammer 2018-07-27 16:44:43 +02:00
  • d9bc86456d IACA report now available with -vvv Julian Hammer 2018-07-27 14:40:16 +02:00
  • 60ed2d2877 added zero runtime handling Julian Hammer 2018-07-27 12:43:52 +02:00
  • e4c5b66741 handling overflow error in argument preperation Julian Hammer 2018-07-27 12:30:18 +02:00
  • 50c4da06f6 updated output Julian Hammer 2018-07-27 11:00:22 +02:00
  • 0dbf6b655b updated parameters Julian Hammer 2018-07-26 16:35:32 +02:00
  • 55ac8a142d added initial SRC script Julian Hammer 2018-07-26 16:03:34 +02:00
  • 6358dea1b0 added LICENSE and updated README.md Julian Hammer 2018-07-24 13:12:53 +02:00
  • 305f00f859 reduced register use in throughput mode Julian Hammer 2018-07-11 16:23:22 +02:00
  • 6786c399ad added support for iaca analysis Julian Hammer 2018-07-10 14:26:19 +02:00
  • 3dac7d6795 added cli support for serialized instructions Julian Hammer 2018-07-05 14:25:15 +02:00
  • a4fee9bc06 removed development code Julian Hammer 2018-07-05 12:50:01 +02:00
  • 654e2cd62f finalizing CLI, started with mem support Julian Hammer 2018-07-04 16:53:06 +02:00
  • 7a6d2e91ce fixed random selection and initial value constants Julian Hammer 2018-06-27 15:16:18 +02:00
  • 0349de9e64 first CLI :) Julian Hammer 2018-06-26 15:11:35 +02:00
  • 39659ee257 first steps towards a usable lib and cli Julian Hammer 2018-06-25 18:30:23 +02:00
  • 5e52c3fe17 major cleanup in tablegen Julian Hammer 2018-06-22 16:14:36 +02:00
  • 437eaadad4 code cleanups Julian Hammer 2018-06-22 10:25:47 +02:00
  • 239bf40d2c removed id from repr output Julian Hammer 2018-06-15 14:38:36 +02:00
  • 780880e264 yay, an upgrade of llvmlite fixed my issues Julian Hammer 2018-06-15 12:38:56 +02:00
  • 8d79aed894 added support of correct dstsrc register constraints to tablegen Julian Hammer 2018-06-14 15:55:42 +02:00
  • e9cc5d2a00 fix for same source and destination registers Julian Hammer 2018-06-14 14:23:37 +02:00
  • 7859acdaa2 bench is now up to speed with op Julian Hammer 2018-06-13 17:23:22 +02:00
  • 990f020684 new register naming scheme Julian Hammer 2018-06-12 15:29:57 +02:00
  • 598f231138 this commit is a deadend Julian Hammer 2018-06-06 17:11:50 +02:00
  • 03e35d48ce slow progess, but progress nonetheless Julian Hammer 2018-05-30 14:22:02 +02:00
  • 0b4ef84285 work in progress Julian Hammer 2018-05-25 17:08:33 +02:00
  • e30e8b0a38 first complete x86 tablegen workflow (very dirty) Julian Hammer 2018-05-23 17:32:20 +02:00
  • cb131f1007 slow porgress Julian Hammer 2018-05-17 18:12:32 +02:00
  • bf191f71d1 first steps into parsing tablegen output Julian Hammer 2018-05-15 16:37:12 +02:00
  • 91a0a209d8 first compiling code after rewrite Julian Hammer 2018-05-15 10:19:41 +02:00
  • 6053bed320 reimplementation to represent basic block Julian Hammer 2018-05-14 15:03:29 +02:00
  • 537be3228f first try at a clean implementation Julian Hammer 2018-05-09 18:55:49 +02:00
  • 17c1311e3b wip Julian Hammer 2018-05-09 13:12:44 +02:00
  • 04dc52996d simplified template code Julian Hammer 2018-05-07 15:34:09 +02:00
  • 6cf44c3d93 initial support for complete lat and tp benchmark Julian Hammer 2018-05-07 13:58:14 +02:00
  • 913166cf17 example benchmarks are now clean Julian Hammer 2018-05-04 14:14:14 +02:00
  • 477ec2c78b added support for serial chains and dynamic iteration count scaling Julian Hammer 2018-05-04 10:01:52 +02:00
  • 745766249a resting fp loop Julian Hammer 2018-05-02 10:46:22 +02:00
  • 0e0f366be6 reduced complexity of load benchmarks Julian Hammer 2018-04-27 16:49:05 +02:00
  • 1b60a4b54f added support for dst_operands Julian Hammer 2018-04-27 14:32:20 +02:00
  • ff57962ed2 added vmulpd Julian Hammer 2018-04-27 13:59:08 +02:00
  • 4a39c95270 fixed target machine creation Julian Hammer 2018-04-27 13:47:49 +02:00
  • 455297e68d split build process over seperate functions Julian Hammer 2018-04-25 16:54:22 +02:00
  • 85fa366dcb corrected naming Julian Hammer 2018-04-25 16:27:55 +02:00
  • 1dcf8bbddf reduced classes and code Julian Hammer 2018-04-25 16:25:45 +02:00
  • e630a6ef48 adde throughput benchmarks for arithmetic, lea and load Julian Hammer 2018-04-25 13:45:07 +02:00
  • 50ec0b0674 fixed random pointer ring generation Julian Hammer 2018-04-24 16:43:06 +02:00
  • 216eac27cd enabled more load latency tests Julian Hammer 2018-04-24 15:07:39 +02:00
  • 5d122d1cad added load latency test Julian Hammer 2018-04-24 14:50:09 +02:00
  • c1f5a75d06 added support for address generation latency tests Julian Hammer 2018-04-23 15:37:12 +02:00
  • d2754eeb99 fixed handwritten example code Julian Hammer 2018-04-23 15:36:48 +02:00
  • f859524e47 fixed example Julian Hammer 2018-04-20 14:25:49 +02:00
  • 11482d2595 additional example Julian Hammer 2018-04-20 14:24:24 +02:00
  • 17103e663a first steps to support memory references Julian Hammer 2018-04-20 13:46:05 +02:00
  • 114262fe25 extracted development ll codes Julian Hammer 2018-04-18 23:08:18 +02:00
  • 19cc7cf8f9 work in progress Julian Hammer 2018-04-18 17:31:33 +02:00
  • ae20079726 added latency example Julian Hammer 2018-04-18 10:20:11 +02:00
  • 7eb7de2c3b first throughput experiments Julian Hammer 2018-04-17 16:47:45 +02:00
  • 0a0d699611 fixed frequency calculation Julian Hammer 2018-04-17 16:05:44 +02:00
  • d425cef77a code hygiene Julian Hammer 2018-04-17 15:51:13 +02:00