From 07540a8fd19a56106bc76dd8ab73c6efc7aaba07 Mon Sep 17 00:00:00 2001
From: FH <fh3095-gitcommit@yahoo.com>
Date: Thu, 1 Jan 2026 21:12:46 +0100
Subject: [PATCH] esp32/modesp32: Update available RTC pins for ESP32C6.

According to
https://wiki.seeedstudio.com/xiao_esp32c6_getting_started/#demo1-deep-sleep-with-external-wake-up
and
https://docs.espressif.com/projects/esp-idf/en/stable/esp32c6/api-reference/peripherals/gpio.html
ESP32C6 supports RTC/LP on Pins 0-7.

Signed-off-by: FH <fh3095-gitcommit@yahoo.com>
---
 ports/esp32/modesp32.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/ports/esp32/modesp32.h b/ports/esp32/modesp32.h
index 60c386565b..6b6a6578a7 100644
--- a/ports/esp32/modesp32.h
+++ b/ports/esp32/modesp32.h
@@ -32,6 +32,21 @@
     )
     #define RTC_LAST_EXT_PIN 21
 
+#elif CONFIG_IDF_TARGET_ESP32C6
+
+    #define RTC_VALID_EXT_PINS \
+    ( \
+    (1ll << 0) | \
+    (1ll << 1) | \
+    (1ll << 2) | \
+    (1ll << 3) | \
+    (1ll << 4) | \
+    (1ll << 5) | \
+    (1ll << 6) | \
+    (1ll << 7)   \
+    )
+    #define RTC_LAST_EXT_PIN 7
+
 #else
 
     #define RTC_VALID_EXT_PINS \