From 0acac07a16dd900eead199e506d6dc001692e88d Mon Sep 17 00:00:00 2001
From: Damien George <damien@micropython.org>
Date: Mon, 3 Nov 2025 23:53:45 +1100
Subject: [PATCH] stm32/eth_phy: Move PHY initialization to a dedicated
 function.

Signed-off-by: Damien George <damien@micropython.org>
---
 ports/stm32/eth.c     | 7 ++++---
 ports/stm32/eth_phy.c | 6 ++++++
 ports/stm32/eth_phy.h | 1 +
 3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/ports/stm32/eth.c b/ports/stm32/eth.c
index 5f2478f082..c2155399eb 100644
--- a/ports/stm32/eth.c
+++ b/ports/stm32/eth.c
@@ -142,6 +142,7 @@ typedef struct _eth_t {
     struct netif netif;
     struct dhcp dhcp_struct;
     uint32_t phy_addr;
+    void (*phy_init)(uint32_t phy_addr);
     int16_t (*phy_get_link_status)(uint32_t phy_addr);
 } eth_t;
 
@@ -212,6 +213,7 @@ int eth_init(eth_t *self, int mac_idx, uint32_t phy_addr, int phy_type) {
     mp_hal_get_mac(mac_idx, &self->netif.hwaddr[0]);
     self->netif.hwaddr_len = 6;
     self->phy_addr = phy_addr;
+    self->phy_init = eth_phy_generic_init;
     if (phy_type == ETH_PHY_DP83825 || phy_type == ETH_PHY_DP83848) {
         self->phy_get_link_status = eth_phy_dp838xx_get_link_status;
     } else if (phy_type == ETH_PHY_LAN8720 || phy_type == ETH_PHY_LAN8742) {
@@ -417,9 +419,8 @@ static int eth_mac_init(eth_t *self) {
     ETH->DMA_CH[TX_DMA_CH].DMACCR &= ~(ETH_DMACxCR_DSL_Msk);
     #endif
 
-    // Reset the PHY
-    eth_phy_write(self->phy_addr, PHY_BCR, PHY_BCR_SOFT_RESET);
-    mp_hal_delay_ms(50);
+    // Reset and initialize the PHY.
+    self->phy_init(self->phy_addr);
 
     // Wait for the PHY link to be established
     int phy_state = 0;
diff --git a/ports/stm32/eth_phy.c b/ports/stm32/eth_phy.c
index 5b4673cc77..fa4364a910 100644
--- a/ports/stm32/eth_phy.c
+++ b/ports/stm32/eth_phy.c
@@ -48,6 +48,12 @@
 #define PHY_RTL8211_PHYSR_SPEED_Msk     (3 << PHY_RTL8211_PHYSR_SPEED_Pos)
 #define PHY_RTL8211_PHYSR_DUPLEX_Msk    (0x0008)
 
+void eth_phy_generic_init(uint32_t phy_addr) {
+    // Reset the PHY.
+    eth_phy_write(phy_addr, PHY_BCR, PHY_BCR_SOFT_RESET);
+    mp_hal_delay_ms(50);
+}
+
 int16_t eth_phy_lan87xx_get_link_status(uint32_t phy_addr) {
     // Get the link mode & speed
     uint16_t scsr = eth_phy_read(phy_addr, PHY_SCSR_LAN87XX);
diff --git a/ports/stm32/eth_phy.h b/ports/stm32/eth_phy.h
index 79f0d7003b..c369de1f43 100644
--- a/ports/stm32/eth_phy.h
+++ b/ports/stm32/eth_phy.h
@@ -61,6 +61,7 @@
 uint32_t eth_phy_read(uint32_t phy_addr, uint32_t reg);
 void eth_phy_write(uint32_t phy_addr, uint32_t reg, uint32_t val);
 
+void eth_phy_generic_init(uint32_t phy_addr);
 int16_t eth_phy_lan87xx_get_link_status(uint32_t phy_addr);
 int16_t eth_phy_dp838xx_get_link_status(uint32_t phy_addr);
 int16_t eth_phy_rtl8211_get_link_status(uint32_t phy_addr);