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py/emitinlinextensa: Add the rest of LX3 opcodes to the assembler.
This commit expands the Xtensa inline assembler to support most if not all opcodes available on the ESP8266 and LX3 Xtensa cores. This is meant as a stepping stone to add inline assembler support for the ESP32 and its LX6 core, along to windowed-specific opcodes and additional opcodes that are present only on the LX7 core (ESP32-S3 and later). New opcodes being added are covered by tests, and the provided tests were expanded to also include opcodes available in the existing implementation. Given that the ESP8266 space requirements are tighter than ESP32's, certain opcodes that won't be commonly used have been put behind a define to save some space in the general use case. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit is contained in:
committed by
Damien George
parent
555f1cf488
commit
1006ed69f0
@@ -406,6 +406,11 @@
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#define MICROPY_EMIT_INLINE_XTENSA (0)
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#endif
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// Whether to support uncommon Xtensa inline assembler opcodes
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#ifndef MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES
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#define MICROPY_EMIT_INLINE_XTENSA_UNCOMMON_OPCODES (0)
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#endif
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// Whether to emit Xtensa-Windowed native code
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#ifndef MICROPY_EMIT_XTENSAWIN
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#define MICROPY_EMIT_XTENSAWIN (0)
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