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mpy-cross: Add RISC-V RV64IMC support in MPY files.

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MPY files can now hold data to be run on RV64IMC.  This can be
accomplished by passing the `-march=rv64imc` flag to mpy-cross.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit is contained in:
Alessandro Gatti
2024-09-29 17:40:17 +02:00
committed by Damien George
parent ec1bfcfbb7
commit 1b92bda5b8
6 changed files with 16 additions and 4 deletions
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2
docs/reference/mpyfiles.rst
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@@ -58,7 +58,7 @@ If importing an .mpy file fails then try the following:
sys_mpy = sys.implementation._mpy
arch = [None, 'x86', 'x64',
'armv6', 'armv6m', 'armv7m', 'armv7em', 'armv7emsp', 'armv7emdp',
'xtensa', 'xtensawin', 'rv32imc'][sys_mpy >> 10]
'xtensa', 'xtensawin', 'rv32imc', 'rv64imc'][sys_mpy >> 10]
print('mpy version:', sys_mpy & 0xff)
print('mpy sub-version:', sys_mpy >> 8 & 3)
print('mpy flags:', end='')

9
mpy-cross/main.c
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@@ -130,7 +130,8 @@ static int usage(char **argv) {
"Target specific options:\n"
"-msmall-int-bits=number : set the maximum bits used to encode a small-int\n"
"-march=<arch> : set architecture for native emitter;\n"
" x86, x64, armv6, armv6m, armv7m, armv7em, armv7emsp, armv7emdp, xtensa, xtensawin, rv32imc, host, debug\n"
" x86, x64, armv6, armv6m, armv7m, armv7em, armv7emsp,\n"
" armv7emdp, xtensa, xtensawin, rv32imc, rv64imc, host, debug\n"
"\n"
"Implementation specific options:\n", argv[0]
);
@@ -316,6 +317,9 @@ MP_NOINLINE int main_(int argc, char **argv) {
} else if (strcmp(arch, "rv32imc") == 0) {
mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_RV32IMC;
mp_dynamic_compiler.nlr_buf_num_regs = MICROPY_NLR_NUM_REGS_RV32I;
} else if (strcmp(arch, "rv64imc") == 0) {
mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_RV64IMC;
mp_dynamic_compiler.nlr_buf_num_regs = MICROPY_NLR_NUM_REGS_RV64I;
} else if (strcmp(arch, "debug") == 0) {
mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_DEBUG;
mp_dynamic_compiler.nlr_buf_num_regs = 0;
@@ -329,6 +333,9 @@ MP_NOINLINE int main_(int argc, char **argv) {
#elif defined(__arm__) && !defined(__thumb2__)
mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_ARMV6;
mp_dynamic_compiler.nlr_buf_num_regs = MICROPY_NLR_NUM_REGS_ARM_THUMB_FP;
#elif defined(__riscv) && (__riscv_xlen == 64)
mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_RV64IMC;
mp_dynamic_compiler.nlr_buf_num_regs = MICROPY_NLR_NUM_REGS_RV64I;
#else
mp_printf(&mp_stderr_print, "unable to determine host architecture for -march=host\n");
exit(1);

1
mpy-cross/mpy_cross/__init__.py
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@@ -43,6 +43,7 @@ NATIVE_ARCHS = {
"NATIVE_ARCH_XTENSA": "xtensa",
"NATIVE_ARCH_XTENSAWIN": "xtensawin",
"NATIVE_ARCH_RV32IMC": "rv32imc",
"NATIVE_ARCH_RV64IMC": "rv64imc",
}
globals().update(NATIVE_ARCHS)

1
py/persistentcode.h
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@@ -98,6 +98,7 @@ enum {
MP_NATIVE_ARCH_XTENSA,
MP_NATIVE_ARCH_XTENSAWIN,
MP_NATIVE_ARCH_RV32IMC,
MP_NATIVE_ARCH_RV64IMC,
MP_NATIVE_ARCH_DEBUG, // this entry should always be last
};

1
tests/feature_check/target_info.py
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@@ -19,6 +19,7 @@ arch = [
"xtensa",
"xtensawin",
"rv32imc",
"rv64imc",
][sys_mpy >> 10]
build = getattr(sys.implementation, "_build", "unknown")
thread = getattr(sys.implementation, "_thread", None)

6
tools/mpy-tool.py
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@@ -94,6 +94,7 @@ MP_NATIVE_ARCH_ARMV7EMDP = 8
MP_NATIVE_ARCH_XTENSA = 9
MP_NATIVE_ARCH_XTENSAWIN = 10
MP_NATIVE_ARCH_RV32IMC = 11
MP_NATIVE_ARCH_RV64IMC = 12
MP_PERSISTENT_OBJ_FUN_TABLE = 0
MP_PERSISTENT_OBJ_NONE = 1
@@ -1061,6 +1062,7 @@ class RawCodeNative(RawCode):
MP_NATIVE_ARCH_XTENSA,
MP_NATIVE_ARCH_XTENSAWIN,
MP_NATIVE_ARCH_RV32IMC,
MP_NATIVE_ARCH_RV64IMC,
):
self.fun_data_attributes = '__attribute__((section(".text,\\"ax\\",@progbits # ")))'
else:
@@ -1078,8 +1080,8 @@ class RawCodeNative(RawCode):
self.fun_data_attributes += " __attribute__ ((aligned (4)))"
elif (
MP_NATIVE_ARCH_ARMV6M <= config.native_arch <= MP_NATIVE_ARCH_ARMV7EMDP
) or config.native_arch == MP_NATIVE_ARCH_RV32IMC:
# ARMVxxM or RV32IMC -- two byte align.
) or MP_NATIVE_ARCH_RV32IMC <= config.native_arch <= MP_NATIVE_ARCH_RV64IMC:
# ARMVxxM or RV{32,64}IMC -- two byte align.
self.fun_data_attributes += " __attribute__ ((aligned (2)))"
def disassemble(self):