From 230bbbbdf5793008d2cdfa40b33f7473312c1d55 Mon Sep 17 00:00:00 2001 From: Oliver Joos Date: Thu, 18 Dec 2025 13:47:37 +0100 Subject: [PATCH] stm32/boards/NUCLEO_H7x3: Add UART1, remove UART5, slow down PLL1Q. STM32CubeMX shows a conflict of UART5 with ETH MII. However UART1 can be used with TX and RX on the pin headers. PLL1Q is reduced from 200 to 100 MHz because it may be used for FDCAN or SDMMC. FDCAN needs <= 150 MHz, and 100 MHz is enough for an SDCard connected to pin headers to work reliably. Signed-off-by: Oliver Joos --- ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h | 8 +++++--- ports/stm32/boards/NUCLEO_H743ZI/pins.csv | 2 ++ ports/stm32/boards/NUCLEO_H743ZI2/pins.csv | 2 ++ ports/stm32/boards/NUCLEO_H753ZI/pins.csv | 2 ++ 4 files changed, 11 insertions(+), 3 deletions(-) diff --git a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h index 4c053828fa..9078a3ef77 100644 --- a/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h +++ b/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h @@ -17,7 +17,7 @@ void NUCLEO_H743ZI_board_early_init(void); #define MICROPY_HW_CLK_PLLM (4) #define MICROPY_HW_CLK_PLLN (400) #define MICROPY_HW_CLK_PLLP (2) -#define MICROPY_HW_CLK_PLLQ (4) +#define MICROPY_HW_CLK_PLLQ (8) #define MICROPY_HW_CLK_PLLR (2) #define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_1) #define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE) @@ -37,14 +37,16 @@ void NUCLEO_H743ZI_board_early_init(void); #define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4 // UART config +#define MICROPY_HW_UART1_TX (pin_B6) +#define MICROPY_HW_UART1_RX (pin_B15) #define MICROPY_HW_UART2_TX (pin_D5) #define MICROPY_HW_UART2_RX (pin_D6) #define MICROPY_HW_UART2_RTS (pin_D4) #define MICROPY_HW_UART2_CTS (pin_D3) #define MICROPY_HW_UART3_TX (pin_D8) #define MICROPY_HW_UART3_RX (pin_D9) -#define MICROPY_HW_UART5_TX (pin_B6) -#define MICROPY_HW_UART5_RX (pin_B12) +// #define MICROPY_HW_UART5_TX (pin_B6) // conflict with UART1_TX +// #define MICROPY_HW_UART5_RX (pin_B12) // conflict with Ethernet MII mode #define MICROPY_HW_UART6_TX (pin_C6) #define MICROPY_HW_UART6_RX (pin_C7) #define MICROPY_HW_UART7_TX (pin_F7) diff --git a/ports/stm32/boards/NUCLEO_H743ZI/pins.csv b/ports/stm32/boards/NUCLEO_H743ZI/pins.csv index d3647ca42a..9c1ad7d710 100644 --- a/ports/stm32/boards/NUCLEO_H743ZI/pins.csv +++ b/ports/stm32/boards/NUCLEO_H743ZI/pins.csv @@ -105,6 +105,8 @@ USB_VBUS,PA9 USB_ID,PA10 USB_DM,PA11 USB_DP,PA12 +UART1_TX,PB6 +UART1_RX,PB15 UART2_TX,PD5 UART2_RX,PD6 UART2_RTS,PD4 diff --git a/ports/stm32/boards/NUCLEO_H743ZI2/pins.csv b/ports/stm32/boards/NUCLEO_H743ZI2/pins.csv index 450d6e432a..7d964c1ab6 100644 --- a/ports/stm32/boards/NUCLEO_H743ZI2/pins.csv +++ b/ports/stm32/boards/NUCLEO_H743ZI2/pins.csv @@ -105,6 +105,8 @@ USB_VBUS,PA9 USB_ID,PA10 USB_DM,PA11 USB_DP,PA12 +UART1_TX,PB6 +UART1_RX,PB15 UART2_TX,PD5 UART2_RX,PD6 UART2_RTS,PD4 diff --git a/ports/stm32/boards/NUCLEO_H753ZI/pins.csv b/ports/stm32/boards/NUCLEO_H753ZI/pins.csv index 450d6e432a..7d964c1ab6 100644 --- a/ports/stm32/boards/NUCLEO_H753ZI/pins.csv +++ b/ports/stm32/boards/NUCLEO_H753ZI/pins.csv @@ -105,6 +105,8 @@ USB_VBUS,PA9 USB_ID,PA10 USB_DM,PA11 USB_DP,PA12 +UART1_TX,PB6 +UART1_RX,PB15 UART2_TX,PD5 UART2_RX,PD6 UART2_RTS,PD4