diff --git a/ports/alif/boards/OPENMV_AE3/board.c b/ports/alif/boards/OPENMV_AE3/board.c index 65da152d85..249c435cc8 100644 --- a/ports/alif/boards/OPENMV_AE3/board.c +++ b/ports/alif/boards/OPENMV_AE3/board.c @@ -139,17 +139,21 @@ void board_early_init(void) { // CLK_SRC_HFRC, CLK_SRC_HFXO or CLK_SRC_PLL .stby_clk_src = CLK_SRC_HFRC, .stby_clk_freq = SCALED_FREQ_RC_STDBY_76_8_MHZ, - // Disable all power domains. - .power_domains = 0, - // Add all memories - .memory_blocks = SERAM_MASK | SRAM0_MASK | SRAM1_MASK | MRAM_MASK | BACKUP4K_MASK | - SRAM6A_MASK | SRAM6B_MASK | SRAM7_1_MASK | SRAM7_2_MASK | SRAM7_3_MASK | - SRAM8_MASK | SRAM9_MASK | FWRAM_MASK, + // Disable all power domains except AON. + .power_domains = PD_VBAT_AON_MASK, + // Keep SERAM, MRAM and backup SRAM on. + // (SRAM0 also needs to stay on because it's used for .bss.sram0 which is zerod + // by the runtime before the run profile is configured.) + .memory_blocks = SERAM_MASK | SRAM0_MASK | MRAM_MASK | BACKUP4K_MASK, + // Gate the clocks of IP blocks. + .ip_clock_gating = 0x3ffb, + // Gate PHY power (saves 0.5uA). .phy_pwr_gating = LDO_PHY_MASK | USB_PHY_MASK | MIPI_TX_DPHY_MASK | MIPI_RX_DPHY_MASK | MIPI_PLL_DPHY_MASK, .vdd_ioflex_3V3 = IOFLEX_LEVEL_3V3, .vtor_address = SCB->VTOR, .vtor_address_ns = SCB->VTOR, + // Configure wake-up sources. .ewic_cfg = EWIC_RTC_A, .wakeup_events = WE_LPRTC, }; @@ -165,6 +169,14 @@ void board_early_init(void) { } MP_WEAK void board_enter_stop(void) { + // Let USB_D_SEL float, so it doesn't source 30uA through the 110k resistors to GND. + mp_hal_pin_input(pin_USB_D_SEL); + + #if MICROPY_HW_ENABLE_OSPI + // SPI deep power down reduces deepsleep consumption by about 10uA at 3.3V. + ospi_flash_sleep(); + #endif + // Disable NPU interrupt NVIC_DisableIRQ(NPU_IRQ_NUMBER); NVIC_ClearPendingIRQ(NPU_IRQ_NUMBER);