diff --git a/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk
index 2fbb4ddbe2..1deebe6f1e 100644
--- a/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk
+++ b/ports/stm32/boards/NUCLEO_F412ZG/mpconfigboard.mk
@@ -1,7 +1,7 @@
 MCU_SERIES = f4
 CMSIS_MCU = STM32F412Zx
 AF_FILE = boards/stm32f412_af.csv
-LD_FILES = boards/stm32f412zx.ld boards/common_ifs.ld
+LD_FILES = boards/stm32f412xg.ld boards/common_ifs.ld
 TEXT0_ADDR = 0x08000000
 TEXT1_ADDR = 0x08020000
 
diff --git a/ports/stm32/boards/stm32f412xe.ld b/ports/stm32/boards/stm32f412xe.ld
new file mode 100644
index 0000000000..15b8d78f15
--- /dev/null
+++ b/ports/stm32/boards/stm32f412xe.ld
@@ -0,0 +1,35 @@
+/*
+    GNU linker script for STM32F412xe (512kB flash, 256kB RAM)
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
+    FLASH_START (rx): ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
+    FLASH_FS (rx)   : ORIGIN = 0x08004000, LENGTH = 64K /* sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k */
+    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5,6,7 are 128K */
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 240K
+    FS_CACHE (xrw)  : ORIGIN = 0x2003c000, LENGTH = 16K
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+
+/* Define the stack.  The stack is full descending so begins just above last byte
+   of RAM.  Note that EABI requires the stack to be 8-byte aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
+_sstack = _estack - 16K; /* tunable */
+
+/* RAM extents for the garbage collector */
+_ram_start = ORIGIN(RAM);
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_start = _ebss; /* heap starts just after statically allocated memory */
+_heap_end = _sstack;
+
+/* Filesystem cache in RAM, and storage in flash */
+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(FS_CACHE);
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(FS_CACHE) + LENGTH(FS_CACHE);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
diff --git a/ports/stm32/boards/stm32f412zx.ld b/ports/stm32/boards/stm32f412xg.ld
similarity index 96%
rename from ports/stm32/boards/stm32f412zx.ld
rename to ports/stm32/boards/stm32f412xg.ld
index b67f1c3e25..5b5ccb1d42 100644
--- a/ports/stm32/boards/stm32f412zx.ld
+++ b/ports/stm32/boards/stm32f412xg.ld
@@ -1,5 +1,5 @@
 /*
-    GNU linker script for STM32F412zx (1MB flash, 256kB RAM)
+    GNU linker script for STM32F412xg (1MB flash, 256kB RAM)
 */
 
 /* Specify the memory areas */