github/workflows: Add Alif port to CI.

Signed-off-by: iabdalkader <i.abdalkader@gmail.com>
This commit is contained in:
iabdalkader
2025-02-20 12:24:19 +01:00
committed by Damien George
parent 704d2f2d57
commit 547207ddc8
2 changed files with 48 additions and 0 deletions

View File

@@ -871,3 +871,18 @@ function ci_zephyr_run_tests {
# - inf_nan_arith fails pow(-1, nan) test
(cd tests && ./run-tests.py -t execpty:"qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -monitor null -serial pty -kernel ../ports/zephyr/build/zephyr/zephyr.elf" -d basics float --exclude inf_nan_arith)
}
########################################################################################
# ports/alif
function ci_alif_setup {
ci_gcc_arm_setup
}
function ci_alif_ae3_build {
make ${MAKEOPTS} -C mpy-cross
make ${MAKEOPTS} -C ports/alif BOARD=OPENMV_AE3 MCU_CORE=M55_HP submodules
make ${MAKEOPTS} -C ports/alif BOARD=OPENMV_AE3 MCU_CORE=M55_HE submodules
make ${MAKEOPTS} -C ports/alif BOARD=OPENMV_AE3 MCU_CORE=M55_DUAL
make ${MAKEOPTS} -C ports/alif BOARD=ALIF_ENSEMBLE MCU_CORE=M55_DUAL
}