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stm32: Add USB support for STM32L1 MCUs.

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Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com>
This commit is contained in:
Yuuki NAGAO
2023-06-20 16:13:19 +09:00
parent 813d559bc0
commit 7ca3c1d892
8 changed files with 49 additions and 24 deletions
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21
ports/stm32/powerctrlboot.c
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@@ -348,6 +348,8 @@ void SystemClock_Config(void) {
#elif defined(STM32L1)
void SystemClock_Config(void) {
// Enable SYSCFG clock
__HAL_RCC_SYSCFG_CLK_ENABLE();
// Enable power control peripheral
__HAL_RCC_PWR_CLK_ENABLE();
@@ -388,25 +390,6 @@ void SystemClock_Config(void) {
SystemCoreClockUpdate();
powerctrl_config_systick();
#if MICROPY_HW_ENABLE_USB
// Enable the 48MHz internal oscillator
RCC->CRRCR |= RCC_CRRCR_HSI48ON;
RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;
SYSCFG->CFGR3 |= SYSCFG_CFGR3_ENREF_HSI48;
while (!(RCC->CRRCR & RCC_CRRCR_HSI48RDY)) {
// Wait for HSI48 to be ready
}
// Select RC48 as HSI48 for USB and RNG
RCC->CCIPR |= RCC_CCIPR_HSI48SEL;
// Synchronise HSI48 with 1kHz USB SoF
__HAL_RCC_CRS_CLK_ENABLE();
CRS->CR = 0x20 << CRS_CR_TRIM_Pos;
CRS->CFGR = 2 << CRS_CFGR_SYNCSRC_Pos | 0x22 << CRS_CFGR_FELIM_Pos
| __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000) << CRS_CFGR_RELOAD_Pos;
#endif
// Disable the Debug Module in low-power mode due to prevent
// unexpected HardFault after __WFI().
#if !defined(NDEBUG)