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py/asm: Fix x86 and ARM assemblers due to recent code refactoring.
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@@ -39,7 +39,7 @@
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#define SIGNED_FIT24(x) (((x) & 0xff800000) == 0) || (((x) & 0xff000000) == 0xff000000)
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void asm_arm_end_pass(asm_arm_t *as) {
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if (as->pass == ASM_ARM_PASS_EMIT) {
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if (as->base.pass == ASM_ARM_PASS_EMIT) {
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#ifdef __arm__
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// flush I- and D-cache
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asm volatile(
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@@ -333,9 +333,9 @@ void asm_arm_strb_reg_reg_reg(asm_arm_t *as, uint rd, uint rm, uint rn) {
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}
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void asm_arm_bcc_label(asm_arm_t *as, int cond, uint label) {
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assert(label < as->max_num_labels);
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mp_uint_t dest = as->label_offsets[label];
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mp_int_t rel = dest - as->code_offset;
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assert(label < as->base.max_num_labels);
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mp_uint_t dest = as->base.label_offsets[label];
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mp_int_t rel = dest - as->base.code_offset;
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rel -= 8; // account for instruction prefetch, PC is 8 bytes ahead of this instruction
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rel >>= 2; // in ARM mode the branch target is 32-bit aligned, so the 2 LSB are omitted
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