From abbe883c0719c683fbb8382e204e4b50783fac24 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Sat, 18 Oct 2025 14:15:26 +0200 Subject: [PATCH] qemu/mcu/riscv: Implement ticks using the RDTIME control register. Signed-off-by: iabdalkader --- ports/qemu/Makefile | 2 ++ ports/qemu/mcu/riscv/ticks.c | 68 ++++++++++++++++++++++++++++++++++++ 2 files changed, 70 insertions(+) create mode 100644 ports/qemu/mcu/riscv/ticks.c diff --git a/ports/qemu/Makefile b/ports/qemu/Makefile index 4325a96f93..03f004c753 100644 --- a/ports/qemu/Makefile +++ b/ports/qemu/Makefile @@ -110,6 +110,7 @@ LDFLAGS += -mabi=$(RV32_ABI) -march=$(RV32_ARCH) -Wl,-EL SRC_C += \ mcu/rv32/interrupts.c \ mcu/rv32/startup.c \ + mcu/riscv/ticks.c \ SRC_BOARD_O += mcu/rv32/entrypoint.o @@ -143,6 +144,7 @@ LDFLAGS += -mabi=$(RV64_ABI) -march=$(RV64_ARCH) -Wl,-EL -mcmodel=medany SRC_C += \ mcu/rv64/interrupts.c \ mcu/rv64/startup.c \ + mcu/riscv/ticks.c \ SRC_BOARD_O += mcu/rv64/entrypoint.o diff --git a/ports/qemu/mcu/riscv/ticks.c b/ports/qemu/mcu/riscv/ticks.c new file mode 100644 index 0000000000..2ab5219945 --- /dev/null +++ b/ports/qemu/mcu/riscv/ticks.c @@ -0,0 +1,68 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2025 Ibrahim Abdelkader + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include + +// RISC-V timebase frequency for QEMU +#ifndef TIMEBASE_FREQ_HZ +#define TIMEBASE_FREQ_HZ 10000000u +#endif + +static uint64_t ticks_get_ticks(void) { + #if __riscv_xlen < 64 + uint32_t ticks_lo = 0; + uint32_t ticks_hi = 0; + uint32_t rollover = 0; + do { + __asm volatile ( + "rdtimeh %0 \n" + "rdtime %1 \n" + "rdtimeh %2 \n" + : "=r" (ticks_hi), "=r" (ticks_lo), "=r" (rollover) + : + : + ); + } while (ticks_hi != rollover); + return ((uint64_t)(ticks_hi) << 32ULL) | (uint64_t)(ticks_lo); + #else + uint64_t ticks = 0; + __asm volatile ( + "rdtime %0 \n" + : "=r" (ticks) + : + : + ); + return ticks; + #endif +} + +uintptr_t ticks_ms(void) { + return (uintptr_t)(ticks_get_ticks() / (TIMEBASE_FREQ_HZ / 1000)); +} + +uintptr_t ticks_us(void) { + return (uintptr_t)(ticks_get_ticks() / (TIMEBASE_FREQ_HZ / 1000000)); +}